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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
PHIEliminationUtils.cpp 40 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
41 for (MachineInstr &RI : MRI.def_instructions(SrcReg))
MachineStableHash.cpp 66 const MachineRegisterInfo &MRI = MO.getParent()->getMF()->getRegInfo();
67 return MRI.getVRegDef(MO.getReg())->getOpcode();
CalcSpillWeights.cpp 36 MachineRegisterInfo &MRI = MF.getRegInfo();
37 for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
39 if (MRI.reg_nodbg_empty(Reg))
48 const MachineRegisterInfo &MRI) {
67 const TargetRegisterClass *rc = MRI.getRegClass(Reg);
154 MachineRegisterInfo &MRI = MF.getRegInfo();
164 std::pair<Register, Register> TargetHint = MRI.getRegAllocationHint(LI.reg());
219 I = MRI.reg_instr_nodbg_begin(LI.reg()),
220 E = MRI.reg_instr_nodbg_end();
267 Register HintReg = copyHint(MI, LI.reg(), TRI, MRI);
    [all...]
CriticalAntiDepBreaker.h 38 MachineRegisterInfo &MRI;
DeadMachineInstructionElim.cpp 35 const MachineRegisterInfo *MRI;
85 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
92 for (auto &U : MRI->use_nodbg_operands(Reg))
97 for (const MachineInstr &Use : MRI->use_nodbg_instructions(Reg)) {
121 MRI = &MF.getRegInfo();
130 LivePhysRegs = MRI->getReservedRegs();
LiveRegUnits.cpp 83 const MachineRegisterInfo &MRI = MF.getRegInfo();
85 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR) {
MIRVRegNamerUtils.h 48 MachineRegisterInfo &MRI;
85 VRegRenamer(MachineRegisterInfo &MRI) : MRI(MRI) {}
RegAllocBase.h 65 MachineRegisterInfo *MRI = nullptr;
TargetFrameLoweringImpl.cpp 121 const MachineRegisterInfo &MRI = MF.getRegInfo();
124 if (CallsUnwindInit || MRI.isPhysRegModified(Reg))
TargetRegisterInfo.cpp 71 const MachineRegisterInfo &MRI = MF.getRegInfo();
72 MachineInstr *MI = MRI.getUniqueVRegDef(VirtReg.reg());
111 unsigned SubIdx, const MachineRegisterInfo *MRI) {
112 return Printable([Reg, TRI, SubIdx, MRI](raw_ostream &OS) {
118 StringRef Name = MRI ? MRI->getVRegName(Reg) : "";
270 const MachineRegisterInfo &MRI = MF.getRegInfo();
271 const BitVector &Reserved = MRI.getReservedRegs();
425 const MachineRegisterInfo &MRI = MF.getRegInfo();
427 MRI.getRegAllocationHints(VirtReg)
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
Combiner.h 39 MachineRegisterInfo *MRI = nullptr;
Localizer.h 49 /// MRI contains all the register class/bank information that this
51 MachineRegisterInfo *MRI;
LegalizerHelper.h 47 MachineRegisterInfo &MRI;
412 MachineRegisterInfo &MRI,
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
ARMAsmBackendDarwin.h 18 const MCRegisterInfo &MRI;
23 const MCRegisterInfo &MRI)
24 : ARMAsmBackend(T, STI, support::little), MRI(MRI),
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsCallLowering.h 29 MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
30 : MIRBuilder(MIRBuilder), MRI(MRI) {}
44 MachineRegisterInfo &MRI;
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
MachineSSAUpdater.h 51 MachineRegisterInfo *MRI;
TailDuplicator.h 44 MachineRegisterInfo *MRI;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUMacroFusion.cpp 44 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
45 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/
InstrBuilder.h 41 const MCRegisterInfo &MRI;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.h 34 MachineRegisterInfo *MRI;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64GlobalISelUtils.cpp 22 const MachineRegisterInfo &MRI) {
23 if (auto Splat = getVectorSplat(MI, MRI))
29 getConstantVRegValWithLookThrough(MI.getOperand(1).getReg(), MRI))
36 const MachineRegisterInfo &MRI) {
37 auto Splat = getAArch64VectorSplat(MI, MRI);
45 const MachineRegisterInfo &MRI) {
59 getConstantVRegValWithLookThrough(MaybeSub->getOperand(1).getReg(), MRI);
67 MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
71 auto Zero = getConstantVRegValWithLookThrough(MI.getOperand(1).getReg(), MRI);
82 getConstantVRegValWithLookThrough(MI.getOperand(2).getReg(), MRI)) {
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
RDFDeadCode.h 35 DeadCodeElimination(DataFlowGraph &dfg, MachineRegisterInfo &mri)
36 : Trace(false), DFG(dfg), MRI(mri), LV(mri, dfg) {}
53 MachineRegisterInfo &MRI;
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXInstrInfo.cpp 36 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
37 const TargetRegisterClass *DestRC = MRI.getRegClass(DestReg);
38 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg);
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyAsmPrinter.h 23 const MachineRegisterInfo *MRI;
38 : AsmPrinter(TM, std::move(Streamer)), Subtarget(nullptr), MRI(nullptr),
56 MRI = &MF.getRegInfo();
WebAssemblyLowerBrUnless.cpp 63 auto &MRI = MF.getRegInfo();
76 assert(MRI.hasOneDef(Cond));
77 MachineInstr *Def = MRI.getVRegDef(Cond);
191 Register Tmp = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
194 MFI.stackifyVReg(MRI, Tmp);

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