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    Searched defs:Masked (Results 1 - 11 of 11) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelDAGToDAG.h 97 uint8_t Masked;
107 uint8_t Masked;
117 uint8_t Masked;
126 uint8_t Masked;
135 uint8_t Masked;
144 uint8_t Masked;
152 uint8_t Masked;
RISCVISelLowering.cpp 4373 // the selection of the masked intrinsics doesn't do this for us.
4454 // the selection of the masked intrinsics doesn't do this for us.
4525 SDValue Masked = DAG.getNode(ISD::AND, DL, XLenVT, Shifted,
4528 return DAG.getMergeValues({Masked, Chain}, DL);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TypePromotion.cpp 66 // byte value is masked out as follows:
668 Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask);
670 if (auto *I = dyn_cast<Instruction>(Masked))
673 ReplaceAllUsersOfWith(Trunc, Masked);
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineShifts.cpp 191 Value *Masked, *ShiftShAmt;
193 m_Shift(m_Value(Masked), m_ZExtOrSelf(m_Value(ShiftShAmt))));
198 if (match(Masked, m_CombineAnd(m_Trunc(m_Value(Masked)), m_Value(Trunc))) &&
203 Type *WidestTy = Masked->getType();
225 if (match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X)))) {
230 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked,
255 } else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X))) ||
256 match(Masked, m_Shr(m_Shl(m_Value(X), m_Value(MaskShAmt)),
262 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked,
    [all...]
InstCombineAndOrXor.cpp 231 /// Convert an analysis of a masked ICmp into its equivalent if all boolean
292 // Any icmp can be viewed as being trivially masked; if it allows us to
523 "Expected equality predicates for masked type of icmps.");
560 "Expected equality predicates for masked type of icmps.");
828 Value *Masked = Builder.CreateAnd(L1, Mask);
830 return Builder.CreateICmp(NewPred, Masked, Mask);
864 /// masked bits are zero.
1857 Value *NewRHS = Builder.CreateAnd(Y, Op1, Y->getName() + ".masked");
1863 Value *NewLHS = Builder.CreateAnd(X, Op1, X->getName() + ".masked");
2177 // The shift amount may be masked with negation
    [all...]
InstCombineCompares.cpp 105 /// If AndCst is non-null, then the loaded value is masked with that constant
193 // If the element is masked, handle it.
1319 Value *Masked = Builder.CreateAnd(X, Mask);
1320 return ICmpInst::Create(Instruction::ICmp, Pred, Masked, Zero);
2331 // For 'is positive?' check that the sign-bit is clear and at least 1 masked
2337 // For 'is negative?' check that the sign-bit is set and at least 1 masked
  /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
TargetTransformInfo.h 643 /// Return true if the target supports masked store.
645 /// Return true if the target supports masked load.
653 /// Return true if the target supports masked scatter.
655 /// Return true if the target supports masked gather.
658 /// Return true if the target supports masked compress store.
660 /// Return true if the target supports masked expand load.
784 /// accesses or gaps and therefore vectorized using masked
1087 Masked, ///< The cast is used with a masked load/store.
1145 /// \return The cost of masked Load and Store instructions
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86InstCombineIntrinsic.cpp 54 // XMM register mask efficiently, we could transform all x86 masked intrinsics
55 // to LLVM masked intrinsics and remove the x86 masked intrinsic defs.
61 // Zero Mask - masked load instruction creates a zero vector.
74 // The pass-through vector for an x86 masked load is a zero vector.
84 // XMM register mask efficiently, we could transform all x86 masked intrinsics
85 // to LLVM masked intrinsics and remove the x86 masked intrinsic defs.
91 // Zero Mask - this masked store instruction does nothing.
111 // 'Replace uses' doesn't work for stores. Erase the original masked store
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
TargetLowering.cpp 5932 SDValue Masked = DAG.getNode(ISD::AND, DL, VT, N, IntMax);
5933 Created.push_back(Masked.getNode());
5934 SDValue MaskedIsZero = DAG.getSetCC(DL, SETCCVT, Masked, Zero, Cond);
DAGCombiner.cpp 2576 bool Masked = false;
2586 Masked = true;
2606 // If the result is masked, then no matter what kind of bool it is we can
2609 if (Masked ||
2618 /// masked 0/1 whose source operand is actually known to be 0/-1. If so, invert
5381 // Allow one node which will masked along with any loads found.
5385 // Also ensure that the node to be masked only produces one data result.
5399 assert(HasValue && "Node to be masked has no data result?");
5618 // For this AND to be a zero extension of the masked load the elements
6035 // If the left-shift isn't masked out then the only way this is a bswap i
    [all...]
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
CGOpenMPRuntime.cpp 11325 llvm::SmallVector<char, 2> Masked;
11328 Masked.push_back('N');
11329 Masked.push_back('M');
11332 Masked.push_back('N');
11335 Masked.push_back('M');
11338 for (char Mask : Masked) {
11621 // SVE generates only a masked function.

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