| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 510 EVT MemVT = ST->getMemoryVT();
512 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT,
620 EVT MemVT = ST->getMemoryVT();
623 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT,
681 EVT MemVT = LD->getMemoryVT();
685 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT,
866 EVT MemVT = LD->getMemoryVT();
868 if (!TLI.allowsMemoryAccess(*DAG.getContext(), DL, MemVT,
1436 EVT MemVT = isa<BuildVectorSDNode>(Node) ? VT.getVectorElementType()
1446 unsigned TypeByteSize = MemVT.getSizeInBits() / 8
[all...] |
| LegalizeIntegerTypes.cpp | 3191 EVT MemVT = N->getMemoryVT();
3193 Lo = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), MemVT,
3237 EVT MemVT = N->getMemoryVT();
3238 unsigned EBytes = MemVT.getStoreSize();
3245 MemVT.getSizeInBits() - ExcessBits),
|
| LegalizeVectorTypes.cpp | 1090 void DAGTypeLegalizer::IncrementPointer(MemSDNode *N, EVT MemVT,
1094 unsigned IncrementSize = MemVT.getSizeInBits().getKnownMinSize() / 8;
1096 if (MemVT.isScalableVector()) {
5161 EVT MemVT((MVT::SimpleValueType) VT);
5162 unsigned MemVTWidth = MemVT.getSizeInBits();
5163 if (MemVT.getSizeInBits() <= WidenEltWidth)
5165 auto Action = TLI.getTypeAction(*DAG.getContext(), MemVT);
5173 return MemVT;
5174 RetVT = MemVT;
5184 EVT MemVT = (MVT::SimpleValueType) VT
[all...] |
| TargetLowering.cpp | 998 EVT MemVT = LD->getMemoryVT();
999 unsigned MemBits = MemVT.getScalarSizeInBits();
7530 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(),
7534 LD->getPointerInfo().getWithOffset(Offset), MemVT,
7542 MachinePointerInfo::getFixedStack(MF, FrameIndex, Offset), MemVT));
7897 TargetLowering::getCanonicalIndexType(ISD::MemIndexType IndexType, EVT MemVT,
7905 if (IsScaledIndex && MemVT.getScalarType() == MVT::i8) {
8734 EVT MemVT = EVT::getVectorVT(*DAG.getContext(), VT.getVectorElementType(),
8736 SDValue StackPtr = DAG.CreateStackTemporary(MemVT.getStoreSize(), Alignment);
|
| SelectionDAGBuilder.cpp | 2453 EVT MemVT = TLI.getMemValueType(DAG.getDataLayout(), CB.CmpLHS->getType());
2472 if (CondLHS.getValueType() != MemVT) {
2473 CondLHS = DAG.getPtrExtOrTrunc(CondLHS, getCurSDLoc(), MemVT);
2474 CondRHS = DAG.getPtrExtOrTrunc(CondRHS, getCurSDLoc(), MemVT);
3196 EVT MemVT =
3202 if (Op1.getValueType() != MemVT) {
3203 Op1 = DAG.getPtrExtOrTrunc(Op1, getCurSDLoc(), MemVT);
3204 Op2 = DAG.getPtrExtOrTrunc(Op2, getCurSDLoc(), MemVT);
4579 MVT MemVT = getValue(I.getCompareOperand()).getSimpleValueType();
4580 SDVTList VTs = DAG.getVTList(MemVT, MVT::i1, MVT::Other)
[all...] |
| DAGCombiner.cpp | 681 EVT &MemVT, unsigned ShAmt = 0);
701 EVT MemVT, unsigned NumStores,
730 EVT MemVT, SDNode *Root, bool AllowVectors);
737 unsigned NumConsecutiveStores, EVT MemVT,
743 unsigned NumConsecutiveStores, EVT MemVT,
1212 EVT MemVT = LD->getMemoryVT();
1218 MemVT, LD->getMemOperand());
1449 EVT MemVT = LD->getMemoryVT();
1454 MemVT, LD->getMemOperand());
5229 ISD::LoadExtType ExtType, EVT &MemVT,
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 699 EVT MemVT = ST->getMemoryVT();
703 switch (MemVT.getSimpleVT().SimpleTy) {
744 EVT MemVT = LD->getMemoryVT();
747 switch (MemVT.getSimpleVT().SimpleTy) {
|
| PPCISelLowering.cpp | 2885 EVT MemVT = LD->getMemoryVT();
2886 if (!MemVT.isSimple())
2888 switch(MemVT.getSimpleVT().SimpleTy) {
8156 bool PPCTargetLowering::canReuseLoadAddress(SDValue Op, EVT MemVT,
8180 if (LD->getMemoryVT() != MemVT)
10441 EVT MemVT = AtomicNode->getMemoryVT();
10442 if (MemVT.getSizeInBits() >= 32)
10447 auto HighBits = APInt::getHighBitsSet(32, 32 - MemVT.getSizeInBits());
10452 unsigned MaskVal = (1 << MemVT.getSizeInBits()) - 1;
10465 (MemVT == MVT::i8) ? PPCISD::ATOMIC_CMP_SWAP_8 : PPCISD::ATOMIC_CMP_SWAP_16
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelDAGToDAG.cpp | 1147 EVT MemVT = Ld->getMemoryVT();
1149 if (MemVT.getStoreSize() != VT.getVectorElementType().getStoreSize())
|
| RISCVISelLowering.cpp | 852 Info.memVT = MVT::getVT(PtrTy->getElementType());
919 EVT MemVT = LD->getMemoryVT();
920 if ((MemVT == MVT::i8 || MemVT == MVT::i16 ||
921 (Subtarget.is64Bit() && MemVT == MVT::i32)) &&
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| BasicTTIImpl.h | 1100 EVT MemVT = getTLI()->getValueType(DL, Src);
1102 LA = getTLI()->getTruncStoreAction(LT.second, MemVT);
1104 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, LT.second, MemVT);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.cpp | 1074 EVT MemVT = Store->getMemoryVT();
1107 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT);
1148 EVT MemVT = StoreNode->getMemoryVT();
1165 MemVT, StoreNode->getAlignment(),
1174 if (Alignment < MemVT.getStoreSize() &&
1175 !allowsMisalignedMemoryAccesses(MemVT, AS, Alignment,
1190 if (MemVT == MVT::i8) {
1193 assert(MemVT == MVT::i16);
1221 Op->getVTList(), Args, MemVT,
1240 if (MemVT.bitsLT(MVT::i32)
[all...] |
| AMDGPUISelLowering.cpp | 854 bool AMDGPUTargetLowering:: storeOfVectorConstantIsCheap(EVT MemVT,
1053 EVT MemVT = ArgVT;
1062 MemVT = RegisterVT;
1064 MemVT = ArgVT;
1072 MemVT = RegisterVT;
1077 MemVT = ArgVT.getScalarType();
1080 MemVT = RegisterVT;
1085 MemVT = EVT::getIntegerVT(State.getContext(), MemoryBits);
1094 MemVT = EVT::getVectorVT(State.getContext(), ScalarVT, NumElements);
1101 if (MemVT.isVector() && MemVT.getVectorNumElements() == 1
[all...] |
| SIISelLowering.cpp | 1007 // correct memVT.
1056 Info.memVT = memVTFromImageReturn(CI.getType(), DMaskLanes);
1058 Info.memVT = EVT::getEVT(CI.getType());
1070 Info.memVT = memVTFromImageData(DataTy, DMaskLanes);
1072 Info.memVT = EVT::getEVT(DataTy);
1079 Info.memVT = MVT::getVT(CI.getArgOperand(0)->getType());
1099 Info.memVT = MVT::getVT(CI.getType());
1114 Info.memVT = MVT::getVT(CI.getOperand(0)->getType());
1129 Info.memVT = MVT::getVT(CI.getType());
1142 Info.memVT = MVT::getVT(CI.getType())
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 1345 EVT MemVT = StoreNode->getMemoryVT();
1355 if (MemVT == MVT::i32)
1357 else if (MemVT == MVT::i64)
1366 if (MemVT == MVT::i32)
1368 else if (MemVT == MVT::i64)
1390 Operand = CurDAG->getTargetConstant(OperandV, DL, MemVT);
|
| SystemZISelLowering.cpp | 3971 EVT MemVT = Node->getMemoryVT();
3972 if (MemVT == MVT::i32 || MemVT == MVT::i64) {
3974 assert(Op.getValueType() == MemVT && "Mismatched VTs");
3984 NegSrc2 = DAG.getConstant(Value, DL, MemVT);
3987 NegSrc2 = DAG.getNode(ISD::SUB, DL, MemVT, DAG.getConstant(0, DL, MemVT),
3991 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT,
6046 EVT MemVT = SN->getMemoryVT();
6051 if (MemVT.isInteger() && SN->isTruncatingStore())
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 707 Info.memVT = MVT::i32;
721 Info.memVT = MVT::i32;
729 Info.memVT = MVT::i64;
738 Info.memVT = Intrinsic == Intrinsic::wasm_load32_zero ? MVT::i32 : MVT::i64;
752 MVT MemVT;
756 MemVT = MVT::i8;
760 MemVT = MVT::i16;
764 MemVT = MVT::i32;
768 MemVT = MVT::i64;
784 Info.memVT = MemVT
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | 4895 EVT MemVT = EVT::getVectorVT(Ctx, ScalarVT, EC * NumVec);
4897 return MemVT;
4948 /// Base + OffImm * sizeof(MemVT) for Min >= OffImm <= Max
4954 const EVT MemVT = getMemVTFromNode(*(CurDAG->getContext()), Root);
4956 if (MemVT == EVT())
4966 TypeSize TS = MemVT.getSizeInBits();
|
| AArch64ISelLowering.cpp | 4181 void selectGatherScatterAddrMode(SDValue &BasePtr, SDValue &Index, EVT MemVT,
4209 unsigned ScalarSizeInBytes = MemVT.getScalarSizeInBits() / 8;
4249 EVT MemVT = MGT->getMemoryVT();
4250 SDValue InputVT = DAG.getValueType(MemVT);
4260 InputVT = DAG.getValueType(MemVT.changeVectorElementTypeToInteger());
4269 selectGatherScatterAddrMode(BasePtr, Index, MemVT, Opcode,
4309 EVT MemVT = MSC->getMemoryVT();
4310 SDValue InputVT = DAG.getValueType(MemVT);
4320 InputVT = DAG.getValueType(MemVT.changeVectorElementTypeToInteger());
4327 selectGatherScatterAddrMode(BasePtr, Index, MemVT, Opcode
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 2215 EVT MemVT = Load->getMemoryVT();
2217 MemVT, *Load->getMemOperand())) {
3445 // memVT is bogus. These intrinsics have IntrInaccessibleMemOnly attribute
3448 Info.memVT = MVT::i1;
3478 Info.memVT = MVT::v8f16;
3502 Info.memVT = MVT::v2i32;
3528 Info.memVT = MVT::v4i32;
3566 Info.memVT = MVT::i32;
3587 Info.memVT = MVT::v4f16;
3608 Info.memVT = MVT::v8f32
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 2778 EVT MemVT = LdNode->getMemoryVT();
2779 if (MemVT == MVT::f128)
2827 EVT MemVT = St->getMemoryVT();
2828 if (MemVT == MVT::f128)
2831 if (MemVT == MVT::i64) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| VEISelLowering.cpp | 1314 EVT MemVT = LdNode->getMemoryVT();
1315 if (MemVT == MVT::f128)
1368 EVT MemVT = StNode->getMemoryVT();
1369 if (MemVT == MVT::f128)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 2650 EVT VT = LD->getValueType(0), MemVT = LD->getMemoryVT();
2660 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT,
2667 EVT MemVT = LD->getMemoryVT();
2672 // Return if load is aligned or if MemVT is neither i32 nor i64.
2673 if ((LD->getAlignment() >= MemVT.getSizeInBits() / 8) ||
2674 ((MemVT != MVT::i32) && (MemVT != MVT::i64)))
2732 EVT MemVT = SD->getMemoryVT(), BasePtrVT = Ptr.getValueType();
2741 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT,
2793 EVT MemVT = SD->getMemoryVT()
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 1238 MVT MemVT = (N->getOpcode() == ISD::FP_ROUND) ? DstVT : SrcVT;
1239 SDValue MemTmp = CurDAG->CreateStackTemporary(MemVT);
1248 CurDAG->getEntryNode(), dl, N->getOperand(0), MemTmp, MPI, MemVT);
1250 MemTmp, MPI, MemVT);
1294 MVT MemVT = (N->getOpcode() == ISD::STRICT_FP_ROUND) ? DstVT : SrcVT;
1295 SDValue MemTmp = CurDAG->CreateStackTemporary(MemVT);
1308 Store = CurDAG->getMemIntrinsicNode(X86ISD::FST, dl, VTs, Ops, MemVT,
1317 assert(SrcVT == MemVT && "Unexpected VT!");
1326 X86ISD::FLD, dl, VTs, Ops, MemVT, MPI,
1334 assert(DstVT == MemVT && "Unexpected VT!")
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 9490 EVT MemVT = LD->getMemoryVT();
9491 assert((MemVT == MVT::v4i1 || MemVT == MVT::v8i1 || MemVT == MVT::v16i1) &&
9493 assert(MemVT == Op.getValueType());
9511 EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits()),
9517 DAG.getConstant(32 - MemVT.getSizeInBits(), dl, MVT::i32));
9519 if (MemVT != MVT::v16i1)
9520 Pred = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MemVT, Pred,
9528 EVT MemVT = LD->getMemoryVT()
[all...] |
