| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| nouveau_nvkm_subdev_clk_nv04.c | 40 int N1, M1, N2, M2, P;
41 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);
46 pv->N2 = N2;
|
| nouveau_nvkm_subdev_clk_nv40.c | 66 int N2 = (coef & 0xff000000) >> 24;
77 khz = khz * N2 / M2;
130 int *N1, int *M1, int *N2, int *M2, int *log2P)
143 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P);
156 int N1, M1, N2, M2, log2P;
161 &N1, &M1, &N2, &M2, &log2P);
165 if (N2 == M2) {
170 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;
|
| nouveau_nvkm_subdev_clk_nv50.c | 171 int N1, N2, M1, M2;
179 N2 = (coef & 0xff000000) >> 24;
187 freq = freq * N2 / M2;
|
| nouveau_nvkm_subdev_clk_pllnv04.c | 156 int M1, N1, M2, N2, log2P;
189 N2 = (clkP * M2 + calcclk1/2) / calcclk1;
190 if (N2 < minN2)
192 if (N2 > maxN2)
197 if (N2/M2 < 4 || N2/M2 > 10)
200 calcclk2 = calcclk1 * N2 / M2;
218 *pN2 = N2;
233 int *N1, int *M1, int *N2, int *M2, int *P)
237 if (!info->vco2.max_freq || !N2) {
[all...] |
| /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.compile/ |
| compile-cplus-namespace.cc | 18 namespace N2
45 using namespace N1::N2::N3::N4;
|
| /src/external/gpl3/gdb/dist/gdb/testsuite/gdb.compile/ |
| compile-cplus-namespace.cc | 18 namespace N2
45 using namespace N1::N2::N3::N4;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/devinit/ |
| nouveau_nvkm_subdev_devinit_nv50.c | 46 int N1, M1, N2, M2, P;
55 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);
67 (M2 << 16) | N2);
|
| nouveau_nvkm_subdev_devinit_nv04.c | 215 bool single_stage = !pv->NM2 || pv->N2 == pv->M2; /* nv41+ only */
221 pll1 = (pll1 & 0xfcc7ffff) | (pv->N2 & 0x18) << 21 |
222 (pv->N2 & 0x7) << 19 | 8 << 4 | (pv->M2 & 7) << 4;
301 bool single_stage = !pv->NM2 || pv->N2 == pv->M2;
368 int N1, M1, N2, M2, P;
375 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);
382 pv.N2 = N2;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| nouveau_nvkm_subdev_fb_ramnv40.c | 45 int N1, M1, N2, M2;
54 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P);
60 if (N2 == M2) {
65 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;
|
| nouveau_nvkm_subdev_fb_ramnv50.c | 236 int N1, M1, N2, M2, P;
337 &N1, &M1, &N2, &M2, &P);
|
| nouveau_nvkm_subdev_fb_ramgk104.c | 139 int N2, M2, P2;
165 const u32 mcoef = ((--ram->P2 << 28) | (ram->N2 << 8) | ram->M2);
995 int *N2, int *M2, int *P2)
1018 *N2 = cur_N;
1029 *N2 = cur_N;
1038 *fN1 = (u16)((((best_err / *N2 * *P2) * (*P1 * *M1)) << 13) / crystal);
1072 &ram->N2, &ram->M2, &ram->P2);
|
| /src/sys/external/isc/libsodium/dist/test/default/ |
| pwhash_scrypt_ll.c | 13 static const uint64_t N2 = 1024U;
55 tv(passwd2, salt2, N2, r2, p2);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUInstructionSelector.h | 242 // g_ptr_add (n0, (n1 = g_ptr_add n2, n3))
244 Register N0, N2, N3;
|
| AMDGPUISelDAGToDAG.cpp | 1415 // (add N2, N3) -> addr64, or
1416 // (add (add N2, N3), C1) -> addr64
1417 SDValue N2 = N0.getOperand(0);
1421 if (N2->isDivergent()) {
1423 // Both N2 and N3 are divergent. Use N0 (the result of the add) as the
1428 // N2 is divergent, N3 is not.
1430 VAddr = N2;
1433 // N2 is not divergent.
1434 Ptr = N2;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/bios/ |
| pll.h | 11 uint8_t N1, M1, N2, M2;
13 uint8_t M1, N1, M2, N2;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 1356 SDValue N2 = N->getOperand(2);
1359 OtherOp = N2;
1362 if (isZeroOrAllOnes(N2, AllOnes)) {
|
| /src/external/apache2/llvm/dist/clang/lib/Tooling/ASTDiff/ |
| ASTDiff.cpp | 759 const Node &N2 = T2.getNode(Id2);
760 if (N1.Children.size() != N2.Children.size() ||
765 if (!identical(N1.Children[Id], N2.Children[Id]))
946 Node &N2 = T2.getMutableNode(Id2);
952 N1.Change = N2.Change = Move;
955 N1.Change = N2.Change = (N1.Change == Move ? UpdateMove : Update);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 1636 SDValue N2 = N->getOperand(2);
1643 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2);
1648 SDValue Result = DAG.getNode(ISD::AND, dl, VT, N2,
1659 KnownBits Known = DAG.computeKnownBits(N2);
1662 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2);
1672 SDValue N2 = N->getOperand(2);
1681 KnownBits Known = DAG.computeKnownBits(N2);
1683 SDValue Borrow = N2;
1685 DAG.getConstant(0, dl, VT), N2);
1696 KnownBits Known = DAG.computeKnownBits(N2);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| DependenceAnalysis.cpp | 1999 // 0 <= i <= N1 and some 0 <= j <= N2, where N1 and N2 are the (normalized)
2010 // a1*0 - a2*N2 <= c2 - c1 <= a1*N1 - a2*0
2011 // -a2*N2 <= c2 - c1 <= a1*N1
2014 // a1*0 - a2*0 <= c2 - c1 <= a1*N1 - a2*N2
2015 // 0 <= c2 - c1 <= a1*N1 - a2*N2
2018 // a1*N1 - a2*N2 <= c2 - c1 <= a1*0 - a2*0
2019 // a1*N1 - a2*N2 <= c2 - c1 <= 0
2022 // a1*N1 - a2*0 <= c2 - c1 <= a1*0 - a2*N2
2023 // a1*N1 <= c2 - c1 <= -a2*N2
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| MachinePipeliner.cpp | 1700 NodeSet &N2 = NodeSets[j];
1701 if (N1.compareRecMII(N2) != 0)
1704 if (N2.empty() || !succ_L(N2, S2))
1708 N2.setColocate(Colocate);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | 3300 SDNode *N2 = CurDAG->getMachineNode(AArch64::ADDXrr, DL, MVT::i64,
3304 {SDValue(N2, 0), CurDAG->getTargetConstant(0, DL, MVT::i64),
|
| /src/external/bsd/ntp/dist/ntpd/ |
| refclock_wwv.c | 441 #define N2 (N15 / 2) /* space (-1) */
444 {N2, N2, 0, 0}, /* 0 */
445 {P2, N2, 0, 0}, /* 1 */
446 {N2, P2, 0, 0}, /* 2 */
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | 3683 SDValue N2 = N0.getOperand(1);
3684 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
3906 SDValue N2 = N->getOperand(2);
3910 assert(N2.getOpcode() == ISD::Constant);
3913 unsigned CC = (unsigned) cast<ConstantSDNode>(N2)->getZExtValue();
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 3796 SDValue N2 = Node->getOperand(2);
3803 if (MayFoldLoad && tryFoldLoad(Node, N2, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) {
3805 N2.getOperand(0), InFlag };
3810 ReplaceUses(N2.getValue(1), SDValue(CNode, 2));
3812 CurDAG->setNodeMemRefs(CNode, {cast<LoadSDNode>(N2)->getMemOperand()});
3816 SDValue Ops[] = { N0, N2, Imm, InFlag };
|
| /src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| CodeGenDAGPatterns.cpp | 3064 TreePatternNode *N1 = Nodes[i], *N2 = Nodes[i+1];
3065 assert(N1->getNumTypes() == 1 && N2->getNumTypes() == 1 &&
3068 MadeChange |= N1->UpdateNodeType(0, N2->getExtType(0), *this);
3069 MadeChange |= N2->UpdateNodeType(0, N1->getExtType(0), *this);
|
