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      1 /*	$NetBSD: ns87307reg.h,v 1.6 2014/10/18 08:33:26 snj Exp $	*/
      2 
      3 /*
      4  * Copyright 1997
      5  * Digital Equipment Corporation. All rights reserved.
      6  *
      7  * This software is furnished under license and may be used and
      8  * copied only in accordance with the following terms and conditions.
      9  * Subject to these conditions, you may download, copy, install,
     10  * use, modify and distribute this software in source and/or binary
     11  * form. No title or ownership is transferred hereby.
     12  *
     13  * 1) Any source code used, modified or distributed must reproduce
     14  *    and retain this copyright notice and list of conditions as
     15  *    they appear in the source file.
     16  *
     17  * 2) No right is granted to use any trade name, trademark, or logo of
     18  *    Digital Equipment Corporation. Neither the "Digital Equipment
     19  *    Corporation" name nor any trademark or logo of Digital Equipment
     20  *    Corporation may be used to endorse or promote products derived
     21  *    from this software without the prior written permission of
     22  *    Digital Equipment Corporation.
     23  *
     24  * 3) This software is provided "AS-IS" and any express or implied
     25  *    warranties, including but not limited to, any implied warranties
     26  *    of merchantability, fitness for a particular purpose, or
     27  *    non-infringement are disclaimed. In no event shall DIGITAL be
     28  *    liable for any damages whatsoever, and in particular, DIGITAL
     29  *    shall not be liable for special, indirect, consequential, or
     30  *    incidental damages or damages for lost profits, loss of
     31  *    revenue or loss of use, whether such damages arise in contract,
     32  *    negligence, tort, under statute, in equity, at law or otherwise,
     33  *    even if advised of the possibility of such damage.
     34  */
     35 
     36 /*
     37 **++
     38 **
     39 **  FACILITY:
     40 **
     41 **     ns87307.h
     42 **
     43 **  ABSTRACT:
     44 **
     45 **
     46 **
     47 **  AUTHORS:
     48 **
     49 **    Patrick Crilly Digital Equipment Corporation.
     50 **
     51 **  CREATION DATE:
     52 **
     53 **    25-February-1997
     54 **
     55 **--
     56 */
     57 
     58 #ifndef _NS87307REG_H
     59 #define _NS87307REG_H
     60 
     61 /*
     62 ** Macro for debugging
     63 */
     64 #define NSIODEBUG
     65 #ifdef  NSIODEBUG
     66 #define nsioDebug(x) printf x
     67 #else
     68 #define nsioDebug(x)
     69 #endif
     70 
     71 /*
     72 ** Base address of chip.  Used to configure console
     73 ** devices.
     74 */
     75 #ifndef CONNSIOADDR
     76 #define CONNSIOADDR 0x15c
     77 #endif
     78 
     79 /*
     80 ** Base Register Offsets
     81 */
     82 #define NSIO_OFFSET_INDEX       0x00  /* Index register           */
     83 #define NSIO_OFFSET_DATA        0x01  /* Data register            */
     84 
     85 /*
     86 ** Number of io ports
     87 */
     88 #define NSIO_NPORTS               2  /* Number of io ports        */
     89 
     90 /*
     91 ** Card Configuration Registers
     92 */
     93 
     94 #define NSIO_CFG_LOGDEV         0x07   /* Select logical device        */
     95 #define NSIO_CFG_SID            0x20   /* Chip SID register            */
     96 
     97 /*
     98 ** Logical Device Configuration Registers
     99 */
    100 
    101 #define NSIO_CFG_ACTIVATE        0x30  /* activate register            */
    102 #define NSIO_CFG_IORNGCHK        0x31  /* I/O range check register     */
    103 #define NSIO_CFG_IOBASEH         0x60  /* IO port base bits 15-8       */
    104 #define NSIO_CFG_IOBASEL         0x61  /* IO port base bits 7-0        */
    105 #define NSIO_CFG_IRQ             0x70  /* Interrupt Request Level      */
    106 #define NSIO_CFG_IRQTYPE         0x71  /* Interrupt Request Type       */
    107 #define NSIO_CFG_DMA1            0x74  /* DMA channel for DMA 0        */
    108 #define NSIO_CFG_DMA2            0x75  /* DMA channel for DMA 1        */
    109 #define NSIO_CFG_REG0            0xF0  /* First configuration register */
    110 
    111 /*
    112 ** KBC Configuration Registers
    113 */
    114 #define NSIO_KBC_DATAH           0x60  /* kbc data address bits 15-8   */
    115 #define NSIO_KBC_DATAL           0x61  /* kbc data address bits  7-0   */
    116 #define NSIO_KBC_CMDH            0x62  /* kbc cmd  address bits 15-8   */
    117 #define NSIO_KBC_CMDL            0x63  /* kbc cmd  address bits  7-0   */
    118 #define NSIO_KBC_CFG             0xF0  /* kbc Super I/O cfg register   */
    119 
    120 /*
    121 ** Chip SID defines
    122 */
    123 #define NSIO_CHIP_ID_MASK        0xFC  /* Mask to obtain chip id       */
    124 #define NSIO_CHIP_ID             0xC0  /* ns87307 chip id              */
    125 
    126 /*
    127 ** Interrupt Type Masks
    128 */
    129 #define NSIO_IRQ_LEVEL           0x01	 /* Trigger, level = 1 edge = 0 */
    130 #define NSIO_IRQ_HIGH            0x02	 /* Int level, high = 1 low = 0 */
    131 #define NSIO_IRQ_LOW             0x00
    132 
    133 /*
    134 ** IO Range check bit masks
    135 */
    136 #define NSIO_RNGCHK_ENABLE       0x02   /* Enable IO range checking     */
    137 #define NSIO_RNGCHK_USE55        0x01   /* Set to read 0x55             */
    138 
    139 /*
    140 ** Logical Devices
    141 */
    142 #define NSIO_DEV_KBC                 0	 /* keyboard controller         */
    143 #define NSIO_DEV_MOUSE               1	 /* mouse controller            */
    144 #define NSIO_DEV_RTC                 2	 /* real-time clock             */
    145 #define NSIO_DEV_FDC                 3	 /* floppy disk controller      */
    146 #define NSIO_DEV_LPT                 4	 /* parallel port               */
    147 #define NSIO_DEV_USI                 5	 /* USI = UART + inafred        */
    148 #define NSIO_DEV_UART                6	 /* UART                        */
    149 #define NSIO_DEV_GPIO                7	 /* gerneral purpose I/O        */
    150 #define NSIO_DEV_PWR                 8	 /* power management            */
    151 
    152 
    153 
    154 /*
    155 ** PARREL PORT CONFIGURATION
    156 */
    157 
    158 #define NSIO_LPT_TRISTATE_DISABLE    (0  << 0)    /* tri-state when inactive */
    159 #define NSIO_LPT_TRISTATE_ENABLE     (1  << 0)    /* tri-state when inactive */
    160 
    161 #define NSIO_LPT_CLOCK_DISABLE      (0  << 1)    /* report ecp mode */
    162 #define NSIO_LPT_CLOCK_ENABLE       (1  (( 1)    /* ecp/epp timeout function when active */
    163 
    164                                     /* bit 2 reserved */
    165 
    166 #define NSIO_LPT_REPORT_ECP         (0  << 3)    /* report ecp mode */
    167 #define NSIO_LPT_REPORT_SPP         (1  << 3)    /* report spp mode */
    168 
    169 #define NSIO_LPT_REG403_DISABLE     (0  << 4)    /* dont respond to reg 403 */
    170 #define NSIO_LPT_REG403_ENABLE      (1  << 4)    /* respond to reg 403 */
    171 
    172 #define NSIO_LPT_SPP_NORMAL         (0x0<< 5)
    173 #define NSIO_LPT_SPP_EXTENDED       (0x1<< 5)
    174 #define NSIO_LPT_EPP_V_1_7          (0x2<< 5)
    175 #define NSIO_LPT_EPP_V_1_9          (0x3<< 5)
    176 #define NSIO_LPT_ECP_NO_EPP         (0x4<< 5)
    177                           /* bit7-5 0x5 reserved */
    178                           /* bit7-5 0x6 reserved */
    179 #define NSIO_LPT_ECP_AND_EPP4       (0x7<< 5)
    180 
    181 /*
    182 ** As there are two devices which can be used for serial
    183 ** communication, set up defines so it's easy to configure
    184 ** the logical devices used for serial communication.
    185 */
    186 #define NSIO_DEV_COM0           NSIO_DEV_UART
    187 #define NSIO_DEV_COM1           NSIO_DEV_USI
    188 
    189 /*---------------------------------------------------------------------------*/
    190 /*	       Macros used to configure logical devices                      */
    191 /*---------------------------------------------------------------------------*/
    192 
    193 /*
    194 ** NSIO_READ_REG
    195 **
    196 ** Read a configuration register.  Use the currently
    197 ** selected logical device.
    198 **
    199 ** sc       pointer to nsio devices softc
    200 ** reg      index of register to read
    201 ** value    value read from register
    202 */
    203 #define NSIO_READ_REG( iot, ioh, reg, value ) \
    204 { \
    205     bus_space_write_1(iot, ioh, NSIO_OFFSET_INDEX, reg ); \
    206     value = bus_space_read_1( iot, ioh, NSIO_OFFSET_DATA ); \
    207 }
    208 
    209 /*
    210 ** NSIO_WRITE_REG
    211 **
    212 ** Write to a configuration register.  Use the currently
    213 ** selected logical device.
    214 **
    215 ** sc       pointer to nsio devices softc
    216 ** reg      index of register to read
    217 ** value    value read from register
    218 */
    219 #define NSIO_WRITE_REG( iot, ioh, reg, value ) \
    220 { \
    221     bus_space_write_1(iot, ioh, NSIO_OFFSET_INDEX, reg ); \
    222     bus_space_write_1( iot, ioh, NSIO_OFFSET_DATA, value ); \
    223 }
    224 
    225 /*
    226 ** NSIO_SELECT_DEV
    227 **
    228 ** Select logDev as the current the logical device
    229 **
    230 ** sc       pointer to nsio devices softc
    231 ** reg      index of register to read
    232 ** logDev   logical device to select
    233 */
    234 #define NSIO_SELECT_DEV( iot, ioh, logDev ) \
    235     NSIO_WRITE_REG( iot, ioh, NSIO_CFG_LOGDEV, logDev )
    236 
    237 /*
    238 ** NSIO_CONFIG_IRQ
    239 **
    240 ** Set the irq number and triggering for the currently
    241 ** selected logical device.  If irqNum is unknown
    242 ** the number won't be set and the device will be left
    243 ** with its default value.
    244 **
    245 ** sc        pointer to nsio devices softc
    246 ** irqNum    irq number to set
    247 ** irqType   trigger flags e.g. edge/level, high/low
    248 */
    249 #define NSIO_CONFIG_IRQ( iot, ioh, irqNum, irqType ) \
    250 { \
    251    if ( irqNum != -1 ) \
    252    { \
    253 	NSIO_WRITE_REG( iot, ioh, NSIO_CFG_IRQ, irqNum ); \
    254    } \
    255    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_IRQTYPE, irqType ); \
    256 }
    257 
    258 /*
    259 ** NSIO_CONFIG_KBCCMD
    260 **
    261 ** Set the io base for the currently selected logical device.
    262 **
    263 ** sc         pointer to nsio devices softc
    264 ** ioBase     address to set io base to
    265 */
    266 #define NSIO_CONFIG_IOBASE( iot, ioh, ioBase ) \
    267 { \
    268    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_IOBASEH, \
    269 		  (unsigned char)(((ioBase) >> 8) & 0xff) ); \
    270    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_IOBASEL, \
    271 		  (unsigned char)(((ioBase) & 0xff ) ); \
    272 }
    273 
    274 /*
    275 ** NSIO_CONFIG_KBCDATA
    276 **
    277 ** Set the data base for the keyboard.  The keyboard
    278 ** controller must be the currently selected logical device.
    279 **
    280 ** sc         pointer to nsio devices softc
    281 ** dataBase   address to set data base to
    282 */
    283 
    284 #define NSIO_CONFIG_KBCDATA( iot, ioh, dataBase ) \
    285 { \
    286    NSIO_WRITE_REG( iot, ioh, NSIO_KBC_DATAH, \
    287 		  (unsigned char)(((dataBase) >> 8) & 0xff) ); \
    288    NSIO_WRITE_REG( iot, ioh, NSIO_KBC_DATAL, \
    289 		  (unsigned char)((dataBase) & 0xff ) ); \
    290 }
    291 
    292 /*
    293 ** NSIO_CONFIG_KBCCMD
    294 **
    295 ** Set the command base for the keyboard.  The keyboard
    296 ** controller must be the currently selected logical device.
    297 **
    298 ** sc         pointer to nsio devices softc
    299 ** cmdBase    address to set command base to
    300 */
    301 
    302 #define NSIO_CONFIG_KBCCMD( iot, ioh, cmdBase ) \
    303 { \
    304    NSIO_WRITE_REG( iot, ioh, NSIO_KBC_CMDH, \
    305 		  (unsigned char)(((cmdBase) >> 8) & 0xff) ); \
    306    NSIO_WRITE_REG( iot, ioh, NSIO_KBC_CMDL, \
    307 		  (unsigned char)((cmdBase) & 0xff ) ); \
    308 }
    309 
    310 /*
    311 ** NSIO_ACTIVATE_DEV
    312 **
    313 ** Activate the currently selected logical device.
    314 **
    315 ** sc    pointer to nsio devices softc
    316 */
    317 
    318 #define NSIO_ACTIVATE_DEV( iot, ioh ) \
    319 { \
    320    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_ACTIVATE, (0x01) ); \
    321 }
    322 
    323 /*
    324 ** NSIO_DEACTIVATE_DEV
    325 **
    326 ** Deactivate the currently selected logical device.
    327 **
    328 ** sc    pointer to nsio devices softc
    329 */
    330 
    331 #define NSIO_DEACTIVATE_DEV( iot, ioh ) \
    332 { \
    333    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_ACTIVATE, (0x00) ); \
    334 }
    335 
    336 
    337 /*
    338 ** NSIO_CONFIG_DEBUG
    339 **
    340 ** Print out configuration information for the device
    341 **
    342 ** sc    pointer to nsio devices softc
    343 */
    344 #ifdef DDB
    345 #define NSIO_CONFIG_DEBUG( iot, ioh ) \
    346 { \
    347     /* nsioConfigPrint( iot, ioh ); */ \
    348 }
    349 #else
    350 #define NSIO_CONFIG_DEBUG( iot, ioh )
    351 #endif
    352 
    353 /*
    354 ** NSIO_CONFIG_KBCDEBUG
    355 **
    356 ** Print out configuration information for the keyboard device
    357 **
    358 ** sc    pointer to nsio devices softc
    359 */
    360 #ifdef DDB
    361 #define NSIO_CONFIG_KBCDEBUG( iot, ioh ) \
    362 { \
    363     u_char cmdL; \
    364     u_char cmdH; \
    365     /* nsioConfigPrint( iot, ioh ); */ \
    366     NSIO_READ_REG( iot, ioh, NSIO_KBC_CMDH, cmdH ); \
    367     NSIO_READ_REG( iot, ioh, NSIO_KBC_CMDH, cmdL ); \
    368     printf("kbc command: %x\n", (((u_short)(cmdH)) << 8)| cmdL ); \
    369 }
    370 #else
    371 #define NSIO_CONFIG_KBCDEBUG( iot, ioh )
    372 #endif
    373 
    374 /* Functions to help configure the ns87307 logical devices.
    375 */
    376 int i87307KbdConfig(bus_space_tag_t, u_int, u_int);
    377 int i87307MouseConfig(bus_space_tag_t, u_int);
    378 int i87307PrinterConfig(bus_space_tag_t, u_int);
    379 
    380 void nsioConfigPrint(bus_space_tag_t, bus_space_handle_t);
    381 
    382 #endif /* _NS87307REG_H */
    383