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    Searched defs:NUM_LINK_LEVELS (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu9_driver_if.h 46 #define NUM_LINK_LEVELS 2
55 #define MAX_LINK_DPM_LEVEL (NUM_LINK_LEVELS - 1)
238 uint8_t PcieGenSpeed[NUM_LINK_LEVELS]; /* 0:PciE-gen1 1:PciE-gen2 2:PciE-gen3 */
239 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; /* 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 */
240 uint8_t LclkDid[NUM_LINK_LEVELS]; /* Leave at 0 to use hardcoded values in FW */
smu11_driver_if.h 50 #define NUM_LINK_LEVELS 2
65 #define MAX_LINK_LEVEL (NUM_LINK_LEVELS - 1)
454 uint8_t PcieGenSpeed[NUM_LINK_LEVELS];
455 uint8_t PcieLaneCount[NUM_LINK_LEVELS];
456 uint16_t LclkFreq[NUM_LINK_LEVELS];
smu11_driver_if_navi10.h 49 #define NUM_LINK_LEVELS 2
64 #define MAX_LINK_LEVEL (NUM_LINK_LEVELS - 1)
627 uint8_t PcieGenSpeed[NUM_LINK_LEVELS]; ///< 0:PciE-gen1 1:PciE-gen2 2:PciE-gen3 3:PciE-gen4
628 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16
629 uint16_t LclkFreq[NUM_LINK_LEVELS];
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/vega12/
smu9_driver_if.h 48 #define NUM_LINK_LEVELS 2
61 #define MAX_LINK_LEVEL (NUM_LINK_LEVELS - 1)
342 uint8_t PcieGenSpeed[NUM_LINK_LEVELS];
343 uint8_t PcieLaneCount[NUM_LINK_LEVELS];
344 uint16_t LclkFreq[NUM_LINK_LEVELS];

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