1 /* 2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and 3 * VA Linux Systems Inc., Fremont, California. 4 * 5 * All Rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining 8 * a copy of this software and associated documentation files (the 9 * "Software"), to deal in the Software without restriction, including 10 * without limitation on the rights to use, copy, modify, merge, 11 * publish, distribute, sublicense, and/or sell copies of the Software, 12 * and to permit persons to whom the Software is furnished to do so, 13 * subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the 16 * next paragraph) shall be included in all copies or substantial 17 * portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 20 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 22 * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR 23 * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 24 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 26 * DEALINGS IN THE SOFTWARE. 27 */ 28 29 /* 30 * Authors: 31 * Kevin E. Martin <martin (at) valinux.com> 32 * 33 * Modified by Marc Aurele La France <tsi (at) xfree86.org> for ATI driver merge. 34 */ 35 36 #ifndef _R128_PROBE_H_ 37 #define _R128_PROBE_H_ 1 38 39 #include "xf86str.h" 40 #include "xf86DDC.h" 41 #include "randrstr.h" 42 #include "xf86Crtc.h" 43 44 #include "compat-api.h" 45 46 #ifdef USE_EXA 47 #include "exa.h" 48 #endif 49 50 /* Chip definitions */ 51 #define PCI_VENDOR_ATI 0x1002 52 #define PCI_CHIP_RAGE128LE 0x4C45 53 #define PCI_CHIP_RAGE128LF 0x4C46 54 #define PCI_CHIP_RAGE128MF 0x4D46 55 #define PCI_CHIP_RAGE128ML 0x4D4C 56 #define PCI_CHIP_RAGE128PA 0x5041 57 #define PCI_CHIP_RAGE128PB 0x5042 58 #define PCI_CHIP_RAGE128PC 0x5043 59 #define PCI_CHIP_RAGE128PD 0x5044 60 #define PCI_CHIP_RAGE128PE 0x5045 61 #define PCI_CHIP_RAGE128PF 0x5046 62 #define PCI_CHIP_RAGE128PG 0x5047 63 #define PCI_CHIP_RAGE128PH 0x5048 64 #define PCI_CHIP_RAGE128PI 0x5049 65 #define PCI_CHIP_RAGE128PJ 0x504A 66 #define PCI_CHIP_RAGE128PK 0x504B 67 #define PCI_CHIP_RAGE128PL 0x504C 68 #define PCI_CHIP_RAGE128PM 0x504D 69 #define PCI_CHIP_RAGE128PN 0x504E 70 #define PCI_CHIP_RAGE128PO 0x504F 71 #define PCI_CHIP_RAGE128PP 0x5050 72 #define PCI_CHIP_RAGE128PQ 0x5051 73 #define PCI_CHIP_RAGE128PR 0x5052 74 #define PCI_CHIP_RAGE128PS 0x5053 75 #define PCI_CHIP_RAGE128PT 0x5054 76 #define PCI_CHIP_RAGE128PU 0x5055 77 #define PCI_CHIP_RAGE128PV 0x5056 78 #define PCI_CHIP_RAGE128PW 0x5057 79 #define PCI_CHIP_RAGE128PX 0x5058 80 #define PCI_CHIP_RAGE128RE 0x5245 81 #define PCI_CHIP_RAGE128RF 0x5246 82 #define PCI_CHIP_RAGE128RG 0x5247 83 #define PCI_CHIP_RAGE128RK 0x524B 84 #define PCI_CHIP_RAGE128RL 0x524C 85 #define PCI_CHIP_RAGE128SE 0x5345 86 #define PCI_CHIP_RAGE128SF 0x5346 87 #define PCI_CHIP_RAGE128SG 0x5347 88 #define PCI_CHIP_RAGE128SH 0x5348 89 #define PCI_CHIP_RAGE128SK 0x534B 90 #define PCI_CHIP_RAGE128SL 0x534C 91 #define PCI_CHIP_RAGE128SM 0x534D 92 #define PCI_CHIP_RAGE128SN 0x534E 93 #define PCI_CHIP_RAGE128TF 0x5446 94 #define PCI_CHIP_RAGE128TL 0x544C 95 #define PCI_CHIP_RAGE128TR 0x5452 96 #define PCI_CHIP_RAGE128TS 0x5453 97 #define PCI_CHIP_RAGE128TT 0x5454 98 #define PCI_CHIP_RAGE128TU 0x5455 99 100 extern _X_EXPORT DriverRec R128; 101 102 typedef enum 103 { 104 MT_UNKNOWN = -1, 105 MT_NONE = 0, 106 MT_CRT = 1, 107 MT_LCD = 2, 108 MT_DFP = 3, 109 MT_CTV = 4, 110 MT_STV = 5 111 } R128MonitorType; 112 113 typedef enum 114 { 115 OUTPUT_NONE, 116 OUTPUT_VGA, 117 OUTPUT_DVI, 118 OUTPUT_LVDS 119 } R128OutputType; 120 121 typedef struct { 122 uint32_t ddc_reg; 123 uint32_t put_clk_mask; 124 uint32_t put_data_mask; 125 uint32_t get_clk_mask; 126 uint32_t get_data_mask; 127 } R128I2CBusRec, *R128I2CBusPtr; 128 129 typedef struct _R128CrtcPrivateRec { 130 void *rotate_mem; 131 int crtc_id; 132 uint32_t cursor_offset; 133 /* Lookup table values to be set when the CRTC is enabled */ 134 uint8_t lut_r[256], lut_g[256], lut_b[256]; 135 } R128CrtcPrivateRec, *R128CrtcPrivatePtr; 136 137 typedef struct _R128OutputPrivateRec { 138 int num; 139 R128OutputType type; 140 R128MonitorType MonType; 141 I2CBusPtr pI2CBus; 142 R128I2CBusRec ddc_i2c; 143 int PanelXRes; 144 int PanelYRes; 145 int PanelPwrDly; 146 } R128OutputPrivateRec, *R128OutputPrivatePtr; 147 148 #define R128_MAX_CRTC 2 149 #define R128_MAX_BIOS_CONNECTOR 2 150 151 typedef struct 152 { 153 Bool HasSecondary; 154 Bool HasCRTC2; 155 /*These two registers are used to make sure the CRTC2 is 156 restored before CRTC_EXT, otherwise it could lead to blank screen.*/ 157 Bool IsSecondaryRestored; 158 Bool RestorePrimary; 159 160 xf86CrtcPtr pCrtc[R128_MAX_CRTC]; 161 R128CrtcPrivatePtr Controller[R128_MAX_CRTC]; 162 163 ScrnInfoPtr pSecondaryScrn; 164 ScrnInfoPtr pPrimaryScrn; 165 } R128EntRec, *R128EntPtr; 166 167 /* r128_probe.c */ 168 extern SymTabRec R128Chipsets[]; 169 170 /* r128_driver.c */ 171 extern Bool R128PreInit(ScrnInfoPtr, int); 172 extern Bool R128ScreenInit(ScreenPtr pScreen, int argc, char **argv); 173 extern Bool R128SwitchMode(ScrnInfoPtr pScrnInfo, DisplayModePtr mode); 174 extern void R128AdjustFrame(ScrnInfoPtr arg, int x, int y); 175 extern Bool R128EnterVT(ScrnInfoPtr pScrn); 176 extern void R128LeaveVT(ScrnInfoPtr pScrn); 177 extern void R128FreeScreen(ScrnInfoPtr pScrn); 178 extern ModeStatus R128ValidMode(ScrnInfoPtr, DisplayModePtr, Bool, int); 179 180 extern const OptionInfoRec * R128OptionsWeak(void); 181 182 #endif /* _R128_PROBE_H_ */ 183
Indexes created Thu Jul 23 00:25:05 UTC 2026