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    Searched defs:Op1Reg (Results 1 - 7 of 7) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86CmovConversion.cpp 816 Register Op1Reg = MIIt->getOperand(1).getReg();
823 std::swap(Op1Reg, Op2Reg);
825 auto Op1Itr = RegRewriteTable.find(Op1Reg);
827 Op1Reg = Op1Itr->second.first;
837 .addReg(Op1Reg)
846 RegRewriteTable[DestReg] = std::make_pair(Op1Reg, Op2Reg);
X86InstructionSelector.cpp 1042 const Register Op1Reg = I.getOperand(3).getReg();
1080 .addReg(Op1Reg);
1484 const Register Op1Reg = I.getOperand(1).getReg();
1488 assert(RegTy == MRI.getType(Op1Reg) && RegTy == MRI.getType(Op2Reg) &&
1590 if (!RBI.constrainGenericRegister(Op1Reg, *RegRC, MRI) ||
1601 .addReg(Op1Reg);
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVInstrInfo.cpp 1224 Register Op1Reg = MI.getOperand(CommutableOpIdx1).getReg();
1229 if (Op1Reg != MI.getOperand(2).getReg())
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsFastISel.cpp 2011 unsigned Op1Reg = getRegForValue(I->getOperand(1));
2012 if (!Op1Reg)
2029 emitInst(Opcode, ResultReg).addReg(Op0Reg).addReg(Op1Reg);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 255 unsigned emitLSL_rr(MVT RetVT, unsigned Op0Reg, unsigned Op1Reg);
258 unsigned emitLSR_rr(MVT RetVT, unsigned Op0Reg, unsigned Op1Reg);
261 unsigned emitASR_rr(MVT RetVT, unsigned Op0Reg, unsigned Op1Reg);
3988 unsigned Op1Reg) {
4003 Op1Reg = emitAnd_ri(MVT::i32, Op1Reg, Mask);
4005 unsigned ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg);
4090 unsigned Op1Reg) {
4106 Op1Reg = emitAnd_ri(MVT::i32, Op1Reg, Mask)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMFastISel.cpp 1609 unsigned Op1Reg = getRegForValue(I->getOperand(1));
1610 if (Op1Reg == 0) return false;
1655 Op1Reg = constrainOperandRegClass(TII.get(MovCCOpc), Op1Reg, 2);
1659 .addReg(Op1Reg)
1663 Op1Reg = constrainOperandRegClass(TII.get(MovCCOpc), Op1Reg, 1);
1666 .addReg(Op1Reg)
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kISelLowering.cpp 3102 unsigned Op1Reg = MIIt->getOperand(1).getReg();
3109 std::swap(Op1Reg, Op2Reg);
3111 if (RegRewriteTable.find(Op1Reg) != RegRewriteTable.end())
3112 Op1Reg = RegRewriteTable[Op1Reg].first;
3119 .addReg(Op1Reg)
3125 RegRewriteTable[DestReg] = std::make_pair(Op1Reg, Op2Reg);

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