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    Searched defs:OpB (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/
LoadStoreVectorizer.cpp 410 Instruction *OpB = dyn_cast<Instruction>(GTIB.getOperand());
411 if (!OpA || !OpB || OpA->getOpcode() != OpB->getOpcode() ||
412 OpA->getType() != OpB->getType())
419 std::swap(OpA, OpB);
435 OpB = dyn_cast<Instruction>(OpB->getOperand(0));
436 if (!OpB || ValA->getType() != OpB->getType())
447 // First attempt: if OpB is an add with NSW/NUW, and OpB is IdxDiff added t
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetInstrInfo.cpp 839 MachineOperand &OpB = Root.getOperand(OpIdx[Row][1]);
845 Register RegB = OpB.getReg();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 12901 // Attempt to form urhadd(OpA, OpB) from
12902 // truncate(vlshr(sub(zext(OpB), xor(zext(OpA), Ones(ElemSizeInBits))), 1))
12903 // or uhadd(OpA, OpB) from truncate(vlshr(add(zext(OpA), zext(OpB)), 1)).
12905 // truncate(srl(add(zext(OpB), add(zext(OpA), 1)), 1)) and the
12906 // (OpA + OpB + 1) subexpression will have been changed to (OpB - (~OpA)).
12910 // extension instead of zero extension and form a srhadd(OpA, OpB) or a
12911 // shadd(OpA, OpB) from them.
12919 // OpB, which are at least 8 bits), it follows that the truncate will alway
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