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  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
ARMUnwindOpAsm.h 27 SmallVector<uint8_t, 32> Ops;
38 Ops.clear();
63 Ops.insert(Ops.end(), Opcodes.begin(), Opcodes.end());
73 Ops.push_back(Opcode & 0xff);
78 Ops.push_back((Opcode >> 8) & 0xff);
79 Ops.push_back(Opcode & 0xff);
84 Ops.insert(Ops.end(), Opcode, Opcode + Size);
  /src/external/apache2/llvm/dist/llvm/lib/FuzzMutate/
IRMutator.cpp 85 std::vector<fuzzerop::OpDescriptor> Ops;
86 describeFuzzerIntOps(Ops);
87 describeFuzzerFloatOps(Ops);
88 describeFuzzerControlFlowOps(Ops);
89 describeFuzzerPointerOps(Ops);
90 describeFuzzerAggregateOps(Ops);
91 describeFuzzerVectorOps(Ops);
92 return Ops;
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
MVELaneInterleavingPass.cpp 169 SmallSetVector<Instruction *, 4> Ops;
226 // Binary/tertiary ops
238 if (Ops.count(I))
240 Ops.insert(I);
274 dbgs() << " Ops:";
275 for (auto *I : Ops)
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelDAGToDAG.cpp 166 SmallVector<SDValue, 16> Ops;
171 Ops.push_back(Op);
175 Ops.push_back(Node->getOperand(0));
177 CurDAG->getMachineNode(WebAssembly::CALL_PARAMS, DL, MVT::Glue, Ops);
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/
GlobalSplit.cpp 125 SmallVector<Value *, 4> Ops;
126 Ops.push_back(ConstantInt::get(Int32Ty, 0));
128 Ops.push_back(GEP->getOperand(I));
131 SplitGlobals[I]->getInitializer()->getType(), SplitGlobals[I], Ops,
  /src/external/apache2/llvm/dist/llvm/include/llvm/IR/
MatrixBuilder.h 1 //===- llvm/MatrixBuilder.h - Builder to lower matrix ops -------*- C++ -*-===//
75 Value *Ops[] = {DataPtr, Stride, B.getInt1(IsVolatile), B.getInt32(Rows),
82 CallInst *Call = B.CreateCall(TheFn->getFunctionType(), TheFn, Ops, Name);
97 Value *Ops[] = {Matrix, Ptr,
105 CallInst *Call = B.CreateCall(TheFn->getFunctionType(), TheFn, Ops, Name);
121 Value *Ops[] = {Matrix, B.getInt32(Rows), B.getInt32(Columns)};
125 return B.CreateCall(TheFn->getFunctionType(), TheFn, Ops, Name);
139 Value *Ops[] = {LHS, RHS, B.getInt32(LHSRows), B.getInt32(LHSColumns),
145 return B.CreateCall(TheFn->getFunctionType(), TheFn, Ops, Name);
  /src/external/apache2/llvm/dist/llvm/lib/IR/
ProfileSummary.cpp 30 Metadata *Ops[2] = {MDString::get(Context, Key),
32 return MDTuple::get(Context, Ops);
38 Metadata *Ops[2] = {MDString::get(Context, Key),
40 return MDTuple::get(Context, Ops);
47 Metadata *Ops[2] = {MDString::get(Context, Key), MDString::get(Context, Val)};
48 return MDTuple::get(Context, Ops);
67 Metadata *Ops[2] = {MDString::get(Context, "DetailedSummary"),
69 return MDTuple::get(Context, Ops);
MDBuilder.cpp 63 SmallVector<Metadata *, 8> Ops;
65 Ops.push_back(createString("synthetic_function_entry_count"));
67 Ops.push_back(createString("function_entry_count"));
68 Ops.push_back(createConstant(ConstantInt::get(Int64Ty, Count)));
73 Ops.push_back(createConstant(ConstantInt::get(Int64Ty, ID)));
75 return MDNode::get(Context, Ops);
101 SmallVector<Metadata *, 4> Ops;
103 Ops.push_back(createConstant(F));
104 return MDNode::get(Context, Ops);
110 SmallVector<Metadata *, 4> Ops;
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64SelectionDAGInfo.cpp 136 SDValue Ops[] = {DAG.getTargetConstant(ObjSize, dl, MVT::i64), Addr, Chain};
137 SDNode *St = DAG.getMachineNode(Opcode, dl, ResTys, Ops);
SVEIntrinsicOpts.cpp 297 Value *Ops[] = {Op1->getArgOperand(0), Op2->getArgOperand(0)};
302 auto CI = CallInst::Create(Fn, Ops, I->getName(), I);
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXPrologEpilogPass.cpp 82 SmallVector<uint64_t, 3> Ops;
83 TRI.getOffsetOpcodes(Offset, Ops);
85 DIExpr = DIExpression::appendOpsToArg(DIExpr, Ops, OpIdx);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZSelectionDAGInfo.cpp 213 SDValue Ops[] = {
217 End = DAG.getNode(SystemZISD::SELECT_CCMASK, DL, PtrVT, Ops);
SystemZRegisterInfo.cpp 308 SmallVector<uint64_t, 3> Ops;
310 Ops, TFI->getFrameIndexReference(MF, FrameIndex, BasePtr).getFixed());
312 DIExpression::appendOpsToArg(MI->getDebugExpression(), Ops, OpIdx));
  /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
XCoreISelDAGToDAG.cpp 163 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
166 MVT::i32, Ops));
170 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
173 MVT::i32, Ops));
177 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
180 MVT::i32, Ops));
184 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
187 MVT::i32, Ops));
191 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
194 MVT::i32, Ops));
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineNegator.cpp 124 std::array<Value *, 2> Ops{I->getOperand(0), I->getOperand(1)};
127 std::swap(Ops[0], Ops[1]);
128 return Ops;
176 std::array<Value *, 2> Ops = getSortedOperandsOfBinOp(I);
178 if (match(Ops[1], m_One()))
179 return Builder.CreateNot(Ops[0], I->getName() + ".neg");
368 std::array<Value *, 2> Ops = getSortedOperandsOfBinOp(I);
371 if (match(Ops[1], m_One()))
372 return Builder.CreateNot(Ops[0], I->getName() + ".neg")
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
GVNSink.cpp 238 SmallVector<std::pair<BasicBlock *, Value *>, 4> Ops;
240 Ops.push_back({PN->getIncomingBlock(I), PN->getIncomingValue(I)});
241 llvm::sort(Ops);
242 for (auto &P : Ops) {
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
IntrinsicLowering.cpp 340 Value *Ops[3];
341 Ops[0] = CI->getArgOperand(0);
342 Ops[1] = CI->getArgOperand(1);
343 Ops[2] = Size;
344 ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getArgOperand(0)->getType());
351 Value *Ops[3];
352 Ops[0] = CI->getArgOperand(0);
353 Ops[1] = CI->getArgOperand(1);
354 Ops[2] = Size
    [all...]
LiveRangeEdit.cpp 225 SmallVector<unsigned, 8> Ops;
226 if (UseMI->readsWritesVirtualRegister(LI->reg(), &Ops).second)
229 MachineInstr *FoldMI = TII.foldMemoryOperand(*UseMI, Ops, *DefMI, &LIS);
HardwareLoops.cpp 471 Value *Ops[] = { LoopDecrement };
472 Value *NewCond = CondBuilder.CreateCall(DecFunc, Ops);
493 Value *Ops[] = { EltsRem, LoopDecrement };
494 Value *Call = CondBuilder.CreateCall(DecFunc, Ops);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Utils/
AArch64BaseInfo.cpp 138 SmallVector<StringRef, 5> Ops;
139 if (!GenericRegPattern.match(UpperName, &Ops))
144 Ops[1].getAsInteger(10, Op0);
145 Ops[2].getAsInteger(10, Op1);
146 Ops[3].getAsInteger(10, CRn);
147 Ops[4].getAsInteger(10, CRm);
148 Ops[5].getAsInteger(10, Op2);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
R600Packetizer.cpp 125 unsigned Ops[] = {
131 int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Ops[i]);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86SelectionDAGInfo.cpp 163 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
164 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
202 SDValue Ops[] = {Chain, DAG.getValueType(AVT), InFlag};
203 return DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
TypeBasedAliasAnalysis.cpp 556 Metadata *Ops[] = {const_cast<MDNode*>(AccessType),
559 return MDNode::get(AccessType->getContext(), Ops);
562 Metadata *Ops[] = {const_cast<MDNode*>(AccessType),
565 return MDNode::get(AccessType->getContext(), Ops);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
InlineAsmLowering.cpp 489 std::vector<MachineOperand> Ops;
491 OpInfo.ConstraintCode, Ops,
498 assert(Ops.size() > 0 &&
503 InlineAsm::getFlagWord(InlineAsm::Kind_Imm, Ops.size());
505 Inst.add(Ops);
655 Value *Val, StringRef Constraint, std::vector<MachineOperand> &Ops,
672 Ops.push_back(MachineOperand::CreateImm(ExtVal));
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
FunctionLoweringInfo.cpp 200 std::vector<TargetLowering::AsmOperandInfo> Ops =
203 for (TargetLowering::AsmOperandInfo &Op : Ops) {

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