| /src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| c_regmv_dr_pr.s | 18 P1 = R0;
23 CHECKREG p1, 0x20001001;
29 P1 = R1;
34 CHECKREG p1, 0x20021003;
40 P1 = R2;
45 CHECKREG p1, 0x20041005;
51 P1 = R3;
56 CHECKREG p1, 0x20061007;
62 P1 = R4;
67 CHECKREG p1, 0x20081009
[all...] |
| c_regmv_pr_pr.s | 9 imm32 p1, 0x20021003;
15 imm32 p1, 0x20021003;
20 P1 = P1;
21 P2 = P1;
22 P4 = P1;
23 P5 = P1;
24 FP = P1;
25 CHECKREG p1, 0x20021003;
31 imm32 p1, 0x20021003
[all...] |
| issue126.s | 8 P1 = R0;
12 P1 = ( P1 + P0 ) << 2;
|
| c_comp3op_pr_plus_pr_sh1.s | 8 imm32 p1, 0x89ab1def;
15 P1 = P1 + ( P1 << 1 );
16 P2 = P1 + ( P2 << 1 );
17 P3 = P1 + ( P3 << 1 );
18 P4 = P1 + ( P4 << 1 );
19 P5 = P1 + ( P5 << 1 );
20 SP = P1 + ( SP << 1 );
21 FP = P1 + FP
[all...] |
| c_comp3op_pr_plus_pr_sh2.s | 8 imm32 p1, 0x89ab1def;
15 P1 = P1 + ( P1 << 2 );
16 P2 = P1 + ( P2 << 2 );
17 P3 = P1 + ( P3 << 2 );
18 P4 = P1 + ( P4 << 2 );
19 P5 = P1 + ( P5 << 2 );
20 SP = P1 + ( SP << 2 );
21 FP = P1 + FP
[all...] |
| c_dsp32mac_pair_a0.s | 20 P1 = A1.w;
36 CHECKREG p1, 0xFF221DD6;
51 P1 = A0.w;
66 CHECKREG p1, 0xFD9B2E5E;
80 P1 = A0.w;
95 CHECKREG p1, 0xCB200616;
109 P1 = A0.w;
124 CHECKREG p1, 0xFFF9EE9A;
|
| c_ldimmhalf_lz_pr.s | 11 P1 = 0x0003 (Z);
18 CHECKREG p1, 0x00000003;
26 P1 = 0x0030 (Z);
34 CHECKREG p1, 0x00000030;
42 P1 = 0x0300 (Z);
49 CHECKREG p1, 0x00000300;
57 P1 = 0x3000 (Z);
64 CHECKREG p1, 0x00003000;
|
| c_ldimmhalf_lzhi_pr.s | 13 P1 = 0x0003 (Z);
14 P1.H = 0x0002;
27 CHECKREG p1, 0x00020003;
35 P1 = 0x0030 (Z);
36 P1.H = 0x0020;
50 CHECKREG p1, 0x00200030;
58 P1 = 0x0300 (Z);
59 P1.H = 0x0200;
72 CHECKREG p1, 0x02000300;
80 P1 = 0x3000 (Z)
[all...] |
| c_ptr2op_pr_sft_2_1.s | 8 imm32 p1, 0xf0921203;
15 P1 = P1 << 2;
16 P2 = P1 >> 2;
17 P3 = P1 << 2;
18 P4 = P1 >> 1;
19 P5 = P1 >> 2;
20 SP = P1 << 2;
21 FP = P1 >> 1;
22 CHECKREG p1, 0xC248480C
[all...] |
| c_pushpopmultiple_preg.s | 13 P1 = 0xa1 (X);
19 P1 = 0;
25 CHECKREG p1, 0x000000a1;
41 CHECKREG p1, 0x000000a1;
55 CHECKREG p1, 0x000000a1;
67 CHECKREG p1, 0x000000a1;
77 CHECKREG p1, 0x000000a1;
|
| hwloop-nested.s | 11 P1 = 2;
15 LSETUP (2f, 3f) LC1 = P1;
|
| mem3.s | 12 P1 = [ P0 ];
13 _DBG P1;
|
| stk6.s | 10 P1 = SP;
19 [ P1-- ] = R1;
32 R0 = P1; DBGA ( R0.L , 10 );
51 R0 = P1; DBGA ( R0.L , 10 );
|
| /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/ |
| c_regmv_dr_pr.s | 18 P1 = R0;
23 CHECKREG p1, 0x20001001;
29 P1 = R1;
34 CHECKREG p1, 0x20021003;
40 P1 = R2;
45 CHECKREG p1, 0x20041005;
51 P1 = R3;
56 CHECKREG p1, 0x20061007;
62 P1 = R4;
67 CHECKREG p1, 0x20081009
[all...] |
| c_regmv_pr_pr.s | 9 imm32 p1, 0x20021003;
15 imm32 p1, 0x20021003;
20 P1 = P1;
21 P2 = P1;
22 P4 = P1;
23 P5 = P1;
24 FP = P1;
25 CHECKREG p1, 0x20021003;
31 imm32 p1, 0x20021003
[all...] |
| issue126.s | 8 P1 = R0;
12 P1 = ( P1 + P0 ) << 2;
|
| c_comp3op_pr_plus_pr_sh1.s | 8 imm32 p1, 0x89ab1def;
15 P1 = P1 + ( P1 << 1 );
16 P2 = P1 + ( P2 << 1 );
17 P3 = P1 + ( P3 << 1 );
18 P4 = P1 + ( P4 << 1 );
19 P5 = P1 + ( P5 << 1 );
20 SP = P1 + ( SP << 1 );
21 FP = P1 + FP
[all...] |
| c_comp3op_pr_plus_pr_sh2.s | 8 imm32 p1, 0x89ab1def;
15 P1 = P1 + ( P1 << 2 );
16 P2 = P1 + ( P2 << 2 );
17 P3 = P1 + ( P3 << 2 );
18 P4 = P1 + ( P4 << 2 );
19 P5 = P1 + ( P5 << 2 );
20 SP = P1 + ( SP << 2 );
21 FP = P1 + FP
[all...] |
| c_dsp32mac_pair_a0.s | 20 P1 = A1.w;
36 CHECKREG p1, 0xFF221DD6;
51 P1 = A0.w;
66 CHECKREG p1, 0xFD9B2E5E;
80 P1 = A0.w;
95 CHECKREG p1, 0xCB200616;
109 P1 = A0.w;
124 CHECKREG p1, 0xFFF9EE9A;
|
| c_ldimmhalf_lz_pr.s | 11 P1 = 0x0003 (Z);
18 CHECKREG p1, 0x00000003;
26 P1 = 0x0030 (Z);
34 CHECKREG p1, 0x00000030;
42 P1 = 0x0300 (Z);
49 CHECKREG p1, 0x00000300;
57 P1 = 0x3000 (Z);
64 CHECKREG p1, 0x00003000;
|
| c_ldimmhalf_lzhi_pr.s | 13 P1 = 0x0003 (Z);
14 P1.H = 0x0002;
27 CHECKREG p1, 0x00020003;
35 P1 = 0x0030 (Z);
36 P1.H = 0x0020;
50 CHECKREG p1, 0x00200030;
58 P1 = 0x0300 (Z);
59 P1.H = 0x0200;
72 CHECKREG p1, 0x02000300;
80 P1 = 0x3000 (Z)
[all...] |
| c_ptr2op_pr_sft_2_1.s | 8 imm32 p1, 0xf0921203;
15 P1 = P1 << 2;
16 P2 = P1 >> 2;
17 P3 = P1 << 2;
18 P4 = P1 >> 1;
19 P5 = P1 >> 2;
20 SP = P1 << 2;
21 FP = P1 >> 1;
22 CHECKREG p1, 0xC248480C
[all...] |
| c_pushpopmultiple_preg.s | 13 P1 = 0xa1 (X);
19 P1 = 0;
25 CHECKREG p1, 0x000000a1;
41 CHECKREG p1, 0x000000a1;
55 CHECKREG p1, 0x000000a1;
67 CHECKREG p1, 0x000000a1;
77 CHECKREG p1, 0x000000a1;
|
| hwloop-nested.s | 11 P1 = 2;
15 LSETUP (2f, 3f) LC1 = P1;
|
| mem3.s | 12 P1 = [ P0 ];
13 _DBG P1;
|
