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  /src/external/gpl3/gcc.old/dist/gcc/config/frv/
frv-asm.h 22 P2(INSN): Emit INSN.P on the FR500 and above, otherwise emit plain INSN. */
30 #define P2(A) P(A)
32 #define P2(A) A
36 #define P2(A) A
  /src/external/gpl3/gcc/dist/gcc/config/frv/
frv-asm.h 22 P2(INSN): Emit INSN.P on the FR500 and above, otherwise emit plain INSN. */
30 #define P2(A) P(A)
32 #define P2(A) A
36 #define P2(A) A
  /src/external/gpl3/gdb/dist/sim/testsuite/bfin/
c_regmv_dr_pr.s 19 P2 = R0;
24 CHECKREG p2, 0x20001001;
30 P2 = R1;
35 CHECKREG p2, 0x20021003;
41 P2 = R2;
46 CHECKREG p2, 0x20041005;
52 P2 = R3;
57 CHECKREG p2, 0x20061007;
63 P2 = R4;
68 CHECKREG p2, 0x20081009
    [all...]
c_regmv_pr_pr.s 10 imm32 p2, 0x20041005;
16 imm32 p2, 0x20041005;
21 P2 = P1;
26 CHECKREG p2, 0x20021003;
32 imm32 p2, 0x20041005;
36 P1 = P2;
37 P2 = P2;
38 P4 = P2;
39 P5 = P2;
    [all...]
issue126.s 9 P2 = R0;
13 P2 = ( P2 + P0 ) << 1;
c_comp3op_pr_plus_pr_sh1.s 9 imm32 p2, 0x56781abc;
16 P2 = P1 + ( P2 << 1 );
23 CHECKREG p2, 0x49F18F45;
31 imm32 p2, 0x56789a2c;
37 P1 = P2 + ( P1 << 1 );
38 P2 = P2 + ( P2 << 1 );
39 P3 = P2 + ( P3 << 1 )
    [all...]
c_comp3op_pr_plus_pr_sh2.s 9 imm32 p2, 0x56781abc;
16 P2 = P1 + ( P2 << 2 );
23 CHECKREG p2, 0x0A38009B;
31 imm32 p2, 0x56789a2c;
37 P1 = P2 + ( P1 << 2 );
38 P2 = P2 + ( P2 << 2 );
39 P3 = P2 + ( P3 << 2 )
    [all...]
c_dsp32mac_pair_a0.s 23 P2 = A1.w;
37 CHECKREG p2, 0x0004BA9E;
53 P2 = A0.w;
67 CHECKREG p2, 0xFFFC4AC8;
82 P2 = A0.w;
96 CHECKREG p2, 0x00062F18;
111 P2 = A0.w;
125 CHECKREG p2, 0xFF256182;
c_ldimmhalf_lz_pr.s 12 P2 = 0x0005 (Z);
19 CHECKREG p2, 0x00000005;
27 P2 = 0x0050 (Z);
35 CHECKREG p2, 0x00000050;
43 P2 = 0x0500 (Z);
50 CHECKREG p2, 0x00000500;
58 P2 = 0x5000 (Z);
65 CHECKREG p2, 0x00005000;
c_ldimmhalf_lzhi_pr.s 15 P2 = 0x0005 (Z);
16 P2.H = 0x0004;
28 CHECKREG p2, 0x00040005;
37 P2 = 0x0050 (Z);
38 P2.H = 0x0040;
51 CHECKREG p2, 0x00400050;
60 P2 = 0x0500 (Z);
61 P2.H = 0x0400;
73 CHECKREG p2, 0x04000500;
82 P2 = 0x5000 (Z)
    [all...]
c_ptr2op_pr_sft_2_1.s 9 imm32 p2, 0xbe041305;
16 P2 = P1 >> 2;
23 CHECKREG p2, 0x30921203;
31 imm32 p2, 0x26041005;
37 P1 = P2;
38 P2 = P2;
39 P3 = P2;
40 P4 = P2;
41 P5 = P2;
    [all...]
c_pushpopmultiple_preg.s 14 P2 = 0xa2 (X);
20 P2 = 0;
26 CHECKREG p2, 0x000000a2;
31 P2 = 0xb2 (X);
36 P2 = 0;
42 CHECKREG p2, 0x000000b2;
56 CHECKREG p2, 0x000000b2;
68 CHECKREG p2, 0x000000b2;
78 CHECKREG p2, 0x000000b2;
div0.s 9 P2 = 16;
11 LSETUP ( s0 , s0 ) LC0 = P2;
21 LSETUP ( s1 , s1 ) LC0 = P2;
31 LSETUP ( s2 , s2 ) LC0 = P2;
c_compi2opp_pr_eq_i7_n.s 10 P2 = -2;
18 CHECKREG p2, -2;
27 P2 = -10;
35 CHECKREG p2, -10;
44 P2 = -18;
52 CHECKREG p2, -18;
61 P2 = -26;
69 CHECKREG p2, -26;
78 P2 = -34;
86 CHECKREG p2, -34
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/
c_regmv_dr_pr.s 19 P2 = R0;
24 CHECKREG p2, 0x20001001;
30 P2 = R1;
35 CHECKREG p2, 0x20021003;
41 P2 = R2;
46 CHECKREG p2, 0x20041005;
52 P2 = R3;
57 CHECKREG p2, 0x20061007;
63 P2 = R4;
68 CHECKREG p2, 0x20081009
    [all...]
c_regmv_pr_pr.s 10 imm32 p2, 0x20041005;
16 imm32 p2, 0x20041005;
21 P2 = P1;
26 CHECKREG p2, 0x20021003;
32 imm32 p2, 0x20041005;
36 P1 = P2;
37 P2 = P2;
38 P4 = P2;
39 P5 = P2;
    [all...]
issue126.s 9 P2 = R0;
13 P2 = ( P2 + P0 ) << 1;
c_comp3op_pr_plus_pr_sh1.s 9 imm32 p2, 0x56781abc;
16 P2 = P1 + ( P2 << 1 );
23 CHECKREG p2, 0x49F18F45;
31 imm32 p2, 0x56789a2c;
37 P1 = P2 + ( P1 << 1 );
38 P2 = P2 + ( P2 << 1 );
39 P3 = P2 + ( P3 << 1 )
    [all...]
c_comp3op_pr_plus_pr_sh2.s 9 imm32 p2, 0x56781abc;
16 P2 = P1 + ( P2 << 2 );
23 CHECKREG p2, 0x0A38009B;
31 imm32 p2, 0x56789a2c;
37 P1 = P2 + ( P1 << 2 );
38 P2 = P2 + ( P2 << 2 );
39 P3 = P2 + ( P3 << 2 )
    [all...]
c_dsp32mac_pair_a0.s 23 P2 = A1.w;
37 CHECKREG p2, 0x0004BA9E;
53 P2 = A0.w;
67 CHECKREG p2, 0xFFFC4AC8;
82 P2 = A0.w;
96 CHECKREG p2, 0x00062F18;
111 P2 = A0.w;
125 CHECKREG p2, 0xFF256182;
c_ldimmhalf_lz_pr.s 12 P2 = 0x0005 (Z);
19 CHECKREG p2, 0x00000005;
27 P2 = 0x0050 (Z);
35 CHECKREG p2, 0x00000050;
43 P2 = 0x0500 (Z);
50 CHECKREG p2, 0x00000500;
58 P2 = 0x5000 (Z);
65 CHECKREG p2, 0x00005000;
c_ldimmhalf_lzhi_pr.s 15 P2 = 0x0005 (Z);
16 P2.H = 0x0004;
28 CHECKREG p2, 0x00040005;
37 P2 = 0x0050 (Z);
38 P2.H = 0x0040;
51 CHECKREG p2, 0x00400050;
60 P2 = 0x0500 (Z);
61 P2.H = 0x0400;
73 CHECKREG p2, 0x04000500;
82 P2 = 0x5000 (Z)
    [all...]
c_ptr2op_pr_sft_2_1.s 9 imm32 p2, 0xbe041305;
16 P2 = P1 >> 2;
23 CHECKREG p2, 0x30921203;
31 imm32 p2, 0x26041005;
37 P1 = P2;
38 P2 = P2;
39 P3 = P2;
40 P4 = P2;
41 P5 = P2;
    [all...]
c_pushpopmultiple_preg.s 14 P2 = 0xa2 (X);
20 P2 = 0;
26 CHECKREG p2, 0x000000a2;
31 P2 = 0xb2 (X);
36 P2 = 0;
42 CHECKREG p2, 0x000000b2;
56 CHECKREG p2, 0x000000b2;
68 CHECKREG p2, 0x000000b2;
78 CHECKREG p2, 0x000000b2;
div0.s 9 P2 = 16;
11 LSETUP ( s0 , s0 ) LC0 = P2;
21 LSETUP ( s1 , s1 ) LC0 = P2;
31 LSETUP ( s2 , s2 ) LC0 = P2;

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1 2 3 4 5 6 7 8 91011>>