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    Searched defs:PReg (Results 1 - 6 of 6) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonBlockRanges.cpp 280 unsigned PReg = *RC.begin();
281 MCSubRegIndexIterator I(PReg, &TRI);
HexagonInstrInfo.cpp 1284 Register PReg = Op1.getReg();
1293 .addReg(PReg, S)
1302 .addReg(PReg, PState)
1317 Register PReg = Op1.getReg();
1328 .addReg(PReg, S)
1340 .addReg(PReg, PState)
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
CallingConvLower.h 168 ForwardedRegister(Register VReg, MCPhysReg PReg, MVT VT)
169 : VReg(VReg), PReg(PReg), VT(VT) {}
171 MCPhysReg PReg;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
RegAllocPBQP.cpp 627 MCRegister PReg(RawPRegOrder[I]);
628 if (MRI.isReserved(PReg))
631 // vregLI crosses a regmask operand that clobbers preg.
632 if (!RegMaskOverlaps.empty() && !RegMaskOverlaps.test(PReg))
637 for (MCRegUnitIterator Units(PReg, &TRI); Units.isValid(); ++Units) {
646 // preg is usable for this virtual register.
647 VRegAllowed.push_back(PReg);
738 MCRegister PReg = G.getNodeMetadata(NId).getAllowedRegs()[AllocOpt - 1];
740 << TRI.getName(PReg) << "\n");
741 assert(PReg != 0 && "Invalid preg selected.")
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMLoadStoreOptimizer.cpp 1015 Register PReg = PMO.getReg();
1017 : TRI->getEncodingValue(PReg);
1026 PReg == getLoadStoreBaseOp(*MI).getReg())
1037 if (PReg == ARM::SP || PReg == ARM::PC)
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 3225 auto PReg = mc2PseudoReg(Reg);
3226 return isSGPR(PReg, TRI) && PReg != SGPR_NULL;

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