| /src/external/apache2/llvm/dist/llvm/lib/Support/ |
| SymbolRemappingReader.cpp | 42 SmallVector<StringRef, 4> Parts;
43 Line.split(Parts, ' ', /*MaxSplits*/-1, /*KeepEmpty*/false);
45 if (Parts.size() != 3)
50 Optional<FK> FragmentKind = StringSwitch<Optional<FK>>(Parts[0])
57 " found '" + Parts[0] + "'");
60 switch (Canonicalizer.addEquivalence(*FragmentKind, Parts[1], Parts[2])) {
65 return ReportError("Manglings '" + Parts[1] + "' and '" + Parts[2] + "' "
70 return ReportError("Could not demangle '" + Parts[1] + "'
[all...] |
| /src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| CodeBeadsGen.cpp | 76 unsigned Parts = MaxBitLength / 8;
79 OS << " static const uint8_t InstBits[][" << Parts << "] = {\n";
97 for (unsigned p = 0; p < Parts; ++p) {
|
| CodeGenRegisters.cpp | 92 std::vector<Record*> Parts =
94 if (!Parts.empty()) {
95 if (Parts.size() < 2)
99 for (Record *Part : Parts)
123 ArrayRef<CodeGenSubRegIndex*> Parts) {
125 ConcatenationOf.assign(Parts.begin(), Parts.end());
127 assert(std::equal(Parts.begin(), Parts.end(),
128 ConcatenationOf.begin()) && "parts consistent")
[all...] |
| /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/ |
| SnippetFile.cpp | 51 SmallVector<StringRef, 2> Parts;
52 CommentText.split(Parts, ' ', /*unlimited splits*/ -1,
54 if (Parts.size() != 2) {
60 if (!(RegVal.Register = findRegisterByName(Parts[0].trim()))) {
61 errs() << "unknown register '" << Parts[0]
66 const StringRef HexValue = Parts[1].trim();
|
| /src/external/apache2/llvm/dist/clang/lib/Tooling/Transformer/ |
| Stencil.cpp | 164 llvm::SmallVector<std::string, 2> Parts;
165 Parts.reserve(Data.Stencils.size());
167 Parts.push_back(S->toString());
168 return (llvm::Twine("seq(") + llvm::join(Parts, ", ") + ")").str();
449 Stencil transformer::catVector(std::vector<Stencil> Parts) {
451 if (Parts.size() == 1)
452 return std::move(Parts[0]);
453 return std::make_shared<StencilImpl<SequenceData>>(std::move(Parts));
|
| /src/external/apache2/llvm/dist/clang/lib/Driver/ToolChains/ |
| AMDGPU.cpp | 316 SmallVector<StringRef, 3> Parts;
317 HIPVersionArg.split(Parts, '.');
318 if (Parts.size())
319 Parts[0].getAsInteger(0, Major);
320 if (Parts.size() > 1)
321 Parts[1].getAsInteger(0, Minor);
322 if (Parts.size() > 2)
323 VersionPatch = Parts[2].str();
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypesGeneric.cpp | 160 // In cases where the vector is illegal it will be broken down into parts
161 // and stored in parts - we should use the alignment for the smallest part.
320 SDValue Parts[2];
324 SplitInteger(Op, Parts[0], Parts[1]);
326 std::swap(Parts[0], Parts[1]);
327 IntegerToVector(Parts[0], NumElements, Ops, EltVT);
328 IntegerToVector(Parts[1], NumElements, Ops, EltVT);
339 // Make a two element vector out of the expanded parts and convert tha
[all...] |
| LegalizeFloatTypes.cpp | 1707 ArrayRef<uint64_t> Parts;
1713 Parts = TwoE32;
1716 Parts = TwoE64;
1719 Parts = TwoE128;
1725 APFloat(APFloat::PPCDoubleDouble(), APInt(128, Parts)), dl, MVT::ppcf128);
|
| SelectionDAGBuilder.cpp | 155 const SDValue *Parts, unsigned NumParts,
159 /// getCopyFromParts - Create a value that contains the specified legal parts
160 /// combined into the value they represent. If the parts combine to a type
165 const SDValue *Parts, unsigned NumParts,
169 // Let the target assemble the parts if it wants to
171 if (SDValue Val = TLI.joinRegisterPartsIntoValue(DAG, DL, Parts, NumParts,
176 return getCopyFromPartsVector(DAG, DL, Parts, NumParts, PartVT, ValueVT, V,
179 assert(NumParts > 0 && "No parts to assemble!");
180 SDValue Val = Parts[0];
183 // Assemble the value from multiple parts
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/Serialization/ |
| ASTWriterDecl.cpp | 959 MSGuidDecl::Parts Parts = D->getParts();
960 Record.push_back(Parts.Part1);
961 Record.push_back(Parts.Part2);
962 Record.push_back(Parts.Part3);
963 for (auto C : Parts.Part4And5)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 756 auto Parts = bit_cast<std::array<T, sizeof(int64_t) / sizeof(T)>>(Imm);
757 return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 520 unsigned Parts = ArgsParts[i];
523 assert(Parts == 4 &&
527 if (!UsedStack && Parts == 2 && RegsLeft == 1) {
535 } else if (Parts <= RegsLeft) {
536 for (unsigned j = 0; j < Parts; j++) {
543 for (unsigned j = 0; j < Parts; j++)
|
| /src/external/apache2/llvm/dist/clang/utils/TableGen/ |
| ClangDiagnosticsEmitter.cpp | 560 Piece *Parts[4] = {};
919 FirstOption.Pieces.push_back(P->Parts[0]);
921 FirstOption.Pieces.push_back(P->Parts[1]);
923 FirstOption.Pieces.push_back(P->Parts[2]);
927 Select.Options.push_back(P->Parts[3]);
984 Visit(P->Parts[0]);
986 Visit(P->Parts[1]);
988 Visit(P->Parts[2]);
990 Visit(P->Parts[3]);
1129 Diff->Parts[0] = parseDiagText(Text, StopAt::Dollar)
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/TableGen/ |
| Record.h | 1917 SmallVector<std::pair< bool, StringRef>, 4> Parts;
1930 Parts.push_back(std::make_pair(IsDigitPart, StringRef(Start, Len)));
1937 Parts.push_back(std::make_pair(IsDigitPart, StringRef(Start, Len)));
1940 size_t size() { return Parts.size(); }
1943 assert (i < Parts.size() && "Invalid idx!");
1944 return Parts[i];
1965 "Expected both parts to be alpha.");
1974 "Expected both parts to be numeric.");
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| SIRegisterInfo.cpp | 2230 const std::vector<int16_t> &Parts = RegSplitParts[EltDWORDs - 1];
2233 return makeArrayRef(Parts.data(), NumParts);
|
| AMDGPUInstructionSelector.cpp | 1704 auto Parts = TRI.getRegSplitParts(MRI->getRegClass(Tied), 4);
1710 for (auto Sub : Parts)
1719 for (auto Sub : Parts.drop_back(1))
1721 RegSeq.addReg(Zero).addImm(Parts.back());
|
| /src/external/apache2/llvm/dist/clang/lib/AST/ |
| ItaniumMangle.cpp | 1039 auto Parts = Name.rsplit('.');
1040 if (Parts.second.empty())
1041 Parts.second = Parts.first;
1043 mangleModuleNamePrefix(Parts.first);
1045 Out << Parts.second.size() << Parts.second;
2750 // We should instead canonicalize the non-instantiation-dependent parts,
|
| /src/external/apache2/llvm/dist/llvm/tools/llvm-profdata/ |
| llvm-profdata.cpp | 164 std::pair<StringRef, StringRef> Parts = LineIt->split(' ');
165 if (Parts.first.empty() || Parts.second.empty() ||
166 Parts.second.count(' ')) {
171 Remapper->RemappingTable.insert(Parts);
|
| /src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| CodeGenModule.cpp | 2749 MSGuidDecl::Parts Parts = GD->getParts();
2751 llvm::ConstantInt::get(Int32Ty, Parts.Part1),
2752 llvm::ConstantInt::get(Int16Ty, Parts.Part2),
2753 llvm::ConstantInt::get(Int16Ty, Parts.Part3),
2755 StringRef(reinterpret_cast<char *>(Parts.Part4And5), 8), 8,
4177 // parts of AST, string literal global variables in constant address space
4815 // generating code for it because various parts of IR generation
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| LegalizerHelper.cpp | 182 // For irregular sizes, extract the individual parts.
256 void LegalizerHelper::extractGCDType(SmallVectorImpl<Register> &Parts,
262 Parts.push_back(SrcReg);
266 getUnmergeResults(Parts, *Unmerge);
270 LLT LegalizerHelper::extractGCDType(SmallVectorImpl<Register> &Parts, LLT DstTy,
274 extractGCDType(Parts, GCDTy, SrcReg);
1305 SmallVector<Register, 8> Parts;
1306 Parts.push_back(MO.getReg());
1310 Parts.push_back(ImpDef);
1312 auto Concat = MIRBuilder.buildConcatVectors(MoreTy, Parts);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelLowering.cpp | 896 // On RV32, 64-bit integers are split into their high and low parts and held
2841 SDValue Parts[2] = {Lo, Hi};
2842 return DAG.getMergeValues(Parts, DL);
2893 SDValue Parts[2] = {Lo, Hi};
2894 return DAG.getMergeValues(Parts, DL);
3444 // Shift the two scalar parts in using SEW=32 slide1up/slide1down
7272 // on RV32), we need to load all parts of it here (using the same
7557 // to store the required parts of it here (and pass just one address).
7567 SmallVector<std::pair<SDValue, unsigned>> Parts;
7574 Parts.push_back(std::make_pair(PartValue, PartOffset))
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 3213 // and pass the lower and high parts through.
4213 SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts,
4224 Parts[0] = Val;
4231 SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts,
4238 SDValue Val = Parts[0];
5800 // f64: Or the high part with signbit and then combine two parts.
7011 // upper and lower parts of the mask with a matching value for WhichResult
8207 // The four final parts of the vector, as i32's
8208 SDValue Parts[4];
8246 Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, BitCast
[all...] |
