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    Searched defs:RS2 (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/arch/sparc/sparc/
db_disasm.c 101 #define RS2(x) ((x) & 0x1f)
163 2 -- source register operand stored in rs2
166 4 -- floating source register in rs2
174 p -- address computed by the contents of rs1+rs2
182 7 -- [reg_addr rs1+rs2] imm_asi
  /src/sys/arch/sparc64/sparc64/
db_disasm.c 106 #define RS2(x) ((x) & 0x1f)
168 2 -- source register operand stored in rs2
171 4 -- floating source register in rs2
179 p -- address computed by the contents of rs1+rs2
187 7 -- [reg_addr rs1+rs2] imm_asi
  /src/external/gpl3/gdb/dist/sim/pru/
pru.h 54 #define RS2 extract_regval (CPU.regs[GET_INSN_FIELD (RS2, inst)], \
57 #define RS2_w0 extract_regval (CPU.regs[GET_INSN_FIELD (RS2, inst)], \
  /src/external/gpl3/gdb.old/dist/sim/pru/
pru.h 54 #define RS2 extract_regval (CPU.regs[GET_INSN_FIELD (RS2, inst)], \
57 #define RS2_w0 extract_regval (CPU.regs[GET_INSN_FIELD (RS2, inst)], \
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonSplitDouble.cpp 920 unsigned RS2 = getRegState(Op2);
944 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR);
947 .addReg(Op2.getReg(), RS2, HiSR);
951 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR)
955 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR)
964 .addReg(Op2.getReg(), RS2, HiSR)
975 .addReg(Op2.getReg(), RS2, LoSR);
986 .addReg(Op2.getReg(), RS2, LoSR)
  /src/external/gpl3/binutils/dist/include/opcode/
sparc.h 210 2 rs2 register.
257 O Single register that is both rs2 and rd.
308 #define RS2(x) ((x) & 0x1f) /* Rs2 field. */
323 #define RS2_G0 RS2 (~0)
  /src/external/gpl3/binutils.old/dist/include/opcode/
sparc.h 210 2 rs2 register.
257 O Single register that is both rs2 and rd.
308 #define RS2(x) ((x) & 0x1f) /* Rs2 field. */
323 #define RS2_G0 RS2 (~0)
  /src/external/gpl3/gdb/dist/include/opcode/
sparc.h 210 2 rs2 register.
257 O Single register that is both rs2 and rd.
308 #define RS2(x) ((x) & 0x1f) /* Rs2 field. */
323 #define RS2_G0 RS2 (~0)
  /src/external/gpl3/gdb.old/dist/include/opcode/
sparc.h 210 2 rs2 register.
257 O Single register that is both rs2 and rd.
308 #define RS2(x) ((x) & 0x1f) /* Rs2 field. */
323 #define RS2_G0 RS2 (~0)

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