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    Searched defs:RSrc (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPURegisterBankInfo.cpp 365 // rsrc, voffset, offset
394 // rsrc, offset
1309 // If this intrinsic has a sampler, it immediately follows rsrc.
1471 Register RSrc = MI.getOperand(1).getReg();
1494 .addUse(RSrc) // rsrc
1515 OpsToWaterfall.insert(RSrc);
1763 Register RSrc = MI.getOperand(2).getReg();
1802 MIB.addUse(RSrc)
3185 // If this has a sampler, it immediately follows rsrc
    [all...]
SIInstrInfo.cpp 319 const MachineOperand *RSrc = getNamedOperand(LdSt, AMDGPU::OpName::srsrc);
320 if (!RSrc) // e.g. BUFFER_WBINVL1_VOL
322 BaseOps.push_back(RSrc);
5126 // unique value of \p Rsrc across all lanes. In the best case we execute 1
5131 const DebugLoc &DL, MachineOperand &Rsrc) {
5149 Register VRsrc = Rsrc.getReg();
5150 unsigned VRsrcUndef = getUndefRegState(Rsrc.isUndef());
5152 unsigned RegSize = TRI->getRegSizeInBits(Rsrc.getReg(), MRI);
5204 // Build scalar Rsrc.
5212 // Update Rsrc operand to use the SGPR Rsrc
    [all...]

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