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      1 /* $NetBSD: tegra_rtcreg.h,v 1.1 2015/05/05 00:25:44 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #ifndef _ARM_TEGRA_RTCREG_H
     30 #define _ARM_TEGRA_RTCREG_H
     31 
     32 #define RTC_CONTROL_REG				0x00
     33 #define RTC_BUSY_REG				0x04
     34 #define RTC_SECONDS_REG				0x08
     35 #define	RTC_SHADOW_SECONDS_REG			0x0c
     36 #define RTC_MILLI_SECONDS_REG			0x10
     37 #define RTC_SECONDS_ALARM0_REG			0x14
     38 #define RTC_SECONDS_ALARM1_REG			0x18
     39 #define RTC_MILLI_SECONDS_ALARM_REG		0x1c
     40 #define RTC_SECONDS_COUNTDOWN_ALARM_REG		0x20
     41 #define RTC_MILLI_SECONDS_COUNTDOW_ALARM_REG	0x24
     42 #define RTC_INTR_MASK_REG			0x28
     43 #define RTC_INTR_STATUS_REG			0x2c
     44 #define RTC_INTR_SOURCE_REG			0x30
     45 #define RTC_INTR_SET_REG			0x34
     46 #define RTC_CORRECTION_FACTOR_REG		0x38
     47 
     48 #define RTC_BUSY_STATUS				__BIT(0)
     49 
     50 #endif /* _ARM_TEGRA_RTCREG_H */
     51