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      1 /*	$NetBSD: rtclock_var.h,v 1.12 2021/08/21 09:59:46 andvar Exp $	*/
      2 
      3 /*
      4  * Copyright 1993, 1994 Masaru Oki
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *      This product includes software developed by Masaru Oki.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Should be split to _reg.h and _var.h
     35  */
     36 
     37 #ifndef _RTCLOCKVAR_H_
     38 #define _RTCLOCKVAR_H_
     39 
     40 struct rtc_softc {
     41 	bus_space_tag_t		sc_bst;
     42 	bus_space_handle_t	sc_bht;
     43 	struct todr_chip_handle	sc_todr;
     44 };
     45 
     46 /*
     47  * commands written to mode, HOLD before reading the clock,
     48  * FREE after done reading.
     49  */
     50 
     51 #define RTC_HOLD_CLOCK	0
     52 #define RTC_FREE_CLOCK	8
     53 
     54 #define RTC_REG(x) (bus_space_read_1(rtc->sc_bst, rtc->sc_bht, (x)) & 0x0f)
     55 #define RTC_WRITE(x,v) bus_space_write_1(rtc->sc_bst, rtc->sc_bht, (x), (v))
     56 
     57 #define RTC_ADDR	0xe8a000
     58 
     59 /* RTC register bank 0 */
     60 #define RTC_SEC		0x01
     61 #define RTC_SEC10	0x03
     62 #define RTC_MIN		0x05
     63 #define RTC_MIN10	0x07
     64 #define RTC_HOUR	0x09
     65 #define RTC_HOUR10	0x0b
     66 #define RTC_WEEK	0x0d
     67 #define RTC_DAY		0x0f
     68 #define RTC_DAY10	0x11
     69 #define RTC_MON		0x13
     70 #define RTC_MON10	0x15
     71 #define RTC_YEAR	0x17
     72 #define RTC_YEAR10	0x19
     73 #define RTC_MODE	0x1b
     74 #define RTC_TEST	0x1d
     75 #define RTC_RESET	0x1f
     76 
     77 /* RTC register bank 1 */
     78 #define RTC_CLKOUT	0x01
     79 #define RTC_ADJUST	0x03
     80 #define RTC_AL_MIN	0x05
     81 #define RTC_AL_MIN10	0x07
     82 #define RTC_AL_HOUR	0x09
     83 #define RTC_AL_HOUR10	0x0b
     84 #define RTC_AL_WEEK	0x0d
     85 #define RTC_AL_DAY	0x0f
     86 #define RTC_AL_DAY10	0x11
     87 #define RTC_UNUSED1	0x13
     88 #define RTC_AMPM	0x15
     89 #define RTC_LEAP	0x17
     90 #define RTC_UNUSED2	0x19
     91 
     92 #define RTC_BASE_YEAR	1980
     93 
     94 #endif /* _RTCLOCKVAR_H_ */
     95