1 /* $NetBSD: ds1687reg.h,v 1.1 2002/02/10 12:26:01 chris Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Mark Brinicombe. 5 * Copyright (c) 1998 Causality Limited. 6 * All rights reserved. 7 * 8 * Written by Mark Brinicombe, Causality Limited 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY CAUASLITY LIMITED ``AS IS'' AND ANY EXPRESS 27 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 */ 38 39 #define RTC_ADDR 0x72 40 #define RTC_ADDR_REG 0x00 41 #define RTC_DATA_REG 0x01 42 43 #define RTC_SECONDS 0x00 44 #define RTC_SECONDS_ALARM 0x01 45 #define RTC_MINUTES 0x02 46 #define RTC_MINUTES_ALARM 0x03 47 #define RTC_HOURS 0x04 48 #define RTC_HOURS_ALARM 0x05 49 #define RTC_DAYOFWEEK 0x06 50 #define RTC_DAYOFMONTH 0x07 51 #define RTC_MONTH 0x08 52 #define RTC_YEAR 0x09 53 54 #define RTC_REG_A 0x0a 55 #define RTC_REG_A_UIP 0x80 /* Update In Progress */ 56 #define RTC_REG_A_DV2 0x40 /* Countdown CHain */ 57 #define RTC_REG_A_DV1 0x20 /* Oscillator Enable */ 58 #define RTC_REG_A_DV0 0x10 /* Bank Select */ 59 #define RTC_REG_A_BANK_MASK RTC_REG_A_DV0 60 #define RTC_REG_A_BANK1 RTC_REG_A_DV0 61 #define RTC_REG_A_BANK0 0x00 62 #define RTC_REG_A_RS_MASK 0x0f /* Rate select mask */ 63 #define RTC_REG_A_RS_NONE 0x00 64 #define RTC_REG_A_RS_256HZ_1 0x01 65 #define RTC_REG_A_RS_128HZ_1 0x02 66 #define RTC_REG_A_RS_8192HZ 0x03 67 #define RTC_REG_A_RS_4096HZ 0x04 68 #define RTC_REG_A_RS_2048HZ 0x05 69 #define RTC_REG_A_RS_1024HZ 0x06 70 #define RTC_REG_A_RS_512HZ 0x07 71 #define RTC_REG_A_RS_256HZ 0x08 72 #define RTC_REG_A_RS_128HZ 0x09 73 #define RTC_REG_A_RS_64HZ 0x0A 74 #define RTC_REG_A_RS_32HZ 0x0B 75 #define RTC_REG_A_RS_16HZ 0x0C 76 #define RTC_REG_A_RS_8HZ 0x0D 77 #define RTC_REG_A_RS_4HZ 0x0E 78 #define RTC_REG_A_RS_2HZ 0x0F 79 80 #define RTC_REG_B 0x0b 81 #define RTC_REG_B_SET 0x80 /* Inhibit update */ 82 #define RTC_REG_B_PIE 0x40 /* Periodic Interrupt Enable */ 83 #define RTC_REG_B_AIE 0x20 /* Alarm Interrupt Enable */ 84 #define RTC_REG_B_UIE 0x10 /* Updated Ended Interrupt Enable */ 85 #define RTC_REG_B_SQWE 0x08 /* Square Wave Enable */ 86 #define RTC_REG_B_DM 0x04 /* Data Mode */ 87 #define RTC_REG_B_BINARY RTC_REG_B_DM 88 #define RTC_REG_B_BCD 0 89 #define RTC_REG_B_24_12 0x02 /* Hour format */ 90 #define RTC_REG_B_24_HOUR RTC_REG_B_24_12 91 #define RTC_REG_B_12_HOUR 0 92 #define RTC_REG_B_DSE 0x01 /* Daylight Savings Enable */ 93 94 #define RTC_REG_C 0x0c 95 #define RTC_REG_C_IRQF 0x80 /* Interrupt Request Flag */ 96 #define RTC_REG_C_PF 0x40 /* Periodic Interrupt Flag */ 97 #define RTC_REG_C_AF 0x20 /* Alarm Interrupt Flag */ 98 #define RTC_REG_C_UF 0x10 /* Update Ended Flags */ 99 100 #define RTC_REG_D 0x0d 101 #define RTC_REG_D_VRT 0x80 /* Valid RAM and Time */ 102 103 #define RTC_PC_RAM_START 0x0e 104 #define RTC_PC_RAM_SIZE 50 105 106 #define RTC_BANK0_RAM_START 0x40 107 #define RTC_BANK0_RAM_SIZE 0x40 108 109 #define RTC_MODEL 0x40 110 #define RTC_SERIAL_1 0x41 111 #define RTC_SERIAL_2 0x42 112 #define RTC_SERIAL_3 0x43 113 #define RTC_SERIAL_4 0x44 114 #define RTC_SERIAL_5 0x45 115 #define RTC_SERIAL_6 0x46 116 #define RTC_CRC 0x47 117 #define RTC_CENTURY 0x48 118 #define RTC_DATE_ALARM 0x49 119 #define RTC_REG_4A 0x4a 120 #define RTC_REG_4A_VRT2 0x80 121 #define RTC_REG_4A_INCR 0x40 122 #define RTC_REG_4A_PAB 0x08 123 #define RTC_REG_4A_RF 0x04 124 #define RTC_REG_4B 0x4b 125 #define RTC_EXT_RAM_ADDRESS 0x50 126 #define RTC_EXT_RAM_DATA 0x53 127 #define RTC_EXT_RAM_START 0x00 128 #define RTC_EXT_RAM_SIZE 0x80 129
Indexes created Mon Sep 22 13:09:51 GMT 2025