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    Searched defs:RegHi (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp 1701 Register RegHi = TRI->getSubReg(Reg.getReg(), ARM::gsub_1);
1703 MIB.addReg(RegHi, Flags);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIInstrInfo.cpp 1909 Register RegHi = RI.getSubReg(Reg, AMDGPU::sub1);
1922 MachineInstrBuilder MIB = BuildMI(MF, DL, get(AMDGPU::S_ADDC_U32), RegHi)
1923 .addReg(RegHi);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 2471 int64_t RegLo, RegHi;
2483 if (!parseExpr(RegHi))
2486 RegHi = RegLo;
2497 if (!isUInt<32>(RegHi)) {
2502 if (RegLo > RegHi) {
2508 Width = (RegHi - RegLo) + 1;
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 4050 unsigned RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC);
4052 SDValue ArgValueHi = DAG.getCopyFromReg(Chain, dl, RegHi, MVT::i32);

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