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    Searched defs:RetI (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp 1104 auto &RetI = *MBBI;
1105 const DebugLoc &DL = RetI.getDebugLoc();
1129 for (const MachineOperand &Op : RetI.operands()) {
1210 auto &RetI = *MBBI;
1223 BuildMI(MBB, MBBI, RetI.getDebugLoc(), TII->get(ARM::VSCCLRMS))
1234 BuildMI(MBB, MBBI, RetI.getDebugLoc(), TII->get(ARM::VSCCLRMS))
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonFrameLowering.cpp 537 MachineInstr *RetI = getReturn(B);
538 if (!RetI || isRestoreCall(RetI->getOpcode()))
541 RetI->addOperand(MachineOperand::CreateReg(R.getReg(), false, true));
790 MachineInstr *RetI = getReturn(MBB);
791 unsigned RetOpc = RetI ? RetI->getOpcode() : 0;
810 MachineBasicBlock::iterator It = RetI;
851 MachineInstr *NewI = BuildMI(MBB, RetI, dl, HII.get(NewOpc))
855 NewI->copyImplicitOps(MF, *RetI);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
CodeGenPrepare.cpp 2312 ReturnInst *RetI = dyn_cast<ReturnInst>(BB->getTerminator());
2313 if (!RetI)
2319 Value *V = RetI->getReturnValue();
2357 if (BI != RetI)
2373 attributesPermitTailCall(F, CI, RetI, *TLI))
2384 attributesPermitTailCall(F, CI, RetI, *TLI))
2399 (void)FoldReturnIntoUncondBranch(RetI, BB, TailCallBB);

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