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Searched
defs:SEW
(Results
1 - 4
of
4
) sorted by relevancy
/src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelDAGToDAG.h
100
uint8_t
SEW
;
109
uint8_t
SEW
;
119
uint8_t
SEW
;
128
uint8_t
SEW
;
138
uint8_t
SEW
;
146
uint8_t
SEW
;
154
uint8_t
SEW
;
RISCVISelDAGToDAG.cpp
128
SDNode *Node, unsigned
SEW
, const SDLoc &DL, unsigned CurOp, bool IsMasked,
155
SDValue SEWOp = CurDAG->getTargetConstant(Log2_32(
SEW
), DL, XLenVT);
494
SDValue
SEW
= CurDAG->getTargetConstant(
502
CurDAG->getMachineNode(VMSLTOpcode, DL, VT, {Src1, Src2, VL,
SEW
}),
505
{Cmp, Cmp, VL,
SEW
}));
584
SDValue
SEW
= CurDAG->getTargetConstant(
595
CurDAG->getMachineNode(VMSLTOpcode, DL, VT, {Src1, Src2, VL,
SEW
}),
598
{Mask, Cmp, VL,
SEW
}));
606
{MaskedOff, Src1, Src2, Mask, VL,
SEW
}),
609
{Cmp, Mask, VL,
SEW
}));
[
all
...]
RISCVISelLowering.cpp
1233
// than 64/
SEW
.
1743
// If this is
SEW
=64 on RV32, use a strided load with a stride of x0.
2031
// RVV only has truncates which operate from
SEW
*2->
SEW
, so lower arbitrary
2924
// Custom-lower a SPLAT_VECTOR_PARTS where XLEN<
SEW
, as the
SEW
element type is
3289
// that a widening operation never uses
SEW
=64.
3300
// on the instruction to sign-extend since
SEW
>XLEN.
3436
// Double the VL since we halved
SEW
.
3444
// Shift the two scalar parts in using
SEW
=32 slide1up/slide1dow
[
all
...]
/src/external/apache2/llvm/dist/clang/lib/CodeGen/
CGDebugInfo.cpp
770
unsigned
SEW
= CGM.getContext().getTypeSize(Info.ElementType);
774
unsigned FixedSize = ElementCount *
SEW
;
786
// Element count = (VLENB /
SEW
) x LMUL
795
SEW
/ 8, //
SEW
is in bits.
Completed in 117 milliseconds
Indexes created Mon Jun 08 00:24:58 UTC 2026