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      1 /* -*-C++-*-	$NetBSD: sh3.h,v 1.5 2008/04/28 20:23:20 martin Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001, 2002, 2004 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _HPCBOOT_SH_CPU_SH3_H_
     33 #define	_HPCBOOT_SH_CPU_SH3_H_
     34 #include <sh3/cpu/sh.h>
     35 
     36 /*
     37  * SH3 designed for Windows CE (SH7709, SH7709A, SH7707) common defines.
     38  */
     39 #define	SH3_TRA			0xffffffd0
     40 #define	SH3_EXPEVT		0xffffffd4
     41 #define	SH3_INTEVT		0xffffffd8
     42 #define	SH3_INTEVT2		0xa4000000
     43 
     44 /* Windows CE uses 1Kbyte page for SH3, 4Kbyte for SH4 */
     45 #define	SH3_PAGE_SIZE		0x400
     46 #define	SH3_PAGE_MASK		(~(SH3_PAGE_SIZE - 1))
     47 
     48 /*
     49  * Cache (Windows CE uses normal-mode.)
     50  */
     51 #define	SH3_CCR			0xffffffec
     52 #define	SH3_CCR_CE		  0x00000001
     53 #define	SH3_CCR_WT		  0x00000002
     54 #define	SH3_CCR_CB		  0x00000004
     55 #define	SH3_CCR_CF		  0x00000008
     56 #define	SH3_CCR_RA		  0x00000020
     57 #define	SH3_CCA			0xf0000000
     58 #define	SH3_CCD			0xf1000000
     59 
     60 /*
     61  * 4-way set-associative 32-entry (total 128 entries)
     62  */
     63 #define	SH3_MMU_WAY			4
     64 #define	SH3_MMU_ENTRY			32
     65 
     66 #define	SH3_PTEH			0xfffffff0
     67 #define	  SH3_PTEH_ASID_MASK		  0x0000000f
     68 #define	  SH3_PTEH_VPN_MASK		  0xfffffc00
     69 #define	SH3_MMUCR			0xffffffe0
     70 #define	  SH3_MMUCR_AT			  0x00000001
     71 #define	  SH3_MMUCR_IX			  0x00000002
     72 #define	  SH3_MMUCR_TF			  0x00000004
     73 #define	  SH3_MMUCR_RC			  0x00000030
     74 #define	  SH3_MMUCR_SV			  0x00000100
     75 
     76 /*
     77  * memory-mapped TLB
     78  */
     79 /* Address array */
     80 #define	SH3_MMUAA			0xf2000000
     81 /* address specification */
     82 #define	  SH3_MMU_VPN_SHIFT		  12
     83 #define	  SH3_MMU_VPN_MASK		  0x0001f000	/* [16:12] */
     84 #define	  SH3_MMU_WAY_SHIFT		  8
     85 #define	  SH3_MMU_WAY_MASK		  0x00000300
     86 /* data specification */
     87 #define	  SH3_MMU_D_VALID		  0x00000100
     88 #define	  SH3_MMUAA_D_VPN_MASK		  0xfffe0c00	/* [31:17][11:10] */
     89 #define	  SH3_MMUAA_D_ASID_MASK		  0x0000000f
     90 
     91 /* Data array */
     92 #define	SH3_MMUDA			0xf3000000
     93 #define	  SH3_MMUDA_D_PPN_MASK		  0xfffffc00
     94 #define	  SH3_MMUDA_D_V			  0x00000100
     95 #define	  SH3_MMUDA_D_PR_SHIFT		  5
     96 #define	  SH3_MMUDA_D_PR_MASK		  0x00000060	/* [6:5] */
     97 #define	  SH3_MMUDA_D_SZ		  0x00000010
     98 #define	  SH3_MMUDA_D_C			  0x00000008
     99 #define	  SH3_MMUDA_D_D			  0x00000004
    100 #define	  SH3_MMUDA_D_SH		  0x00000002
    101 
    102 
    103 #define	SH3_MMU_DISABLE()	_reg_write_4(SH3_MMUCR, SH3_MMUCR_TF)
    104 
    105 /*
    106  * Product dependent headers
    107  */
    108 #include <sh3/cpu/7707.h>
    109 #include <sh3/cpu/7709.h>
    110 #include <sh3/cpu/7709a.h>
    111 
    112 #endif // _HPCBOOT_SH_CPU_SH3_H_
    113