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      1 /*	$NetBSD: if_smapreg.h,v 1.4 2014/03/31 11:25:49 martin Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * SMAP memory access layer.
     34  *
     35  *    <-> FIFO <-> BUF
     36  * CPU              +<-----> EMAC3
     37  *    <----------> DESC
     38  */
     39 
     40 /*
     41  * Buffer (accessed by FIFO or EMAC3. indexed by descriptor)
     42  */
     43 #define	SMAP_TXBUF_BASE		0x1000
     44 #define SMAP_TXBUF_SIZE		0x1000
     45 #define SMAP_RXBUF_BASE		0x4000
     46 #define SMAP_RXBUF_SIZE		0x4000
     47 
     48 /*
     49  * FIFO access
     50  */
     51 #define	SMAP_TXFIFO_CTRL_REG8		MIPS_PHYS_TO_KSEG1(0x14001000)
     52 #define	SMAP_TXFIFO_PTR_REG16		MIPS_PHYS_TO_KSEG1(0x14001004)
     53 #define	SMAP_TXFIFO_FRAME_REG8		MIPS_PHYS_TO_KSEG1(0x1400100c)
     54 #define	SMAP_TXFIFO_FRAME_INC_REG8	MIPS_PHYS_TO_KSEG1(0x14001010)
     55 #define	SMAP_TXFIFO_DATA_REG		MIPS_PHYS_TO_KSEG1(0x14001100)
     56 #define	SMAP_RXFIFO_CTRL_REG8		MIPS_PHYS_TO_KSEG1(0x14001030)
     57 #define	SMAP_RXFIFO_PTR_REG16		MIPS_PHYS_TO_KSEG1(0x14001034)
     58 #define	SMAP_RXFIFO_FRAME_REG8		MIPS_PHYS_TO_KSEG1(0x1400103c)
     59 #define	SMAP_RXFIFO_FRAME_DEC_REG8	MIPS_PHYS_TO_KSEG1(0x14001040)
     60 #define	SMAP_RXFIFO_DATA_REG		MIPS_PHYS_TO_KSEG1(0x14001200)
     61 #define	  SMAP_FIFO_RESET	0x01
     62 
     63 /*
     64  * Descriptor access
     65  */
     66 #define SMAP_DESC_MODE_REG8		MIPS_PHYS_TO_KSEG1(0x14000102)
     67 #define   SMAP_DESC_MODE_SWAP	0x0001
     68 
     69 #define SMAP_TXDESC_BASE		MIPS_PHYS_TO_KSEG1(0x14003000)
     70 #define SMAP_RXDESC_BASE		MIPS_PHYS_TO_KSEG1(0x14003200)
     71 #define SMAP_DESC_MAX		64
     72 struct smap_desc {
     73 	u_int16_t stat;
     74 	u_int16_t __reserved;
     75 	u_int16_t sz;
     76 	u_int16_t ptr;
     77 }__attribute__((__packed__, __aligned__(8)));
     78 
     79 /* TX Control */
     80 #define	SMAP_TXDESC_READY	0x8000
     81 #define	SMAP_TXDESC_GENFCS	0x0200
     82 #define	SMAP_TXDESC_GENPAD	0x0100
     83 #define	SMAP_TXDESC_INSSA	0x0080
     84 #define	SMAP_TXDESC_RPLSA	0x0040
     85 #define	SMAP_TXDESC_INSVLAN	0x0020
     86 #define	SMAP_TXDESC_RPLVLAN	0x0010
     87 
     88 /* TX Status */
     89 #define	SMAP_TXDESC_READY	0x8000
     90 #define	SMAP_TXDESC_BADFCS	0x0200
     91 #define	SMAP_TXDESC_BADPKT	0x0100
     92 #define	SMAP_TXDESC_LOSSCR	0x0080
     93 #define	SMAP_TXDESC_EDEFER	0x0040
     94 #define	SMAP_TXDESC_ECOLL	0x0020
     95 #define	SMAP_TXDESC_LCOLL	0x0010
     96 #define	SMAP_TXDESC_MCOLL	0x0008
     97 #define	SMAP_TXDESC_SCOLL	0x0004
     98 #define	SMAP_TXDESC_UNDERRUN	0x0002
     99 #define	SMAP_TXDESC_SQE		0x0001
    100 
    101 /* RX Control */
    102 #define	SMAP_RXDESC_EMPTY	0x8000
    103 
    104 /* RX Status */
    105 #define	SMAP_RXDESC_EMPTY	0x8000
    106 #define	SMAP_RXDESC_OVERRUN	0x0200
    107 #define	SMAP_RXDESC_PFRM	0x0100
    108 #define	SMAP_RXDESC_BADFRM	0x0080
    109 #define	SMAP_RXDESC_RUNTFRM	0x0040
    110 #define	SMAP_RXDESC_SHORTEVNT	0x0020
    111 #define	SMAP_RXDESC_ALIGNERR	0x0010
    112 #define	SMAP_RXDESC_BADFCS	0x0008
    113 #define	SMAP_RXDESC_FRMTOOLONG	0x0004
    114 #define	SMAP_RXDESC_OUTRANGE	0x0002
    115 #define	SMAP_RXDESC_INRANGE	0x0001
    116