1 /* $NetBSD: smuio_9_0_sh_mask.h,v 1.2 2021/12/18 23:45:23 riastradh Exp $ */ 2 3 /* 4 * Copyright (C) 2017 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included 14 * in all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 #ifndef _smuio_9_0_SH_MASK_HEADER 24 #define _smuio_9_0_SH_MASK_HEADER 25 26 27 // addressBlock: smuio_smuio_SmuSmuioDec 28 //ROM_CNTL 29 #define ROM_CNTL__CLOCK_GATING_EN__SHIFT 0x0 30 #define ROM_CNTL__CLOCK_GATING_EN_MASK 0x00000001L 31 //ROM_STATUS 32 #define ROM_STATUS__ROM_BUSY__SHIFT 0x0 33 #define ROM_STATUS__ROM_BUSY_MASK 0x00000001L 34 //CGTT_ROM_CLK_CTRL0 35 #define CGTT_ROM_CLK_CTRL0__ON_DELAY__SHIFT 0x0 36 #define CGTT_ROM_CLK_CTRL0__OFF_HYSTERESIS__SHIFT 0x4 37 #define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE1__SHIFT 0x1e 38 #define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE0__SHIFT 0x1f 39 #define CGTT_ROM_CLK_CTRL0__ON_DELAY_MASK 0x0000000FL 40 #define CGTT_ROM_CLK_CTRL0__OFF_HYSTERESIS_MASK 0x00000FF0L 41 #define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE1_MASK 0x40000000L 42 #define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE0_MASK 0x80000000L 43 //ROM_INDEX 44 #define ROM_INDEX__ROM_INDEX__SHIFT 0x0 45 #define ROM_INDEX__ROM_INDEX_MASK 0x00FFFFFFL 46 //ROM_DATA 47 #define ROM_DATA__ROM_DATA__SHIFT 0x0 48 #define ROM_DATA__ROM_DATA_MASK 0xFFFFFFFFL 49 //ROM_START 50 #define ROM_START__ROM_START__SHIFT 0x0 51 #define ROM_START__ROM_START_MASK 0x00FFFFFFL 52 //ROM_SW_CNTL 53 #define ROM_SW_CNTL__DATA_SIZE__SHIFT 0x0 54 #define ROM_SW_CNTL__COMMAND_SIZE__SHIFT 0x10 55 #define ROM_SW_CNTL__ROM_SW_RETURN_DATA_ENABLE__SHIFT 0x12 56 #define ROM_SW_CNTL__DATA_SIZE_MASK 0x0000FFFFL 57 #define ROM_SW_CNTL__COMMAND_SIZE_MASK 0x00030000L 58 #define ROM_SW_CNTL__ROM_SW_RETURN_DATA_ENABLE_MASK 0x00040000L 59 //ROM_SW_STATUS 60 #define ROM_SW_STATUS__ROM_SW_DONE__SHIFT 0x0 61 #define ROM_SW_STATUS__ROM_SW_DONE_MASK 0x00000001L 62 //ROM_SW_COMMAND 63 #define ROM_SW_COMMAND__ROM_SW_INSTRUCTION__SHIFT 0x0 64 #define ROM_SW_COMMAND__ROM_SW_ADDRESS__SHIFT 0x8 65 #define ROM_SW_COMMAND__ROM_SW_INSTRUCTION_MASK 0x000000FFL 66 #define ROM_SW_COMMAND__ROM_SW_ADDRESS_MASK 0xFFFFFF00L 67 //ROM_SW_DATA_1 68 #define ROM_SW_DATA_1__ROM_SW_DATA__SHIFT 0x0 69 #define ROM_SW_DATA_1__ROM_SW_DATA_MASK 0xFFFFFFFFL 70 //ROM_SW_DATA_2 71 #define ROM_SW_DATA_2__ROM_SW_DATA__SHIFT 0x0 72 #define ROM_SW_DATA_2__ROM_SW_DATA_MASK 0xFFFFFFFFL 73 //ROM_SW_DATA_3 74 #define ROM_SW_DATA_3__ROM_SW_DATA__SHIFT 0x0 75 #define ROM_SW_DATA_3__ROM_SW_DATA_MASK 0xFFFFFFFFL 76 //ROM_SW_DATA_4 77 #define ROM_SW_DATA_4__ROM_SW_DATA__SHIFT 0x0 78 #define ROM_SW_DATA_4__ROM_SW_DATA_MASK 0xFFFFFFFFL 79 //ROM_SW_DATA_5 80 #define ROM_SW_DATA_5__ROM_SW_DATA__SHIFT 0x0 81 #define ROM_SW_DATA_5__ROM_SW_DATA_MASK 0xFFFFFFFFL 82 //ROM_SW_DATA_6 83 #define ROM_SW_DATA_6__ROM_SW_DATA__SHIFT 0x0 84 #define ROM_SW_DATA_6__ROM_SW_DATA_MASK 0xFFFFFFFFL 85 //ROM_SW_DATA_7 86 #define ROM_SW_DATA_7__ROM_SW_DATA__SHIFT 0x0 87 #define ROM_SW_DATA_7__ROM_SW_DATA_MASK 0xFFFFFFFFL 88 //ROM_SW_DATA_8 89 #define ROM_SW_DATA_8__ROM_SW_DATA__SHIFT 0x0 90 #define ROM_SW_DATA_8__ROM_SW_DATA_MASK 0xFFFFFFFFL 91 //ROM_SW_DATA_9 92 #define ROM_SW_DATA_9__ROM_SW_DATA__SHIFT 0x0 93 #define ROM_SW_DATA_9__ROM_SW_DATA_MASK 0xFFFFFFFFL 94 //ROM_SW_DATA_10 95 #define ROM_SW_DATA_10__ROM_SW_DATA__SHIFT 0x0 96 #define ROM_SW_DATA_10__ROM_SW_DATA_MASK 0xFFFFFFFFL 97 //ROM_SW_DATA_11 98 #define ROM_SW_DATA_11__ROM_SW_DATA__SHIFT 0x0 99 #define ROM_SW_DATA_11__ROM_SW_DATA_MASK 0xFFFFFFFFL 100 //ROM_SW_DATA_12 101 #define ROM_SW_DATA_12__ROM_SW_DATA__SHIFT 0x0 102 #define ROM_SW_DATA_12__ROM_SW_DATA_MASK 0xFFFFFFFFL 103 //ROM_SW_DATA_13 104 #define ROM_SW_DATA_13__ROM_SW_DATA__SHIFT 0x0 105 #define ROM_SW_DATA_13__ROM_SW_DATA_MASK 0xFFFFFFFFL 106 //ROM_SW_DATA_14 107 #define ROM_SW_DATA_14__ROM_SW_DATA__SHIFT 0x0 108 #define ROM_SW_DATA_14__ROM_SW_DATA_MASK 0xFFFFFFFFL 109 //ROM_SW_DATA_15 110 #define ROM_SW_DATA_15__ROM_SW_DATA__SHIFT 0x0 111 #define ROM_SW_DATA_15__ROM_SW_DATA_MASK 0xFFFFFFFFL 112 //ROM_SW_DATA_16 113 #define ROM_SW_DATA_16__ROM_SW_DATA__SHIFT 0x0 114 #define ROM_SW_DATA_16__ROM_SW_DATA_MASK 0xFFFFFFFFL 115 //ROM_SW_DATA_17 116 #define ROM_SW_DATA_17__ROM_SW_DATA__SHIFT 0x0 117 #define ROM_SW_DATA_17__ROM_SW_DATA_MASK 0xFFFFFFFFL 118 //ROM_SW_DATA_18 119 #define ROM_SW_DATA_18__ROM_SW_DATA__SHIFT 0x0 120 #define ROM_SW_DATA_18__ROM_SW_DATA_MASK 0xFFFFFFFFL 121 //ROM_SW_DATA_19 122 #define ROM_SW_DATA_19__ROM_SW_DATA__SHIFT 0x0 123 #define ROM_SW_DATA_19__ROM_SW_DATA_MASK 0xFFFFFFFFL 124 //ROM_SW_DATA_20 125 #define ROM_SW_DATA_20__ROM_SW_DATA__SHIFT 0x0 126 #define ROM_SW_DATA_20__ROM_SW_DATA_MASK 0xFFFFFFFFL 127 //ROM_SW_DATA_21 128 #define ROM_SW_DATA_21__ROM_SW_DATA__SHIFT 0x0 129 #define ROM_SW_DATA_21__ROM_SW_DATA_MASK 0xFFFFFFFFL 130 //ROM_SW_DATA_22 131 #define ROM_SW_DATA_22__ROM_SW_DATA__SHIFT 0x0 132 #define ROM_SW_DATA_22__ROM_SW_DATA_MASK 0xFFFFFFFFL 133 //ROM_SW_DATA_23 134 #define ROM_SW_DATA_23__ROM_SW_DATA__SHIFT 0x0 135 #define ROM_SW_DATA_23__ROM_SW_DATA_MASK 0xFFFFFFFFL 136 //ROM_SW_DATA_24 137 #define ROM_SW_DATA_24__ROM_SW_DATA__SHIFT 0x0 138 #define ROM_SW_DATA_24__ROM_SW_DATA_MASK 0xFFFFFFFFL 139 //ROM_SW_DATA_25 140 #define ROM_SW_DATA_25__ROM_SW_DATA__SHIFT 0x0 141 #define ROM_SW_DATA_25__ROM_SW_DATA_MASK 0xFFFFFFFFL 142 //ROM_SW_DATA_26 143 #define ROM_SW_DATA_26__ROM_SW_DATA__SHIFT 0x0 144 #define ROM_SW_DATA_26__ROM_SW_DATA_MASK 0xFFFFFFFFL 145 //ROM_SW_DATA_27 146 #define ROM_SW_DATA_27__ROM_SW_DATA__SHIFT 0x0 147 #define ROM_SW_DATA_27__ROM_SW_DATA_MASK 0xFFFFFFFFL 148 //ROM_SW_DATA_28 149 #define ROM_SW_DATA_28__ROM_SW_DATA__SHIFT 0x0 150 #define ROM_SW_DATA_28__ROM_SW_DATA_MASK 0xFFFFFFFFL 151 //ROM_SW_DATA_29 152 #define ROM_SW_DATA_29__ROM_SW_DATA__SHIFT 0x0 153 #define ROM_SW_DATA_29__ROM_SW_DATA_MASK 0xFFFFFFFFL 154 //ROM_SW_DATA_30 155 #define ROM_SW_DATA_30__ROM_SW_DATA__SHIFT 0x0 156 #define ROM_SW_DATA_30__ROM_SW_DATA_MASK 0xFFFFFFFFL 157 //ROM_SW_DATA_31 158 #define ROM_SW_DATA_31__ROM_SW_DATA__SHIFT 0x0 159 #define ROM_SW_DATA_31__ROM_SW_DATA_MASK 0xFFFFFFFFL 160 //ROM_SW_DATA_32 161 #define ROM_SW_DATA_32__ROM_SW_DATA__SHIFT 0x0 162 #define ROM_SW_DATA_32__ROM_SW_DATA_MASK 0xFFFFFFFFL 163 //ROM_SW_DATA_33 164 #define ROM_SW_DATA_33__ROM_SW_DATA__SHIFT 0x0 165 #define ROM_SW_DATA_33__ROM_SW_DATA_MASK 0xFFFFFFFFL 166 //ROM_SW_DATA_34 167 #define ROM_SW_DATA_34__ROM_SW_DATA__SHIFT 0x0 168 #define ROM_SW_DATA_34__ROM_SW_DATA_MASK 0xFFFFFFFFL 169 //ROM_SW_DATA_35 170 #define ROM_SW_DATA_35__ROM_SW_DATA__SHIFT 0x0 171 #define ROM_SW_DATA_35__ROM_SW_DATA_MASK 0xFFFFFFFFL 172 //ROM_SW_DATA_36 173 #define ROM_SW_DATA_36__ROM_SW_DATA__SHIFT 0x0 174 #define ROM_SW_DATA_36__ROM_SW_DATA_MASK 0xFFFFFFFFL 175 //ROM_SW_DATA_37 176 #define ROM_SW_DATA_37__ROM_SW_DATA__SHIFT 0x0 177 #define ROM_SW_DATA_37__ROM_SW_DATA_MASK 0xFFFFFFFFL 178 //ROM_SW_DATA_38 179 #define ROM_SW_DATA_38__ROM_SW_DATA__SHIFT 0x0 180 #define ROM_SW_DATA_38__ROM_SW_DATA_MASK 0xFFFFFFFFL 181 //ROM_SW_DATA_39 182 #define ROM_SW_DATA_39__ROM_SW_DATA__SHIFT 0x0 183 #define ROM_SW_DATA_39__ROM_SW_DATA_MASK 0xFFFFFFFFL 184 //ROM_SW_DATA_40 185 #define ROM_SW_DATA_40__ROM_SW_DATA__SHIFT 0x0 186 #define ROM_SW_DATA_40__ROM_SW_DATA_MASK 0xFFFFFFFFL 187 //ROM_SW_DATA_41 188 #define ROM_SW_DATA_41__ROM_SW_DATA__SHIFT 0x0 189 #define ROM_SW_DATA_41__ROM_SW_DATA_MASK 0xFFFFFFFFL 190 //ROM_SW_DATA_42 191 #define ROM_SW_DATA_42__ROM_SW_DATA__SHIFT 0x0 192 #define ROM_SW_DATA_42__ROM_SW_DATA_MASK 0xFFFFFFFFL 193 //ROM_SW_DATA_43 194 #define ROM_SW_DATA_43__ROM_SW_DATA__SHIFT 0x0 195 #define ROM_SW_DATA_43__ROM_SW_DATA_MASK 0xFFFFFFFFL 196 //ROM_SW_DATA_44 197 #define ROM_SW_DATA_44__ROM_SW_DATA__SHIFT 0x0 198 #define ROM_SW_DATA_44__ROM_SW_DATA_MASK 0xFFFFFFFFL 199 //ROM_SW_DATA_45 200 #define ROM_SW_DATA_45__ROM_SW_DATA__SHIFT 0x0 201 #define ROM_SW_DATA_45__ROM_SW_DATA_MASK 0xFFFFFFFFL 202 //ROM_SW_DATA_46 203 #define ROM_SW_DATA_46__ROM_SW_DATA__SHIFT 0x0 204 #define ROM_SW_DATA_46__ROM_SW_DATA_MASK 0xFFFFFFFFL 205 //ROM_SW_DATA_47 206 #define ROM_SW_DATA_47__ROM_SW_DATA__SHIFT 0x0 207 #define ROM_SW_DATA_47__ROM_SW_DATA_MASK 0xFFFFFFFFL 208 //ROM_SW_DATA_48 209 #define ROM_SW_DATA_48__ROM_SW_DATA__SHIFT 0x0 210 #define ROM_SW_DATA_48__ROM_SW_DATA_MASK 0xFFFFFFFFL 211 //ROM_SW_DATA_49 212 #define ROM_SW_DATA_49__ROM_SW_DATA__SHIFT 0x0 213 #define ROM_SW_DATA_49__ROM_SW_DATA_MASK 0xFFFFFFFFL 214 //ROM_SW_DATA_50 215 #define ROM_SW_DATA_50__ROM_SW_DATA__SHIFT 0x0 216 #define ROM_SW_DATA_50__ROM_SW_DATA_MASK 0xFFFFFFFFL 217 //ROM_SW_DATA_51 218 #define ROM_SW_DATA_51__ROM_SW_DATA__SHIFT 0x0 219 #define ROM_SW_DATA_51__ROM_SW_DATA_MASK 0xFFFFFFFFL 220 //ROM_SW_DATA_52 221 #define ROM_SW_DATA_52__ROM_SW_DATA__SHIFT 0x0 222 #define ROM_SW_DATA_52__ROM_SW_DATA_MASK 0xFFFFFFFFL 223 //ROM_SW_DATA_53 224 #define ROM_SW_DATA_53__ROM_SW_DATA__SHIFT 0x0 225 #define ROM_SW_DATA_53__ROM_SW_DATA_MASK 0xFFFFFFFFL 226 //ROM_SW_DATA_54 227 #define ROM_SW_DATA_54__ROM_SW_DATA__SHIFT 0x0 228 #define ROM_SW_DATA_54__ROM_SW_DATA_MASK 0xFFFFFFFFL 229 //ROM_SW_DATA_55 230 #define ROM_SW_DATA_55__ROM_SW_DATA__SHIFT 0x0 231 #define ROM_SW_DATA_55__ROM_SW_DATA_MASK 0xFFFFFFFFL 232 //ROM_SW_DATA_56 233 #define ROM_SW_DATA_56__ROM_SW_DATA__SHIFT 0x0 234 #define ROM_SW_DATA_56__ROM_SW_DATA_MASK 0xFFFFFFFFL 235 //ROM_SW_DATA_57 236 #define ROM_SW_DATA_57__ROM_SW_DATA__SHIFT 0x0 237 #define ROM_SW_DATA_57__ROM_SW_DATA_MASK 0xFFFFFFFFL 238 //ROM_SW_DATA_58 239 #define ROM_SW_DATA_58__ROM_SW_DATA__SHIFT 0x0 240 #define ROM_SW_DATA_58__ROM_SW_DATA_MASK 0xFFFFFFFFL 241 //ROM_SW_DATA_59 242 #define ROM_SW_DATA_59__ROM_SW_DATA__SHIFT 0x0 243 #define ROM_SW_DATA_59__ROM_SW_DATA_MASK 0xFFFFFFFFL 244 //ROM_SW_DATA_60 245 #define ROM_SW_DATA_60__ROM_SW_DATA__SHIFT 0x0 246 #define ROM_SW_DATA_60__ROM_SW_DATA_MASK 0xFFFFFFFFL 247 //ROM_SW_DATA_61 248 #define ROM_SW_DATA_61__ROM_SW_DATA__SHIFT 0x0 249 #define ROM_SW_DATA_61__ROM_SW_DATA_MASK 0xFFFFFFFFL 250 //ROM_SW_DATA_62 251 #define ROM_SW_DATA_62__ROM_SW_DATA__SHIFT 0x0 252 #define ROM_SW_DATA_62__ROM_SW_DATA_MASK 0xFFFFFFFFL 253 //ROM_SW_DATA_63 254 #define ROM_SW_DATA_63__ROM_SW_DATA__SHIFT 0x0 255 #define ROM_SW_DATA_63__ROM_SW_DATA_MASK 0xFFFFFFFFL 256 //ROM_SW_DATA_64 257 #define ROM_SW_DATA_64__ROM_SW_DATA__SHIFT 0x0 258 #define ROM_SW_DATA_64__ROM_SW_DATA_MASK 0xFFFFFFFFL 259 /* SMUSVI0_PLANE0_CURRENTVID */ 260 #define SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID__SHIFT 0x18 261 #define SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID_MASK 0xFF000000L 262 263 #define SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR__SHIFT 0x10 264 #define SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR_MASK 0x01FF0000L 265 266 #endif 267
Indexes created Fri Oct 17 23:09:53 GMT 2025