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      1 /* $NetBSD: sunxi_tconreg.h,v 1.1 2018/04/03 12:52:16 bouyer Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Matt Thomas of 3am Software Foundry.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #define SUNXI_TCON_GCTL_REG		0x0000
     33 #define SUNXI_TCON_GINT0_REG		0x0004
     34 #define SUNXI_TCON_GINT1_REG		0x0008
     35 #define SUNXI_TCON0_FRM_CTL_REG		0x0010
     36 #define SUNXI_TCON0_FRM1_CTL_REG	0x0014
     37 #define SUNXI_TCON0_FRM2_CTL_REG	0x002c
     38 #define SUNXI_TCON0_CTL_REG		0x0040
     39 #define SUNXI_TCON0_DCLK_REG		0x0044
     40 #define SUNXI_TCON0_BASIC0_REG		0x0048
     41 #define SUNXI_TCON0_BASIC1_REG		0x004C
     42 #define SUNXI_TCON0_BASIC2_REG		0x0050
     43 #define SUNXI_TCON0_BASIC3_REG		0x0054
     44 #define SUNXI_TCON0_HV_IF_REG		0x0058
     45 #define SUNXI_TCON0_CPU_IF_REG		0x0060
     46 #define SUNXI_TCON0_CPU_WR_REG		0x0064
     47 #define SUNXI_TCON0_CPU_RD0_REG		0x0068
     48 #define SUNXI_TCON0_CPU_RD1_REG		0x006C
     49 #define SUNXI_TCON0_LVDS_IF_REG		0x0084
     50 #define SUNXI_TCON0_IO_POL_REG		0x0088
     51 #define SUNXI_TCON0_IO_TRI_REG		0x008C
     52 #define SUNXI_TCON1_CTL_REG		0x0090
     53 #define SUNXI_TCON1_BASIC0_REG		0x0094
     54 #define SUNXI_TCON1_BASIC1_REG		0x0098
     55 #define SUNXI_TCON1_BASIC2_REG		0x009C
     56 #define SUNXI_TCON1_BASIC3_REG		0x00A0
     57 #define SUNXI_TCON1_BASIC4_REG		0x00A4
     58 #define SUNXI_TCON1_BASIC5_REG		0x00A8
     59 #define SUNXI_TCON1_IO_POL_REG		0x00F0
     60 #define SUNXI_TCON1_IO_TRI_REG		0x00F4
     61 #define SUNXI_TCON_CEU_CTL_REG		0x0100
     62 #define SUNXI_TCON0_CPU_TRI0_REG	0x0160
     63 #define SUNXI_TCON0_CPU_TRI1_REG	0x0164
     64 #define SUNXI_TCON0_CPU_TRI2_REG	0x0168
     65 #define SUNXI_TCON0_CPU_TRI3_REG	0x016C
     66 #define SUNXI_TCON_CMAP_CTL_REG		0x0180
     67 #define SUNXI_TCON_CMAP_ODD0_REG	0x0190
     68 #define SUNXI_TCON_CMAP_ODD1_REG	0x0194
     69 #define SUNXI_TCON_CMAP_EVEN0_REG	0x0198
     70 #define SUNXI_TCON_CMAP_EVEN1_REG	0x019C
     71 #define SUNXI_TCON_MUX_CTL_REG		0x0200 /* only in TCON0 */
     72 #define SUNXI_TCON_LVDS_ANA0		0x220
     73 #define SUNXI_TCON_LVDS_ANA1		0x224
     74 
     75 #define SUNXI_TCON_GCTL_EN		__BIT(31)
     76 #define SUNXI_TCON_GCTL_GAMMA_EN	__BIT(30)
     77 #define SUNXI_TCON_GCTL_IO_MAP_SEL	__BIT(0)
     78 #define SUNXI_TCON_GCTL_IO_MAP_SEL_TCON0	0
     79 #define SUNXI_TCON_GCTL_IO_MAP_SEL_TCON1	1
     80 
     81 #define SUNXI_TCON_GINT1_TCON0_LINENO	__BITS(27,16)
     82 #define SUNXI_TCON_GINT1_TCON1_LINENO	__BITS(11,0)
     83 
     84 #define SUNXI_TCON0_FRM_ENABLE		__BIT(31)
     85 #define SUNXI_TCON0_FRM_R5BITS		__BIT(6)
     86 #define SUNXI_TCON0_FRM_G5BITS		__BIT(5)
     87 #define SUNXI_TCON0_FRM_B5BITS		__BIT(4)
     88 
     89 #define SUNXI_TCONx_CTL_EN		__BIT(31)
     90 #define SUNXI_TCON0_CTL0_IF		__BITS(25,24)
     91 #define SUNXI_TCON0_CTL0_IF_HV		0
     92 #define SUNXI_TCON0_CTL0_IF_8080	1
     93 #define SUNXI_TCON0_CTL0_IF_TTL		2
     94 #define SUNXI_TCON0_CTL_RG_SWAP		__BIT(23)
     95 #define SUNXI_TCON0_CTL_TSTV		__BIT(22)
     96 #define SUNXI_TCONx_CTL_INTERLACE_EN	__BIT(20)
     97 #define SUNXI_TCONx_CTL_START_DELAY	__BITS(8,4)
     98 #define SUNXI_TCONx_CTL_SRC_SEL		__BITS(1,0)
     99 #define SUNXI_TCONx_CTL_SRC_SEL_DE0	0
    100 #define SUNXI_TCONx_CTL_SRC_SEL_DE1	1
    101 #define SUNXI_TCONx_CTL_SRC_SEL_BLUEDATA 2
    102 
    103 #define SUNXI_TCON0_DCLK_DIV		__BITS(6,0)
    104 
    105 #define SUNXI_TCON0_LVDS_IF_EN		__BIT(31)
    106 #define SUNXI_TCON0_LVDS_IF_DUALCHAN	__BIT(30)
    107 #define SUNXI_TCON0_LVDS_IF_DIR_REV	__BIT(28)
    108 #define SUNXI_TCON0_LVDS_IF_MODE_JEIDA	__BIT(27)
    109 #define SUNXI_TCON0_LVDS_IF_18BITS	__BIT(26)
    110 #define SUNXI_TCON0_LVDS_IF_CORR_MODE1	__BIT(23)
    111 
    112 #define SUNXI_TCON_IO_POL_IO2_INV	__BIT(26)
    113 #define SUNXI_TCON_IO_POL_PVSYNC	__BIT(25)
    114 #define SUNXI_TCON_IO_POL_PHSYNC	__BIT(24)
    115 
    116 #define SUNXI_TCON_IO_TRI_IO3		__BIT(27)
    117 #define SUNXI_TCON_IO_TRI_IO2		__BIT(26)
    118 #define SUNXI_TCON_IO_TRI_IO1		__BIT(25)
    119 #define SUNXI_TCON_IO_TRI_IO0		__BIT(24)
    120 #define SUNXI_TCON_IO_TRI_DATA		__BITS(23,0)
    121 
    122 #define SUNXI_TCON_MUX_CTL_HDMI_OUTPUT_SRC __BITS(9,8)
    123 #define SUNXI_TCON_MUX_CTL_HDMI_OUTPUT_SRC_LCDC0_TCON1	0
    124 #define SUNXI_TCON_MUX_CTL_HDMI_OUTPUT_SRC_LCDC1_TCON1	1
    125 #define SUNXI_TCON_MUX_CTL_HDMI_OUTPUT_SRC_CLOSE	2
    126