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    Searched defs:SchedModel (Results 1 - 22 of 22) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZHazardRecognizer.h 48 const TargetSchedModel *SchedModel;
112 : TII(tii), SchedModel(SM) {
122 if (!SU->SchedClass && SchedModel->hasInstrSchedModel())
123 SU->SchedClass = SchedModel->resolveSchedClass(SU->getInstr());
SystemZMachineScheduler.h 35 // A SchedModel is needed before any DAG is built while advancing past
38 TargetSchedModel SchedModel;
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
TargetSchedule.h 34 MCSchedModel SchedModel;
50 TargetSchedModel() : SchedModel(MCSchedModel::GetDefaultSchedModel()) {}
75 const MCSchedModel *getMCSchedModel() const { return &SchedModel; }
96 unsigned getProcessorID() const { return SchedModel.getProcessorID(); }
99 unsigned getIssueWidth() const { return SchedModel.IssueWidth; }
114 return SchedModel.getNumProcResourceKinds();
119 return SchedModel.getProcResource(PIdx);
126 return SchedModel.getProcResource(PIdx)->Name;
161 unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; }
166 return SchedModel.getProcResource(PIdx)->BufferSize
    [all...]
MachineTraceMetrics.h 93 TargetSchedModel SchedModel;
133 /// This is an array with SchedModel.getNumProcResourceKinds() entries.
136 /// These numbers have already been scaled by SchedModel.getResourceFactor().
407 // where Kinds = SchedModel.getNumProcResourceKinds().
416 unsigned Factor = SchedModel.getLatencyFactor();
ScheduleDAGInstrs.h 125 TargetSchedModel SchedModel;
262 const TargetSchedModel *getSchedModel() const { return &SchedModel; }
266 if (!SU->SchedClass && SchedModel.hasInstrSchedModel())
267 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr());
MachineScheduler.h 602 void init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel);
618 const TargetSchedModel *SchedModel = nullptr;
734 return RetiredMOps * SchedModel->getMicroOpFactor();
742 return std::max(CurrCycle * SchedModel->getLatencyFactor(),
763 return SchedModel->getProcResource(PIdx)->SubUnitsIdxBegin &&
764 !SchedModel->getProcResource(PIdx)->BufferSize;
903 const TargetSchedModel *SchedModel);
908 const TargetSchedModel *SchedModel = nullptr;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64StorePairSuppress.cpp 34 TargetSchedModel SchedModel;
87 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx);
129 SchedModel.init(&ST);
135 if (!SchedModel.hasInstrSchedModel()) {
AArch64ConditionalCompares.cpp 765 MCSchedModel SchedModel;
885 unsigned DelayLimit = SchedModel.MispredictPenalty * 3 / 4;
936 SchedModel = MF.getSubtarget().getSchedModel();
AArch64SIMDInstrOpt.cpp 71 TargetSchedModel SchedModel;
222 std::string Subtarget = std::string(SchedModel.getSubtargetInfo()->getCPU());
230 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx);
242 SCDescRepl = SchedModel.getMCSchedModel()->getSchedClassDesc(
254 ReplCost += SchedModel.computeInstrLatency(IDesc->getOpcode());
256 if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) > ReplCost)
293 std::string(SchedModel.getSubtargetInfo()->getCPU());
705 SchedModel.init(&ST);
706 if (!SchedModel.hasInstrSchedModel())
  /src/external/apache2/llvm/dist/llvm/lib/MC/
MCSubtargetInfo.cpp 323 assert(CPUEntry->SchedModel && "Missing processor SchedModel value");
324 return *CPUEntry->SchedModel;
329 const MCSchedModel &SchedModel = getSchedModelForCPU(CPU);
330 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
SchedClassResolution.cpp 252 const auto &SchedModel = STI.getSchedModel();
253 for (int I = 0, E = SchedModel.getNumProcResourceKinds(); I < E; ++I) {
254 if (NameOrId == SchedModel.getProcResource(I)->Name)
  /src/external/apache2/llvm/dist/llvm/include/llvm/MC/
MCInstrItineraries.h 111 MCSchedModel SchedModel =
122 : SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F),
123 Itineraries(SchedModel.InstrItineraries) {}
MCSubtargetInfo.h 58 const MCSchedModel *SchedModel;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MachineCombiner.cpp 69 MCSchedModel SchedModel;
395 const MCSchedClassDesc *SC = SchedModel.getSchedClassDesc(Idx);
711 SchedModel = STI->getSchedModel();
EarlyIfConversion.cpp 761 MCSchedModel SchedModel;
882 unsigned CritLimit = SchedModel.MispredictPenalty/2;
1056 SchedModel = STI.getSchedModel();
1085 TargetSchedModel SchedModel;
1137 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);
1151 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);
1157 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);
1191 SchedModel.init(&STI);
MachineLICM.cpp 120 TargetSchedModel SchedModel;
339 SchedModel.init(&ST);
1053 if (TII->hasHighOperandLatency(SchedModel, MRI, MI, DefIdx, UseMI, i))
1081 if (!TII->hasLowDefLatency(SchedModel, MI, i))
IfConversion.cpp 192 TargetSchedModel SchedModel;
456 SchedModel.init(&ST);
1125 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false);
2197 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonMachineScheduler.h 41 const TargetSchedModel *SchedModel;
52 : SchedModel(SM) {
59 Packet.resize(SchedModel->getIssueWidth());
135 const TargetSchedModel *SchedModel = nullptr;
167 SchedModel = smodel;
175 CriticalPathLength = DAG->getBBSize() / SchedModel->getIssueWidth();
218 const TargetSchedModel *SchedModel = nullptr;
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCTargetTransformInfo.cpp 716 TargetSchedModel SchedModel;
717 SchedModel.init(ST);
728 if (Metrics.NumInsts <= (6 * SchedModel.getIssueWidth()))
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIInstrInfo.h 42 TargetSchedModel SchedModel;
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenSchedule.cpp 331 const Record *SchedModel = Def->getValueAsDef("SchedModel");
332 unsigned ProcIndex = ProcModelMap.find(SchedModel)->second;
465 CodeGenProcModel &PM = getProcModel(RCU->getValueAsDef("SchedModel"));
480 CodeGenProcModel &PM = getProcModel(Queue->getValueAsDef("SchedModel"));
556 ProcDef->getValueAsDef("SchedModel"), ModelKey);
800 if (Rec->getValueInit("SchedModel")->isComplete()) {
801 Record *ModelDef = Rec->getValueAsDef("SchedModel");
934 getProcModel(RWDef->getValueAsDef("SchedModel"));
1075 Record *RWModelDef = InstRWDef->getValueAsDef("SchedModel");
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMSubtarget.h 519 /// SchedModel - Processor specific instruction costs.
520 MCSchedModel SchedModel;

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