| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPULateCodeGenPrepare.cpp | 175 unsigned ShAmt = Adjust * 8;
177 IRB.CreateTrunc(IRB.CreateLShr(NewLd, ShAmt), IntNTy), LI.getType());
|
| /src/external/apache2/llvm/dist/clang/lib/Lex/ |
| PPExpressions.cpp | 723 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue());
724 if (ShAmt >= LHS.getBitWidth()) {
726 ShAmt = LHS.getBitWidth()-1;
728 Res = LHS.Val >> ShAmt;
|
| /src/external/apache2/llvm/dist/llvm/lib/IR/ |
| ConstantRange.cpp | 282 ConstantRange ShAmt = Other.intersectWith(
284 if (ShAmt.isEmptySet()) {
292 APInt ShAmtUMax = ShAmt.getUnsignedMax();
|
| IRBuilder.cpp | 1087 uint64_t ShAmt = 8 * Offset;
1090 ShAmt = 8 * (DL.getTypeStoreSize(IntTy) -
1092 if (ShAmt) {
1093 V = CreateLShr(V, ShAmt, Name + ".shift");
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/AggressiveInstCombine/ |
| AggressiveInstCombine.cpp | 90 Value *&ShAmt) {
94 // fshl(ShVal0, ShVal1, ShAmt)
95 // == (ShVal0 << ShAmt) | (ShVal1 >> (Width -ShAmt))
97 m_Shl(m_Value(ShVal0), m_Value(ShAmt)),
100 if (ShAmt == SubAmt) // TODO: Use m_Specific
104 // fshr(ShVal0, ShVal1, ShAmt)
105 // == (ShVal0 >> ShAmt) | (ShVal1 << (Width - ShAmt))
109 m_LShr(m_Value(ShVal1), m_Value(ShAmt)))))) {
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 1243 SDValue ShAmt = Op.getOperand(2);
1245 // Performs the following for (ShOpLo + (ShOpHi << 32)) << ShAmt:
1246 // LoBitsForHi = (ShAmt == 0) ? 0 : (ShOpLo >> (32-ShAmt))
1247 // HiBitsForHi = ShOpHi << ShAmt
1248 // Hi = (ShAmt >= 32) ? (ShOpLo << (ShAmt-32)) : (LoBitsForHi | HiBitsForHi)
1249 // Lo = (ShAmt >= 32) ? 0 : (ShOpLo << ShAmt)
1253 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelDAGToDAG.cpp | 411 uint64_t ShAmt = N1C->getZExtValue();
413 if (ShAmt < 16 && N0.getOpcode() == ISD::AND && N0.hasOneUse() &&
416 Mask |= maskTrailingOnes<uint64_t>(ShAmt);
424 CurDAG->getTargetConstant(LShAmt + ShAmt, DL, VT));
1221 SDValue &ShAmt) {
1234 ShAmt = N.getOperand(0);
1242 ShAmt = N.getOperand(0);
1247 ShAmt = N;
1298 // We check that VC2, the shamt is less than 32, otherwise the pattern is
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| InstCombineShifts.cpp | 544 auto NewInnerShift = [&](unsigned ShAmt) {
545 InnerShift->setOperand(1, ConstantInt::get(ShType, ShAmt));
707 Constant *ShAmt = ConstantExpr::getZExt(Op1, SrcTy);
709 Value *NSh = Builder.CreateBinOp(I.getOpcode(), TrOp, ShAmt, I.getName());
723 MaskV = ConstantExpr::get(I.getOpcode(), MaskV, ShAmt);
913 unsigned ShAmt = ShAmtAPInt->getZExtValue();
915 // shl (zext X), ShAmt --> zext (shl X, ShAmt)
920 if (ShAmt < SrcWidth &&
921 MaskedValueIsZero(X, APInt::getHighBitsSet(SrcWidth, ShAmt), 0, &I)
[all...] |
| InstCombineAddSub.cpp | 952 unsigned ShAmt = 0;
954 ShAmt = BitWidth - C->logBase2() - 1;
956 ShAmt = BitWidth - C2->logBase2() - 1;
957 if (ShAmt && MaskedValueIsZero(X, APInt::getHighBitsSet(BitWidth, ShAmt),
959 Constant *ShAmtC = ConstantInt::get(Ty, ShAmt);
1264 Value *X, *Y, *ShAmt;
1265 if (!match(Op0, m_Shl(m_Value(X), m_Value(ShAmt))) ||
1266 !match(Op1, m_Shl(m_Value(Y), m_Specific(ShAmt))))
1275 // add/sub (X << ShAmt), (Y << ShAmt) --> (add/sub X, Y) << ShAm
[all...] |
| InstCombineSelect.cpp | 2344 Value *ShAmt;
2346 ShAmt = SA0;
2348 ShAmt = SA1;
2356 bool IsFshl = (ShAmt == SA0);
2364 if (!match(Cond, m_OneUse(m_ICmp(Pred, m_Specific(ShAmt), m_ZeroInt()))) ||
2381 ShAmt = Builder.CreateZExt(ShAmt, Sel.getType());
2382 return CallInst::Create(F, { SV0, SV1, ShAmt });
|
| InstCombineVectorOps.cpp | 241 unsigned ShAmt = Chunk * DestWidth;
255 if (ShAmt) {
259 Scalar = Builder.CreateLShr(Scalar, ShAmt);
|
| InstCombineAndOrXor.cpp | 2199 Value *ShAmt = matchShiftAmount(ShAmt0, ShAmt1, Width);
2201 if (!ShAmt) {
2202 ShAmt = matchShiftAmount(ShAmt1, ShAmt0, Width);
2205 if (!ShAmt)
2210 return CallInst::Create(F, {ShVal0, ShVal1, ShAmt});
3219 const APInt *ShAmt;
3220 if (match(Op1, m_AShr(m_Value(A), m_APInt(ShAmt))) &&
3221 Op1->hasNUses(2) && *ShAmt == Ty->getScalarSizeInBits() - 1 &&
|
| InstCombineCasts.cpp | 589 Value *ShAmt = matchShiftAmount(ShAmt0, ShAmt1, NarrowWidth);
591 if (!ShAmt) {
592 ShAmt = matchShiftAmount(ShAmt1, ShAmt0, NarrowWidth);
595 if (!ShAmt)
606 // trunc (or (shl ShVal0, ShAmt), (lshr ShVal1, BitWidth - ShAmt))
608 // llvm.fshl.i8(trunc(ShVal), trunc(ShVal), trunc(ShAmt))
609 Value *NarrowShAmt = Builder.CreateTrunc(ShAmt, DestTy);
836 Constant *ShAmt = ConstantExpr::getUMin(C, MaxAmt);
837 ShAmt = ConstantExpr::getTrunc(ShAmt, A->getType())
[all...] |
| InstCombineCompares.cpp | 2295 // icmp eq/ne (shr X, ShAmt), C --> icmp eq/ne (and X, HiMask), (C << ShAmt)
4328 unsigned ShAmt = (unsigned)Cst1->getLimitedValue(TypeBits);
4329 if (ShAmt < TypeBits && ShAmt != 0) {
4333 APInt CmpVal = APInt::getOneBitSet(TypeBits, ShAmt);
4342 unsigned ShAmt = (unsigned)Cst1->getLimitedValue(TypeBits);
4343 if (ShAmt < TypeBits && ShAmt != 0) {
4345 APInt AndVal = APInt::getLowBitsSet(TypeBits, TypeBits - ShAmt);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| ConstantFolding.cpp | 2813 unsigned ShAmt = C2->urem(BitWidth);
2814 if (!ShAmt)
2818 unsigned LshrAmt = IsRight ? ShAmt : BitWidth - ShAmt;
2819 unsigned ShlAmt = !IsRight ? ShAmt : BitWidth - ShAmt;
|
| ValueTracking.cpp | 2948 const APInt *ShAmt;
2949 if (match(U->getOperand(1), m_APInt(ShAmt))) {
2950 if (ShAmt->uge(TyBits))
2952 unsigned ShAmtLimited = ShAmt->getZExtValue();
2959 const APInt *ShAmt;
2960 if (match(U->getOperand(1), m_APInt(ShAmt))) {
2963 if (ShAmt->uge(TyBits) || // Bad shift.
2964 ShAmt->uge(Tmp)) break; // Shifted all sign bits out.
2965 Tmp2 = ShAmt->getZExtValue();
|
| InstructionSimplify.cpp | 2017 const APInt *ShAmt;
2020 // and (shl X, ShAmt), Mask --> shl X, ShAmt
2021 if (match(Op0, m_Shl(m_Value(X), m_APInt(ShAmt))) &&
2022 (~(*Mask)).lshr(*ShAmt).isNullValue())
2026 // and (lshr X, ShAmt), Mask --> lshr X, ShAmt
2027 if (match(Op0, m_LShr(m_Value(X), m_APInt(ShAmt))) &&
2028 (~(*Mask)).shl(*ShAmt).isNullValue())
2114 match(Op0, m_c_Or(m_CombineAnd(m_NUWShl(m_Value(X), m_APInt(ShAmt)),
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonLoopIdiomRecognition.cpp | 1442 Value *ShAmt = CIV, *ShVal = Op;
1444 auto *ATy = cast<IntegerType>(ShAmt->getType());
1453 ShAmt = upcast(CastMap, IRB, ShAmt, VTy);
1456 W = IRB.CreateShl(ShVal, ShAmt);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| M68kISelLowering.cpp | 1718 unsigned ShAmt = Op->getConstantOperandVal(1);
1719 if (ShAmt >= BitWidth) // Avoid undefined shifts.
1722 ? APInt::getHighBitsSet(BitWidth, BitWidth - ShAmt)
1723 : APInt::getLowBitsSet(BitWidth, BitWidth - ShAmt);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 1954 SDValue ShAmt = Op.getOperand(2);
1963 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt);
1965 ShAmt);
1981 ShAmt);
1982 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt);
1983 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt,
1989 SDValue Cmp = DAG.getSetCC(dl, MVT::i1, ShAmt,
1992 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt);
2015 SDValue ShAmt = Op.getOperand(2);
2024 ShAmt);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 4175 unsigned ShAmt = DefMI.getOperand(3).getImm();
4176 if (ShAmt == 0 || ShAmt == 2)
4206 unsigned ShAmt = DefMI.getOperand(3).getImm();
4207 if (ShAmt == 0 || ShAmt == 1 || ShAmt == 2 || ShAmt == 3)
4482 unsigned ShAmt =
4484 if (ShAmt == 0 || ShAmt == 2
[all...] |
| ARMISelDAGToDAG.cpp | 83 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
528 unsigned ShAmt) {
535 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1));
720 unsigned ShAmt = Log2_32(RHSC);
722 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt,
748 unsigned ShAmt = 0;
758 ShAmt = Sh->getZExtValue();
759 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt))
762 ShAmt = 0
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 3749 SDValue ShAmt = CurDAG->getTargetConstant(Shift, dl, NVT);
3752 CurDAG->getMachineNode(NewOpc, dl, NVT, SDValue(NewNode, 0), ShAmt);
3963 uint64_t ShAmt = ShlCst->getZExtValue();
3967 uint64_t RemovedBitsMask = (1ULL << ShAmt) - 1;
3977 ShiftedVal = (uint64_t)Val >> ShAmt;
3984 ShiftedVal = Val >> ShAmt;
3990 ShiftedVal = (uint64_t)Val >> ShAmt;
|
| X86InstrInfo.cpp | 1180 inline static bool isTruncatedShiftCountForLEA(unsigned ShAmt) {
1186 return ShAmt < 4 && ShAmt > 0;
1294 unsigned ShAmt = MI.getOperand(2).getImm();
1295 MIB.addReg(0).addImm(1ULL << ShAmt)
1409 unsigned ShAmt = getTruncatedShiftCount(MI, 2);
1410 if (!isTruncatedShiftCountForLEA(ShAmt)) return nullptr;
1420 .addImm(1ULL << ShAmt)
1428 unsigned ShAmt = getTruncatedShiftCount(MI, 2);
1429 if (!isTruncatedShiftCountForLEA(ShAmt)) return nullptr
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | 762 unsigned ShAmt = MaxSA->getZExtValue();
766 if (NumSignBits > ShAmt && (NumSignBits - ShAmt) >= (UpperDemandedBits))
1448 unsigned ShAmt = SA->getZExtValue();
1449 if (ShAmt == 0)
1452 // If this is ((X >>u C1) << ShAmt), see if we can simplify this into a
1457 if (!DemandedBits.intersects(APInt::getLowBitsSet(BitWidth, ShAmt))) {
1462 int Diff = ShAmt - C1;
1481 if (ShAmt < InnerBits && DemandedBits.getActiveBits() <= InnerBits &&
1484 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())
[all...] |
