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      1 /*	$NetBSD: i915_drm.h,v 1.3 2021/12/18 23:45:46 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
      5  * All Rights Reserved.
      6  *
      7  * Permission is hereby granted, free of charge, to any person obtaining a
      8  * copy of this software and associated documentation files (the
      9  * "Software"), to deal in the Software without restriction, including
     10  * without limitation the rights to use, copy, modify, merge, publish,
     11  * distribute, sub license, and/or sell copies of the Software, and to
     12  * permit persons to whom the Software is furnished to do so, subject to
     13  * the following conditions:
     14  *
     15  * The above copyright notice and this permission notice (including the
     16  * next paragraph) shall be included in all copies or substantial portions
     17  * of the Software.
     18  *
     19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
     20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
     22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
     23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
     24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
     25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     26  *
     27  */
     28 #ifndef _I915_DRM_H_
     29 #define _I915_DRM_H_
     30 
     31 #include <drm/i915_pciids.h>
     32 #include <uapi/drm/i915_drm.h>
     33 
     34 /* For use by IPS driver */
     35 unsigned long i915_read_mch_val(void);
     36 bool i915_gpu_raise(void);
     37 bool i915_gpu_lower(void);
     38 bool i915_gpu_busy(void);
     39 bool i915_gpu_turbo_disable(void);
     40 
     41 /* Exported from arch/x86/kernel/early-quirks.c */
     42 extern struct resource intel_graphics_stolen_res;
     43 
     44 /*
     45  * The Bridge device's PCI config space has information about the
     46  * fb aperture size and the amount of pre-reserved memory.
     47  * This is all handled in the intel-gtt.ko module. i915.ko only
     48  * cares about the vga bit for the vga rbiter.
     49  */
     50 #define INTEL_GMCH_CTRL		0x52
     51 #define INTEL_GMCH_VGA_DISABLE  (1 << 1)
     52 #define SNB_GMCH_CTRL		0x50
     53 #define    SNB_GMCH_GGMS_SHIFT	8 /* GTT Graphics Memory Size */
     54 #define    SNB_GMCH_GGMS_MASK	0x3
     55 #define    SNB_GMCH_GMS_SHIFT   3 /* Graphics Mode Select */
     56 #define    SNB_GMCH_GMS_MASK    0x1f
     57 #define    BDW_GMCH_GGMS_SHIFT	6
     58 #define    BDW_GMCH_GGMS_MASK	0x3
     59 #define    BDW_GMCH_GMS_SHIFT   8
     60 #define    BDW_GMCH_GMS_MASK    0xff
     61 
     62 #define I830_GMCH_CTRL			0x52
     63 
     64 #define I830_GMCH_GMS_MASK		0x70
     65 #define I830_GMCH_GMS_LOCAL		0x10
     66 #define I830_GMCH_GMS_STOLEN_512	0x20
     67 #define I830_GMCH_GMS_STOLEN_1024	0x30
     68 #define I830_GMCH_GMS_STOLEN_8192	0x40
     69 
     70 #define I855_GMCH_GMS_MASK		0xF0
     71 #define I855_GMCH_GMS_STOLEN_0M		0x0
     72 #define I855_GMCH_GMS_STOLEN_1M		(0x1 << 4)
     73 #define I855_GMCH_GMS_STOLEN_4M		(0x2 << 4)
     74 #define I855_GMCH_GMS_STOLEN_8M		(0x3 << 4)
     75 #define I855_GMCH_GMS_STOLEN_16M	(0x4 << 4)
     76 #define I855_GMCH_GMS_STOLEN_32M	(0x5 << 4)
     77 #define I915_GMCH_GMS_STOLEN_48M	(0x6 << 4)
     78 #define I915_GMCH_GMS_STOLEN_64M	(0x7 << 4)
     79 #define G33_GMCH_GMS_STOLEN_128M	(0x8 << 4)
     80 #define G33_GMCH_GMS_STOLEN_256M	(0x9 << 4)
     81 #define INTEL_GMCH_GMS_STOLEN_96M	(0xa << 4)
     82 #define INTEL_GMCH_GMS_STOLEN_160M	(0xb << 4)
     83 #define INTEL_GMCH_GMS_STOLEN_224M	(0xc << 4)
     84 #define INTEL_GMCH_GMS_STOLEN_352M	(0xd << 4)
     85 
     86 #define I830_DRB3		0x63
     87 #define I85X_DRB3		0x43
     88 #define I865_TOUD		0xc4
     89 
     90 #define I830_ESMRAMC		0x91
     91 #define I845_ESMRAMC		0x9e
     92 #define I85X_ESMRAMC		0x61
     93 #define    TSEG_ENABLE		(1 << 0)
     94 #define    I830_TSEG_SIZE_512K	(0 << 1)
     95 #define    I830_TSEG_SIZE_1M	(1 << 1)
     96 #define    I845_TSEG_SIZE_MASK	(3 << 1)
     97 #define    I845_TSEG_SIZE_512K	(2 << 1)
     98 #define    I845_TSEG_SIZE_1M	(3 << 1)
     99 
    100 #define INTEL_BSM		0x5c
    101 #define INTEL_GEN11_BSM_DW0	0xc0
    102 #define INTEL_GEN11_BSM_DW1	0xc4
    103 #define   INTEL_BSM_MASK	(-(1u << 20))
    104 
    105 #endif				/* _I915_DRM_H_ */
    106