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      1 //===-- AMDGPUInstrInfo.h - AMDGPU Instruction Information ------*- C++ -*-===//
      2 //
      3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
      4 // See https://llvm.org/LICENSE.txt for license information.
      5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
      6 //
      7 //===----------------------------------------------------------------------===//
      8 //
      9 /// \file
     10 /// Contains the definition of a TargetInstrInfo class that is common
     11 /// to all AMD GPUs.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H
     16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H
     17 
     18 #include "Utils/AMDGPUBaseInfo.h"
     19 
     20 namespace llvm {
     21 
     22 class GCNSubtarget;
     23 class MachineFunction;
     24 class MachineInstr;
     25 class MachineInstrBuilder;
     26 class MachineMemOperand;
     27 
     28 class AMDGPUInstrInfo {
     29 public:
     30   explicit AMDGPUInstrInfo(const GCNSubtarget &st);
     31 
     32   static bool isUniformMMO(const MachineMemOperand *MMO);
     33 };
     34 
     35 namespace AMDGPU {
     36 
     37 struct RsrcIntrinsic {
     38   unsigned Intr;
     39   uint8_t RsrcArg;
     40   bool IsImage;
     41 };
     42 const RsrcIntrinsic *lookupRsrcIntrinsic(unsigned Intr);
     43 
     44 struct D16ImageDimIntrinsic {
     45   unsigned Intr;
     46   unsigned D16HelperIntr;
     47 };
     48 const D16ImageDimIntrinsic *lookupD16ImageDimIntrinsic(unsigned Intr);
     49 
     50 struct ImageDimIntrinsicInfo {
     51   unsigned Intr;
     52   unsigned BaseOpcode;
     53   MIMGDim Dim;
     54 
     55   uint8_t NumGradients;
     56   uint8_t NumDmask;
     57   uint8_t NumData;
     58   uint8_t NumVAddrs;
     59   uint8_t NumArgs;
     60 
     61   uint8_t DMaskIndex;
     62   uint8_t VAddrStart;
     63   uint8_t GradientStart;
     64   uint8_t CoordStart;
     65   uint8_t LodIndex;
     66   uint8_t MipIndex;
     67   uint8_t VAddrEnd;
     68   uint8_t RsrcIndex;
     69   uint8_t SampIndex;
     70   uint8_t UnormIndex;
     71   uint8_t TexFailCtrlIndex;
     72   uint8_t CachePolicyIndex;
     73 
     74   uint8_t GradientTyArg;
     75   uint8_t CoordTyArg;
     76 };
     77 const ImageDimIntrinsicInfo *getImageDimIntrinsicInfo(unsigned Intr);
     78 
     79 const ImageDimIntrinsicInfo *getImageDimInstrinsicByBaseOpcode(unsigned BaseOpcode,
     80                                                                unsigned Dim);
     81 
     82 } // end AMDGPU namespace
     83 } // End llvm namespace
     84 
     85 #endif
     86