OpenGrok
Home
Sort by:
relevance
|
last modified time
|
path
Full Search
in project(s):
src
xsrc
Definition
Symbol
File Path
History
|
|
Help
Searched
defs:Tied
(Results
1 - 7
of
7
) sorted by relevancy
/src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
MachineInstrBundle.h
226
///
Tied
- Uses and defs must use the same register. This can be because of
229
bool
Tied
;
/src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenInstruction.h
33
enum { None, EarlyClobber,
Tied
} Kind = None;
48
I.Kind =
Tied
;
55
bool isTied() const { return Kind ==
Tied
; }
65
if (Kind ==
Tied
&& OtherTiedOperand != RHS.OtherTiedOperand)
127
/// getTiedOperand - If this operand is
tied
to another one, return the
/src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIPeepholeSDWA.cpp
356
// It's possible this Src is a
tied
operand for
359
// copy the target operand into the
tied
slot
368
// This will work if the
tied
src is acessing WORD_0, and the dst is
1046
// v_mac_f16/32 has additional src2 operand
tied
to vdst
1116
// with a
tied
operand.
1124
auto
Tied
= MI.getOperand(TiedIdx);
1126
SDWAInst.add(
Tied
);
AMDGPUInstructionSelector.cpp
1700
Register
Tied
= MRI->cloneVirtualRegister(VDataOut);
1704
auto Parts = TRI.getRegSplitParts(MRI->getRegClass(
Tied
), 4);
1709
BuildMI(*MBB, *MIB, DL, TII.get(AMDGPU::REG_SEQUENCE),
Tied
);
1718
BuildMI(*MBB, *MIB, DL, TII.get(AMDGPU::REG_SEQUENCE),
Tied
);
1723
MIB.addReg(
Tied
, RegState::Implicit);
/src/external/apache2/llvm/dist/llvm/lib/CodeGen/
InlineSpiller.cpp
614
if (RI.
Tied
) {
616
LLVM_DEBUG(dbgs() << "\tcannot remat
tied
reg: " << UseIdx << '\t' << MI);
848
// TargetInstrInfo::foldMemoryOperand only expects explicit, non-
tied
865
//
Tied
use operands should not be passed to foldMemoryOperand.
883
unsigned
Tied
= MI->findTiedOperandIdx(Idx);
885
TiedOps.emplace_back(
Tied
, Idx);
887
assert(MO.isDef() && "
Tied
to not use and def?");
888
TiedOps.emplace_back(Idx,
Tied
);
898
for (auto
Tied
: TiedOps)
899
MI->tieOperands(
Tied
.first, Tied.second)
[
all
...]
/src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
AMDGPUDisassembler.cpp
289
// If atomic has both vdata and vdst their register classes are
tied
.
293
// are also
tied
.
616
int
Tied
= MCII->get(MI.getOpcode()).getOperandConstraint(VDstIn_Idx,
618
if (
Tied
!= -1 && (MI.getNumOperands() <= (unsigned)VDstIn_Idx ||
620
MI.getOperand(VDstIn_Idx).getReg() != MI.getOperand(
Tied
).getReg())) {
624
MCOperand::createReg(MI.getOperand(
Tied
).getReg()),
/src/external/apache2/llvm/dist/clang/lib/CodeGen/
CGOpenMPRuntime.h
122
bool
Tied
= true;
968
/// \param
Tied
true if task is generated for
tied
task, false otherwise.
969
/// \param NumberOfParts Number of parts in untied task. Ignored for
tied
976
bool
Tied
, unsigned &NumberOfParts);
1952
/// \param
Tied
true if task is generated for
tied
task, false otherwise.
1953
/// \param NumberOfParts Number of parts in untied task. Ignored for
tied
1960
bool
Tied
, unsigned &NumberOfParts) override;
Completed in 28 milliseconds
Indexes created Thu Jun 11 00:25:07 UTC 2026