| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| InjectTLIMappings.cpp | 49 SmallVector<Type *, 4> Tys;
51 Tys.push_back(ToVectorTy(ArgOperand->getType(), VF));
54 FunctionType *FTy = FunctionType::get(RetTy, Tys, /*isVarArg=*/false);
|
| ValueMapper.cpp | 936 SmallVector<Type *, 3> Tys;
938 Tys.reserve(FTy->getNumParams());
940 Tys.push_back(TypeMapper->remapType(Ty));
942 TypeMapper->remapType(I->getType()), Tys, FTy->isVarArg()));
1017 Type *Tys[3] = {ST.getElementType(0), ST.getElementType(1), VoidPtrTy};
1018 EltTy = StructType::get(GV.getContext(), Tys, false);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXTargetTransformInfo.cpp | 334 Type *Tys[] = {II->getArgOperand(0)->getType()};
336 Intrinsic::getDeclaration(II->getModule(), *Action.IID, Tys), Args);
|
| /src/external/apache2/llvm/dist/llvm/examples/BrainF/ |
| BrainF.cpp | 70 Type *Tys[] = { Type::getInt8PtrTy(C), Type::getInt32Ty(C) };
72 Tys);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| SVEIntrinsicOpts.cpp | 298 Type *Tys[] = {Op1->getArgOperand(0)->getType()};
301 auto Fn = Intrinsic::getDeclaration(M, I->getIntrinsicID(), Tys);
|
| AArch64ISelLowering.cpp | 11376 Type *Tys[2] = {FVTy, PtrTy};
11381 Intrinsic::getDeclaration(LI->getModule(), LoadInts[Factor - 2], Tys);
11517 Type *Tys[2] = {SubVecTy, PtrTy};
11522 Intrinsic::getDeclaration(SI->getModule(), StoreInts[Factor - 2], Tys);
14763 EVT Tys[3] = { VT, MVT::i64, MVT::Other };
14764 SDVTList SDTys = DAG.getVTList(Tys);
14925 EVT Tys[6];
14929 Tys[n] = VecTy;
14930 Tys[n++] = MVT::i64; // Type of write back register
14931 Tys[n] = MVT::Other; // Type of the chai
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.cpp | 162 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
164 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
201 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
203 return DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| GlobalMerge.cpp | 456 std::vector<Type*> Tys;
476 Tys.push_back(ArrayType::get(Int8Ty, Padding));
477 Inits.push_back(ConstantAggregateZero::get(Tys.back()));
480 Tys.push_back(Ty);
493 if (Tys.size() < 2) {
504 StructType *MergedTy = StructType::get(M.getContext(), Tys, true);
553 GlobalAlias *GA = GlobalAlias::create(Tys[StructIdxs[idx]], AddrSpace,
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| /src/external/apache2/llvm/dist/llvm/lib/IR/ |
| Function.cpp | 842 std::string Intrinsic::getName(ID Id, ArrayRef<Type *> Tys, Module *M,
845 assert((Tys.empty() || Intrinsic::isOverloaded(Id)) &&
849 for (Type *Ty : Tys) {
855 FT = getType(M->getContext(), Id, Tys);
857 assert((FT == getType(M->getContext(), Id, Tys)) &&
864 std::string Intrinsic::getName(ID Id, ArrayRef<Type *> Tys) {
865 return getName(Id, Tys, nullptr, nullptr);
1180 ArrayRef<Type*> Tys, LLVMContext &Context) {
1202 return VectorType::get(DecodeFixedType(Infos, Tys, Context),
1205 return PointerType::get(DecodeFixedType(Infos, Tys, Context)
[all...] |
| IRBuilder.cpp | 119 Type *Tys[] = { Ptr->getType(), Size->getType() };
121 Function *TheFn = Intrinsic::getDeclaration(M, Intrinsic::memset, Tys);
147 Type *Tys[] = {Ptr->getType(), Size->getType()};
150 M, Intrinsic::memset_element_unordered_atomic, Tys);
177 Type *Tys[] = { Dst->getType(), Src->getType(), Size->getType() };
179 Function *TheFn = Intrinsic::getDeclaration(M, IntrID, Tys);
214 Type *Tys[] = {Dst->getType(), Src->getType(), Size->getType()};
217 Function *TheFn = Intrinsic::getDeclaration(M, Intrinsic::memcpy_inline, Tys);
242 Type *Tys[] = {Dst->getType(), Src->getType(), Size->getType()};
245 M, Intrinsic::memcpy_element_unordered_atomic, Tys);
[all...] |
| AutoUpgrade.cpp | 582 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end());
585 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false);
603 Type *Tys[] = {fArgs[0], fArgs[1]};
606 StoreInts[fArgs.size() - 3], Tys);
609 StoreLaneInts[fArgs.size() - 5], Tys);
668 std::array<Type *, 2> Tys {{
672 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, Tys);
699 std::array<Type *, 0> Tys;
700 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, Tys);
766 Type *Tys[] = {Args[1]}
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonISelLoweringHVX.cpp | 283 ArrayRef<MVT> Tys = Subtarget.getHVXElementTypes();
287 for (MVT T : Tys) {
299 if (llvm::is_contained(Tys, ElemTy)) {
323 HexagonTargetLowering::typeJoin(const TypePair &Tys) const {
324 assert(Tys.first.getVectorElementType() == Tys.second.getVectorElementType());
326 MVT ElemTy = Tys.first.getVectorElementType();
327 return MVT::getVectorVT(ElemTy, Tys.first.getVectorNumElements() +
328 Tys.second.getVectorNumElements());
373 TypePair Tys = typeSplit(ty(Vec))
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
| PartialInlining.cpp | 884 SmallVector<Type *, 4> Tys;
887 Tys.push_back(Val->getType());
892 IntrinsicCostAttributes ICA(IID, II->getType(), Tys, FMF);
|
| AttributorAttributes.cpp | 5094 Type *Tys[] = {BI->getType(), MallocCall->getOperand(0)->getType()};
5096 Function *Fn = Intrinsic::getDeclaration(M, Intrinsic::memset, Tys);
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| BasicTTIImpl.h | 695 /// argument are passes via Tys.
697 ArrayRef<Type *> Tys) {
698 assert(Args.size() == Tys.size() && "Expected matching Args and Tys");
705 Type *Ty = Tys[I];
720 /// instruction, with return type RetTy and arguments Args of type Tys. If
725 ArrayRef<Type *> Tys) {
728 Cost += getOperandsScalarizationOverhead(Args, Tys);
789 SmallVector<Type *> Tys(Args.size(), Ty);
790 return getScalarizationOverhead(VTy, Args, Tys) + Num * Cost
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Linker/ |
| IRMover.cpp | 907 Type *Tys[3] = {ST.getElementType(0), ST.getElementType(1), VoidPtrTy};
908 EltTy = StructType::get(SrcGV->getContext(), Tys, false);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 1292 SDVTList Tys = DAG.getVTList(MVT::Other);
1294 return DAG.getMemIntrinsicNode(WebAssemblyISD::GLOBAL_SET, DL, Tys, Ops,
1313 SDVTList Tys = DAG.getVTList(LN->getValueType(0), MVT::Other);
1315 return DAG.getMemIntrinsicNode(WebAssemblyISD::GLOBAL_GET, DL, Tys, Ops,
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| LoopIdiomRecognize.cpp | 1804 Type *Tys[] = {Val->getType()};
1807 Function *Func = Intrinsic::getDeclaration(M, Intrinsic::ctpop, Tys);
1818 Type *Tys[] = {Val->getType()};
1821 Function *Func = Intrinsic::getDeclaration(M, IID, Tys);
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| InstCombineCalls.cpp | 846 Type *Tys[3] = { CI.getArgOperand(0)->getType(),
849 CI.setCalledFunction(Intrinsic::getDeclaration(M, MemCpyID, Tys));
|
| /src/external/apache2/llvm/dist/llvm/bindings/ocaml/llvm/ |
| llvm_ocaml.c | 496 value Tys = caml_alloc_tuple_uninit(LLVMCountParamTypes(FunTy));
497 LLVMGetParamTypes(FunTy, (LLVMTypeRef *)Op_val(Tys));
498 return Tys;
538 value Tys = caml_alloc_tuple_uninit(LLVMCountStructElementTypes(StructTy));
539 LLVMGetStructElementTypes(StructTy, (LLVMTypeRef *)Op_val(Tys));
540 return Tys;
|
| /src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| CGExpr.cpp | 749 llvm::Type *Tys[2] = { IntPtrTy, Int8PtrTy };
750 llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::objectsize, Tys);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 4018 SDVTList Tys = DAG.getVTList(WideVT, MVT::i32, MVT::Other);
4021 DL, Tys, Ops, NarrowVT, MMO);
5520 SDVTList Tys = DAG.getVTList(MVT::Untyped, MVT::Other);
5524 DL, Tys, Ops, MVT::i128, MMO);
5531 SDVTList Tys = DAG.getVTList(MVT::Other);
5537 DL, Tys, Ops, MVT::i128, MMO);
5549 SDVTList Tys = DAG.getVTList(MVT::Untyped, MVT::i32, MVT::Other);
5555 DL, Tys, Ops, MVT::i128, MMO);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelLowering.cpp | 8356 Type *Tys[] = {AlignedAddr->getType()};
8359 getIntrinsicForMaskedAtomicRMWBinOp(XLen, AI->getOperation()), Tys);
8414 Type *Tys[] = {AlignedAddr->getType()};
8416 Intrinsic::getDeclaration(CI->getModule(), CmpXchgIntrID, Tys);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 10463 SDVTList Tys = DAG.getVTList(MVT::i32, MVT::Other);
10466 return DAG.getMemIntrinsicNode(NodeTy, dl, Tys, Ops, MemVT, MMO);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 9356 SDVTList Tys = DAG.getVTList(ArgVT, ArgVT);
9357 return DAG.getNode(ISD::MERGE_VALUES, dl, Tys,
14764 EVT Tys[6];
14768 Tys[n] = AlignedVecTy;
14769 Tys[n++] = MVT::i32;
14770 Tys[n] = MVT::Other;
14771 SDVTList SDTys = DAG.getVTList(makeArrayRef(Tys, NumResultVecs+2));
14920 EVT Tys[6];
14924 Tys[n] = VecTy;
14925 Tys[n++] = MVT::i32
[all...] |
