Home | History | Annotate | Line # | Download | only in amlogic 
      1 /* $NetBSD: meson_uart.h,v 1.1 2019/01/19 20:56:03 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #ifndef _MESON_UART_H
     30 #define _MESON_UART_H
     31 
     32 #define UART_WFIFO_REG		0x00
     33 #define UART_RFIFO_REG		0x04
     34 #define UART_CONTROL_REG	0x08
     35 #define UART_STATUS_REG		0x0c
     36 #define UART_MISC_REG		0x10
     37 #define UART_REG5_REG		0x14
     38 
     39 #define UART_CONTROL_TX_INT_EN	__BIT(28)
     40 #define UART_CONTROL_RX_INT_EN	__BIT(27)
     41 #define UART_CONTROL_CLEAR_ERR	__BIT(24)
     42 #define UART_CONTROL_RX_RESET	__BIT(23)
     43 #define UART_CONTROL_TX_RESET	__BIT(22)
     44 #define UART_CONTROL_RX_EN	__BIT(13)
     45 #define UART_CONTROL_TX_EN	__BIT(12)
     46 
     47 #define UART_STATUS_RX_BUSY	__BIT(26)
     48 #define UART_STATUS_TX_BUSY	__BIT(25)
     49 #define UART_STATUS_TX_EMPTY	__BIT(22)
     50 #define UART_STATUS_TX_FULL	__BIT(21)
     51 #define UART_STATUS_RX_EMPTY	__BIT(20)
     52 #define UART_STATUS_BREAK	__BIT(17)
     53 
     54 #define UART_MISC_TX_IRQ_CNT	__BITS(15,8)
     55 #define UART_MISC_RX_IRQ_CNT	__BITS(7,0)
     56 
     57 #endif /* _MESON_UART_H */
     58