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      1 /*	$NetBSD: vrc4172pwmreg.h,v 1.4 2001/04/13 08:11:44 itojun Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2000 SATO Kazumi.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions, and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  */
     27 
     28 /*
     29  * Vrc4172 PWM unit register definition
     30  */
     31 
     32 #define VRC2_PWM_LCDDUTYEN	0x00	/* LCDBAK control enable */
     33 #define		VRC2_PWM_LCDEN_MASK	0x01
     34 #define 	VRC2_PWM_LCD_EN		0x01	/* enable */
     35 #define		VRC2_PWM_LCD_DIS	0x00	/* disable */
     36 #define VRC2_PWM_LCDFREQ	0x02
     37 #define 	VRC2_PWM_LCDFREQ_MASK	0xff
     38 #define		VRC2_PWM_LCDFREQ_DEF	0x2a	/* default XXX */
     39 		/* f = 1(2^4/8000000 * 64 x (LCDFREQ+1) */
     40 #define VRC2_PWM_LCDDUTY	0x04
     41 #define 	VRC2_PWM_LCDDUTY_MASK	0x3f
     42 #define		VRC2_PWM_LCDDUTY_DEF	0x25	/* default XXX */
     43 		/* T = 1/(64f) x (LCDDUTY+1) */
     44 
     45 /* end */
     46