1 /* Automatically generated by amd/registers/makeregheader.py */ 2 3 4 /* 5 * Copyright 2015-2019 Advanced Micro Devices, Inc. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * on the rights to use, copy, modify, merge, publish, distribute, sub 11 * license, and/or sell copies of the Software, and to permit persons to whom 12 * the Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the next 15 * paragraph) shall be included in all copies or substantial portions of the 16 * Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 24 * USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 */ 27 28 #ifndef AMDGFXREGS_H 29 #define AMDGFXREGS_H 30 31 #define R_000028_SQ_WAVE_ACTIVE 0x000028 /* >= gfx103 */ 32 #define S_000028_WAVE_SLOT(x) (((unsigned)(x) & 0xFFFFF) << 0) 33 #define G_000028_WAVE_SLOT(x) (((x) >> 0) & 0xFFFFF) 34 #define C_000028_WAVE_SLOT 0xFFF00000 35 #define R_00002C_SQ_WAVE_VALID_AND_IDLE 0x00002C /* >= gfx103 */ 36 #define S_00002C_WAVE_SLOT(x) (((unsigned)(x) & 0xFFFFF) << 0) 37 #define G_00002C_WAVE_SLOT(x) (((x) >> 0) & 0xFFFFF) 38 #define C_00002C_WAVE_SLOT 0xFFF00000 39 #define R_000044_SQ_WAVE_MODE 0x000044 /* <= gfx9 */ 40 #define S_000044_FP_ROUND(x) (((unsigned)(x) & 0xF) << 0) 41 #define G_000044_FP_ROUND(x) (((x) >> 0) & 0xF) 42 #define C_000044_FP_ROUND 0xFFFFFFF0 43 #define S_000044_FP_DENORM(x) (((unsigned)(x) & 0xF) << 4) 44 #define G_000044_FP_DENORM(x) (((x) >> 4) & 0xF) 45 #define C_000044_FP_DENORM 0xFFFFFF0F 46 #define S_000044_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 8) 47 #define G_000044_DX10_CLAMP(x) (((x) >> 8) & 0x1) 48 #define C_000044_DX10_CLAMP 0xFFFFFEFF 49 #define S_000044_IEEE(x) (((unsigned)(x) & 0x1) << 9) 50 #define G_000044_IEEE(x) (((x) >> 9) & 0x1) 51 #define C_000044_IEEE 0xFFFFFDFF 52 #define S_000044_LOD_CLAMPED(x) (((unsigned)(x) & 0x1) << 10) 53 #define G_000044_LOD_CLAMPED(x) (((x) >> 10) & 0x1) 54 #define C_000044_LOD_CLAMPED 0xFFFFFBFF 55 #define S_000044_DEBUG_EN(x) (((unsigned)(x) & 0x1) << 11) 56 #define G_000044_DEBUG_EN(x) (((x) >> 11) & 0x1) 57 #define C_000044_DEBUG_EN 0xFFFFF7FF 58 #define S_000044_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 12) 59 #define G_000044_EXCP_EN(x) (((x) >> 12) & 0x1FF) 60 #define C_000044_EXCP_EN 0xFFE00FFF 61 #define V_000044_INVALID 1 62 #define V_000044_INPUT_DENORMAL 2 63 #define V_000044_DIVIDE_BY_ZERO 4 64 #define V_000044_OVERFLOW 8 65 #define V_000044_UNDERFLOW 16 66 #define V_000044_INEXACT 32 67 #define V_000044_INT_DIVIDE_BY_ZERO 64 68 #define V_000044_ADDRESS_WATCH 128 69 #define V_000044_MEMORY_VIOLATION 256 70 #define S_000044_FP16_OVFL(x) (((unsigned)(x) & 0x1) << 23) /* gfx9 */ 71 #define G_000044_FP16_OVFL(x) (((x) >> 23) & 0x1) 72 #define C_000044_FP16_OVFL 0xFF7FFFFF 73 #define S_000044_POPS_PACKER0(x) (((unsigned)(x) & 0x1) << 24) /* gfx9 */ 74 #define G_000044_POPS_PACKER0(x) (((x) >> 24) & 0x1) 75 #define C_000044_POPS_PACKER0 0xFEFFFFFF 76 #define S_000044_POPS_PACKER1(x) (((unsigned)(x) & 0x1) << 25) /* gfx9 */ 77 #define G_000044_POPS_PACKER1(x) (((x) >> 25) & 0x1) 78 #define C_000044_POPS_PACKER1 0xFDFFFFFF 79 #define S_000044_DISABLE_PERF(x) (((unsigned)(x) & 0x1) << 26) /* gfx9 */ 80 #define G_000044_DISABLE_PERF(x) (((x) >> 26) & 0x1) 81 #define C_000044_DISABLE_PERF 0xFBFFFFFF 82 #define S_000044_GPR_IDX_EN(x) (((unsigned)(x) & 0x1) << 27) /* gfx8, gfx81, gfx9 */ 83 #define G_000044_GPR_IDX_EN(x) (((x) >> 27) & 0x1) 84 #define C_000044_GPR_IDX_EN 0xF7FFFFFF 85 #define S_000044_VSKIP(x) (((unsigned)(x) & 0x1) << 28) 86 #define G_000044_VSKIP(x) (((x) >> 28) & 0x1) 87 #define C_000044_VSKIP 0xEFFFFFFF 88 #define S_000044_CSP(x) (((unsigned)(x) & 0x7) << 29) 89 #define G_000044_CSP(x) (((x) >> 29) & 0x7) 90 #define C_000044_CSP 0x1FFFFFFF 91 #define R_000048_SQ_WAVE_STATUS 0x000048 /* <= gfx9 */ 92 #define S_000048_SCC(x) (((unsigned)(x) & 0x1) << 0) 93 #define G_000048_SCC(x) (((x) >> 0) & 0x1) 94 #define C_000048_SCC 0xFFFFFFFE 95 #define S_000048_SPI_PRIO(x) (((unsigned)(x) & 0x3) << 1) 96 #define G_000048_SPI_PRIO(x) (((x) >> 1) & 0x3) 97 #define C_000048_SPI_PRIO 0xFFFFFFF9 98 #define S_000048_USER_PRIO(x) (((unsigned)(x) & 0x3) << 3) /* gfx8, gfx81, gfx9 */ 99 #define G_000048_USER_PRIO(x) (((x) >> 3) & 0x3) 100 #define C_000048_USER_PRIO 0xFFFFFFE7 101 #define S_000048_WAVE_PRIO(x) (((unsigned)(x) & 0x3) << 3) /* <= gfx7 */ 102 #define G_000048_WAVE_PRIO(x) (((x) >> 3) & 0x3) 103 #define C_000048_WAVE_PRIO 0xFFFFFFE7 104 #define S_000048_PRIV(x) (((unsigned)(x) & 0x1) << 5) 105 #define G_000048_PRIV(x) (((x) >> 5) & 0x1) 106 #define C_000048_PRIV 0xFFFFFFDF 107 #define S_000048_TRAP_EN(x) (((unsigned)(x) & 0x1) << 6) 108 #define G_000048_TRAP_EN(x) (((x) >> 6) & 0x1) 109 #define C_000048_TRAP_EN 0xFFFFFFBF 110 #define S_000048_TTRACE_EN(x) (((unsigned)(x) & 0x1) << 7) 111 #define G_000048_TTRACE_EN(x) (((x) >> 7) & 0x1) 112 #define C_000048_TTRACE_EN 0xFFFFFF7F 113 #define S_000048_EXPORT_RDY(x) (((unsigned)(x) & 0x1) << 8) 114 #define G_000048_EXPORT_RDY(x) (((x) >> 8) & 0x1) 115 #define C_000048_EXPORT_RDY 0xFFFFFEFF 116 #define S_000048_EXECZ(x) (((unsigned)(x) & 0x1) << 9) 117 #define G_000048_EXECZ(x) (((x) >> 9) & 0x1) 118 #define C_000048_EXECZ 0xFFFFFDFF 119 #define S_000048_VCCZ(x) (((unsigned)(x) & 0x1) << 10) 120 #define G_000048_VCCZ(x) (((x) >> 10) & 0x1) 121 #define C_000048_VCCZ 0xFFFFFBFF 122 #define S_000048_IN_TG(x) (((unsigned)(x) & 0x1) << 11) 123 #define G_000048_IN_TG(x) (((x) >> 11) & 0x1) 124 #define C_000048_IN_TG 0xFFFFF7FF 125 #define S_000048_IN_BARRIER(x) (((unsigned)(x) & 0x1) << 12) 126 #define G_000048_IN_BARRIER(x) (((x) >> 12) & 0x1) 127 #define C_000048_IN_BARRIER 0xFFFFEFFF 128 #define S_000048_HALT(x) (((unsigned)(x) & 0x1) << 13) 129 #define G_000048_HALT(x) (((x) >> 13) & 0x1) 130 #define C_000048_HALT 0xFFFFDFFF 131 #define S_000048_TRAP(x) (((unsigned)(x) & 0x1) << 14) 132 #define G_000048_TRAP(x) (((x) >> 14) & 0x1) 133 #define C_000048_TRAP 0xFFFFBFFF 134 #define S_000048_TTRACE_CU_EN(x) (((unsigned)(x) & 0x1) << 15) 135 #define G_000048_TTRACE_CU_EN(x) (((x) >> 15) & 0x1) 136 #define C_000048_TTRACE_CU_EN 0xFFFF7FFF 137 #define S_000048_VALID(x) (((unsigned)(x) & 0x1) << 16) 138 #define G_000048_VALID(x) (((x) >> 16) & 0x1) 139 #define C_000048_VALID 0xFFFEFFFF 140 #define S_000048_ECC_ERR(x) (((unsigned)(x) & 0x1) << 17) 141 #define G_000048_ECC_ERR(x) (((x) >> 17) & 0x1) 142 #define C_000048_ECC_ERR 0xFFFDFFFF 143 #define S_000048_SKIP_EXPORT(x) (((unsigned)(x) & 0x1) << 18) 144 #define G_000048_SKIP_EXPORT(x) (((x) >> 18) & 0x1) 145 #define C_000048_SKIP_EXPORT 0xFFFBFFFF 146 #define S_000048_PERF_EN(x) (((unsigned)(x) & 0x1) << 19) 147 #define G_000048_PERF_EN(x) (((x) >> 19) & 0x1) 148 #define C_000048_PERF_EN 0xFFF7FFFF 149 #define S_000048_COND_DBG_USER(x) (((unsigned)(x) & 0x1) << 20) 150 #define G_000048_COND_DBG_USER(x) (((x) >> 20) & 0x1) 151 #define C_000048_COND_DBG_USER 0xFFEFFFFF 152 #define S_000048_COND_DBG_SYS(x) (((unsigned)(x) & 0x1) << 21) 153 #define G_000048_COND_DBG_SYS(x) (((x) >> 21) & 0x1) 154 #define C_000048_COND_DBG_SYS 0xFFDFFFFF 155 #define S_000048_ALLOW_REPLAY(x) (((unsigned)(x) & 0x1) << 22) /* gfx8, gfx81, gfx9 */ 156 #define G_000048_ALLOW_REPLAY(x) (((x) >> 22) & 0x1) 157 #define C_000048_ALLOW_REPLAY 0xFFBFFFFF 158 #define S_000048_DATA_ATC(x) (((unsigned)(x) & 0x1) << 22) /* <= gfx7 */ 159 #define G_000048_DATA_ATC(x) (((x) >> 22) & 0x1) 160 #define C_000048_DATA_ATC 0xFFBFFFFF 161 #define S_000048_FATAL_HALT(x) (((unsigned)(x) & 0x1) << 23) /* gfx9 */ 162 #define G_000048_FATAL_HALT(x) (((x) >> 23) & 0x1) 163 #define C_000048_FATAL_HALT 0xFF7FFFFF 164 #define S_000048_INST_ATC(x) (((unsigned)(x) & 0x1) << 23) /* <= gfx81 */ 165 #define G_000048_INST_ATC(x) (((x) >> 23) & 0x1) 166 #define C_000048_INST_ATC 0xFF7FFFFF 167 #define S_000048_DISPATCH_CACHE_CTRL(x) (((unsigned)(x) & 0x7) << 24) /* <= gfx7 */ 168 #define G_000048_DISPATCH_CACHE_CTRL(x) (((x) >> 24) & 0x7) 169 #define C_000048_DISPATCH_CACHE_CTRL 0xF8FFFFFF 170 #define S_000048_MUST_EXPORT(x) (((unsigned)(x) & 0x1) << 27) 171 #define G_000048_MUST_EXPORT(x) (((x) >> 27) & 0x1) 172 #define C_000048_MUST_EXPORT 0xF7FFFFFF 173 #define R_00004C_SQ_WAVE_TRAPSTS 0x00004C /* <= gfx9 */ 174 #define S_00004C_EXCP(x) (((unsigned)(x) & 0x1FF) << 0) 175 #define G_00004C_EXCP(x) (((x) >> 0) & 0x1FF) 176 #define C_00004C_EXCP 0xFFFFFE00 177 #define V_00004C_INVALID 1 178 #define V_00004C_INPUT_DENORMAL 2 179 #define V_00004C_DIVIDE_BY_ZERO 4 180 #define V_00004C_OVERFLOW 8 181 #define V_00004C_UNDERFLOW 16 182 #define V_00004C_INEXACT 32 183 #define V_00004C_INT_DIVIDE_BY_ZERO 64 184 #define V_00004C_ADDRESS_WATCH 128 185 #define V_00004C_MEMORY_VIOLATION 256 186 #define S_00004C_SAVECTX(x) (((unsigned)(x) & 0x1) << 10) /* gfx8, gfx81, gfx9 */ 187 #define G_00004C_SAVECTX(x) (((x) >> 10) & 0x1) 188 #define C_00004C_SAVECTX 0xFFFFFBFF 189 #define S_00004C_ILLEGAL_INST(x) (((unsigned)(x) & 0x1) << 11) /* gfx9 */ 190 #define G_00004C_ILLEGAL_INST(x) (((x) >> 11) & 0x1) 191 #define C_00004C_ILLEGAL_INST 0xFFFFF7FF 192 #define S_00004C_EXCP_HI(x) (((unsigned)(x) & 0x7) << 12) /* gfx9 */ 193 #define G_00004C_EXCP_HI(x) (((x) >> 12) & 0x7) 194 #define C_00004C_EXCP_HI 0xFFFF8FFF 195 #define S_00004C_EXCP_CYCLE(x) (((unsigned)(x) & 0x3F) << 16) 196 #define G_00004C_EXCP_CYCLE(x) (((x) >> 16) & 0x3F) 197 #define C_00004C_EXCP_CYCLE 0xFFC0FFFF 198 #define S_00004C_XNACK_ERROR(x) (((unsigned)(x) & 0x1) << 28) /* gfx9 */ 199 #define G_00004C_XNACK_ERROR(x) (((x) >> 28) & 0x1) 200 #define C_00004C_XNACK_ERROR 0xEFFFFFFF 201 #define S_00004C_DP_RATE(x) (((unsigned)(x) & 0x7) << 29) 202 #define G_00004C_DP_RATE(x) (((x) >> 29) & 0x7) 203 #define C_00004C_DP_RATE 0x1FFFFFFF 204 #define R_000050_SQ_WAVE_HW_ID 0x000050 /* <= gfx9 */ 205 #define S_000050_WAVE_ID(x) (((unsigned)(x) & 0xF) << 0) 206 #define G_000050_WAVE_ID(x) (((x) >> 0) & 0xF) 207 #define C_000050_WAVE_ID 0xFFFFFFF0 208 #define S_000050_SIMD_ID(x) (((unsigned)(x) & 0x3) << 4) 209 #define G_000050_SIMD_ID(x) (((x) >> 4) & 0x3) 210 #define C_000050_SIMD_ID 0xFFFFFFCF 211 #define S_000050_PIPE_ID(x) (((unsigned)(x) & 0x3) << 6) 212 #define G_000050_PIPE_ID(x) (((x) >> 6) & 0x3) 213 #define C_000050_PIPE_ID 0xFFFFFF3F 214 #define S_000050_CU_ID(x) (((unsigned)(x) & 0xF) << 8) 215 #define G_000050_CU_ID(x) (((x) >> 8) & 0xF) 216 #define C_000050_CU_ID 0xFFFFF0FF 217 #define S_000050_SH_ID(x) (((unsigned)(x) & 0x1) << 12) 218 #define G_000050_SH_ID(x) (((x) >> 12) & 0x1) 219 #define C_000050_SH_ID 0xFFFFEFFF 220 #define S_000050_SE_ID(x) (((unsigned)(x) & 0x3) << 13) 221 #define G_000050_SE_ID(x) (((x) >> 13) & 0x3) 222 #define C_000050_SE_ID 0xFFFF9FFF 223 #define S_000050_TG_ID(x) (((unsigned)(x) & 0xF) << 16) 224 #define G_000050_TG_ID(x) (((x) >> 16) & 0xF) 225 #define C_000050_TG_ID 0xFFF0FFFF 226 #define S_000050_VM_ID(x) (((unsigned)(x) & 0xF) << 20) 227 #define G_000050_VM_ID(x) (((x) >> 20) & 0xF) 228 #define C_000050_VM_ID 0xFF0FFFFF 229 #define S_000050_QUEUE_ID(x) (((unsigned)(x) & 0x7) << 24) 230 #define G_000050_QUEUE_ID(x) (((x) >> 24) & 0x7) 231 #define C_000050_QUEUE_ID 0xF8FFFFFF 232 #define S_000050_STATE_ID(x) (((unsigned)(x) & 0x7) << 27) 233 #define G_000050_STATE_ID(x) (((x) >> 27) & 0x7) 234 #define C_000050_STATE_ID 0xC7FFFFFF 235 #define S_000050_ME_ID(x) (((unsigned)(x) & 0x3) << 30) 236 #define G_000050_ME_ID(x) (((x) >> 30) & 0x3) 237 #define C_000050_ME_ID 0x3FFFFFFF 238 #define R_000054_SQ_WAVE_GPR_ALLOC 0x000054 /* <= gfx9 */ 239 #define S_000054_VGPR_BASE(x) (((unsigned)(x) & 0x3F) << 0) 240 #define G_000054_VGPR_BASE(x) (((x) >> 0) & 0x3F) 241 #define C_000054_VGPR_BASE 0xFFFFFFC0 242 #define S_000054_VGPR_SIZE(x) (((unsigned)(x) & 0x3F) << 8) 243 #define G_000054_VGPR_SIZE(x) (((x) >> 8) & 0x3F) 244 #define C_000054_VGPR_SIZE 0xFFFFC0FF 245 #define S_000054_SGPR_BASE(x) (((unsigned)(x) & 0x3F) << 16) 246 #define G_000054_SGPR_BASE(x) (((x) >> 16) & 0x3F) 247 #define C_000054_SGPR_BASE 0xFFC0FFFF 248 #define S_000054_SGPR_SIZE(x) (((unsigned)(x) & 0xF) << 24) 249 #define G_000054_SGPR_SIZE(x) (((x) >> 24) & 0xF) 250 #define C_000054_SGPR_SIZE 0xF0FFFFFF 251 #define R_000058_SQ_WAVE_LDS_ALLOC 0x000058 /* <= gfx9 */ 252 #define S_000058_LDS_BASE(x) (((unsigned)(x) & 0xFF) << 0) 253 #define G_000058_LDS_BASE(x) (((x) >> 0) & 0xFF) 254 #define C_000058_LDS_BASE 0xFFFFFF00 255 #define S_000058_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 12) 256 #define G_000058_LDS_SIZE(x) (((x) >> 12) & 0x1FF) 257 #define C_000058_LDS_SIZE 0xFFE00FFF 258 #define R_00005C_SQ_WAVE_IB_STS 0x00005C /* <= gfx9 */ 259 #define S_00005C_VM_CNT(x) (((unsigned)(x) & 0xF) << 0) 260 #define G_00005C_VM_CNT(x) (((x) >> 0) & 0xF) 261 #define C_00005C_VM_CNT 0xFFFFFFF0 262 #define S_00005C_EXP_CNT(x) (((unsigned)(x) & 0x7) << 4) 263 #define G_00005C_EXP_CNT(x) (((x) >> 4) & 0x7) 264 #define C_00005C_EXP_CNT 0xFFFFFF8F 265 #define S_00005C_LGKM_CNT_GFX6(x) (((unsigned)(x) & 0x1F) << 8) /* <= gfx6 */ 266 #define G_00005C_LGKM_CNT_GFX6(x) (((x) >> 8) & 0x1F) 267 #define C_00005C_LGKM_CNT_GFX6 0xFFFFE0FF 268 #define S_00005C_LGKM_CNT_GFX7(x) (((unsigned)(x) & 0xF) << 8) /* gfx7, gfx8, gfx81, gfx9 */ 269 #define G_00005C_LGKM_CNT_GFX7(x) (((x) >> 8) & 0xF) 270 #define C_00005C_LGKM_CNT_GFX7 0xFFFFF0FF 271 #define S_00005C_VALU_CNT_GFX7(x) (((unsigned)(x) & 0x7) << 12) /* gfx7, gfx8, gfx81, gfx9 */ 272 #define G_00005C_VALU_CNT_GFX7(x) (((x) >> 12) & 0x7) 273 #define C_00005C_VALU_CNT_GFX7 0xFFFF8FFF 274 #define S_00005C_VALU_CNT_GFX6(x) (((unsigned)(x) & 0x7) << 13) /* <= gfx6 */ 275 #define G_00005C_VALU_CNT_GFX6(x) (((x) >> 13) & 0x7) 276 #define C_00005C_VALU_CNT_GFX6 0xFFFF1FFF 277 #define S_00005C_FIRST_REPLAY(x) (((unsigned)(x) & 0x1) << 15) /* gfx8, gfx81, gfx9 */ 278 #define G_00005C_FIRST_REPLAY(x) (((x) >> 15) & 0x1) 279 #define C_00005C_FIRST_REPLAY 0xFFFF7FFF 280 #define S_00005C_RCNT(x) (((unsigned)(x) & 0x1F) << 16) /* gfx8, gfx81, gfx9 */ 281 #define G_00005C_RCNT(x) (((x) >> 16) & 0x1F) 282 #define C_00005C_RCNT 0xFFE0FFFF 283 #define S_00005C_VM_CNT_HI(x) (((unsigned)(x) & 0x3) << 22) /* gfx9 */ 284 #define G_00005C_VM_CNT_HI(x) (((x) >> 22) & 0x3) 285 #define C_00005C_VM_CNT_HI 0xFF3FFFFF 286 #define R_000060_SQ_WAVE_PC_LO 0x000060 /* <= gfx9 */ 287 #define R_000064_SQ_WAVE_PC_HI 0x000064 /* <= gfx9 */ 288 #define S_000064_PC_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 289 #define G_000064_PC_HI(x) (((x) >> 0) & 0xFFFF) 290 #define C_000064_PC_HI 0xFFFF0000 291 #define R_000068_SQ_WAVE_INST_DW0 0x000068 /* <= gfx9 */ 292 #define R_00006C_SQ_WAVE_INST_DW1 0x00006C /* <= gfx9 */ 293 #define R_000070_SQ_WAVE_IB_DBG0 0x000070 /* <= gfx9 */ 294 #define S_000070_IBUF_ST(x) (((unsigned)(x) & 0x7) << 0) 295 #define G_000070_IBUF_ST(x) (((x) >> 0) & 0x7) 296 #define C_000070_IBUF_ST 0xFFFFFFF8 297 #define S_000070_PC_INVALID(x) (((unsigned)(x) & 0x1) << 3) 298 #define G_000070_PC_INVALID(x) (((x) >> 3) & 0x1) 299 #define C_000070_PC_INVALID 0xFFFFFFF7 300 #define S_000070_NEED_NEXT_DW(x) (((unsigned)(x) & 0x1) << 4) 301 #define G_000070_NEED_NEXT_DW(x) (((x) >> 4) & 0x1) 302 #define C_000070_NEED_NEXT_DW 0xFFFFFFEF 303 #define S_000070_NO_PREFETCH_CNT(x) (((unsigned)(x) & 0x7) << 5) 304 #define G_000070_NO_PREFETCH_CNT(x) (((x) >> 5) & 0x7) 305 #define C_000070_NO_PREFETCH_CNT 0xFFFFFF1F 306 #define S_000070_IBUF_RPTR(x) (((unsigned)(x) & 0x3) << 8) 307 #define G_000070_IBUF_RPTR(x) (((x) >> 8) & 0x3) 308 #define C_000070_IBUF_RPTR 0xFFFFFCFF 309 #define S_000070_IBUF_WPTR(x) (((unsigned)(x) & 0x3) << 10) 310 #define G_000070_IBUF_WPTR(x) (((x) >> 10) & 0x3) 311 #define C_000070_IBUF_WPTR 0xFFFFF3FF 312 #define S_000070_INST_STR_ST_GFX6(x) (((unsigned)(x) & 0x7) << 16) /* <= gfx7 */ 313 #define G_000070_INST_STR_ST_GFX6(x) (((x) >> 16) & 0x7) 314 #define C_000070_INST_STR_ST_GFX6 0xFFF8FFFF 315 #define S_000070_INST_STR_ST_GFX8(x) (((unsigned)(x) & 0xF) << 16) /* gfx8, gfx81, gfx9 */ 316 #define G_000070_INST_STR_ST_GFX8(x) (((x) >> 16) & 0xF) 317 #define C_000070_INST_STR_ST_GFX8 0xFFF0FFFF 318 #define S_000070_MISC_CNT_GFX6(x) (((unsigned)(x) & 0x7) << 19) /* <= gfx7 */ 319 #define G_000070_MISC_CNT_GFX6(x) (((x) >> 19) & 0x7) 320 #define C_000070_MISC_CNT_GFX6 0xFFC7FFFF 321 #define S_000070_MISC_CNT_GFX8(x) (((unsigned)(x) & 0xF) << 20) /* gfx8, gfx81 */ 322 #define G_000070_MISC_CNT_GFX8(x) (((x) >> 20) & 0xF) 323 #define C_000070_MISC_CNT_GFX8 0xFF0FFFFF 324 #define S_000070_ECC_ST_GFX6(x) (((unsigned)(x) & 0x3) << 22) /* <= gfx7 */ 325 #define G_000070_ECC_ST_GFX6(x) (((x) >> 22) & 0x3) 326 #define C_000070_ECC_ST_GFX6 0xFF3FFFFF 327 #define S_000070_ECC_ST_GFX8(x) (((unsigned)(x) & 0x3) << 24) /* gfx8, gfx81, gfx9 */ 328 #define G_000070_ECC_ST_GFX8(x) (((x) >> 24) & 0x3) 329 #define C_000070_ECC_ST_GFX8 0xFCFFFFFF 330 #define S_000070_IS_HYB_GFX6(x) (((unsigned)(x) & 0x1) << 24) /* <= gfx7 */ 331 #define G_000070_IS_HYB_GFX6(x) (((x) >> 24) & 0x1) 332 #define C_000070_IS_HYB_GFX6 0xFEFFFFFF 333 #define S_000070_HYB_CNT_GFX6(x) (((unsigned)(x) & 0x3) << 25) /* <= gfx7 */ 334 #define G_000070_HYB_CNT_GFX6(x) (((x) >> 25) & 0x3) 335 #define C_000070_HYB_CNT_GFX6 0xF9FFFFFF 336 #define S_000070_IS_HYB_GFX8(x) (((unsigned)(x) & 0x1) << 26) /* gfx8, gfx81, gfx9 */ 337 #define G_000070_IS_HYB_GFX8(x) (((x) >> 26) & 0x1) 338 #define C_000070_IS_HYB_GFX8 0xFBFFFFFF 339 #define S_000070_HYB_CNT_GFX8(x) (((unsigned)(x) & 0x3) << 27) /* gfx8, gfx81, gfx9 */ 340 #define G_000070_HYB_CNT_GFX8(x) (((x) >> 27) & 0x3) 341 #define C_000070_HYB_CNT_GFX8 0xE7FFFFFF 342 #define S_000070_KILL_GFX6(x) (((unsigned)(x) & 0x1) << 27) /* <= gfx7 */ 343 #define G_000070_KILL_GFX6(x) (((x) >> 27) & 0x1) 344 #define C_000070_KILL_GFX6 0xF7FFFFFF 345 #define S_000070_NEED_KILL_IFETCH_GFX6(x) (((unsigned)(x) & 0x1) << 28) /* <= gfx7 */ 346 #define G_000070_NEED_KILL_IFETCH_GFX6(x) (((x) >> 28) & 0x1) 347 #define C_000070_NEED_KILL_IFETCH_GFX6 0xEFFFFFFF 348 #define S_000070_KILL_GFX8(x) (((unsigned)(x) & 0x1) << 29) /* gfx8, gfx81, gfx9 */ 349 #define G_000070_KILL_GFX8(x) (((x) >> 29) & 0x1) 350 #define C_000070_KILL_GFX8 0xDFFFFFFF 351 #define S_000070_NEED_KILL_IFETCH_GFX8(x) (((unsigned)(x) & 0x1) << 30) /* gfx8, gfx81, gfx9 */ 352 #define G_000070_NEED_KILL_IFETCH_GFX8(x) (((x) >> 30) & 0x1) 353 #define C_000070_NEED_KILL_IFETCH_GFX8 0xBFFFFFFF 354 #define S_000070_NO_PREFETCH_CNT_HI(x) (((unsigned)(x) & 0x1) << 31) /* gfx9 */ 355 #define G_000070_NO_PREFETCH_CNT_HI(x) (((x) >> 31) & 0x1) 356 #define C_000070_NO_PREFETCH_CNT_HI 0x7FFFFFFF 357 #define R_000074_SQ_WAVE_IB_DBG1 0x000074 /* gfx8, gfx81, gfx9 */ 358 #define S_000074_IXNACK(x) (((unsigned)(x) & 0x1) << 0) 359 #define G_000074_IXNACK(x) (((x) >> 0) & 0x1) 360 #define C_000074_IXNACK 0xFFFFFFFE 361 #define S_000074_XNACK(x) (((unsigned)(x) & 0x1) << 1) 362 #define G_000074_XNACK(x) (((x) >> 1) & 0x1) 363 #define C_000074_XNACK 0xFFFFFFFD 364 #define S_000074_TA_NEED_RESET(x) (((unsigned)(x) & 0x1) << 2) 365 #define G_000074_TA_NEED_RESET(x) (((x) >> 2) & 0x1) 366 #define C_000074_TA_NEED_RESET 0xFFFFFFFB 367 #define S_000074_XCNT_GFX8(x) (((unsigned)(x) & 0xF) << 4) /* gfx8, gfx81 */ 368 #define G_000074_XCNT_GFX8(x) (((x) >> 4) & 0xF) 369 #define C_000074_XCNT_GFX8 0xFFFFFF0F 370 #define S_000074_XCNT_GFX9(x) (((unsigned)(x) & 0x1F) << 4) /* gfx9 */ 371 #define G_000074_XCNT_GFX9(x) (((x) >> 4) & 0x1F) 372 #define C_000074_XCNT_GFX9 0xFFFFFE0F 373 #define S_000074_QCNT_GFX8(x) (((unsigned)(x) & 0xF) << 8) /* gfx8, gfx81 */ 374 #define G_000074_QCNT_GFX8(x) (((x) >> 8) & 0xF) 375 #define C_000074_QCNT_GFX8 0xFFFFF0FF 376 #define S_000074_QCNT_GFX9(x) (((unsigned)(x) & 0x1F) << 11) /* gfx9 */ 377 #define G_000074_QCNT_GFX9(x) (((x) >> 11) & 0x1F) 378 #define C_000074_QCNT_GFX9 0xFFFF07FF 379 #define S_000074_RCNT(x) (((unsigned)(x) & 0x1F) << 18) /* gfx9 */ 380 #define G_000074_RCNT(x) (((x) >> 18) & 0x1F) 381 #define C_000074_RCNT 0xFF83FFFF 382 #define S_000074_MISC_CNT(x) (((unsigned)(x) & 0x7F) << 25) /* gfx9 */ 383 #define G_000074_MISC_CNT(x) (((x) >> 25) & 0x7F) 384 #define C_000074_MISC_CNT 0x01FFFFFF 385 #define R_000078_SQ_WAVE_FLUSH_IB 0x000078 /* gfx9 */ 386 #define R_370_CONTROL 0x370 387 #define S_370_DST_SEL(x) (((unsigned)(x) & 0xF) << 8) 388 #define G_370_DST_SEL(x) (((x) >> 8) & 0xF) 389 #define C_370_DST_SEL 0xFFFFF0FF 390 #define V_370_MEM_MAPPED_REGISTER 0 391 #define V_370_MEM_GRBM 1 392 #define V_370_TC_L2 2 393 #define V_370_GDS 3 394 #define V_370_RESERVED 4 395 #define V_370_MEM 5 /* >= gfx7 */ 396 #define S_370_WR_ONE_ADDR(x) (((unsigned)(x) & 0x1) << 16) 397 #define G_370_WR_ONE_ADDR(x) (((x) >> 16) & 0x1) 398 #define C_370_WR_ONE_ADDR 0xFFFEFFFF 399 #define S_370_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 20) 400 #define G_370_WR_CONFIRM(x) (((x) >> 20) & 0x1) 401 #define C_370_WR_CONFIRM 0xFFEFFFFF 402 #define S_370_ENGINE_SEL(x) (((unsigned)(x) & 0x3) << 30) 403 #define G_370_ENGINE_SEL(x) (((x) >> 30) & 0x3) 404 #define C_370_ENGINE_SEL 0x3FFFFFFF 405 #define V_370_ME 0 406 #define V_370_PFP 1 407 #define V_370_CE 2 408 #define V_370_DE 3 409 #define R_371_DST_ADDR_LO 0x371 410 #define R_372_DST_ADDR_HI 0x372 411 #define R_3F0_IB_BASE_LO 0x3F0 412 #define R_3F1_IB_BASE_HI 0x3F1 413 #define R_3F2_IB_CONTROL 0x3F2 414 #define S_3F2_IB_SIZE(x) (((unsigned)(x) & 0xFFFFF) << 0) 415 #define G_3F2_IB_SIZE(x) (((x) >> 0) & 0xFFFFF) 416 #define C_3F2_IB_SIZE 0xFFF00000 417 #define S_3F2_CHAIN(x) (((unsigned)(x) & 0x1) << 20) 418 #define G_3F2_CHAIN(x) (((x) >> 20) & 0x1) 419 #define C_3F2_CHAIN 0xFFEFFFFF 420 #define S_3F2_VALID(x) (((unsigned)(x) & 0x1) << 23) 421 #define G_3F2_VALID(x) (((x) >> 23) & 0x1) 422 #define C_3F2_VALID 0xFF7FFFFF 423 #define R_000404_SQ_WAVE_MODE 0x000404 /* >= gfx10 */ 424 #define S_000404_FP_ROUND(x) (((unsigned)(x) & 0xF) << 0) 425 #define G_000404_FP_ROUND(x) (((x) >> 0) & 0xF) 426 #define C_000404_FP_ROUND 0xFFFFFFF0 427 #define S_000404_FP_DENORM(x) (((unsigned)(x) & 0xF) << 4) 428 #define G_000404_FP_DENORM(x) (((x) >> 4) & 0xF) 429 #define C_000404_FP_DENORM 0xFFFFFF0F 430 #define S_000404_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 8) 431 #define G_000404_DX10_CLAMP(x) (((x) >> 8) & 0x1) 432 #define C_000404_DX10_CLAMP 0xFFFFFEFF 433 #define S_000404_IEEE(x) (((unsigned)(x) & 0x1) << 9) 434 #define G_000404_IEEE(x) (((x) >> 9) & 0x1) 435 #define C_000404_IEEE 0xFFFFFDFF 436 #define S_000404_LOD_CLAMPED(x) (((unsigned)(x) & 0x1) << 10) 437 #define G_000404_LOD_CLAMPED(x) (((x) >> 10) & 0x1) 438 #define C_000404_LOD_CLAMPED 0xFFFFFBFF 439 #define S_000404_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 12) 440 #define G_000404_EXCP_EN(x) (((x) >> 12) & 0x1FF) 441 #define C_000404_EXCP_EN 0xFFE00FFF 442 #define V_000404_INVALID 1 443 #define V_000404_INPUT_DENORMAL 2 444 #define V_000404_DIVIDE_BY_ZERO 4 445 #define V_000404_OVERFLOW 8 446 #define V_000404_UNDERFLOW 16 447 #define V_000404_INEXACT 32 448 #define V_000404_INT_DIVIDE_BY_ZERO 64 449 #define V_000404_ADDRESS_WATCH 128 450 #define V_000404_MEMORY_VIOLATION 256 451 #define S_000404_FP16_OVFL(x) (((unsigned)(x) & 0x1) << 23) 452 #define G_000404_FP16_OVFL(x) (((x) >> 23) & 0x1) 453 #define C_000404_FP16_OVFL 0xFF7FFFFF 454 #define S_000404_DISABLE_PERF(x) (((unsigned)(x) & 0x1) << 27) 455 #define G_000404_DISABLE_PERF(x) (((x) >> 27) & 0x1) 456 #define C_000404_DISABLE_PERF 0xF7FFFFFF 457 #define S_000404_VSKIP(x) (((unsigned)(x) & 0x1) << 28) /* gfx10 */ 458 #define G_000404_VSKIP(x) (((x) >> 28) & 0x1) 459 #define C_000404_VSKIP 0xEFFFFFFF 460 #define S_000404_CSP(x) (((unsigned)(x) & 0x7) << 29) /* gfx10 */ 461 #define G_000404_CSP(x) (((x) >> 29) & 0x7) 462 #define C_000404_CSP 0x1FFFFFFF 463 #define R_000408_SQ_WAVE_STATUS 0x000408 /* >= gfx10 */ 464 #define S_000408_SCC(x) (((unsigned)(x) & 0x1) << 0) 465 #define G_000408_SCC(x) (((x) >> 0) & 0x1) 466 #define C_000408_SCC 0xFFFFFFFE 467 #define S_000408_SPI_PRIO(x) (((unsigned)(x) & 0x3) << 1) 468 #define G_000408_SPI_PRIO(x) (((x) >> 1) & 0x3) 469 #define C_000408_SPI_PRIO 0xFFFFFFF9 470 #define S_000408_USER_PRIO(x) (((unsigned)(x) & 0x3) << 3) 471 #define G_000408_USER_PRIO(x) (((x) >> 3) & 0x3) 472 #define C_000408_USER_PRIO 0xFFFFFFE7 473 #define S_000408_PRIV(x) (((unsigned)(x) & 0x1) << 5) 474 #define G_000408_PRIV(x) (((x) >> 5) & 0x1) 475 #define C_000408_PRIV 0xFFFFFFDF 476 #define S_000408_TRAP_EN(x) (((unsigned)(x) & 0x1) << 6) 477 #define G_000408_TRAP_EN(x) (((x) >> 6) & 0x1) 478 #define C_000408_TRAP_EN 0xFFFFFFBF 479 #define S_000408_TTRACE_EN(x) (((unsigned)(x) & 0x1) << 7) 480 #define G_000408_TTRACE_EN(x) (((x) >> 7) & 0x1) 481 #define C_000408_TTRACE_EN 0xFFFFFF7F 482 #define S_000408_EXPORT_RDY(x) (((unsigned)(x) & 0x1) << 8) 483 #define G_000408_EXPORT_RDY(x) (((x) >> 8) & 0x1) 484 #define C_000408_EXPORT_RDY 0xFFFFFEFF 485 #define S_000408_EXECZ(x) (((unsigned)(x) & 0x1) << 9) 486 #define G_000408_EXECZ(x) (((x) >> 9) & 0x1) 487 #define C_000408_EXECZ 0xFFFFFDFF 488 #define S_000408_VCCZ(x) (((unsigned)(x) & 0x1) << 10) 489 #define G_000408_VCCZ(x) (((x) >> 10) & 0x1) 490 #define C_000408_VCCZ 0xFFFFFBFF 491 #define S_000408_IN_TG(x) (((unsigned)(x) & 0x1) << 11) 492 #define G_000408_IN_TG(x) (((x) >> 11) & 0x1) 493 #define C_000408_IN_TG 0xFFFFF7FF 494 #define S_000408_IN_BARRIER(x) (((unsigned)(x) & 0x1) << 12) 495 #define G_000408_IN_BARRIER(x) (((x) >> 12) & 0x1) 496 #define C_000408_IN_BARRIER 0xFFFFEFFF 497 #define S_000408_HALT(x) (((unsigned)(x) & 0x1) << 13) 498 #define G_000408_HALT(x) (((x) >> 13) & 0x1) 499 #define C_000408_HALT 0xFFFFDFFF 500 #define S_000408_TRAP(x) (((unsigned)(x) & 0x1) << 14) 501 #define G_000408_TRAP(x) (((x) >> 14) & 0x1) 502 #define C_000408_TRAP 0xFFFFBFFF 503 #define S_000408_TTRACE_SIMD_EN(x) (((unsigned)(x) & 0x1) << 15) 504 #define G_000408_TTRACE_SIMD_EN(x) (((x) >> 15) & 0x1) 505 #define C_000408_TTRACE_SIMD_EN 0xFFFF7FFF 506 #define S_000408_VALID(x) (((unsigned)(x) & 0x1) << 16) 507 #define G_000408_VALID(x) (((x) >> 16) & 0x1) 508 #define C_000408_VALID 0xFFFEFFFF 509 #define S_000408_ECC_ERR(x) (((unsigned)(x) & 0x1) << 17) 510 #define G_000408_ECC_ERR(x) (((x) >> 17) & 0x1) 511 #define C_000408_ECC_ERR 0xFFFDFFFF 512 #define S_000408_SKIP_EXPORT(x) (((unsigned)(x) & 0x1) << 18) 513 #define G_000408_SKIP_EXPORT(x) (((x) >> 18) & 0x1) 514 #define C_000408_SKIP_EXPORT 0xFFFBFFFF 515 #define S_000408_PERF_EN(x) (((unsigned)(x) & 0x1) << 19) 516 #define G_000408_PERF_EN(x) (((x) >> 19) & 0x1) 517 #define C_000408_PERF_EN 0xFFF7FFFF 518 #define S_000408_FATAL_HALT(x) (((unsigned)(x) & 0x1) << 23) 519 #define G_000408_FATAL_HALT(x) (((x) >> 23) & 0x1) 520 #define C_000408_FATAL_HALT 0xFF7FFFFF 521 #define S_000408_MUST_EXPORT(x) (((unsigned)(x) & 0x1) << 27) 522 #define G_000408_MUST_EXPORT(x) (((x) >> 27) & 0x1) 523 #define C_000408_MUST_EXPORT 0xF7FFFFFF 524 #define R_00040C_SQ_WAVE_TRAPSTS 0x00040C /* >= gfx10 */ 525 #define S_00040C_EXCP(x) (((unsigned)(x) & 0x1FF) << 0) 526 #define G_00040C_EXCP(x) (((x) >> 0) & 0x1FF) 527 #define C_00040C_EXCP 0xFFFFFE00 528 #define V_00040C_INVALID 1 529 #define V_00040C_INPUT_DENORMAL 2 530 #define V_00040C_DIVIDE_BY_ZERO 4 531 #define V_00040C_OVERFLOW 8 532 #define V_00040C_UNDERFLOW 16 533 #define V_00040C_INEXACT 32 534 #define V_00040C_INT_DIVIDE_BY_ZERO 64 535 #define V_00040C_ADDRESS_WATCH 128 536 #define V_00040C_MEMORY_VIOLATION 256 537 #define S_00040C_SAVECTX(x) (((unsigned)(x) & 0x1) << 10) 538 #define G_00040C_SAVECTX(x) (((x) >> 10) & 0x1) 539 #define C_00040C_SAVECTX 0xFFFFFBFF 540 #define S_00040C_ILLEGAL_INST(x) (((unsigned)(x) & 0x1) << 11) 541 #define G_00040C_ILLEGAL_INST(x) (((x) >> 11) & 0x1) 542 #define C_00040C_ILLEGAL_INST 0xFFFFF7FF 543 #define S_00040C_EXCP_HI(x) (((unsigned)(x) & 0x7) << 12) 544 #define G_00040C_EXCP_HI(x) (((x) >> 12) & 0x7) 545 #define C_00040C_EXCP_HI 0xFFFF8FFF 546 #define S_00040C_BUFFER_OOB(x) (((unsigned)(x) & 0x1) << 15) 547 #define G_00040C_BUFFER_OOB(x) (((x) >> 15) & 0x1) 548 #define C_00040C_BUFFER_OOB 0xFFFF7FFF 549 #define S_00040C_EXCP_CYCLE(x) (((unsigned)(x) & 0xF) << 16) 550 #define G_00040C_EXCP_CYCLE(x) (((x) >> 16) & 0xF) 551 #define C_00040C_EXCP_CYCLE 0xFFF0FFFF 552 #define S_00040C_EXCP_GROUP_MASK(x) (((unsigned)(x) & 0xF) << 20) 553 #define G_00040C_EXCP_GROUP_MASK(x) (((x) >> 20) & 0xF) 554 #define C_00040C_EXCP_GROUP_MASK 0xFF0FFFFF 555 #define S_00040C_EXCP_WAVE64HI(x) (((unsigned)(x) & 0x1) << 24) 556 #define G_00040C_EXCP_WAVE64HI(x) (((x) >> 24) & 0x1) 557 #define C_00040C_EXCP_WAVE64HI 0xFEFFFFFF 558 #define S_00040C_UTC_ERROR(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx103 */ 559 #define G_00040C_UTC_ERROR(x) (((x) >> 28) & 0x1) 560 #define C_00040C_UTC_ERROR 0xEFFFFFFF 561 #define S_00040C_XNACK_ERROR(x) (((unsigned)(x) & 0x1) << 28) /* gfx10 */ 562 #define G_00040C_XNACK_ERROR(x) (((x) >> 28) & 0x1) 563 #define C_00040C_XNACK_ERROR 0xEFFFFFFF 564 #define S_00040C_DP_RATE(x) (((unsigned)(x) & 0x7) << 29) 565 #define G_00040C_DP_RATE(x) (((x) >> 29) & 0x7) 566 #define C_00040C_DP_RATE 0x1FFFFFFF 567 #define R_410_CP_DMA_WORD0 0x410 568 #define S_410_SRC_ADDR_LO(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 569 #define G_410_SRC_ADDR_LO(x) (((x) >> 0) & 0xFFFFFFFF) 570 #define C_410_SRC_ADDR_LO 0x00000000 571 #define R_000410_SQ_WAVE_HW_ID_LEGACY 0x000410 /* >= gfx10 */ 572 #define S_000410_WAVE_ID(x) (((unsigned)(x) & 0xF) << 0) 573 #define G_000410_WAVE_ID(x) (((x) >> 0) & 0xF) 574 #define C_000410_WAVE_ID 0xFFFFFFF0 575 #define S_000410_SIMD_ID(x) (((unsigned)(x) & 0x3) << 4) 576 #define G_000410_SIMD_ID(x) (((x) >> 4) & 0x3) 577 #define C_000410_SIMD_ID 0xFFFFFFCF 578 #define S_000410_PIPE_ID(x) (((unsigned)(x) & 0x3) << 6) 579 #define G_000410_PIPE_ID(x) (((x) >> 6) & 0x3) 580 #define C_000410_PIPE_ID 0xFFFFFF3F 581 #define S_000410_CU_ID(x) (((unsigned)(x) & 0xF) << 8) 582 #define G_000410_CU_ID(x) (((x) >> 8) & 0xF) 583 #define C_000410_CU_ID 0xFFFFF0FF 584 #define S_000410_SH_ID(x) (((unsigned)(x) & 0x1) << 12) 585 #define G_000410_SH_ID(x) (((x) >> 12) & 0x1) 586 #define C_000410_SH_ID 0xFFFFEFFF 587 #define S_000410_SE_ID(x) (((unsigned)(x) & 0x3) << 13) 588 #define G_000410_SE_ID(x) (((x) >> 13) & 0x3) 589 #define C_000410_SE_ID 0xFFFF9FFF 590 #define S_000410_WAVE_ID_MSB(x) (((unsigned)(x) & 0x1) << 15) 591 #define G_000410_WAVE_ID_MSB(x) (((x) >> 15) & 0x1) 592 #define C_000410_WAVE_ID_MSB 0xFFFF7FFF 593 #define S_000410_TG_ID(x) (((unsigned)(x) & 0xF) << 16) 594 #define G_000410_TG_ID(x) (((x) >> 16) & 0xF) 595 #define C_000410_TG_ID 0xFFF0FFFF 596 #define S_000410_VM_ID(x) (((unsigned)(x) & 0xF) << 20) 597 #define G_000410_VM_ID(x) (((x) >> 20) & 0xF) 598 #define C_000410_VM_ID 0xFF0FFFFF 599 #define S_000410_QUEUE_ID(x) (((unsigned)(x) & 0x7) << 24) 600 #define G_000410_QUEUE_ID(x) (((x) >> 24) & 0x7) 601 #define C_000410_QUEUE_ID 0xF8FFFFFF 602 #define S_000410_STATE_ID(x) (((unsigned)(x) & 0x7) << 27) 603 #define G_000410_STATE_ID(x) (((x) >> 27) & 0x7) 604 #define C_000410_STATE_ID 0xC7FFFFFF 605 #define S_000410_ME_ID(x) (((unsigned)(x) & 0x3) << 30) 606 #define G_000410_ME_ID(x) (((x) >> 30) & 0x3) 607 #define C_000410_ME_ID 0x3FFFFFFF 608 #define R_411_CP_DMA_WORD1 0x411 609 #define S_411_SRC_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 610 #define G_411_SRC_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 611 #define C_411_SRC_ADDR_HI 0xFFFF0000 612 #define S_411_DST_SEL(x) (((unsigned)(x) & 0x3) << 20) 613 #define G_411_DST_SEL(x) (((x) >> 20) & 0x3) 614 #define C_411_DST_SEL 0xFFCFFFFF 615 #define V_411_DST_ADDR 0 616 #define V_411_GDS 1 617 #define V_411_NOWHERE 2 /* >= gfx9 */ 618 #define V_411_DST_ADDR_TC_L2 3 /* >= gfx7 */ 619 #define S_411_ENGINE(x) (((unsigned)(x) & 0x1) << 27) 620 #define G_411_ENGINE(x) (((x) >> 27) & 0x1) 621 #define C_411_ENGINE 0xF7FFFFFF 622 #define V_411_ME 0 623 #define V_411_PFP 1 624 #define S_411_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) 625 #define G_411_SRC_SEL(x) (((x) >> 29) & 0x3) 626 #define C_411_SRC_SEL 0x9FFFFFFF 627 #define V_411_SRC_ADDR 0 628 #define V_411_DATA 2 629 #define V_411_SRC_ADDR_TC_L2 3 /* >= gfx7 */ 630 #define S_411_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) 631 #define G_411_CP_SYNC(x) (((x) >> 31) & 0x1) 632 #define C_411_CP_SYNC 0x7FFFFFFF 633 #define R_412_CP_DMA_WORD2 0x412 634 #define S_412_DST_ADDR_LO(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 635 #define G_412_DST_ADDR_LO(x) (((x) >> 0) & 0xFFFFFFFF) 636 #define C_412_DST_ADDR_LO 0x00000000 637 #define R_413_CP_DMA_WORD3 0x413 638 #define S_413_DST_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 639 #define G_413_DST_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 640 #define C_413_DST_ADDR_HI 0xFFFF0000 641 #define R_000414_SQ_WAVE_GPR_ALLOC 0x000414 /* >= gfx10 */ 642 #define S_000414_VGPR_BASE(x) (((unsigned)(x) & 0xFF) << 0) 643 #define G_000414_VGPR_BASE(x) (((x) >> 0) & 0xFF) 644 #define C_000414_VGPR_BASE 0xFFFFFF00 645 #define S_000414_VGPR_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 646 #define G_000414_VGPR_SIZE(x) (((x) >> 8) & 0xFF) 647 #define C_000414_VGPR_SIZE 0xFFFF00FF 648 #define S_000414_SGPR_BASE(x) (((unsigned)(x) & 0xFF) << 16) 649 #define G_000414_SGPR_BASE(x) (((x) >> 16) & 0xFF) 650 #define C_000414_SGPR_BASE 0xFF00FFFF 651 #define S_000414_SGPR_SIZE(x) (((unsigned)(x) & 0xF) << 24) 652 #define G_000414_SGPR_SIZE(x) (((x) >> 24) & 0xF) 653 #define C_000414_SGPR_SIZE 0xF0FFFFFF 654 #define R_415_COMMAND 0x415 655 #define S_415_BYTE_COUNT_GFX6(x) (((unsigned)(x) & 0x1FFFFF) << 0) /* <= gfx81 */ 656 #define G_415_BYTE_COUNT_GFX6(x) (((x) >> 0) & 0x1FFFFF) 657 #define C_415_BYTE_COUNT_GFX6 0xFFE00000 658 #define S_415_BYTE_COUNT_GFX9(x) (((unsigned)(x) & 0x3FFFFFF) << 0) /* >= gfx9 */ 659 #define G_415_BYTE_COUNT_GFX9(x) (((x) >> 0) & 0x3FFFFFF) 660 #define C_415_BYTE_COUNT_GFX9 0xFC000000 661 #define S_415_DISABLE_WR_CONFIRM_GFX6(x) (((unsigned)(x) & 0x1) << 21) /* <= gfx81 */ 662 #define G_415_DISABLE_WR_CONFIRM_GFX6(x) (((x) >> 21) & 0x1) 663 #define C_415_DISABLE_WR_CONFIRM_GFX6 0xFFDFFFFF 664 #define S_415_SRC_SWAP(x) (((unsigned)(x) & 0x3) << 22) /* <= gfx81 */ 665 #define G_415_SRC_SWAP(x) (((x) >> 22) & 0x3) 666 #define C_415_SRC_SWAP 0xFF3FFFFF 667 #define V_415_NONE 0 668 #define V_415_8_IN_16 1 669 #define V_415_8_IN_32 2 670 #define V_415_8_IN_64 3 671 #define S_415_DST_SWAP(x) (((unsigned)(x) & 0x3) << 24) /* <= gfx81 */ 672 #define G_415_DST_SWAP(x) (((x) >> 24) & 0x3) 673 #define C_415_DST_SWAP 0xFCFFFFFF 674 #define S_415_SAS(x) (((unsigned)(x) & 0x1) << 26) 675 #define G_415_SAS(x) (((x) >> 26) & 0x1) 676 #define C_415_SAS 0xFBFFFFFF 677 #define V_415_MEMORY 0 678 #define V_415_REGISTER 1 679 #define S_415_DAS(x) (((unsigned)(x) & 0x1) << 27) 680 #define G_415_DAS(x) (((x) >> 27) & 0x1) 681 #define C_415_DAS 0xF7FFFFFF 682 #define S_415_SAIC(x) (((unsigned)(x) & 0x1) << 28) 683 #define G_415_SAIC(x) (((x) >> 28) & 0x1) 684 #define C_415_SAIC 0xEFFFFFFF 685 #define V_415_INCREMENT 0 686 #define V_415_NO_INCREMENT 1 687 #define S_415_DAIC(x) (((unsigned)(x) & 0x1) << 29) 688 #define G_415_DAIC(x) (((x) >> 29) & 0x1) 689 #define C_415_DAIC 0xDFFFFFFF 690 #define S_415_RAW_WAIT(x) (((unsigned)(x) & 0x1) << 30) 691 #define G_415_RAW_WAIT(x) (((x) >> 30) & 0x1) 692 #define C_415_RAW_WAIT 0xBFFFFFFF 693 #define S_415_DISABLE_WR_CONFIRM_GFX9(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx9 */ 694 #define G_415_DISABLE_WR_CONFIRM_GFX9(x) (((x) >> 31) & 0x1) 695 #define C_415_DISABLE_WR_CONFIRM_GFX9 0x7FFFFFFF 696 #define R_000418_SQ_WAVE_LDS_ALLOC 0x000418 /* >= gfx10 */ 697 #define S_000418_LDS_BASE(x) (((unsigned)(x) & 0x1FF) << 0) 698 #define G_000418_LDS_BASE(x) (((x) >> 0) & 0x1FF) 699 #define C_000418_LDS_BASE 0xFFFFFE00 700 #define S_000418_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 12) 701 #define G_000418_LDS_SIZE(x) (((x) >> 12) & 0x1FF) 702 #define C_000418_LDS_SIZE 0xFFE00FFF 703 #define S_000418_VGPR_SHARED_SIZE(x) (((unsigned)(x) & 0xF) << 24) 704 #define G_000418_VGPR_SHARED_SIZE(x) (((x) >> 24) & 0xF) 705 #define C_000418_VGPR_SHARED_SIZE 0xF0FFFFFF 706 #define R_00041C_SQ_WAVE_IB_STS 0x00041C /* >= gfx10 */ 707 #define S_00041C_VM_CNT(x) (((unsigned)(x) & 0xF) << 0) 708 #define G_00041C_VM_CNT(x) (((x) >> 0) & 0xF) 709 #define C_00041C_VM_CNT 0xFFFFFFF0 710 #define S_00041C_EXP_CNT(x) (((unsigned)(x) & 0x7) << 4) 711 #define G_00041C_EXP_CNT(x) (((x) >> 4) & 0x7) 712 #define C_00041C_EXP_CNT 0xFFFFFF8F 713 #define S_00041C_LGKM_CNT_BIT4(x) (((unsigned)(x) & 0x1) << 7) 714 #define G_00041C_LGKM_CNT_BIT4(x) (((x) >> 7) & 0x1) 715 #define C_00041C_LGKM_CNT_BIT4 0xFFFFFF7F 716 #define S_00041C_LGKM_CNT(x) (((unsigned)(x) & 0xF) << 8) 717 #define G_00041C_LGKM_CNT(x) (((x) >> 8) & 0xF) 718 #define C_00041C_LGKM_CNT 0xFFFFF0FF 719 #define S_00041C_VALU_CNT(x) (((unsigned)(x) & 0x7) << 12) 720 #define G_00041C_VALU_CNT(x) (((x) >> 12) & 0x7) 721 #define C_00041C_VALU_CNT 0xFFFF8FFF 722 #define S_00041C_FIRST_REPLAY(x) (((unsigned)(x) & 0x1) << 15) /* gfx10 */ 723 #define G_00041C_FIRST_REPLAY(x) (((x) >> 15) & 0x1) 724 #define C_00041C_FIRST_REPLAY 0xFFFF7FFF 725 #define S_00041C_RCNT(x) (((unsigned)(x) & 0x3F) << 16) /* gfx10 */ 726 #define G_00041C_RCNT(x) (((x) >> 16) & 0x3F) 727 #define C_00041C_RCNT 0xFFC0FFFF 728 #define S_00041C_VM_CNT_HI(x) (((unsigned)(x) & 0x3) << 22) 729 #define G_00041C_VM_CNT_HI(x) (((x) >> 22) & 0x3) 730 #define C_00041C_VM_CNT_HI 0xFF3FFFFF 731 #define S_00041C_LGKM_CNT_BIT5(x) (((unsigned)(x) & 0x1) << 24) 732 #define G_00041C_LGKM_CNT_BIT5(x) (((x) >> 24) & 0x1) 733 #define C_00041C_LGKM_CNT_BIT5 0xFEFFFFFF 734 #define S_00041C_REPLAY_W64H(x) (((unsigned)(x) & 0x1) << 25) /* gfx10 */ 735 #define G_00041C_REPLAY_W64H(x) (((x) >> 25) & 0x1) 736 #define C_00041C_REPLAY_W64H 0xFDFFFFFF 737 #define S_00041C_VS_CNT(x) (((unsigned)(x) & 0x3F) << 26) 738 #define G_00041C_VS_CNT(x) (((x) >> 26) & 0x3F) 739 #define C_00041C_VS_CNT 0x03FFFFFF 740 #define R_000420_SQ_WAVE_PC_LO 0x000420 /* >= gfx10 */ 741 #define R_000424_SQ_WAVE_PC_HI 0x000424 /* >= gfx10 */ 742 #define S_000424_PC_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 743 #define G_000424_PC_HI(x) (((x) >> 0) & 0xFFFF) 744 #define C_000424_PC_HI 0xFFFF0000 745 #define R_000428_SQ_WAVE_INST_DW0 0x000428 /* >= gfx10 */ 746 #define R_000434_SQ_WAVE_IB_DBG1 0x000434 /* >= gfx10 */ 747 #define S_000434_XNACK_ERROR(x) (((unsigned)(x) & 0x1) << 0) /* gfx10 */ 748 #define G_000434_XNACK_ERROR(x) (((x) >> 0) & 0x1) 749 #define C_000434_XNACK_ERROR 0xFFFFFFFE 750 #define S_000434_XNACK(x) (((unsigned)(x) & 0x1) << 1) /* gfx10 */ 751 #define G_000434_XNACK(x) (((x) >> 1) & 0x1) 752 #define C_000434_XNACK 0xFFFFFFFD 753 #define S_000434_TA_NEED_RESET(x) (((unsigned)(x) & 0x1) << 2) /* gfx10 */ 754 #define G_000434_TA_NEED_RESET(x) (((x) >> 2) & 0x1) 755 #define C_000434_TA_NEED_RESET 0xFFFFFFFB 756 #define S_000434_XNACK_OVERRIDE(x) (((unsigned)(x) & 0x1) << 3) /* gfx10 */ 757 #define G_000434_XNACK_OVERRIDE(x) (((x) >> 3) & 0x1) 758 #define C_000434_XNACK_OVERRIDE 0xFFFFFFF7 759 #define S_000434_XCNT(x) (((unsigned)(x) & 0x3F) << 4) /* gfx10 */ 760 #define G_000434_XCNT(x) (((x) >> 4) & 0x3F) 761 #define C_000434_XCNT 0xFFFFFC0F 762 #define S_000434_QCNT(x) (((unsigned)(x) & 0x3F) << 11) /* gfx10 */ 763 #define G_000434_QCNT(x) (((x) >> 11) & 0x3F) 764 #define C_000434_QCNT 0xFFFE07FF 765 #define S_000434_RCNT(x) (((unsigned)(x) & 0x3F) << 18) /* gfx10 */ 766 #define G_000434_RCNT(x) (((x) >> 18) & 0x3F) 767 #define C_000434_RCNT 0xFF03FFFF 768 #define S_000434_WAVE_IDLE(x) (((unsigned)(x) & 0x1) << 24) 769 #define G_000434_WAVE_IDLE(x) (((x) >> 24) & 0x1) 770 #define C_000434_WAVE_IDLE 0xFEFFFFFF 771 #define S_000434_MISC_CNT(x) (((unsigned)(x) & 0x7F) << 25) 772 #define G_000434_MISC_CNT(x) (((x) >> 25) & 0x7F) 773 #define C_000434_MISC_CNT 0x01FFFFFF 774 #define R_000438_SQ_WAVE_FLUSH_IB 0x000438 /* >= gfx10 */ 775 #define R_000450_SQ_WAVE_FLAT_SCRATCH_LO 0x000450 /* >= gfx103 */ 776 #define R_000454_SQ_WAVE_FLAT_SCRATCH_HI 0x000454 /* >= gfx103 */ 777 #define R_00045C_SQ_WAVE_HW_ID1 0x00045C /* >= gfx10 */ 778 #define S_00045C_WAVE_ID(x) (((unsigned)(x) & 0x1F) << 0) 779 #define G_00045C_WAVE_ID(x) (((x) >> 0) & 0x1F) 780 #define C_00045C_WAVE_ID 0xFFFFFFE0 781 #define S_00045C_SIMD_ID(x) (((unsigned)(x) & 0x3) << 8) 782 #define G_00045C_SIMD_ID(x) (((x) >> 8) & 0x3) 783 #define C_00045C_SIMD_ID 0xFFFFFCFF 784 #define S_00045C_WGP_ID(x) (((unsigned)(x) & 0xF) << 10) 785 #define G_00045C_WGP_ID(x) (((x) >> 10) & 0xF) 786 #define C_00045C_WGP_ID 0xFFFFC3FF 787 #define S_00045C_SA_ID(x) (((unsigned)(x) & 0x1) << 16) 788 #define G_00045C_SA_ID(x) (((x) >> 16) & 0x1) 789 #define C_00045C_SA_ID 0xFFFEFFFF 790 #define S_00045C_SE_ID(x) (((unsigned)(x) & 0x3) << 18) 791 #define G_00045C_SE_ID(x) (((x) >> 18) & 0x3) 792 #define C_00045C_SE_ID 0xFFF3FFFF 793 #define R_000460_SQ_WAVE_HW_ID2 0x000460 /* >= gfx10 */ 794 #define S_000460_QUEUE_ID(x) (((unsigned)(x) & 0xF) << 0) 795 #define G_000460_QUEUE_ID(x) (((x) >> 0) & 0xF) 796 #define C_000460_QUEUE_ID 0xFFFFFFF0 797 #define S_000460_PIPE_ID(x) (((unsigned)(x) & 0x3) << 4) 798 #define G_000460_PIPE_ID(x) (((x) >> 4) & 0x3) 799 #define C_000460_PIPE_ID 0xFFFFFFCF 800 #define S_000460_ME_ID(x) (((unsigned)(x) & 0x3) << 8) 801 #define G_000460_ME_ID(x) (((x) >> 8) & 0x3) 802 #define C_000460_ME_ID 0xFFFFFCFF 803 #define S_000460_STATE_ID(x) (((unsigned)(x) & 0x7) << 12) 804 #define G_000460_STATE_ID(x) (((x) >> 12) & 0x7) 805 #define C_000460_STATE_ID 0xFFFF8FFF 806 #define S_000460_WG_ID(x) (((unsigned)(x) & 0x1F) << 16) 807 #define G_000460_WG_ID(x) (((x) >> 16) & 0x1F) 808 #define C_000460_WG_ID 0xFFE0FFFF 809 #define S_000460_VM_ID(x) (((unsigned)(x) & 0xF) << 24) 810 #define G_000460_VM_ID(x) (((x) >> 24) & 0xF) 811 #define C_000460_VM_ID 0xF0FFFFFF 812 #define S_000460_COMPAT_LEVEL(x) (((unsigned)(x) & 0x3) << 29) /* gfx10 */ 813 #define G_000460_COMPAT_LEVEL(x) (((x) >> 29) & 0x3) 814 #define C_000460_COMPAT_LEVEL 0x9FFFFFFF 815 #define R_000464_SQ_WAVE_POPS_PACKER 0x000464 /* >= gfx10 */ 816 #define S_000464_POPS_EN(x) (((unsigned)(x) & 0x1) << 0) 817 #define G_000464_POPS_EN(x) (((x) >> 0) & 0x1) 818 #define C_000464_POPS_EN 0xFFFFFFFE 819 #define S_000464_POPS_PACKER_ID(x) (((unsigned)(x) & 0x3) << 1) 820 #define G_000464_POPS_PACKER_ID(x) (((x) >> 1) & 0x3) 821 #define C_000464_POPS_PACKER_ID 0xFFFFFFF9 822 #define R_000468_SQ_WAVE_SCHED_MODE 0x000468 /* >= gfx10 */ 823 #define S_000468_DEP_MODE(x) (((unsigned)(x) & 0x3) << 0) 824 #define G_000468_DEP_MODE(x) (((x) >> 0) & 0x3) 825 #define C_000468_DEP_MODE 0xFFFFFFFC 826 #define R_00046C_SQ_WAVE_VGPR_OFFSET 0x00046C /* >= gfx10 */ 827 #define S_00046C_SRC0(x) (((unsigned)(x) & 0x3F) << 0) 828 #define G_00046C_SRC0(x) (((x) >> 0) & 0x3F) 829 #define C_00046C_SRC0 0xFFFFFFC0 830 #define S_00046C_SRC1(x) (((unsigned)(x) & 0x3F) << 6) 831 #define G_00046C_SRC1(x) (((x) >> 6) & 0x3F) 832 #define C_00046C_SRC1 0xFFFFF03F 833 #define S_00046C_SRC2(x) (((unsigned)(x) & 0x3F) << 12) 834 #define G_00046C_SRC2(x) (((x) >> 12) & 0x3F) 835 #define C_00046C_SRC2 0xFFFC0FFF 836 #define S_00046C_DST(x) (((unsigned)(x) & 0x3F) << 18) 837 #define G_00046C_DST(x) (((x) >> 18) & 0x3F) 838 #define C_00046C_DST 0xFF03FFFF 839 #define R_000470_SQ_WAVE_IB_STS2 0x000470 /* >= gfx10 */ 840 #define S_000470_INST_PREFETCH(x) (((unsigned)(x) & 0x3) << 0) 841 #define G_000470_INST_PREFETCH(x) (((x) >> 0) & 0x3) 842 #define C_000470_INST_PREFETCH 0xFFFFFFFC 843 #define S_000470_RESOURCE_OVERRIDE(x) (((unsigned)(x) & 0x1) << 7) 844 #define G_000470_RESOURCE_OVERRIDE(x) (((x) >> 7) & 0x1) 845 #define C_000470_RESOURCE_OVERRIDE 0xFFFFFF7F 846 #define S_000470_MEM_ORDER(x) (((unsigned)(x) & 0x3) << 8) 847 #define G_000470_MEM_ORDER(x) (((x) >> 8) & 0x3) 848 #define C_000470_MEM_ORDER 0xFFFFFCFF 849 #define S_000470_FWD_PROGRESS(x) (((unsigned)(x) & 0x1) << 10) 850 #define G_000470_FWD_PROGRESS(x) (((x) >> 10) & 0x1) 851 #define C_000470_FWD_PROGRESS 0xFFFFFBFF 852 #define S_000470_WAVE64(x) (((unsigned)(x) & 0x1) << 11) 853 #define G_000470_WAVE64(x) (((x) >> 11) & 0x1) 854 #define C_000470_WAVE64 0xFFFFF7FF 855 #define S_000470_WAVE64HI(x) (((unsigned)(x) & 0x1) << 12) /* gfx10 */ 856 #define G_000470_WAVE64HI(x) (((x) >> 12) & 0x1) 857 #define C_000470_WAVE64HI 0xFFFFEFFF 858 #define S_000470_SUBV_LOOP(x) (((unsigned)(x) & 0x1) << 13) /* gfx10 */ 859 #define G_000470_SUBV_LOOP(x) (((x) >> 13) & 0x1) 860 #define C_000470_SUBV_LOOP 0xFFFFDFFF 861 #define R_000474_SQ_WAVE_SHADER_CYCLES 0x000474 /* >= gfx103 */ 862 #define S_000474_CYCLES(x) (((unsigned)(x) & 0xFFFFF) << 0) 863 #define G_000474_CYCLES(x) (((x) >> 0) & 0xFFFFF) 864 #define C_000474_CYCLES 0xFFF00000 865 #define R_490_RELEASE_MEM_OP 0x490 /* >= gfx10 */ 866 #define S_490_EVENT_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 867 #define G_490_EVENT_TYPE(x) (((x) >> 0) & 0x3F) 868 #define C_490_EVENT_TYPE 0xFFFFFFC0 869 #define S_490_EVENT_INDEX(x) (((unsigned)(x) & 0xF) << 8) 870 #define G_490_EVENT_INDEX(x) (((x) >> 8) & 0xF) 871 #define C_490_EVENT_INDEX 0xFFFFF0FF 872 #define S_490_GLM_WB(x) (((unsigned)(x) & 0x1) << 12) 873 #define G_490_GLM_WB(x) (((x) >> 12) & 0x1) 874 #define C_490_GLM_WB 0xFFFFEFFF 875 #define S_490_GLM_INV(x) (((unsigned)(x) & 0x1) << 13) 876 #define G_490_GLM_INV(x) (((x) >> 13) & 0x1) 877 #define C_490_GLM_INV 0xFFFFDFFF 878 #define S_490_GLV_INV(x) (((unsigned)(x) & 0x1) << 14) 879 #define G_490_GLV_INV(x) (((x) >> 14) & 0x1) 880 #define C_490_GLV_INV 0xFFFFBFFF 881 #define S_490_GL1_INV(x) (((unsigned)(x) & 0x1) << 15) 882 #define G_490_GL1_INV(x) (((x) >> 15) & 0x1) 883 #define C_490_GL1_INV 0xFFFF7FFF 884 #define S_490_GL2_US(x) (((unsigned)(x) & 0x1) << 16) 885 #define G_490_GL2_US(x) (((x) >> 16) & 0x1) 886 #define C_490_GL2_US 0xFFFEFFFF 887 #define S_490_GL2_RANGE(x) (((unsigned)(x) & 0x3) << 17) 888 #define G_490_GL2_RANGE(x) (((x) >> 17) & 0x3) 889 #define C_490_GL2_RANGE 0xFFF9FFFF 890 #define V_490_GL2_ALL 0 891 #define V_490_GL2_VOL 1 892 #define V_490_GL2_RANGE 2 893 #define V_490_GL2_FIRST_LAST 3 894 #define S_490_GL2_DISCARD(x) (((unsigned)(x) & 0x1) << 19) 895 #define G_490_GL2_DISCARD(x) (((x) >> 19) & 0x1) 896 #define C_490_GL2_DISCARD 0xFFF7FFFF 897 #define S_490_GL2_INV(x) (((unsigned)(x) & 0x1) << 20) 898 #define G_490_GL2_INV(x) (((x) >> 20) & 0x1) 899 #define C_490_GL2_INV 0xFFEFFFFF 900 #define S_490_GL2_WB(x) (((unsigned)(x) & 0x1) << 21) 901 #define G_490_GL2_WB(x) (((x) >> 21) & 0x1) 902 #define C_490_GL2_WB 0xFFDFFFFF 903 #define S_490_SEQ(x) (((unsigned)(x) & 0x3) << 22) 904 #define G_490_SEQ(x) (((x) >> 22) & 0x3) 905 #define C_490_SEQ 0xFF3FFFFF 906 #define V_490_SEQ_PARALLEL 0 907 #define V_490_SEQ_FORWARD 1 908 #define V_490_SEQ_REVERSE 2 909 #define R_500_DMA_DATA_WORD0 0x500 910 #define S_500_ENGINE(x) (((unsigned)(x) & 0x1) << 0) 911 #define G_500_ENGINE(x) (((x) >> 0) & 0x1) 912 #define C_500_ENGINE 0xFFFFFFFE 913 #define V_500_ME 0 914 #define V_500_PFP 1 915 #define S_500_SRC_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 13) /* >= gfx7 */ 916 #define G_500_SRC_CACHE_POLICY(x) (((x) >> 13) & 0x3) 917 #define C_500_SRC_CACHE_POLICY 0xFFFF9FFF 918 #define S_500_DST_SEL(x) (((unsigned)(x) & 0x3) << 20) 919 #define G_500_DST_SEL(x) (((x) >> 20) & 0x3) 920 #define C_500_DST_SEL 0xFFCFFFFF 921 #define V_500_DST_ADDR 0 922 #define V_500_GDS 1 923 #define V_500_NOWHERE 2 /* >= gfx9 */ 924 #define V_500_DST_ADDR_TC_L2 3 /* >= gfx7 */ 925 #define S_500_DST_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 25) /* >= gfx7 */ 926 #define G_500_DST_CACHE_POLICY(x) (((x) >> 25) & 0x3) 927 #define C_500_DST_CACHE_POLICY 0xF9FFFFFF 928 #define S_500_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) 929 #define G_500_SRC_SEL(x) (((x) >> 29) & 0x3) 930 #define C_500_SRC_SEL 0x9FFFFFFF 931 #define V_500_SRC_ADDR 0 932 #define V_500_DATA 2 933 #define V_500_SRC_ADDR_TC_L2 3 /* >= gfx7 */ 934 #define S_500_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) 935 #define G_500_CP_SYNC(x) (((x) >> 31) & 0x1) 936 #define C_500_CP_SYNC 0x7FFFFFFF 937 #define R_501_SRC_ADDR_LO 0x501 938 #define R_502_SRC_ADDR_HI 0x502 939 #define R_503_DST_ADDR_LO 0x503 940 #define R_504_DST_ADDR_HI 0x504 941 #define R_586_GCR_CNTL 0x586 /* >= gfx10 */ 942 #define S_586_GLI_INV(x) (((unsigned)(x) & 0x3) << 0) 943 #define G_586_GLI_INV(x) (((x) >> 0) & 0x3) 944 #define C_586_GLI_INV 0xFFFFFFFC 945 #define V_586_GLI_NOP 0 946 #define V_586_GLI_ALL 1 947 #define V_586_GLI_RANGE 2 948 #define V_586_GLI_FIRST_LAST 3 949 #define S_586_GL1_RANGE(x) (((unsigned)(x) & 0x3) << 2) 950 #define G_586_GL1_RANGE(x) (((x) >> 2) & 0x3) 951 #define C_586_GL1_RANGE 0xFFFFFFF3 952 #define V_586_GL1_ALL 0 953 #define V_586_GL1_RANGE 2 954 #define V_586_GL1_FIRST_LAST 3 955 #define S_586_GLM_WB(x) (((unsigned)(x) & 0x1) << 4) 956 #define G_586_GLM_WB(x) (((x) >> 4) & 0x1) 957 #define C_586_GLM_WB 0xFFFFFFEF 958 #define S_586_GLM_INV(x) (((unsigned)(x) & 0x1) << 5) 959 #define G_586_GLM_INV(x) (((x) >> 5) & 0x1) 960 #define C_586_GLM_INV 0xFFFFFFDF 961 #define S_586_GLK_WB(x) (((unsigned)(x) & 0x1) << 6) 962 #define G_586_GLK_WB(x) (((x) >> 6) & 0x1) 963 #define C_586_GLK_WB 0xFFFFFFBF 964 #define S_586_GLK_INV(x) (((unsigned)(x) & 0x1) << 7) 965 #define G_586_GLK_INV(x) (((x) >> 7) & 0x1) 966 #define C_586_GLK_INV 0xFFFFFF7F 967 #define S_586_GLV_INV(x) (((unsigned)(x) & 0x1) << 8) 968 #define G_586_GLV_INV(x) (((x) >> 8) & 0x1) 969 #define C_586_GLV_INV 0xFFFFFEFF 970 #define S_586_GL1_INV(x) (((unsigned)(x) & 0x1) << 9) 971 #define G_586_GL1_INV(x) (((x) >> 9) & 0x1) 972 #define C_586_GL1_INV 0xFFFFFDFF 973 #define S_586_GL2_US(x) (((unsigned)(x) & 0x1) << 10) 974 #define G_586_GL2_US(x) (((x) >> 10) & 0x1) 975 #define C_586_GL2_US 0xFFFFFBFF 976 #define S_586_GL2_RANGE(x) (((unsigned)(x) & 0x3) << 11) 977 #define G_586_GL2_RANGE(x) (((x) >> 11) & 0x3) 978 #define C_586_GL2_RANGE 0xFFFFE7FF 979 #define V_586_GL2_ALL 0 980 #define V_586_GL2_VOL 1 981 #define V_586_GL2_RANGE 2 982 #define V_586_GL2_FIRST_LAST 3 983 #define S_586_GL2_DISCARD(x) (((unsigned)(x) & 0x1) << 13) 984 #define G_586_GL2_DISCARD(x) (((x) >> 13) & 0x1) 985 #define C_586_GL2_DISCARD 0xFFFFDFFF 986 #define S_586_GL2_INV(x) (((unsigned)(x) & 0x1) << 14) 987 #define G_586_GL2_INV(x) (((x) >> 14) & 0x1) 988 #define C_586_GL2_INV 0xFFFFBFFF 989 #define S_586_GL2_WB(x) (((unsigned)(x) & 0x1) << 15) 990 #define G_586_GL2_WB(x) (((x) >> 15) & 0x1) 991 #define C_586_GL2_WB 0xFFFF7FFF 992 #define S_586_SEQ(x) (((unsigned)(x) & 0x3) << 16) 993 #define G_586_SEQ(x) (((x) >> 16) & 0x3) 994 #define C_586_SEQ 0xFFFCFFFF 995 #define V_586_SEQ_PARALLEL 0 996 #define V_586_SEQ_FORWARD 1 997 #define V_586_SEQ_REVERSE 2 998 #define S_586_RANGE_IS_PA(x) (((unsigned)(x) & 0x1) << 18) 999 #define G_586_RANGE_IS_PA(x) (((x) >> 18) & 0x1) 1000 #define C_586_RANGE_IS_PA 0xFFFBFFFF 1001 #define R_0009B0_SQ_WAVE_TBA_LO 0x0009B0 /* <= gfx81 */ 1002 #define R_0009B0_SQ_WAVE_TTMP0 0x0009B0 /* >= gfx9 */ 1003 #define R_0009B4_SQ_WAVE_TBA_HI 0x0009B4 /* <= gfx81 */ 1004 #define S_0009B4_ADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 1005 #define G_0009B4_ADDR_HI(x) (((x) >> 0) & 0xFF) 1006 #define C_0009B4_ADDR_HI 0xFFFFFF00 1007 #define R_0009B4_SQ_WAVE_TTMP1 0x0009B4 /* >= gfx9 */ 1008 #define R_0009B8_SQ_WAVE_TMA_LO 0x0009B8 /* <= gfx81 */ 1009 #define R_0009B8_SQ_WAVE_TTMP2 0x0009B8 /* >= gfx9 */ 1010 #define R_0009BC_SQ_WAVE_TMA_HI 0x0009BC /* <= gfx81 */ 1011 #define S_0009BC_ADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 1012 #define G_0009BC_ADDR_HI(x) (((x) >> 0) & 0xFF) 1013 #define C_0009BC_ADDR_HI 0xFFFFFF00 1014 #define R_0009BC_SQ_WAVE_TTMP3 0x0009BC /* >= gfx9 */ 1015 #define R_0009C0_SQ_WAVE_TTMP0 0x0009C0 /* <= gfx81 */ 1016 #define R_0009C0_SQ_WAVE_TTMP4 0x0009C0 /* >= gfx9 */ 1017 #define R_0009C4_SQ_WAVE_TTMP1 0x0009C4 /* <= gfx81 */ 1018 #define R_0009C4_SQ_WAVE_TTMP5 0x0009C4 /* >= gfx9 */ 1019 #define R_0009C8_SQ_WAVE_TTMP2 0x0009C8 /* <= gfx81 */ 1020 #define R_0009C8_SQ_WAVE_TTMP6 0x0009C8 /* >= gfx9 */ 1021 #define R_0009CC_SQ_WAVE_TTMP3 0x0009CC /* <= gfx81 */ 1022 #define R_0009CC_SQ_WAVE_TTMP7 0x0009CC /* >= gfx9 */ 1023 #define R_0009D0_SQ_WAVE_TTMP4 0x0009D0 /* <= gfx81 */ 1024 #define R_0009D0_SQ_WAVE_TTMP8 0x0009D0 /* >= gfx9 */ 1025 #define R_0009D4_SQ_WAVE_TTMP5 0x0009D4 /* <= gfx81 */ 1026 #define R_0009D4_SQ_WAVE_TTMP9 0x0009D4 /* >= gfx9 */ 1027 #define R_0009D8_SQ_WAVE_TTMP10 0x0009D8 /* >= gfx9 */ 1028 #define R_0009D8_SQ_WAVE_TTMP6 0x0009D8 /* <= gfx81 */ 1029 #define R_0009DC_SQ_WAVE_TTMP11 0x0009DC /* >= gfx9 */ 1030 #define R_0009DC_SQ_WAVE_TTMP7 0x0009DC /* <= gfx81 */ 1031 #define R_0009E0_SQ_WAVE_TTMP12 0x0009E0 /* >= gfx9 */ 1032 #define R_0009E0_SQ_WAVE_TTMP8 0x0009E0 /* <= gfx81 */ 1033 #define R_0009E4_SQ_WAVE_TTMP13 0x0009E4 /* >= gfx9 */ 1034 #define R_0009E4_SQ_WAVE_TTMP9 0x0009E4 /* <= gfx81 */ 1035 #define R_0009E8_SQ_WAVE_TTMP10 0x0009E8 /* <= gfx81 */ 1036 #define R_0009E8_SQ_WAVE_TTMP14 0x0009E8 /* >= gfx9 */ 1037 #define R_0009EC_SQ_WAVE_TTMP11 0x0009EC /* <= gfx81 */ 1038 #define R_0009EC_SQ_WAVE_TTMP15 0x0009EC /* >= gfx9 */ 1039 #define R_0009F0_SQ_WAVE_M0 0x0009F0 1040 #define R_0009F8_SQ_WAVE_EXEC_LO 0x0009F8 1041 #define R_0009FC_SQ_WAVE_EXEC_HI 0x0009FC 1042 #define R_000A00_SQ_WAVE_FLAT_SCRATCH_LO 0x000A00 /* gfx10 */ 1043 #define R_000A04_SQ_WAVE_FLAT_SCRATCH_HI 0x000A04 /* gfx10 */ 1044 #define R_000A08_SQ_WAVE_FLAT_XNACK_MASK 0x000A08 /* gfx10 */ 1045 #define R_000E4C_SRBM_STATUS2 0x000E4C /* <= gfx81 */ 1046 #define S_000E4C_SDMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 0) 1047 #define G_000E4C_SDMA_RQ_PENDING(x) (((x) >> 0) & 0x1) 1048 #define C_000E4C_SDMA_RQ_PENDING 0xFFFFFFFE 1049 #define S_000E4C_TST_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) 1050 #define G_000E4C_TST_RQ_PENDING(x) (((x) >> 1) & 0x1) 1051 #define C_000E4C_TST_RQ_PENDING 0xFFFFFFFD 1052 #define S_000E4C_SDMA1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) 1053 #define G_000E4C_SDMA1_RQ_PENDING(x) (((x) >> 2) & 0x1) 1054 #define C_000E4C_SDMA1_RQ_PENDING 0xFFFFFFFB 1055 #define S_000E4C_VCE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) 1056 #define G_000E4C_VCE0_RQ_PENDING(x) (((x) >> 3) & 0x1) 1057 #define C_000E4C_VCE0_RQ_PENDING 0xFFFFFFF7 1058 #define S_000E4C_VP8_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1059 #define G_000E4C_VP8_BUSY(x) (((x) >> 4) & 0x1) 1060 #define C_000E4C_VP8_BUSY 0xFFFFFFEF 1061 #define S_000E4C_SDMA_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1062 #define G_000E4C_SDMA_BUSY(x) (((x) >> 5) & 0x1) 1063 #define C_000E4C_SDMA_BUSY 0xFFFFFFDF 1064 #define S_000E4C_SDMA1_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1065 #define G_000E4C_SDMA1_BUSY(x) (((x) >> 6) & 0x1) 1066 #define C_000E4C_SDMA1_BUSY 0xFFFFFFBF 1067 #define S_000E4C_VCE0_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1068 #define G_000E4C_VCE0_BUSY(x) (((x) >> 7) & 0x1) 1069 #define C_000E4C_VCE0_BUSY 0xFFFFFF7F 1070 #define S_000E4C_XDMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1071 #define G_000E4C_XDMA_BUSY(x) (((x) >> 8) & 0x1) 1072 #define C_000E4C_XDMA_BUSY 0xFFFFFEFF 1073 #define S_000E4C_CHUB_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1074 #define G_000E4C_CHUB_BUSY(x) (((x) >> 9) & 0x1) 1075 #define C_000E4C_CHUB_BUSY 0xFFFFFDFF 1076 #define S_000E4C_SDMA2_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1077 #define G_000E4C_SDMA2_BUSY(x) (((x) >> 10) & 0x1) 1078 #define C_000E4C_SDMA2_BUSY 0xFFFFFBFF 1079 #define S_000E4C_SDMA3_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1080 #define G_000E4C_SDMA3_BUSY(x) (((x) >> 11) & 0x1) 1081 #define C_000E4C_SDMA3_BUSY 0xFFFFF7FF 1082 #define S_000E4C_SAMSCP_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1083 #define G_000E4C_SAMSCP_BUSY(x) (((x) >> 12) & 0x1) 1084 #define C_000E4C_SAMSCP_BUSY 0xFFFFEFFF 1085 #define S_000E4C_ISP_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1086 #define G_000E4C_ISP_BUSY(x) (((x) >> 13) & 0x1) 1087 #define C_000E4C_ISP_BUSY 0xFFFFDFFF 1088 #define S_000E4C_VCE1_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1089 #define G_000E4C_VCE1_BUSY(x) (((x) >> 14) & 0x1) 1090 #define C_000E4C_VCE1_BUSY 0xFFFFBFFF 1091 #define S_000E4C_ODE_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1092 #define G_000E4C_ODE_BUSY(x) (((x) >> 15) & 0x1) 1093 #define C_000E4C_ODE_BUSY 0xFFFF7FFF 1094 #define S_000E4C_SDMA2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 16) 1095 #define G_000E4C_SDMA2_RQ_PENDING(x) (((x) >> 16) & 0x1) 1096 #define C_000E4C_SDMA2_RQ_PENDING 0xFFFEFFFF 1097 #define S_000E4C_SDMA3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 17) 1098 #define G_000E4C_SDMA3_RQ_PENDING(x) (((x) >> 17) & 0x1) 1099 #define C_000E4C_SDMA3_RQ_PENDING 0xFFFDFFFF 1100 #define S_000E4C_SAMSCP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 18) 1101 #define G_000E4C_SAMSCP_RQ_PENDING(x) (((x) >> 18) & 0x1) 1102 #define C_000E4C_SAMSCP_RQ_PENDING 0xFFFBFFFF 1103 #define S_000E4C_ISP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 19) 1104 #define G_000E4C_ISP_RQ_PENDING(x) (((x) >> 19) & 0x1) 1105 #define C_000E4C_ISP_RQ_PENDING 0xFFF7FFFF 1106 #define S_000E4C_VCE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 20) 1107 #define G_000E4C_VCE1_RQ_PENDING(x) (((x) >> 20) & 0x1) 1108 #define C_000E4C_VCE1_RQ_PENDING 0xFFEFFFFF 1109 #define R_000E50_SRBM_STATUS 0x000E50 /* <= gfx81 */ 1110 #define S_000E50_UVD_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) 1111 #define G_000E50_UVD_RQ_PENDING(x) (((x) >> 1) & 0x1) 1112 #define C_000E50_UVD_RQ_PENDING 0xFFFFFFFD 1113 #define S_000E50_SAMMSP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) 1114 #define G_000E50_SAMMSP_RQ_PENDING(x) (((x) >> 2) & 0x1) 1115 #define C_000E50_SAMMSP_RQ_PENDING 0xFFFFFFFB 1116 #define S_000E50_ACP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) 1117 #define G_000E50_ACP_RQ_PENDING(x) (((x) >> 3) & 0x1) 1118 #define C_000E50_ACP_RQ_PENDING 0xFFFFFFF7 1119 #define S_000E50_SMU_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) 1120 #define G_000E50_SMU_RQ_PENDING(x) (((x) >> 4) & 0x1) 1121 #define C_000E50_SMU_RQ_PENDING 0xFFFFFFEF 1122 #define S_000E50_GRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 1123 #define G_000E50_GRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) 1124 #define C_000E50_GRBM_RQ_PENDING 0xFFFFFFDF 1125 #define S_000E50_HI_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) 1126 #define G_000E50_HI_RQ_PENDING(x) (((x) >> 6) & 0x1) 1127 #define C_000E50_HI_RQ_PENDING 0xFFFFFFBF 1128 #define S_000E50_VMC_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1129 #define G_000E50_VMC_BUSY(x) (((x) >> 8) & 0x1) 1130 #define C_000E50_VMC_BUSY 0xFFFFFEFF 1131 #define S_000E50_MCB_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1132 #define G_000E50_MCB_BUSY(x) (((x) >> 9) & 0x1) 1133 #define C_000E50_MCB_BUSY 0xFFFFFDFF 1134 #define S_000E50_MCB_NON_DISPLAY_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1135 #define G_000E50_MCB_NON_DISPLAY_BUSY(x) (((x) >> 10) & 0x1) 1136 #define C_000E50_MCB_NON_DISPLAY_BUSY 0xFFFFFBFF 1137 #define S_000E50_MCC_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1138 #define G_000E50_MCC_BUSY(x) (((x) >> 11) & 0x1) 1139 #define C_000E50_MCC_BUSY 0xFFFFF7FF 1140 #define S_000E50_MCD_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1141 #define G_000E50_MCD_BUSY(x) (((x) >> 12) & 0x1) 1142 #define C_000E50_MCD_BUSY 0xFFFFEFFF 1143 #define S_000E50_VMC1_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1144 #define G_000E50_VMC1_BUSY(x) (((x) >> 13) & 0x1) 1145 #define C_000E50_VMC1_BUSY 0xFFFFDFFF 1146 #define S_000E50_SEM_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1147 #define G_000E50_SEM_BUSY(x) (((x) >> 14) & 0x1) 1148 #define C_000E50_SEM_BUSY 0xFFFFBFFF 1149 #define S_000E50_ACP_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1150 #define G_000E50_ACP_BUSY(x) (((x) >> 16) & 0x1) 1151 #define C_000E50_ACP_BUSY 0xFFFEFFFF 1152 #define S_000E50_IH_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1153 #define G_000E50_IH_BUSY(x) (((x) >> 17) & 0x1) 1154 #define C_000E50_IH_BUSY 0xFFFDFFFF 1155 #define S_000E50_UVD_BUSY(x) (((unsigned)(x) & 0x1) << 19) 1156 #define G_000E50_UVD_BUSY(x) (((x) >> 19) & 0x1) 1157 #define C_000E50_UVD_BUSY 0xFFF7FFFF 1158 #define S_000E50_SAMMSP_BUSY(x) (((unsigned)(x) & 0x1) << 20) 1159 #define G_000E50_SAMMSP_BUSY(x) (((x) >> 20) & 0x1) 1160 #define C_000E50_SAMMSP_BUSY 0xFFEFFFFF 1161 #define S_000E50_GCATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 21) 1162 #define G_000E50_GCATCL2_BUSY(x) (((x) >> 21) & 0x1) 1163 #define C_000E50_GCATCL2_BUSY 0xFFDFFFFF 1164 #define S_000E50_OSATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1165 #define G_000E50_OSATCL2_BUSY(x) (((x) >> 22) & 0x1) 1166 #define C_000E50_OSATCL2_BUSY 0xFFBFFFFF 1167 #define S_000E50_BIF_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1168 #define G_000E50_BIF_BUSY(x) (((x) >> 29) & 0x1) 1169 #define C_000E50_BIF_BUSY 0xDFFFFFFF 1170 #define R_000E54_SRBM_STATUS3 0x000E54 /* <= gfx81 */ 1171 #define S_000E54_MCC0_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1172 #define G_000E54_MCC0_BUSY(x) (((x) >> 0) & 0x1) 1173 #define C_000E54_MCC0_BUSY 0xFFFFFFFE 1174 #define S_000E54_MCC1_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1175 #define G_000E54_MCC1_BUSY(x) (((x) >> 1) & 0x1) 1176 #define C_000E54_MCC1_BUSY 0xFFFFFFFD 1177 #define S_000E54_MCC2_BUSY(x) (((unsigned)(x) & 0x1) << 2) 1178 #define G_000E54_MCC2_BUSY(x) (((x) >> 2) & 0x1) 1179 #define C_000E54_MCC2_BUSY 0xFFFFFFFB 1180 #define S_000E54_MCC3_BUSY(x) (((unsigned)(x) & 0x1) << 3) 1181 #define G_000E54_MCC3_BUSY(x) (((x) >> 3) & 0x1) 1182 #define C_000E54_MCC3_BUSY 0xFFFFFFF7 1183 #define S_000E54_MCC4_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1184 #define G_000E54_MCC4_BUSY(x) (((x) >> 4) & 0x1) 1185 #define C_000E54_MCC4_BUSY 0xFFFFFFEF 1186 #define S_000E54_MCC5_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1187 #define G_000E54_MCC5_BUSY(x) (((x) >> 5) & 0x1) 1188 #define C_000E54_MCC5_BUSY 0xFFFFFFDF 1189 #define S_000E54_MCC6_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1190 #define G_000E54_MCC6_BUSY(x) (((x) >> 6) & 0x1) 1191 #define C_000E54_MCC6_BUSY 0xFFFFFFBF 1192 #define S_000E54_MCC7_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1193 #define G_000E54_MCC7_BUSY(x) (((x) >> 7) & 0x1) 1194 #define C_000E54_MCC7_BUSY 0xFFFFFF7F 1195 #define S_000E54_MCD0_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1196 #define G_000E54_MCD0_BUSY(x) (((x) >> 8) & 0x1) 1197 #define C_000E54_MCD0_BUSY 0xFFFFFEFF 1198 #define S_000E54_MCD1_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1199 #define G_000E54_MCD1_BUSY(x) (((x) >> 9) & 0x1) 1200 #define C_000E54_MCD1_BUSY 0xFFFFFDFF 1201 #define S_000E54_MCD2_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1202 #define G_000E54_MCD2_BUSY(x) (((x) >> 10) & 0x1) 1203 #define C_000E54_MCD2_BUSY 0xFFFFFBFF 1204 #define S_000E54_MCD3_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1205 #define G_000E54_MCD3_BUSY(x) (((x) >> 11) & 0x1) 1206 #define C_000E54_MCD3_BUSY 0xFFFFF7FF 1207 #define S_000E54_MCD4_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1208 #define G_000E54_MCD4_BUSY(x) (((x) >> 12) & 0x1) 1209 #define C_000E54_MCD4_BUSY 0xFFFFEFFF 1210 #define S_000E54_MCD5_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1211 #define G_000E54_MCD5_BUSY(x) (((x) >> 13) & 0x1) 1212 #define C_000E54_MCD5_BUSY 0xFFFFDFFF 1213 #define S_000E54_MCD6_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1214 #define G_000E54_MCD6_BUSY(x) (((x) >> 14) & 0x1) 1215 #define C_000E54_MCD6_BUSY 0xFFFFBFFF 1216 #define S_000E54_MCD7_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1217 #define G_000E54_MCD7_BUSY(x) (((x) >> 15) & 0x1) 1218 #define C_000E54_MCD7_BUSY 0xFFFF7FFF 1219 #define R_008000_GRBM_CNTL 0x008000 /* <= gfx6 */ 1220 #define S_008000_READ_TIMEOUT(x) (((unsigned)(x) & 0xFF) << 0) 1221 #define G_008000_READ_TIMEOUT(x) (((x) >> 0) & 0xFF) 1222 #define C_008000_READ_TIMEOUT 0xFFFFFF00 1223 #define R_008004_GRBM_SKEW_CNTL 0x008004 /* <= gfx6 */ 1224 #define S_008004_SKEW_TOP_THRESHOLD(x) (((unsigned)(x) & 0x3F) << 0) 1225 #define G_008004_SKEW_TOP_THRESHOLD(x) (((x) >> 0) & 0x3F) 1226 #define C_008004_SKEW_TOP_THRESHOLD 0xFFFFFFC0 1227 #define S_008004_SKEW_COUNT(x) (((unsigned)(x) & 0x3F) << 6) 1228 #define G_008004_SKEW_COUNT(x) (((x) >> 6) & 0x3F) 1229 #define C_008004_SKEW_COUNT 0xFFFFF03F 1230 #define R_008008_GRBM_STATUS2 0x008008 1231 #define S_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0xF) << 0) 1232 #define G_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((x) >> 0) & 0xF) 1233 #define C_008008_ME0PIPE1_CMDFIFO_AVAIL 0xFFFFFFF0 1234 #define S_008008_RLC_RQ_PENDING_GFX6(x) (((unsigned)(x) & 0x1) << 0) /* <= gfx6 */ 1235 #define G_008008_RLC_RQ_PENDING_GFX6(x) (((x) >> 0) & 0x1) 1236 #define C_008008_RLC_RQ_PENDING_GFX6 0xFFFFFFFE 1237 #define S_008008_ME0PIPE1_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) 1238 #define G_008008_ME0PIPE1_CF_RQ_PENDING(x) (((x) >> 4) & 0x1) 1239 #define C_008008_ME0PIPE1_CF_RQ_PENDING 0xFFFFFFEF 1240 #define S_008008_ME0PIPE1_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 1241 #define G_008008_ME0PIPE1_PF_RQ_PENDING(x) (((x) >> 5) & 0x1) 1242 #define C_008008_ME0PIPE1_PF_RQ_PENDING 0xFFFFFFDF 1243 #define S_008008_ME1PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) 1244 #define G_008008_ME1PIPE0_RQ_PENDING(x) (((x) >> 6) & 0x1) 1245 #define C_008008_ME1PIPE0_RQ_PENDING 0xFFFFFFBF 1246 #define S_008008_ME1PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) 1247 #define G_008008_ME1PIPE1_RQ_PENDING(x) (((x) >> 7) & 0x1) 1248 #define C_008008_ME1PIPE1_RQ_PENDING 0xFFFFFF7F 1249 #define S_008008_ME1PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) 1250 #define G_008008_ME1PIPE2_RQ_PENDING(x) (((x) >> 8) & 0x1) 1251 #define C_008008_ME1PIPE2_RQ_PENDING 0xFFFFFEFF 1252 #define S_008008_RLC_BUSY_GFX6(x) (((unsigned)(x) & 0x1) << 8) /* <= gfx6 */ 1253 #define G_008008_RLC_BUSY_GFX6(x) (((x) >> 8) & 0x1) 1254 #define C_008008_RLC_BUSY_GFX6 0xFFFFFEFF 1255 #define S_008008_ME1PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) 1256 #define G_008008_ME1PIPE3_RQ_PENDING(x) (((x) >> 9) & 0x1) 1257 #define C_008008_ME1PIPE3_RQ_PENDING 0xFFFFFDFF 1258 #define S_008008_TC_BUSY_GFX6(x) (((unsigned)(x) & 0x1) << 9) /* <= gfx6 */ 1259 #define G_008008_TC_BUSY_GFX6(x) (((x) >> 9) & 0x1) 1260 #define C_008008_TC_BUSY_GFX6 0xFFFFFDFF 1261 #define S_008008_ME2PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 10) 1262 #define G_008008_ME2PIPE0_RQ_PENDING(x) (((x) >> 10) & 0x1) 1263 #define C_008008_ME2PIPE0_RQ_PENDING 0xFFFFFBFF 1264 #define S_008008_ME2PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 11) 1265 #define G_008008_ME2PIPE1_RQ_PENDING(x) (((x) >> 11) & 0x1) 1266 #define C_008008_ME2PIPE1_RQ_PENDING 0xFFFFF7FF 1267 #define S_008008_ME2PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 12) 1268 #define G_008008_ME2PIPE2_RQ_PENDING(x) (((x) >> 12) & 0x1) 1269 #define C_008008_ME2PIPE2_RQ_PENDING 0xFFFFEFFF 1270 #define S_008008_ME2PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 13) 1271 #define G_008008_ME2PIPE3_RQ_PENDING(x) (((x) >> 13) & 0x1) 1272 #define C_008008_ME2PIPE3_RQ_PENDING 0xFFFFDFFF 1273 #define S_008008_RLC_RQ_PENDING_GFX7(x) (((unsigned)(x) & 0x1) << 14) /* >= gfx7 */ 1274 #define G_008008_RLC_RQ_PENDING_GFX7(x) (((x) >> 14) & 0x1) 1275 #define C_008008_RLC_RQ_PENDING_GFX7 0xFFFFBFFF 1276 #define S_008008_UTCL2_BUSY(x) (((unsigned)(x) & 0x1) << 15) /* >= gfx9 */ 1277 #define G_008008_UTCL2_BUSY(x) (((x) >> 15) & 0x1) 1278 #define C_008008_UTCL2_BUSY 0xFFFF7FFF 1279 #define S_008008_EA_BUSY(x) (((unsigned)(x) & 0x1) << 16) /* >= gfx9 */ 1280 #define G_008008_EA_BUSY(x) (((x) >> 16) & 0x1) 1281 #define C_008008_EA_BUSY 0xFFFEFFFF 1282 #define S_008008_RMI_BUSY(x) (((unsigned)(x) & 0x1) << 17) /* >= gfx9 */ 1283 #define G_008008_RMI_BUSY(x) (((x) >> 17) & 0x1) 1284 #define C_008008_RMI_BUSY 0xFFFDFFFF 1285 #define S_008008_UTCL2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx9 */ 1286 #define G_008008_UTCL2_RQ_PENDING(x) (((x) >> 18) & 0x1) 1287 #define C_008008_UTCL2_RQ_PENDING 0xFFFBFFFF 1288 #define S_008008_CPF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 19) /* gfx9, gfx10 */ 1289 #define G_008008_CPF_RQ_PENDING(x) (((x) >> 19) & 0x1) 1290 #define C_008008_CPF_RQ_PENDING 0xFFF7FFFF 1291 #define S_008008_SDMA_SCH_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx103 */ 1292 #define G_008008_SDMA_SCH_RQ_PENDING(x) (((x) >> 19) & 0x1) 1293 #define C_008008_SDMA_SCH_RQ_PENDING 0xFFF7FFFF 1294 #define S_008008_EA_LINK_BUSY(x) (((unsigned)(x) & 0x1) << 20) /* >= gfx9 */ 1295 #define G_008008_EA_LINK_BUSY(x) (((x) >> 20) & 0x1) 1296 #define C_008008_EA_LINK_BUSY 0xFFEFFFFF 1297 #define S_008008_SDMA_BUSY(x) (((unsigned)(x) & 0x1) << 21) /* >= gfx10 */ 1298 #define G_008008_SDMA_BUSY(x) (((x) >> 21) & 0x1) 1299 #define C_008008_SDMA_BUSY 0xFFDFFFFF 1300 #define S_008008_SDMA0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 22) /* >= gfx10 */ 1301 #define G_008008_SDMA0_RQ_PENDING(x) (((x) >> 22) & 0x1) 1302 #define C_008008_SDMA0_RQ_PENDING 0xFFBFFFFF 1303 #define S_008008_SDMA1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 23) /* >= gfx10 */ 1304 #define G_008008_SDMA1_RQ_PENDING(x) (((x) >> 23) & 0x1) 1305 #define C_008008_SDMA1_RQ_PENDING 0xFF7FFFFF 1306 #define S_008008_RLC_BUSY_GFX7(x) (((unsigned)(x) & 0x1) << 24) /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 1307 #define G_008008_RLC_BUSY_GFX7(x) (((x) >> 24) & 0x1) 1308 #define C_008008_RLC_BUSY_GFX7 0xFEFFFFFF 1309 #define S_008008_SDMA2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx103 */ 1310 #define G_008008_SDMA2_RQ_PENDING(x) (((x) >> 24) & 0x1) 1311 #define C_008008_SDMA2_RQ_PENDING 0xFEFFFFFF 1312 #define S_008008_SDMA3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx103 */ 1313 #define G_008008_SDMA3_RQ_PENDING(x) (((x) >> 25) & 0x1) 1314 #define C_008008_SDMA3_RQ_PENDING 0xFDFFFFFF 1315 #define S_008008_TCP_BUSY_GFX10(x) (((unsigned)(x) & 0x1) << 25) /* gfx10 */ 1316 #define G_008008_TCP_BUSY_GFX10(x) (((x) >> 25) & 0x1) 1317 #define C_008008_TCP_BUSY_GFX10 0xFDFFFFFF 1318 #define S_008008_TC_BUSY_GFX7(x) (((unsigned)(x) & 0x1) << 25) /* gfx7, gfx8, gfx81, gfx9 */ 1319 #define G_008008_TC_BUSY_GFX7(x) (((x) >> 25) & 0x1) 1320 #define C_008008_TC_BUSY_GFX7 0xFDFFFFFF 1321 #define S_008008_RLC_BUSY_GFX103(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx103 */ 1322 #define G_008008_RLC_BUSY_GFX103(x) (((x) >> 26) & 0x1) 1323 #define C_008008_RLC_BUSY_GFX103 0xFBFFFFFF 1324 #define S_008008_TCC_CC_RESIDENT(x) (((unsigned)(x) & 0x1) << 26) /* gfx8, gfx81, gfx9 */ 1325 #define G_008008_TCC_CC_RESIDENT(x) (((x) >> 26) & 0x1) 1326 #define C_008008_TCC_CC_RESIDENT 0xFBFFFFFF 1327 #define S_008008_TCP_BUSY_GFX103(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx103 */ 1328 #define G_008008_TCP_BUSY_GFX103(x) (((x) >> 27) & 0x1) 1329 #define C_008008_TCP_BUSY_GFX103 0xF7FFFFFF 1330 #define S_008008_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1331 #define G_008008_CPF_BUSY(x) (((x) >> 28) & 0x1) 1332 #define C_008008_CPF_BUSY 0xEFFFFFFF 1333 #define S_008008_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1334 #define G_008008_CPC_BUSY(x) (((x) >> 29) & 0x1) 1335 #define C_008008_CPC_BUSY 0xDFFFFFFF 1336 #define S_008008_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1337 #define G_008008_CPG_BUSY(x) (((x) >> 30) & 0x1) 1338 #define C_008008_CPG_BUSY 0xBFFFFFFF 1339 #define S_008008_CPAXI_BUSY(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx9 */ 1340 #define G_008008_CPAXI_BUSY(x) (((x) >> 31) & 0x1) 1341 #define C_008008_CPAXI_BUSY 0x7FFFFFFF 1342 #define R_00800C_GRBM_PWR_CNTL 0x00800C /* <= gfx6 */ 1343 #define S_00800C_REQ_TYPE(x) (((unsigned)(x) & 0xF) << 0) 1344 #define G_00800C_REQ_TYPE(x) (((x) >> 0) & 0xF) 1345 #define C_00800C_REQ_TYPE 0xFFFFFFF0 1346 #define S_00800C_RSP_TYPE(x) (((unsigned)(x) & 0xF) << 4) 1347 #define G_00800C_RSP_TYPE(x) (((x) >> 4) & 0xF) 1348 #define C_00800C_RSP_TYPE 0xFFFFFF0F 1349 #define R_008010_GRBM_STATUS 0x008010 1350 #define S_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0xF) << 0) 1351 #define G_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((x) >> 0) & 0xF) 1352 #define C_008010_ME0PIPE0_CMDFIFO_AVAIL 0xFFFFFFF0 1353 #define S_008010_RSMU_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) /* gfx9, gfx10 */ 1354 #define G_008010_RSMU_RQ_PENDING(x) (((x) >> 5) & 0x1) 1355 #define C_008010_RSMU_RQ_PENDING 0xFFFFFFDF 1356 #define S_008010_SRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) /* <= gfx81 */ 1357 #define G_008010_SRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) 1358 #define C_008010_SRBM_RQ_PENDING 0xFFFFFFDF 1359 #define S_008010_ME0PIPE0_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) 1360 #define G_008010_ME0PIPE0_CF_RQ_PENDING(x) (((x) >> 7) & 0x1) 1361 #define C_008010_ME0PIPE0_CF_RQ_PENDING 0xFFFFFF7F 1362 #define S_008010_ME0PIPE0_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) 1363 #define G_008010_ME0PIPE0_PF_RQ_PENDING(x) (((x) >> 8) & 0x1) 1364 #define C_008010_ME0PIPE0_PF_RQ_PENDING 0xFFFFFEFF 1365 #define S_008010_GDS_DMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) 1366 #define G_008010_GDS_DMA_RQ_PENDING(x) (((x) >> 9) & 0x1) 1367 #define C_008010_GDS_DMA_RQ_PENDING 0xFFFFFDFF 1368 #define S_008010_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 12) 1369 #define G_008010_DB_CLEAN(x) (((x) >> 12) & 0x1) 1370 #define C_008010_DB_CLEAN 0xFFFFEFFF 1371 #define S_008010_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 13) 1372 #define G_008010_CB_CLEAN(x) (((x) >> 13) & 0x1) 1373 #define C_008010_CB_CLEAN 0xFFFFDFFF 1374 #define S_008010_TA_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1375 #define G_008010_TA_BUSY(x) (((x) >> 14) & 0x1) 1376 #define C_008010_TA_BUSY 0xFFFFBFFF 1377 #define S_008010_GDS_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1378 #define G_008010_GDS_BUSY(x) (((x) >> 15) & 0x1) 1379 #define C_008010_GDS_BUSY 0xFFFF7FFF 1380 #define S_008010_GE_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 16) /* >= gfx10 */ 1381 #define G_008010_GE_BUSY_NO_DMA(x) (((x) >> 16) & 0x1) 1382 #define C_008010_GE_BUSY_NO_DMA 0xFFFEFFFF 1383 #define S_008010_WD_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 16) /* <= gfx9 */ 1384 #define G_008010_WD_BUSY_NO_DMA(x) (((x) >> 16) & 0x1) 1385 #define C_008010_WD_BUSY_NO_DMA 0xFFFEFFFF 1386 #define S_008010_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 17) /* <= gfx9 */ 1387 #define G_008010_VGT_BUSY(x) (((x) >> 17) & 0x1) 1388 #define C_008010_VGT_BUSY 0xFFFDFFFF 1389 #define S_008010_IA_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 18) /* <= gfx9 */ 1390 #define G_008010_IA_BUSY_NO_DMA(x) (((x) >> 18) & 0x1) 1391 #define C_008010_IA_BUSY_NO_DMA 0xFFFBFFFF 1392 #define S_008010_IA_BUSY(x) (((unsigned)(x) & 0x1) << 19) /* <= gfx9 */ 1393 #define G_008010_IA_BUSY(x) (((x) >> 19) & 0x1) 1394 #define C_008010_IA_BUSY 0xFFF7FFFF 1395 #define S_008010_SX_BUSY(x) (((unsigned)(x) & 0x1) << 20) 1396 #define G_008010_SX_BUSY(x) (((x) >> 20) & 0x1) 1397 #define C_008010_SX_BUSY 0xFFEFFFFF 1398 #define S_008010_GE_BUSY(x) (((unsigned)(x) & 0x1) << 21) /* >= gfx10 */ 1399 #define G_008010_GE_BUSY(x) (((x) >> 21) & 0x1) 1400 #define C_008010_GE_BUSY 0xFFDFFFFF 1401 #define S_008010_WD_BUSY(x) (((unsigned)(x) & 0x1) << 21) /* <= gfx9 */ 1402 #define G_008010_WD_BUSY(x) (((x) >> 21) & 0x1) 1403 #define C_008010_WD_BUSY 0xFFDFFFFF 1404 #define S_008010_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1405 #define G_008010_SPI_BUSY(x) (((x) >> 22) & 0x1) 1406 #define C_008010_SPI_BUSY 0xFFBFFFFF 1407 #define S_008010_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 23) 1408 #define G_008010_BCI_BUSY(x) (((x) >> 23) & 0x1) 1409 #define C_008010_BCI_BUSY 0xFF7FFFFF 1410 #define S_008010_SC_BUSY(x) (((unsigned)(x) & 0x1) << 24) 1411 #define G_008010_SC_BUSY(x) (((x) >> 24) & 0x1) 1412 #define C_008010_SC_BUSY 0xFEFFFFFF 1413 #define S_008010_PA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 1414 #define G_008010_PA_BUSY(x) (((x) >> 25) & 0x1) 1415 #define C_008010_PA_BUSY 0xFDFFFFFF 1416 #define S_008010_DB_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1417 #define G_008010_DB_BUSY(x) (((x) >> 26) & 0x1) 1418 #define C_008010_DB_BUSY 0xFBFFFFFF 1419 #define S_008010_CP_COHERENCY_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1420 #define G_008010_CP_COHERENCY_BUSY(x) (((x) >> 28) & 0x1) 1421 #define C_008010_CP_COHERENCY_BUSY 0xEFFFFFFF 1422 #define S_008010_CP_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1423 #define G_008010_CP_BUSY(x) (((x) >> 29) & 0x1) 1424 #define C_008010_CP_BUSY 0xDFFFFFFF 1425 #define S_008010_CB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1426 #define G_008010_CB_BUSY(x) (((x) >> 30) & 0x1) 1427 #define C_008010_CB_BUSY 0xBFFFFFFF 1428 #define S_008010_GUI_ACTIVE(x) (((unsigned)(x) & 0x1) << 31) 1429 #define G_008010_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 1430 #define C_008010_GUI_ACTIVE 0x7FFFFFFF 1431 #define R_008014_GRBM_STATUS_SE0 0x008014 1432 #define S_008014_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) 1433 #define G_008014_DB_CLEAN(x) (((x) >> 1) & 0x1) 1434 #define C_008014_DB_CLEAN 0xFFFFFFFD 1435 #define S_008014_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) 1436 #define G_008014_CB_CLEAN(x) (((x) >> 2) & 0x1) 1437 #define C_008014_CB_CLEAN 0xFFFFFFFB 1438 #define S_008014_UTCL1_BUSY(x) (((unsigned)(x) & 0x1) << 3) /* >= gfx10 */ 1439 #define G_008014_UTCL1_BUSY(x) (((x) >> 3) & 0x1) 1440 #define C_008014_UTCL1_BUSY 0xFFFFFFF7 1441 #define S_008014_TCP_BUSY(x) (((unsigned)(x) & 0x1) << 4) /* >= gfx10 */ 1442 #define G_008014_TCP_BUSY(x) (((x) >> 4) & 0x1) 1443 #define C_008014_TCP_BUSY 0xFFFFFFEF 1444 #define S_008014_GL1CC_BUSY(x) (((unsigned)(x) & 0x1) << 5) /* >= gfx10 */ 1445 #define G_008014_GL1CC_BUSY(x) (((x) >> 5) & 0x1) 1446 #define C_008014_GL1CC_BUSY 0xFFFFFFDF 1447 #define S_008014_RMI_BUSY(x) (((unsigned)(x) & 0x1) << 21) /* >= gfx9 */ 1448 #define G_008014_RMI_BUSY(x) (((x) >> 21) & 0x1) 1449 #define C_008014_RMI_BUSY 0xFFDFFFFF 1450 #define S_008014_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1451 #define G_008014_BCI_BUSY(x) (((x) >> 22) & 0x1) 1452 #define C_008014_BCI_BUSY 0xFFBFFFFF 1453 #define S_008014_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) /* <= gfx9 */ 1454 #define G_008014_VGT_BUSY(x) (((x) >> 23) & 0x1) 1455 #define C_008014_VGT_BUSY 0xFF7FFFFF 1456 #define S_008014_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 1457 #define G_008014_PA_BUSY(x) (((x) >> 24) & 0x1) 1458 #define C_008014_PA_BUSY 0xFEFFFFFF 1459 #define S_008014_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 1460 #define G_008014_TA_BUSY(x) (((x) >> 25) & 0x1) 1461 #define C_008014_TA_BUSY 0xFDFFFFFF 1462 #define S_008014_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1463 #define G_008014_SX_BUSY(x) (((x) >> 26) & 0x1) 1464 #define C_008014_SX_BUSY 0xFBFFFFFF 1465 #define S_008014_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1466 #define G_008014_SPI_BUSY(x) (((x) >> 27) & 0x1) 1467 #define C_008014_SPI_BUSY 0xF7FFFFFF 1468 #define S_008014_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1469 #define G_008014_SC_BUSY(x) (((x) >> 29) & 0x1) 1470 #define C_008014_SC_BUSY 0xDFFFFFFF 1471 #define S_008014_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1472 #define G_008014_DB_BUSY(x) (((x) >> 30) & 0x1) 1473 #define C_008014_DB_BUSY 0xBFFFFFFF 1474 #define S_008014_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1475 #define G_008014_CB_BUSY(x) (((x) >> 31) & 0x1) 1476 #define C_008014_CB_BUSY 0x7FFFFFFF 1477 #define R_008018_GRBM_STATUS_SE1 0x008018 1478 #define R_00801C_GRBM_STATUS3 0x00801C /* >= gfx10 */ 1479 #define S_00801C_GRBM_RLC_INTR_CREDIT_PENDING(x) (((unsigned)(x) & 0x1) << 5) 1480 #define G_00801C_GRBM_RLC_INTR_CREDIT_PENDING(x) (((x) >> 5) & 0x1) 1481 #define C_00801C_GRBM_RLC_INTR_CREDIT_PENDING 0xFFFFFFDF 1482 #define S_00801C_GRBM_UTCL2_INTR_CREDIT_PENDING(x) (((unsigned)(x) & 0x1) << 6) 1483 #define G_00801C_GRBM_UTCL2_INTR_CREDIT_PENDING(x) (((x) >> 6) & 0x1) 1484 #define C_00801C_GRBM_UTCL2_INTR_CREDIT_PENDING 0xFFFFFFBF 1485 #define S_00801C_GRBM_CPF_INTR_CREDIT_PENDING(x) (((unsigned)(x) & 0x1) << 7) 1486 #define G_00801C_GRBM_CPF_INTR_CREDIT_PENDING(x) (((x) >> 7) & 0x1) 1487 #define C_00801C_GRBM_CPF_INTR_CREDIT_PENDING 0xFFFFFF7F 1488 #define S_00801C_MESPIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) 1489 #define G_00801C_MESPIPE0_RQ_PENDING(x) (((x) >> 8) & 0x1) 1490 #define C_00801C_MESPIPE0_RQ_PENDING 0xFFFFFEFF 1491 #define S_00801C_MESPIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) 1492 #define G_00801C_MESPIPE1_RQ_PENDING(x) (((x) >> 9) & 0x1) 1493 #define C_00801C_MESPIPE1_RQ_PENDING 0xFFFFFDFF 1494 #define S_00801C_MESPIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 10) 1495 #define G_00801C_MESPIPE2_RQ_PENDING(x) (((x) >> 10) & 0x1) 1496 #define C_00801C_MESPIPE2_RQ_PENDING 0xFFFFFBFF 1497 #define S_00801C_MESPIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 11) 1498 #define G_00801C_MESPIPE3_RQ_PENDING(x) (((x) >> 11) & 0x1) 1499 #define C_00801C_MESPIPE3_RQ_PENDING 0xFFFFF7FF 1500 #define S_00801C_PH_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1501 #define G_00801C_PH_BUSY(x) (((x) >> 13) & 0x1) 1502 #define C_00801C_PH_BUSY 0xFFFFDFFF 1503 #define S_00801C_CH_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1504 #define G_00801C_CH_BUSY(x) (((x) >> 14) & 0x1) 1505 #define C_00801C_CH_BUSY 0xFFFFBFFF 1506 #define S_00801C_GL2CC_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1507 #define G_00801C_GL2CC_BUSY(x) (((x) >> 15) & 0x1) 1508 #define C_00801C_GL2CC_BUSY 0xFFFF7FFF 1509 #define S_00801C_GL1CC_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1510 #define G_00801C_GL1CC_BUSY(x) (((x) >> 16) & 0x1) 1511 #define C_00801C_GL1CC_BUSY 0xFFFEFFFF 1512 #define S_00801C_GUS_LINK_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1513 #define G_00801C_GUS_LINK_BUSY(x) (((x) >> 28) & 0x1) 1514 #define C_00801C_GUS_LINK_BUSY 0xEFFFFFFF 1515 #define S_00801C_GUS_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1516 #define G_00801C_GUS_BUSY(x) (((x) >> 29) & 0x1) 1517 #define C_00801C_GUS_BUSY 0xDFFFFFFF 1518 #define S_00801C_UTCL1_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1519 #define G_00801C_UTCL1_BUSY(x) (((x) >> 30) & 0x1) 1520 #define C_00801C_UTCL1_BUSY 0xBFFFFFFF 1521 #define S_00801C_PMM_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1522 #define G_00801C_PMM_BUSY(x) (((x) >> 31) & 0x1) 1523 #define C_00801C_PMM_BUSY 0x7FFFFFFF 1524 #define R_008020_GRBM_SOFT_RESET 0x008020 /* <= gfx6 */ 1525 #define S_008020_SOFT_RESET_CP(x) (((unsigned)(x) & 0x1) << 0) 1526 #define G_008020_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) 1527 #define C_008020_SOFT_RESET_CP 0xFFFFFFFE 1528 #define S_008020_SOFT_RESET_RLC(x) (((unsigned)(x) & 0x1) << 2) 1529 #define G_008020_SOFT_RESET_RLC(x) (((x) >> 2) & 0x1) 1530 #define C_008020_SOFT_RESET_RLC 0xFFFFFFFB 1531 #define S_008020_SOFT_RESET_GFX(x) (((unsigned)(x) & 0x1) << 16) 1532 #define G_008020_SOFT_RESET_GFX(x) (((x) >> 16) & 0x1) 1533 #define C_008020_SOFT_RESET_GFX 0xFFFEFFFF 1534 #define S_008020_SOFT_RESET_CPF(x) (((unsigned)(x) & 0x1) << 17) 1535 #define G_008020_SOFT_RESET_CPF(x) (((x) >> 17) & 0x1) 1536 #define C_008020_SOFT_RESET_CPF 0xFFFDFFFF 1537 #define S_008020_SOFT_RESET_CPC(x) (((unsigned)(x) & 0x1) << 18) 1538 #define G_008020_SOFT_RESET_CPC(x) (((x) >> 18) & 0x1) 1539 #define C_008020_SOFT_RESET_CPC 0xFFFBFFFF 1540 #define S_008020_SOFT_RESET_CPG(x) (((unsigned)(x) & 0x1) << 19) 1541 #define G_008020_SOFT_RESET_CPG(x) (((x) >> 19) & 0x1) 1542 #define C_008020_SOFT_RESET_CPG 0xFFF7FFFF 1543 #define R_008024_GRBM_DEBUG_CNTL 0x008024 /* <= gfx6 */ 1544 #define S_008024_GRBM_DEBUG_INDEX(x) (((unsigned)(x) & 0x3F) << 0) 1545 #define G_008024_GRBM_DEBUG_INDEX(x) (((x) >> 0) & 0x3F) 1546 #define C_008024_GRBM_DEBUG_INDEX 0xFFFFFFC0 1547 #define R_008028_GRBM_DEBUG_DATA 0x008028 /* <= gfx6 */ 1548 #define R_00802C_GRBM_GFX_INDEX 0x00802C /* <= gfx6 */ 1549 #define S_00802C_INSTANCE_INDEX(x) (((unsigned)(x) & 0xFF) << 0) 1550 #define G_00802C_INSTANCE_INDEX(x) (((x) >> 0) & 0xFF) 1551 #define C_00802C_INSTANCE_INDEX 0xFFFFFF00 1552 #define S_00802C_SH_INDEX(x) (((unsigned)(x) & 0xFF) << 8) 1553 #define G_00802C_SH_INDEX(x) (((x) >> 8) & 0xFF) 1554 #define C_00802C_SH_INDEX 0xFFFF00FF 1555 #define S_00802C_SE_INDEX(x) (((unsigned)(x) & 0xFF) << 16) 1556 #define G_00802C_SE_INDEX(x) (((x) >> 16) & 0xFF) 1557 #define C_00802C_SE_INDEX 0xFF00FFFF 1558 #define S_00802C_SH_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 29) 1559 #define G_00802C_SH_BROADCAST_WRITES(x) (((x) >> 29) & 0x1) 1560 #define C_00802C_SH_BROADCAST_WRITES 0xDFFFFFFF 1561 #define S_00802C_INSTANCE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 30) 1562 #define G_00802C_INSTANCE_BROADCAST_WRITES(x) (((x) >> 30) & 0x1) 1563 #define C_00802C_INSTANCE_BROADCAST_WRITES 0xBFFFFFFF 1564 #define S_00802C_SE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 31) 1565 #define G_00802C_SE_BROADCAST_WRITES(x) (((x) >> 31) & 0x1) 1566 #define C_00802C_SE_BROADCAST_WRITES 0x7FFFFFFF 1567 #define R_008030_GRBM_GFX_CLKEN_CNTL 0x008030 /* <= gfx6 */ 1568 #define S_008030_PREFIX_DELAY_CNT(x) (((unsigned)(x) & 0xF) << 0) 1569 #define G_008030_PREFIX_DELAY_CNT(x) (((x) >> 0) & 0xF) 1570 #define C_008030_PREFIX_DELAY_CNT 0xFFFFFFF0 1571 #define S_008030_POST_DELAY_CNT(x) (((unsigned)(x) & 0x1F) << 8) 1572 #define G_008030_POST_DELAY_CNT(x) (((x) >> 8) & 0x1F) 1573 #define C_008030_POST_DELAY_CNT 0xFFFFE0FF 1574 #define R_008034_GRBM_WAIT_IDLE_CLOCKS 0x008034 /* <= gfx6 */ 1575 #define S_008034_WAIT_IDLE_CLOCKS(x) (((unsigned)(x) & 0xFF) << 0) 1576 #define G_008034_WAIT_IDLE_CLOCKS(x) (((x) >> 0) & 0xFF) 1577 #define C_008034_WAIT_IDLE_CLOCKS 0xFFFFFF00 1578 #define R_008038_GRBM_STATUS_SE2 0x008038 /* >= gfx7 */ 1579 #define R_00803C_GRBM_STATUS_SE3 0x00803C /* >= gfx7 */ 1580 #define R_008050_GRBM_DEBUG 0x008050 /* <= gfx6 */ 1581 #define S_008050_IGNORE_RDY(x) (((unsigned)(x) & 0x1) << 1) 1582 #define G_008050_IGNORE_RDY(x) (((x) >> 1) & 0x1) 1583 #define C_008050_IGNORE_RDY 0xFFFFFFFD 1584 #define S_008050_IGNORE_FAO(x) (((unsigned)(x) & 0x1) << 5) 1585 #define G_008050_IGNORE_FAO(x) (((x) >> 5) & 0x1) 1586 #define C_008050_IGNORE_FAO 0xFFFFFFDF 1587 #define S_008050_DISABLE_READ_TIMEOUT(x) (((unsigned)(x) & 0x1) << 6) 1588 #define G_008050_DISABLE_READ_TIMEOUT(x) (((x) >> 6) & 0x1) 1589 #define C_008050_DISABLE_READ_TIMEOUT 0xFFFFFFBF 1590 #define S_008050_SNAPSHOT_FREE_CNTRS(x) (((unsigned)(x) & 0x1) << 7) 1591 #define G_008050_SNAPSHOT_FREE_CNTRS(x) (((x) >> 7) & 0x1) 1592 #define C_008050_SNAPSHOT_FREE_CNTRS 0xFFFFFF7F 1593 #define S_008050_HYSTERESIS_GUI_ACTIVE(x) (((unsigned)(x) & 0xF) << 8) 1594 #define G_008050_HYSTERESIS_GUI_ACTIVE(x) (((x) >> 8) & 0xF) 1595 #define C_008050_HYSTERESIS_GUI_ACTIVE 0xFFFFF0FF 1596 #define S_008050_GFX_CLOCK_DOMAIN_OVERRIDE(x) (((unsigned)(x) & 0x1) << 12) 1597 #define G_008050_GFX_CLOCK_DOMAIN_OVERRIDE(x) (((x) >> 12) & 0x1) 1598 #define C_008050_GFX_CLOCK_DOMAIN_OVERRIDE 0xFFFFEFFF 1599 #define R_008054_GRBM_DEBUG_SNAPSHOT 0x008054 /* <= gfx6 */ 1600 #define S_008054_CPF_RDY(x) (((unsigned)(x) & 0x1) << 0) 1601 #define G_008054_CPF_RDY(x) (((x) >> 0) & 0x1) 1602 #define C_008054_CPF_RDY 0xFFFFFFFE 1603 #define S_008054_CPG_RDY(x) (((unsigned)(x) & 0x1) << 1) 1604 #define G_008054_CPG_RDY(x) (((x) >> 1) & 0x1) 1605 #define C_008054_CPG_RDY 0xFFFFFFFD 1606 #define S_008054_SRBM_RDY(x) (((unsigned)(x) & 0x1) << 1) 1607 #define G_008054_SRBM_RDY(x) (((x) >> 1) & 0x1) 1608 #define C_008054_SRBM_RDY 0xFFFFFFFD 1609 #define S_008054_WD_ME0PIPE0_RDY(x) (((unsigned)(x) & 0x1) << 3) 1610 #define G_008054_WD_ME0PIPE0_RDY(x) (((x) >> 3) & 0x1) 1611 #define C_008054_WD_ME0PIPE0_RDY 0xFFFFFFF7 1612 #define S_008054_WD_ME0PIPE1_RDY(x) (((unsigned)(x) & 0x1) << 4) 1613 #define G_008054_WD_ME0PIPE1_RDY(x) (((x) >> 4) & 0x1) 1614 #define C_008054_WD_ME0PIPE1_RDY 0xFFFFFFEF 1615 #define S_008054_SE0SPI_ME0PIPE0_RDY0(x) (((unsigned)(x) & 0x1) << 6) 1616 #define G_008054_SE0SPI_ME0PIPE0_RDY0(x) (((x) >> 6) & 0x1) 1617 #define C_008054_SE0SPI_ME0PIPE0_RDY0 0xFFFFFFBF 1618 #define S_008054_SE0SPI_ME0PIPE1_RDY0(x) (((unsigned)(x) & 0x1) << 7) 1619 #define G_008054_SE0SPI_ME0PIPE1_RDY0(x) (((x) >> 7) & 0x1) 1620 #define C_008054_SE0SPI_ME0PIPE1_RDY0 0xFFFFFF7F 1621 #define S_008054_SE1SPI_ME0PIPE0_RDY0(x) (((unsigned)(x) & 0x1) << 8) 1622 #define G_008054_SE1SPI_ME0PIPE0_RDY0(x) (((x) >> 8) & 0x1) 1623 #define C_008054_SE1SPI_ME0PIPE0_RDY0 0xFFFFFEFF 1624 #define S_008054_GDS_RDY(x) (((unsigned)(x) & 0x1) << 9) 1625 #define G_008054_GDS_RDY(x) (((x) >> 9) & 0x1) 1626 #define C_008054_GDS_RDY 0xFFFFFDFF 1627 #define S_008054_SE1SPI_ME0PIPE1_RDY0(x) (((unsigned)(x) & 0x1) << 9) 1628 #define G_008054_SE1SPI_ME0PIPE1_RDY0(x) (((x) >> 9) & 0x1) 1629 #define C_008054_SE1SPI_ME0PIPE1_RDY0 0xFFFFFDFF 1630 #define S_008054_SE2SPI_ME0PIPE0_RDY0(x) (((unsigned)(x) & 0x1) << 10) 1631 #define G_008054_SE2SPI_ME0PIPE0_RDY0(x) (((x) >> 10) & 0x1) 1632 #define C_008054_SE2SPI_ME0PIPE0_RDY0 0xFFFFFBFF 1633 #define S_008054_SE2SPI_ME0PIPE1_RDY0(x) (((unsigned)(x) & 0x1) << 11) 1634 #define G_008054_SE2SPI_ME0PIPE1_RDY0(x) (((x) >> 11) & 0x1) 1635 #define C_008054_SE2SPI_ME0PIPE1_RDY0 0xFFFFF7FF 1636 #define S_008054_SE3SPI_ME0PIPE0_RDY0(x) (((unsigned)(x) & 0x1) << 12) 1637 #define G_008054_SE3SPI_ME0PIPE0_RDY0(x) (((x) >> 12) & 0x1) 1638 #define C_008054_SE3SPI_ME0PIPE0_RDY0 0xFFFFEFFF 1639 #define S_008054_SE3SPI_ME0PIPE1_RDY0(x) (((unsigned)(x) & 0x1) << 13) 1640 #define G_008054_SE3SPI_ME0PIPE1_RDY0(x) (((x) >> 13) & 0x1) 1641 #define C_008054_SE3SPI_ME0PIPE1_RDY0 0xFFFFDFFF 1642 #define S_008054_SE0SPI_ME0PIPE0_RDY1(x) (((unsigned)(x) & 0x1) << 14) 1643 #define G_008054_SE0SPI_ME0PIPE0_RDY1(x) (((x) >> 14) & 0x1) 1644 #define C_008054_SE0SPI_ME0PIPE0_RDY1 0xFFFFBFFF 1645 #define S_008054_SE0SPI_ME0PIPE1_RDY1(x) (((unsigned)(x) & 0x1) << 15) 1646 #define G_008054_SE0SPI_ME0PIPE1_RDY1(x) (((x) >> 15) & 0x1) 1647 #define C_008054_SE0SPI_ME0PIPE1_RDY1 0xFFFF7FFF 1648 #define S_008054_SE1SPI_ME0PIPE0_RDY1(x) (((unsigned)(x) & 0x1) << 16) 1649 #define G_008054_SE1SPI_ME0PIPE0_RDY1(x) (((x) >> 16) & 0x1) 1650 #define C_008054_SE1SPI_ME0PIPE0_RDY1 0xFFFEFFFF 1651 #define S_008054_SE1SPI_ME0PIPE1_RDY1(x) (((unsigned)(x) & 0x1) << 17) 1652 #define G_008054_SE1SPI_ME0PIPE1_RDY1(x) (((x) >> 17) & 0x1) 1653 #define C_008054_SE1SPI_ME0PIPE1_RDY1 0xFFFDFFFF 1654 #define S_008054_SE2SPI_ME0PIPE0_RDY1(x) (((unsigned)(x) & 0x1) << 18) 1655 #define G_008054_SE2SPI_ME0PIPE0_RDY1(x) (((x) >> 18) & 0x1) 1656 #define C_008054_SE2SPI_ME0PIPE0_RDY1 0xFFFBFFFF 1657 #define S_008054_SE2SPI_ME0PIPE1_RDY1(x) (((unsigned)(x) & 0x1) << 19) 1658 #define G_008054_SE2SPI_ME0PIPE1_RDY1(x) (((x) >> 19) & 0x1) 1659 #define C_008054_SE2SPI_ME0PIPE1_RDY1 0xFFF7FFFF 1660 #define S_008054_SE3SPI_ME0PIPE0_RDY1(x) (((unsigned)(x) & 0x1) << 20) 1661 #define G_008054_SE3SPI_ME0PIPE0_RDY1(x) (((x) >> 20) & 0x1) 1662 #define C_008054_SE3SPI_ME0PIPE0_RDY1 0xFFEFFFFF 1663 #define S_008054_SE3SPI_ME0PIPE1_RDY1(x) (((unsigned)(x) & 0x1) << 21) 1664 #define G_008054_SE3SPI_ME0PIPE1_RDY1(x) (((x) >> 21) & 0x1) 1665 #define C_008054_SE3SPI_ME0PIPE1_RDY1 0xFFDFFFFF 1666 #define R_008058_GRBM_READ_ERROR 0x008058 /* <= gfx6 */ 1667 #define S_008058_READ_ADDRESS(x) (((unsigned)(x) & 0xFFFF) << 2) 1668 #define G_008058_READ_ADDRESS(x) (((x) >> 2) & 0xFFFF) 1669 #define C_008058_READ_ADDRESS 0xFFFC0003 1670 #define S_008058_READ_PIPEID(x) (((unsigned)(x) & 0x3) << 20) 1671 #define G_008058_READ_PIPEID(x) (((x) >> 20) & 0x3) 1672 #define C_008058_READ_PIPEID 0xFFCFFFFF 1673 #define S_008058_READ_MEID(x) (((unsigned)(x) & 0x3) << 22) 1674 #define G_008058_READ_MEID(x) (((x) >> 22) & 0x3) 1675 #define C_008058_READ_MEID 0xFF3FFFFF 1676 #define S_008058_READ_ERROR(x) (((unsigned)(x) & 0x1) << 31) 1677 #define G_008058_READ_ERROR(x) (((x) >> 31) & 0x1) 1678 #define C_008058_READ_ERROR 0x7FFFFFFF 1679 #define R_008060_GRBM_INT_CNTL 0x008060 /* <= gfx6 */ 1680 #define S_008060_RDERR_INT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 1681 #define G_008060_RDERR_INT_ENABLE(x) (((x) >> 0) & 0x1) 1682 #define C_008060_RDERR_INT_ENABLE 0xFFFFFFFE 1683 #define S_008060_GUI_IDLE_INT_ENABLE(x) (((unsigned)(x) & 0x1) << 19) 1684 #define G_008060_GUI_IDLE_INT_ENABLE(x) (((x) >> 19) & 0x1) 1685 #define C_008060_GUI_IDLE_INT_ENABLE 0xFFF7FFFF 1686 #define R_008070_GRBM_PERFCOUNTER0_SELECT 0x008070 /* <= gfx6 */ 1687 #define S_008070_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 1688 #define G_008070_PERF_SEL(x) (((x) >> 0) & 0x3F) 1689 #define C_008070_PERF_SEL 0xFFFFFFC0 1690 #define S_008070_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 1691 #define G_008070_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 1692 #define C_008070_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 1693 #define S_008070_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 1694 #define G_008070_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 1695 #define C_008070_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 1696 #define S_008070_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 1697 #define G_008070_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 1698 #define C_008070_VGT_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 1699 #define S_008070_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 1700 #define G_008070_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 1701 #define C_008070_TA_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 1702 #define S_008070_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 14) 1703 #define G_008070_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 14) & 0x1) 1704 #define C_008070_SX_BUSY_USER_DEFINED_MASK 0xFFFFBFFF 1705 #define S_008070_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 1706 #define G_008070_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 1707 #define C_008070_SPI_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 1708 #define S_008070_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 1709 #define G_008070_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 1710 #define C_008070_SC_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 1711 #define S_008070_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 1712 #define G_008070_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 1713 #define C_008070_PA_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 1714 #define S_008070_GRBM_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 1715 #define G_008070_GRBM_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 1716 #define C_008070_GRBM_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 1717 #define S_008070_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 1718 #define G_008070_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 1719 #define C_008070_DB_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 1720 #define S_008070_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 1721 #define G_008070_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 1722 #define C_008070_CB_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 1723 #define S_008070_CP_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 22) 1724 #define G_008070_CP_BUSY_USER_DEFINED_MASK(x) (((x) >> 22) & 0x1) 1725 #define C_008070_CP_BUSY_USER_DEFINED_MASK 0xFFBFFFFF 1726 #define S_008070_IA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 23) 1727 #define G_008070_IA_BUSY_USER_DEFINED_MASK(x) (((x) >> 23) & 0x1) 1728 #define C_008070_IA_BUSY_USER_DEFINED_MASK 0xFF7FFFFF 1729 #define S_008070_GDS_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 24) 1730 #define G_008070_GDS_BUSY_USER_DEFINED_MASK(x) (((x) >> 24) & 0x1) 1731 #define C_008070_GDS_BUSY_USER_DEFINED_MASK 0xFEFFFFFF 1732 #define S_008070_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 25) 1733 #define G_008070_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 25) & 0x1) 1734 #define C_008070_BCI_BUSY_USER_DEFINED_MASK 0xFDFFFFFF 1735 #define S_008070_RLC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 26) 1736 #define G_008070_RLC_BUSY_USER_DEFINED_MASK(x) (((x) >> 26) & 0x1) 1737 #define C_008070_RLC_BUSY_USER_DEFINED_MASK 0xFBFFFFFF 1738 #define S_008070_TC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 27) 1739 #define G_008070_TC_BUSY_USER_DEFINED_MASK(x) (((x) >> 27) & 0x1) 1740 #define C_008070_TC_BUSY_USER_DEFINED_MASK 0xF7FFFFFF 1741 #define S_008070_WD_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 28) 1742 #define G_008070_WD_BUSY_USER_DEFINED_MASK(x) (((x) >> 28) & 0x1) 1743 #define C_008070_WD_BUSY_USER_DEFINED_MASK 0xEFFFFFFF 1744 #define R_008074_GRBM_PERFCOUNTER1_SELECT 0x008074 /* <= gfx6 */ 1745 #define R_008078_GRBM_PERFCOUNTER0_LO 0x008078 /* <= gfx6 */ 1746 #define R_00807C_GRBM_PERFCOUNTER0_HI 0x00807C /* <= gfx6 */ 1747 #define R_008080_GRBM_PERFCOUNTER1_LO 0x008080 /* <= gfx6 */ 1748 #define R_008084_GRBM_PERFCOUNTER1_HI 0x008084 /* <= gfx6 */ 1749 #define R_008098_GRBM_SE0_PERFCOUNTER_SELECT 0x008098 /* <= gfx6 */ 1750 #define S_008098_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 1751 #define G_008098_PERF_SEL(x) (((x) >> 0) & 0x3F) 1752 #define C_008098_PERF_SEL 0xFFFFFFC0 1753 #define S_008098_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 1754 #define G_008098_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 1755 #define C_008098_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 1756 #define S_008098_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 1757 #define G_008098_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 1758 #define C_008098_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 1759 #define S_008098_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 1760 #define G_008098_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 1761 #define C_008098_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 1762 #define S_008098_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 1763 #define G_008098_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 1764 #define C_008098_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 1765 #define S_008098_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 1766 #define G_008098_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 1767 #define C_008098_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 1768 #define S_008098_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 1769 #define G_008098_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 1770 #define C_008098_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 1771 #define S_008098_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 1772 #define G_008098_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 1773 #define C_008098_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 1774 #define S_008098_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 1775 #define G_008098_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 1776 #define C_008098_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 1777 #define S_008098_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 1778 #define G_008098_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 1779 #define C_008098_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 1780 #define S_008098_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 1781 #define G_008098_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 1782 #define C_008098_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 1783 #define S_008098_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 1784 #define G_008098_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 1785 #define C_008098_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 1786 #define R_00809C_GRBM_SE1_PERFCOUNTER_SELECT 0x00809C /* <= gfx6 */ 1787 #define R_0080A8_GRBM_SE0_PERFCOUNTER_LO 0x0080A8 /* <= gfx6 */ 1788 #define R_0080AC_GRBM_SE0_PERFCOUNTER_HI 0x0080AC /* <= gfx6 */ 1789 #define R_0080B0_GRBM_SE1_PERFCOUNTER_LO 0x0080B0 /* <= gfx6 */ 1790 #define R_0080B4_GRBM_SE1_PERFCOUNTER_HI 0x0080B4 /* <= gfx6 */ 1791 #define R_0080F0_DEBUG_INDEX 0x0080F0 /* <= gfx6 */ 1792 #define S_0080F0_DEBUG_INDEX(x) (((unsigned)(x) & 0x3FFFF) << 0) 1793 #define G_0080F0_DEBUG_INDEX(x) (((x) >> 0) & 0x3FFFF) 1794 #define C_0080F0_DEBUG_INDEX 0xFFFC0000 1795 #define R_0080F4_DEBUG_DATA 0x0080F4 /* <= gfx6 */ 1796 #define R_0080FC_GRBM_NOWHERE 0x0080FC /* <= gfx6 */ 1797 #define R_008100_GRBM_SCRATCH_REG0 0x008100 /* <= gfx6 */ 1798 #define R_008104_GRBM_SCRATCH_REG1 0x008104 /* <= gfx6 */ 1799 #define R_008108_GRBM_SCRATCH_REG2 0x008108 /* <= gfx6 */ 1800 #define R_00810C_GRBM_SCRATCH_REG3 0x00810C /* <= gfx6 */ 1801 #define R_008110_GRBM_SCRATCH_REG4 0x008110 /* <= gfx6 */ 1802 #define R_008114_GRBM_SCRATCH_REG5 0x008114 /* <= gfx6 */ 1803 #define R_008118_GRBM_SCRATCH_REG6 0x008118 /* <= gfx6 */ 1804 #define R_00811C_GRBM_SCRATCH_REG7 0x00811C /* <= gfx6 */ 1805 #define R_008210_CP_CPC_STATUS 0x008210 /* >= gfx7 */ 1806 #define S_008210_MEC1_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1807 #define G_008210_MEC1_BUSY(x) (((x) >> 0) & 0x1) 1808 #define C_008210_MEC1_BUSY 0xFFFFFFFE 1809 #define S_008210_MEC2_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1810 #define G_008210_MEC2_BUSY(x) (((x) >> 1) & 0x1) 1811 #define C_008210_MEC2_BUSY 0xFFFFFFFD 1812 #define S_008210_DC0_BUSY(x) (((unsigned)(x) & 0x1) << 2) 1813 #define G_008210_DC0_BUSY(x) (((x) >> 2) & 0x1) 1814 #define C_008210_DC0_BUSY 0xFFFFFFFB 1815 #define S_008210_DC1_BUSY(x) (((unsigned)(x) & 0x1) << 3) 1816 #define G_008210_DC1_BUSY(x) (((x) >> 3) & 0x1) 1817 #define C_008210_DC1_BUSY 0xFFFFFFF7 1818 #define S_008210_RCIU1_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1819 #define G_008210_RCIU1_BUSY(x) (((x) >> 4) & 0x1) 1820 #define C_008210_RCIU1_BUSY 0xFFFFFFEF 1821 #define S_008210_RCIU2_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1822 #define G_008210_RCIU2_BUSY(x) (((x) >> 5) & 0x1) 1823 #define C_008210_RCIU2_BUSY 0xFFFFFFDF 1824 #define S_008210_ROQ1_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1825 #define G_008210_ROQ1_BUSY(x) (((x) >> 6) & 0x1) 1826 #define C_008210_ROQ1_BUSY 0xFFFFFFBF 1827 #define S_008210_ROQ2_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1828 #define G_008210_ROQ2_BUSY(x) (((x) >> 7) & 0x1) 1829 #define C_008210_ROQ2_BUSY 0xFFFFFF7F 1830 #define S_008210_MIU_RDREQ_BUSY(x) (((unsigned)(x) & 0x1) << 8) /* gfx7 */ 1831 #define G_008210_MIU_RDREQ_BUSY(x) (((x) >> 8) & 0x1) 1832 #define C_008210_MIU_RDREQ_BUSY 0xFFFFFEFF 1833 #define S_008210_MIU_WRREQ_BUSY(x) (((unsigned)(x) & 0x1) << 9) /* gfx7 */ 1834 #define G_008210_MIU_WRREQ_BUSY(x) (((x) >> 9) & 0x1) 1835 #define C_008210_MIU_WRREQ_BUSY 0xFFFFFDFF 1836 #define S_008210_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1837 #define G_008210_TCIU_BUSY(x) (((x) >> 10) & 0x1) 1838 #define C_008210_TCIU_BUSY 0xFFFFFBFF 1839 #define S_008210_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1840 #define G_008210_SCRATCH_RAM_BUSY(x) (((x) >> 11) & 0x1) 1841 #define C_008210_SCRATCH_RAM_BUSY 0xFFFFF7FF 1842 #define S_008210_QU_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1843 #define G_008210_QU_BUSY(x) (((x) >> 12) & 0x1) 1844 #define C_008210_QU_BUSY 0xFFFFEFFF 1845 #define S_008210_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 13) /* gfx8, gfx81 */ 1846 #define G_008210_ATCL2IU_BUSY(x) (((x) >> 13) & 0x1) 1847 #define C_008210_ATCL2IU_BUSY 0xFFFFDFFF 1848 #define S_008210_UTCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 13) /* >= gfx9 */ 1849 #define G_008210_UTCL2IU_BUSY(x) (((x) >> 13) & 0x1) 1850 #define C_008210_UTCL2IU_BUSY 0xFFFFDFFF 1851 #define S_008210_SAVE_RESTORE_BUSY(x) (((unsigned)(x) & 0x1) << 14) /* >= gfx9 */ 1852 #define G_008210_SAVE_RESTORE_BUSY(x) (((x) >> 14) & 0x1) 1853 #define C_008210_SAVE_RESTORE_BUSY 0xFFFFBFFF 1854 #define S_008210_GCRIU_BUSY(x) (((unsigned)(x) & 0x1) << 15) /* >= gfx10 */ 1855 #define G_008210_GCRIU_BUSY(x) (((x) >> 15) & 0x1) 1856 #define C_008210_GCRIU_BUSY 0xFFFF7FFF 1857 #define S_008210_MES_BUSY(x) (((unsigned)(x) & 0x1) << 16) /* >= gfx10 */ 1858 #define G_008210_MES_BUSY(x) (((x) >> 16) & 0x1) 1859 #define C_008210_MES_BUSY 0xFFFEFFFF 1860 #define S_008210_MES_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 17) /* >= gfx10 */ 1861 #define G_008210_MES_SCRATCH_RAM_BUSY(x) (((x) >> 17) & 0x1) 1862 #define C_008210_MES_SCRATCH_RAM_BUSY 0xFFFDFFFF 1863 #define S_008210_RCIU3_BUSY(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx10 */ 1864 #define G_008210_RCIU3_BUSY(x) (((x) >> 18) & 0x1) 1865 #define C_008210_RCIU3_BUSY 0xFFFBFFFF 1866 #define S_008210_MES_INSTRUCTION_CACHE_BUSY(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx10 */ 1867 #define G_008210_MES_INSTRUCTION_CACHE_BUSY(x) (((x) >> 19) & 0x1) 1868 #define C_008210_MES_INSTRUCTION_CACHE_BUSY 0xFFF7FFFF 1869 #define S_008210_CPG_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1870 #define G_008210_CPG_CPC_BUSY(x) (((x) >> 29) & 0x1) 1871 #define C_008210_CPG_CPC_BUSY 0xDFFFFFFF 1872 #define S_008210_CPF_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1873 #define G_008210_CPF_CPC_BUSY(x) (((x) >> 30) & 0x1) 1874 #define C_008210_CPF_CPC_BUSY 0xBFFFFFFF 1875 #define S_008210_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1876 #define G_008210_CPC_BUSY(x) (((x) >> 31) & 0x1) 1877 #define C_008210_CPC_BUSY 0x7FFFFFFF 1878 #define R_008214_CP_CPC_BUSY_STAT 0x008214 /* >= gfx7 */ 1879 #define S_008214_MEC1_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1880 #define G_008214_MEC1_LOAD_BUSY(x) (((x) >> 0) & 0x1) 1881 #define C_008214_MEC1_LOAD_BUSY 0xFFFFFFFE 1882 #define S_008214_MEC1_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1883 #define G_008214_MEC1_SEMAPOHRE_BUSY(x) (((x) >> 1) & 0x1) 1884 #define C_008214_MEC1_SEMAPOHRE_BUSY 0xFFFFFFFD 1885 #define S_008214_MEC1_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 2) 1886 #define G_008214_MEC1_MUTEX_BUSY(x) (((x) >> 2) & 0x1) 1887 #define C_008214_MEC1_MUTEX_BUSY 0xFFFFFFFB 1888 #define S_008214_MEC1_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 3) 1889 #define G_008214_MEC1_MESSAGE_BUSY(x) (((x) >> 3) & 0x1) 1890 #define C_008214_MEC1_MESSAGE_BUSY 0xFFFFFFF7 1891 #define S_008214_MEC1_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1892 #define G_008214_MEC1_EOP_QUEUE_BUSY(x) (((x) >> 4) & 0x1) 1893 #define C_008214_MEC1_EOP_QUEUE_BUSY 0xFFFFFFEF 1894 #define S_008214_MEC1_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1895 #define G_008214_MEC1_IQ_QUEUE_BUSY(x) (((x) >> 5) & 0x1) 1896 #define C_008214_MEC1_IQ_QUEUE_BUSY 0xFFFFFFDF 1897 #define S_008214_MEC1_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1898 #define G_008214_MEC1_IB_QUEUE_BUSY(x) (((x) >> 6) & 0x1) 1899 #define C_008214_MEC1_IB_QUEUE_BUSY 0xFFFFFFBF 1900 #define S_008214_MEC1_TC_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1901 #define G_008214_MEC1_TC_BUSY(x) (((x) >> 7) & 0x1) 1902 #define C_008214_MEC1_TC_BUSY 0xFFFFFF7F 1903 #define S_008214_MEC1_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1904 #define G_008214_MEC1_DMA_BUSY(x) (((x) >> 8) & 0x1) 1905 #define C_008214_MEC1_DMA_BUSY 0xFFFFFEFF 1906 #define S_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1907 #define G_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((x) >> 9) & 0x1) 1908 #define C_008214_MEC1_PARTIAL_FLUSH_BUSY 0xFFFFFDFF 1909 #define S_008214_MEC1_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1910 #define G_008214_MEC1_PIPE0_BUSY(x) (((x) >> 10) & 0x1) 1911 #define C_008214_MEC1_PIPE0_BUSY 0xFFFFFBFF 1912 #define S_008214_MEC1_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1913 #define G_008214_MEC1_PIPE1_BUSY(x) (((x) >> 11) & 0x1) 1914 #define C_008214_MEC1_PIPE1_BUSY 0xFFFFF7FF 1915 #define S_008214_MEC1_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1916 #define G_008214_MEC1_PIPE2_BUSY(x) (((x) >> 12) & 0x1) 1917 #define C_008214_MEC1_PIPE2_BUSY 0xFFFFEFFF 1918 #define S_008214_MEC1_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1919 #define G_008214_MEC1_PIPE3_BUSY(x) (((x) >> 13) & 0x1) 1920 #define C_008214_MEC1_PIPE3_BUSY 0xFFFFDFFF 1921 #define S_008214_MEC2_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1922 #define G_008214_MEC2_LOAD_BUSY(x) (((x) >> 16) & 0x1) 1923 #define C_008214_MEC2_LOAD_BUSY 0xFFFEFFFF 1924 #define S_008214_MEC2_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1925 #define G_008214_MEC2_SEMAPOHRE_BUSY(x) (((x) >> 17) & 0x1) 1926 #define C_008214_MEC2_SEMAPOHRE_BUSY 0xFFFDFFFF 1927 #define S_008214_MEC2_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 18) 1928 #define G_008214_MEC2_MUTEX_BUSY(x) (((x) >> 18) & 0x1) 1929 #define C_008214_MEC2_MUTEX_BUSY 0xFFFBFFFF 1930 #define S_008214_MEC2_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 19) 1931 #define G_008214_MEC2_MESSAGE_BUSY(x) (((x) >> 19) & 0x1) 1932 #define C_008214_MEC2_MESSAGE_BUSY 0xFFF7FFFF 1933 #define S_008214_MEC2_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 20) 1934 #define G_008214_MEC2_EOP_QUEUE_BUSY(x) (((x) >> 20) & 0x1) 1935 #define C_008214_MEC2_EOP_QUEUE_BUSY 0xFFEFFFFF 1936 #define S_008214_MEC2_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 21) 1937 #define G_008214_MEC2_IQ_QUEUE_BUSY(x) (((x) >> 21) & 0x1) 1938 #define C_008214_MEC2_IQ_QUEUE_BUSY 0xFFDFFFFF 1939 #define S_008214_MEC2_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1940 #define G_008214_MEC2_IB_QUEUE_BUSY(x) (((x) >> 22) & 0x1) 1941 #define C_008214_MEC2_IB_QUEUE_BUSY 0xFFBFFFFF 1942 #define S_008214_MEC2_TC_BUSY(x) (((unsigned)(x) & 0x1) << 23) 1943 #define G_008214_MEC2_TC_BUSY(x) (((x) >> 23) & 0x1) 1944 #define C_008214_MEC2_TC_BUSY 0xFF7FFFFF 1945 #define S_008214_MEC2_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 1946 #define G_008214_MEC2_DMA_BUSY(x) (((x) >> 24) & 0x1) 1947 #define C_008214_MEC2_DMA_BUSY 0xFEFFFFFF 1948 #define S_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 25) 1949 #define G_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((x) >> 25) & 0x1) 1950 #define C_008214_MEC2_PARTIAL_FLUSH_BUSY 0xFDFFFFFF 1951 #define S_008214_MEC2_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1952 #define G_008214_MEC2_PIPE0_BUSY(x) (((x) >> 26) & 0x1) 1953 #define C_008214_MEC2_PIPE0_BUSY 0xFBFFFFFF 1954 #define S_008214_MEC2_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1955 #define G_008214_MEC2_PIPE1_BUSY(x) (((x) >> 27) & 0x1) 1956 #define C_008214_MEC2_PIPE1_BUSY 0xF7FFFFFF 1957 #define S_008214_MEC2_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1958 #define G_008214_MEC2_PIPE2_BUSY(x) (((x) >> 28) & 0x1) 1959 #define C_008214_MEC2_PIPE2_BUSY 0xEFFFFFFF 1960 #define S_008214_MEC2_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1961 #define G_008214_MEC2_PIPE3_BUSY(x) (((x) >> 29) & 0x1) 1962 #define C_008214_MEC2_PIPE3_BUSY 0xDFFFFFFF 1963 #define R_008218_CP_CPC_STALLED_STAT1 0x008218 /* >= gfx7 */ 1964 #define S_008218_MIU_RDREQ_FREE_STALL(x) (((unsigned)(x) & 0x1) << 0) /* gfx7 */ 1965 #define G_008218_MIU_RDREQ_FREE_STALL(x) (((x) >> 0) & 0x1) 1966 #define C_008218_MIU_RDREQ_FREE_STALL 0xFFFFFFFE 1967 #define S_008218_MIU_WRREQ_FREE_STALL(x) (((unsigned)(x) & 0x1) << 1) /* gfx7 */ 1968 #define G_008218_MIU_WRREQ_FREE_STALL(x) (((x) >> 1) & 0x1) 1969 #define C_008218_MIU_WRREQ_FREE_STALL 0xFFFFFFFD 1970 #define S_008218_RCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 3) 1971 #define G_008218_RCIU_TX_FREE_STALL(x) (((x) >> 3) & 0x1) 1972 #define C_008218_RCIU_TX_FREE_STALL 0xFFFFFFF7 1973 #define S_008218_RCIU_PRIV_VIOLATION(x) (((unsigned)(x) & 0x1) << 4) 1974 #define G_008218_RCIU_PRIV_VIOLATION(x) (((x) >> 4) & 0x1) 1975 #define C_008218_RCIU_PRIV_VIOLATION 0xFFFFFFEF 1976 #define S_008218_TCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 6) 1977 #define G_008218_TCIU_TX_FREE_STALL(x) (((x) >> 6) & 0x1) 1978 #define C_008218_TCIU_TX_FREE_STALL 0xFFFFFFBF 1979 #define S_008218_MEC1_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 8) 1980 #define G_008218_MEC1_DECODING_PACKET(x) (((x) >> 8) & 0x1) 1981 #define C_008218_MEC1_DECODING_PACKET 0xFFFFFEFF 1982 #define S_008218_MEC1_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 9) 1983 #define G_008218_MEC1_WAIT_ON_RCIU(x) (((x) >> 9) & 0x1) 1984 #define C_008218_MEC1_WAIT_ON_RCIU 0xFFFFFDFF 1985 #define S_008218_MEC1_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 10) 1986 #define G_008218_MEC1_WAIT_ON_RCIU_READ(x) (((x) >> 10) & 0x1) 1987 #define C_008218_MEC1_WAIT_ON_RCIU_READ 0xFFFFFBFF 1988 #define S_008218_MEC1_WAIT_ON_MC_READ(x) (((unsigned)(x) & 0x1) << 11) /* gfx7 */ 1989 #define G_008218_MEC1_WAIT_ON_MC_READ(x) (((x) >> 11) & 0x1) 1990 #define C_008218_MEC1_WAIT_ON_MC_READ 0xFFFFF7FF 1991 #define S_008218_MEC1_WAIT_ON_MC_WR_ACK(x) (((unsigned)(x) & 0x1) << 12) /* gfx7 */ 1992 #define G_008218_MEC1_WAIT_ON_MC_WR_ACK(x) (((x) >> 12) & 0x1) 1993 #define C_008218_MEC1_WAIT_ON_MC_WR_ACK 0xFFFFEFFF 1994 #define S_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 13) 1995 #define G_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((x) >> 13) & 0x1) 1996 #define C_008218_MEC1_WAIT_ON_ROQ_DATA 0xFFFFDFFF 1997 #define S_008218_MEC2_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 16) 1998 #define G_008218_MEC2_DECODING_PACKET(x) (((x) >> 16) & 0x1) 1999 #define C_008218_MEC2_DECODING_PACKET 0xFFFEFFFF 2000 #define S_008218_MEC2_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 17) 2001 #define G_008218_MEC2_WAIT_ON_RCIU(x) (((x) >> 17) & 0x1) 2002 #define C_008218_MEC2_WAIT_ON_RCIU 0xFFFDFFFF 2003 #define S_008218_MEC2_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 18) 2004 #define G_008218_MEC2_WAIT_ON_RCIU_READ(x) (((x) >> 18) & 0x1) 2005 #define C_008218_MEC2_WAIT_ON_RCIU_READ 0xFFFBFFFF 2006 #define S_008218_MEC2_WAIT_ON_MC_READ(x) (((unsigned)(x) & 0x1) << 19) /* gfx7 */ 2007 #define G_008218_MEC2_WAIT_ON_MC_READ(x) (((x) >> 19) & 0x1) 2008 #define C_008218_MEC2_WAIT_ON_MC_READ 0xFFF7FFFF 2009 #define S_008218_MEC2_WAIT_ON_MC_WR_ACK(x) (((unsigned)(x) & 0x1) << 20) /* gfx7 */ 2010 #define G_008218_MEC2_WAIT_ON_MC_WR_ACK(x) (((x) >> 20) & 0x1) 2011 #define C_008218_MEC2_WAIT_ON_MC_WR_ACK 0xFFEFFFFF 2012 #define S_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 21) 2013 #define G_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((x) >> 21) & 0x1) 2014 #define C_008218_MEC2_WAIT_ON_ROQ_DATA 0xFFDFFFFF 2015 #define S_008218_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 22) /* gfx8, gfx81 */ 2016 #define G_008218_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 22) & 0x1) 2017 #define C_008218_ATCL2IU_WAITING_ON_FREE 0xFFBFFFFF 2018 #define S_008218_UTCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 22) /* >= gfx9 */ 2019 #define G_008218_UTCL2IU_WAITING_ON_FREE(x) (((x) >> 22) & 0x1) 2020 #define C_008218_UTCL2IU_WAITING_ON_FREE 0xFFBFFFFF 2021 #define S_008218_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 23) /* gfx8, gfx81 */ 2022 #define G_008218_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 23) & 0x1) 2023 #define C_008218_ATCL2IU_WAITING_ON_TAGS 0xFF7FFFFF 2024 #define S_008218_UTCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 23) /* >= gfx9 */ 2025 #define G_008218_UTCL2IU_WAITING_ON_TAGS(x) (((x) >> 23) & 0x1) 2026 #define C_008218_UTCL2IU_WAITING_ON_TAGS 0xFF7FFFFF 2027 #define S_008218_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 24) /* gfx8, gfx81 */ 2028 #define G_008218_ATCL1_WAITING_ON_TRANS(x) (((x) >> 24) & 0x1) 2029 #define C_008218_ATCL1_WAITING_ON_TRANS 0xFEFFFFFF 2030 #define S_008218_UTCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx9 */ 2031 #define G_008218_UTCL1_WAITING_ON_TRANS(x) (((x) >> 24) & 0x1) 2032 #define C_008218_UTCL1_WAITING_ON_TRANS 0xFEFFFFFF 2033 #define S_008218_GCRIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx10 */ 2034 #define G_008218_GCRIU_WAITING_ON_FREE(x) (((x) >> 25) & 0x1) 2035 #define C_008218_GCRIU_WAITING_ON_FREE 0xFDFFFFFF 2036 #define R_00821C_CP_CPF_STATUS 0x00821C /* >= gfx7 */ 2037 #define S_00821C_POST_WPTR_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 0) 2038 #define G_00821C_POST_WPTR_GFX_BUSY(x) (((x) >> 0) & 0x1) 2039 #define C_00821C_POST_WPTR_GFX_BUSY 0xFFFFFFFE 2040 #define S_00821C_CSF_BUSY(x) (((unsigned)(x) & 0x1) << 1) 2041 #define G_00821C_CSF_BUSY(x) (((x) >> 1) & 0x1) 2042 #define C_00821C_CSF_BUSY 0xFFFFFFFD 2043 #define S_00821C_MIU_RDREQ_BUSY(x) (((unsigned)(x) & 0x1) << 2) /* gfx7 */ 2044 #define G_00821C_MIU_RDREQ_BUSY(x) (((x) >> 2) & 0x1) 2045 #define C_00821C_MIU_RDREQ_BUSY 0xFFFFFFFB 2046 #define S_00821C_MIU_WRREQ_BUSY(x) (((unsigned)(x) & 0x1) << 3) /* gfx7 */ 2047 #define G_00821C_MIU_WRREQ_BUSY(x) (((x) >> 3) & 0x1) 2048 #define C_00821C_MIU_WRREQ_BUSY 0xFFFFFFF7 2049 #define S_00821C_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 4) 2050 #define G_00821C_ROQ_ALIGN_BUSY(x) (((x) >> 4) & 0x1) 2051 #define C_00821C_ROQ_ALIGN_BUSY 0xFFFFFFEF 2052 #define S_00821C_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 5) 2053 #define G_00821C_ROQ_RING_BUSY(x) (((x) >> 5) & 0x1) 2054 #define C_00821C_ROQ_RING_BUSY 0xFFFFFFDF 2055 #define S_00821C_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 6) 2056 #define G_00821C_ROQ_INDIRECT1_BUSY(x) (((x) >> 6) & 0x1) 2057 #define C_00821C_ROQ_INDIRECT1_BUSY 0xFFFFFFBF 2058 #define S_00821C_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 7) 2059 #define G_00821C_ROQ_INDIRECT2_BUSY(x) (((x) >> 7) & 0x1) 2060 #define C_00821C_ROQ_INDIRECT2_BUSY 0xFFFFFF7F 2061 #define S_00821C_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 8) 2062 #define G_00821C_ROQ_STATE_BUSY(x) (((x) >> 8) & 0x1) 2063 #define C_00821C_ROQ_STATE_BUSY 0xFFFFFEFF 2064 #define S_00821C_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) 2065 #define G_00821C_ROQ_CE_RING_BUSY(x) (((x) >> 9) & 0x1) 2066 #define C_00821C_ROQ_CE_RING_BUSY 0xFFFFFDFF 2067 #define S_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) 2068 #define G_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) 2069 #define C_00821C_ROQ_CE_INDIRECT1_BUSY 0xFFFFFBFF 2070 #define S_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) 2071 #define G_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) 2072 #define C_00821C_ROQ_CE_INDIRECT2_BUSY 0xFFFFF7FF 2073 #define S_00821C_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 12) 2074 #define G_00821C_SEMAPHORE_BUSY(x) (((x) >> 12) & 0x1) 2075 #define C_00821C_SEMAPHORE_BUSY 0xFFFFEFFF 2076 #define S_00821C_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 13) 2077 #define G_00821C_INTERRUPT_BUSY(x) (((x) >> 13) & 0x1) 2078 #define C_00821C_INTERRUPT_BUSY 0xFFFFDFFF 2079 #define S_00821C_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 14) 2080 #define G_00821C_TCIU_BUSY(x) (((x) >> 14) & 0x1) 2081 #define C_00821C_TCIU_BUSY 0xFFFFBFFF 2082 #define S_00821C_HQD_BUSY(x) (((unsigned)(x) & 0x1) << 15) 2083 #define G_00821C_HQD_BUSY(x) (((x) >> 15) & 0x1) 2084 #define C_00821C_HQD_BUSY 0xFFFF7FFF 2085 #define S_00821C_PRT_BUSY(x) (((unsigned)(x) & 0x1) << 16) /* >= gfx8 */ 2086 #define G_00821C_PRT_BUSY(x) (((x) >> 16) & 0x1) 2087 #define C_00821C_PRT_BUSY 0xFFFEFFFF 2088 #define S_00821C_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 17) /* gfx8, gfx81 */ 2089 #define G_00821C_ATCL2IU_BUSY(x) (((x) >> 17) & 0x1) 2090 #define C_00821C_ATCL2IU_BUSY 0xFFFDFFFF 2091 #define S_00821C_UTCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 17) /* >= gfx9 */ 2092 #define G_00821C_UTCL2IU_BUSY(x) (((x) >> 17) & 0x1) 2093 #define C_00821C_UTCL2IU_BUSY 0xFFFDFFFF 2094 #define S_00821C_RCIU_BUSY(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx10 */ 2095 #define G_00821C_RCIU_BUSY(x) (((x) >> 18) & 0x1) 2096 #define C_00821C_RCIU_BUSY 0xFFFBFFFF 2097 #define S_00821C_RCIU_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx10 */ 2098 #define G_00821C_RCIU_GFX_BUSY(x) (((x) >> 19) & 0x1) 2099 #define C_00821C_RCIU_GFX_BUSY 0xFFF7FFFF 2100 #define S_00821C_RCIU_CMP_BUSY(x) (((unsigned)(x) & 0x1) << 20) /* >= gfx10 */ 2101 #define G_00821C_RCIU_CMP_BUSY(x) (((x) >> 20) & 0x1) 2102 #define C_00821C_RCIU_CMP_BUSY 0xFFEFFFFF 2103 #define S_00821C_ROQ_DATA_BUSY(x) (((unsigned)(x) & 0x1) << 21) /* >= gfx10 */ 2104 #define G_00821C_ROQ_DATA_BUSY(x) (((x) >> 21) & 0x1) 2105 #define C_00821C_ROQ_DATA_BUSY 0xFFDFFFFF 2106 #define S_00821C_ROQ_CE_DATA_BUSY(x) (((unsigned)(x) & 0x1) << 22) /* >= gfx10 */ 2107 #define G_00821C_ROQ_CE_DATA_BUSY(x) (((x) >> 22) & 0x1) 2108 #define C_00821C_ROQ_CE_DATA_BUSY 0xFFBFFFFF 2109 #define S_00821C_GCRIU_BUSY(x) (((unsigned)(x) & 0x1) << 23) /* >= gfx10 */ 2110 #define G_00821C_GCRIU_BUSY(x) (((x) >> 23) & 0x1) 2111 #define C_00821C_GCRIU_BUSY 0xFF7FFFFF 2112 #define S_00821C_MES_HQD_BUSY(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx10 */ 2113 #define G_00821C_MES_HQD_BUSY(x) (((x) >> 24) & 0x1) 2114 #define C_00821C_MES_HQD_BUSY 0xFEFFFFFF 2115 #define S_00821C_CPF_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx8 */ 2116 #define G_00821C_CPF_GFX_BUSY(x) (((x) >> 26) & 0x1) 2117 #define C_00821C_CPF_GFX_BUSY 0xFBFFFFFF 2118 #define S_00821C_CPF_CMP_BUSY(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx8 */ 2119 #define G_00821C_CPF_CMP_BUSY(x) (((x) >> 27) & 0x1) 2120 #define C_00821C_CPF_CMP_BUSY 0xF7FFFFFF 2121 #define S_00821C_GRBM_CPF_STAT_BUSY(x) (((unsigned)(x) & 0x3) << 28) /* >= gfx8 */ 2122 #define G_00821C_GRBM_CPF_STAT_BUSY(x) (((x) >> 28) & 0x3) 2123 #define C_00821C_GRBM_CPF_STAT_BUSY 0xCFFFFFFF 2124 #define S_00821C_CPC_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 30) 2125 #define G_00821C_CPC_CPF_BUSY(x) (((x) >> 30) & 0x1) 2126 #define C_00821C_CPC_CPF_BUSY 0xBFFFFFFF 2127 #define S_00821C_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 31) 2128 #define G_00821C_CPF_BUSY(x) (((x) >> 31) & 0x1) 2129 #define C_00821C_CPF_BUSY 0x7FFFFFFF 2130 #define R_008220_CP_CPF_BUSY_STAT 0x008220 /* >= gfx7 */ 2131 #define S_008220_REG_BUS_FIFO_BUSY(x) (((unsigned)(x) & 0x1) << 0) 2132 #define G_008220_REG_BUS_FIFO_BUSY(x) (((x) >> 0) & 0x1) 2133 #define C_008220_REG_BUS_FIFO_BUSY 0xFFFFFFFE 2134 #define S_008220_CSF_RING_BUSY(x) (((unsigned)(x) & 0x1) << 1) 2135 #define G_008220_CSF_RING_BUSY(x) (((x) >> 1) & 0x1) 2136 #define C_008220_CSF_RING_BUSY 0xFFFFFFFD 2137 #define S_008220_CSF_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 2) 2138 #define G_008220_CSF_INDIRECT1_BUSY(x) (((x) >> 2) & 0x1) 2139 #define C_008220_CSF_INDIRECT1_BUSY 0xFFFFFFFB 2140 #define S_008220_CSF_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 3) 2141 #define G_008220_CSF_INDIRECT2_BUSY(x) (((x) >> 3) & 0x1) 2142 #define C_008220_CSF_INDIRECT2_BUSY 0xFFFFFFF7 2143 #define S_008220_CSF_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 4) 2144 #define G_008220_CSF_STATE_BUSY(x) (((x) >> 4) & 0x1) 2145 #define C_008220_CSF_STATE_BUSY 0xFFFFFFEF 2146 #define S_008220_CSF_CE_INDR1_BUSY(x) (((unsigned)(x) & 0x1) << 5) 2147 #define G_008220_CSF_CE_INDR1_BUSY(x) (((x) >> 5) & 0x1) 2148 #define C_008220_CSF_CE_INDR1_BUSY 0xFFFFFFDF 2149 #define S_008220_CSF_CE_INDR2_BUSY(x) (((unsigned)(x) & 0x1) << 6) 2150 #define G_008220_CSF_CE_INDR2_BUSY(x) (((x) >> 6) & 0x1) 2151 #define C_008220_CSF_CE_INDR2_BUSY 0xFFFFFFBF 2152 #define S_008220_CSF_ARBITER_BUSY(x) (((unsigned)(x) & 0x1) << 7) 2153 #define G_008220_CSF_ARBITER_BUSY(x) (((x) >> 7) & 0x1) 2154 #define C_008220_CSF_ARBITER_BUSY 0xFFFFFF7F 2155 #define S_008220_CSF_INPUT_BUSY(x) (((unsigned)(x) & 0x1) << 8) 2156 #define G_008220_CSF_INPUT_BUSY(x) (((x) >> 8) & 0x1) 2157 #define C_008220_CSF_INPUT_BUSY 0xFFFFFEFF 2158 #define S_008220_CSF_DATA_BUSY(x) (((unsigned)(x) & 0x1) << 9) /* >= gfx10 */ 2159 #define G_008220_CSF_DATA_BUSY(x) (((x) >> 9) & 0x1) 2160 #define C_008220_CSF_DATA_BUSY 0xFFFFFDFF 2161 #define S_008220_OUTSTANDING_READ_TAGS(x) (((unsigned)(x) & 0x1) << 9) /* gfx7, gfx8, gfx81, gfx9 */ 2162 #define G_008220_OUTSTANDING_READ_TAGS(x) (((x) >> 9) & 0x1) 2163 #define C_008220_OUTSTANDING_READ_TAGS 0xFFFFFDFF 2164 #define S_008220_CSF_CE_DATA_BUSY(x) (((unsigned)(x) & 0x1) << 10) /* >= gfx10 */ 2165 #define G_008220_CSF_CE_DATA_BUSY(x) (((x) >> 10) & 0x1) 2166 #define C_008220_CSF_CE_DATA_BUSY 0xFFFFFBFF 2167 #define S_008220_HPD_PROCESSING_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 11) 2168 #define G_008220_HPD_PROCESSING_EOP_BUSY(x) (((x) >> 11) & 0x1) 2169 #define C_008220_HPD_PROCESSING_EOP_BUSY 0xFFFFF7FF 2170 #define S_008220_HQD_DISPATCH_BUSY(x) (((unsigned)(x) & 0x1) << 12) 2171 #define G_008220_HQD_DISPATCH_BUSY(x) (((x) >> 12) & 0x1) 2172 #define C_008220_HQD_DISPATCH_BUSY 0xFFFFEFFF 2173 #define S_008220_HQD_IQ_TIMER_BUSY(x) (((unsigned)(x) & 0x1) << 13) 2174 #define G_008220_HQD_IQ_TIMER_BUSY(x) (((x) >> 13) & 0x1) 2175 #define C_008220_HQD_IQ_TIMER_BUSY 0xFFFFDFFF 2176 #define S_008220_HQD_DMA_OFFLOAD_BUSY(x) (((unsigned)(x) & 0x1) << 14) 2177 #define G_008220_HQD_DMA_OFFLOAD_BUSY(x) (((x) >> 14) & 0x1) 2178 #define C_008220_HQD_DMA_OFFLOAD_BUSY 0xFFFFBFFF 2179 #define S_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 15) 2180 #define G_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((x) >> 15) & 0x1) 2181 #define C_008220_HQD_WAIT_SEMAPHORE_BUSY 0xFFFF7FFF 2182 #define S_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 16) 2183 #define G_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((x) >> 16) & 0x1) 2184 #define C_008220_HQD_SIGNAL_SEMAPHORE_BUSY 0xFFFEFFFF 2185 #define S_008220_HQD_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 17) 2186 #define G_008220_HQD_MESSAGE_BUSY(x) (((x) >> 17) & 0x1) 2187 #define C_008220_HQD_MESSAGE_BUSY 0xFFFDFFFF 2188 #define S_008220_HQD_PQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 18) 2189 #define G_008220_HQD_PQ_FETCHER_BUSY(x) (((x) >> 18) & 0x1) 2190 #define C_008220_HQD_PQ_FETCHER_BUSY 0xFFFBFFFF 2191 #define S_008220_HQD_IB_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 19) 2192 #define G_008220_HQD_IB_FETCHER_BUSY(x) (((x) >> 19) & 0x1) 2193 #define C_008220_HQD_IB_FETCHER_BUSY 0xFFF7FFFF 2194 #define S_008220_HQD_IQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 20) 2195 #define G_008220_HQD_IQ_FETCHER_BUSY(x) (((x) >> 20) & 0x1) 2196 #define C_008220_HQD_IQ_FETCHER_BUSY 0xFFEFFFFF 2197 #define S_008220_HQD_EOP_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 21) 2198 #define G_008220_HQD_EOP_FETCHER_BUSY(x) (((x) >> 21) & 0x1) 2199 #define C_008220_HQD_EOP_FETCHER_BUSY 0xFFDFFFFF 2200 #define S_008220_HQD_CONSUMED_RPTR_BUSY(x) (((unsigned)(x) & 0x1) << 22) 2201 #define G_008220_HQD_CONSUMED_RPTR_BUSY(x) (((x) >> 22) & 0x1) 2202 #define C_008220_HQD_CONSUMED_RPTR_BUSY 0xFFBFFFFF 2203 #define S_008220_HQD_FETCHER_ARB_BUSY(x) (((unsigned)(x) & 0x1) << 23) 2204 #define G_008220_HQD_FETCHER_ARB_BUSY(x) (((x) >> 23) & 0x1) 2205 #define C_008220_HQD_FETCHER_ARB_BUSY 0xFF7FFFFF 2206 #define S_008220_HQD_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 24) 2207 #define G_008220_HQD_ROQ_ALIGN_BUSY(x) (((x) >> 24) & 0x1) 2208 #define C_008220_HQD_ROQ_ALIGN_BUSY 0xFEFFFFFF 2209 #define S_008220_HQD_ROQ_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 25) 2210 #define G_008220_HQD_ROQ_EOP_BUSY(x) (((x) >> 25) & 0x1) 2211 #define C_008220_HQD_ROQ_EOP_BUSY 0xFDFFFFFF 2212 #define S_008220_HQD_ROQ_IQ_BUSY(x) (((unsigned)(x) & 0x1) << 26) 2213 #define G_008220_HQD_ROQ_IQ_BUSY(x) (((x) >> 26) & 0x1) 2214 #define C_008220_HQD_ROQ_IQ_BUSY 0xFBFFFFFF 2215 #define S_008220_HQD_ROQ_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 27) 2216 #define G_008220_HQD_ROQ_PQ_BUSY(x) (((x) >> 27) & 0x1) 2217 #define C_008220_HQD_ROQ_PQ_BUSY 0xF7FFFFFF 2218 #define S_008220_HQD_ROQ_IB_BUSY(x) (((unsigned)(x) & 0x1) << 28) 2219 #define G_008220_HQD_ROQ_IB_BUSY(x) (((x) >> 28) & 0x1) 2220 #define C_008220_HQD_ROQ_IB_BUSY 0xEFFFFFFF 2221 #define S_008220_HQD_WPTR_POLL_BUSY(x) (((unsigned)(x) & 0x1) << 29) 2222 #define G_008220_HQD_WPTR_POLL_BUSY(x) (((x) >> 29) & 0x1) 2223 #define C_008220_HQD_WPTR_POLL_BUSY 0xDFFFFFFF 2224 #define S_008220_HQD_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 30) 2225 #define G_008220_HQD_PQ_BUSY(x) (((x) >> 30) & 0x1) 2226 #define C_008220_HQD_PQ_BUSY 0xBFFFFFFF 2227 #define S_008220_HQD_IB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 2228 #define G_008220_HQD_IB_BUSY(x) (((x) >> 31) & 0x1) 2229 #define C_008220_HQD_IB_BUSY 0x7FFFFFFF 2230 #define R_008224_CP_CPF_STALLED_STAT1 0x008224 /* >= gfx7 */ 2231 #define S_008224_RING_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 0) 2232 #define G_008224_RING_FETCHING_DATA(x) (((x) >> 0) & 0x1) 2233 #define C_008224_RING_FETCHING_DATA 0xFFFFFFFE 2234 #define S_008224_INDR1_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 1) 2235 #define G_008224_INDR1_FETCHING_DATA(x) (((x) >> 1) & 0x1) 2236 #define C_008224_INDR1_FETCHING_DATA 0xFFFFFFFD 2237 #define S_008224_INDR2_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 2) 2238 #define G_008224_INDR2_FETCHING_DATA(x) (((x) >> 2) & 0x1) 2239 #define C_008224_INDR2_FETCHING_DATA 0xFFFFFFFB 2240 #define S_008224_STATE_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 3) 2241 #define G_008224_STATE_FETCHING_DATA(x) (((x) >> 3) & 0x1) 2242 #define C_008224_STATE_FETCHING_DATA 0xFFFFFFF7 2243 #define S_008224_MIU_WAITING_ON_RDREQ_FREE(x) (((unsigned)(x) & 0x1) << 4) /* gfx7 */ 2244 #define G_008224_MIU_WAITING_ON_RDREQ_FREE(x) (((x) >> 4) & 0x1) 2245 #define C_008224_MIU_WAITING_ON_RDREQ_FREE 0xFFFFFFEF 2246 #define S_008224_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 5) 2247 #define G_008224_TCIU_WAITING_ON_FREE(x) (((x) >> 5) & 0x1) 2248 #define C_008224_TCIU_WAITING_ON_FREE 0xFFFFFFDF 2249 #define S_008224_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 6) 2250 #define G_008224_TCIU_WAITING_ON_TAGS(x) (((x) >> 6) & 0x1) 2251 #define C_008224_TCIU_WAITING_ON_TAGS 0xFFFFFFBF 2252 #define S_008224_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 7) /* gfx8, gfx81 */ 2253 #define G_008224_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 7) & 0x1) 2254 #define C_008224_ATCL2IU_WAITING_ON_FREE 0xFFFFFF7F 2255 #define S_008224_UTCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 7) /* >= gfx9 */ 2256 #define G_008224_UTCL2IU_WAITING_ON_FREE(x) (((x) >> 7) & 0x1) 2257 #define C_008224_UTCL2IU_WAITING_ON_FREE 0xFFFFFF7F 2258 #define S_008224_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 8) /* gfx8, gfx81 */ 2259 #define G_008224_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 8) & 0x1) 2260 #define C_008224_ATCL2IU_WAITING_ON_TAGS 0xFFFFFEFF 2261 #define S_008224_UTCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 8) /* >= gfx9 */ 2262 #define G_008224_UTCL2IU_WAITING_ON_TAGS(x) (((x) >> 8) & 0x1) 2263 #define C_008224_UTCL2IU_WAITING_ON_TAGS 0xFFFFFEFF 2264 #define S_008224_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 9) /* gfx8, gfx81 */ 2265 #define G_008224_ATCL1_WAITING_ON_TRANS(x) (((x) >> 9) & 0x1) 2266 #define C_008224_ATCL1_WAITING_ON_TRANS 0xFFFFFDFF 2267 #define S_008224_GFX_UTCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 9) /* >= gfx9 */ 2268 #define G_008224_GFX_UTCL1_WAITING_ON_TRANS(x) (((x) >> 9) & 0x1) 2269 #define C_008224_GFX_UTCL1_WAITING_ON_TRANS 0xFFFFFDFF 2270 #define S_008224_CMP_UTCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 10) /* >= gfx9 */ 2271 #define G_008224_CMP_UTCL1_WAITING_ON_TRANS(x) (((x) >> 10) & 0x1) 2272 #define C_008224_CMP_UTCL1_WAITING_ON_TRANS 0xFFFFFBFF 2273 #define S_008224_RCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 11) /* >= gfx9 */ 2274 #define G_008224_RCIU_WAITING_ON_FREE(x) (((x) >> 11) & 0x1) 2275 #define C_008224_RCIU_WAITING_ON_FREE 0xFFFFF7FF 2276 #define S_008224_DATA_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 12) /* >= gfx10 */ 2277 #define G_008224_DATA_FETCHING_DATA(x) (((x) >> 12) & 0x1) 2278 #define C_008224_DATA_FETCHING_DATA 0xFFFFEFFF 2279 #define S_008224_GCRIU_WAIT_ON_FREE(x) (((unsigned)(x) & 0x1) << 13) /* >= gfx10 */ 2280 #define G_008224_GCRIU_WAIT_ON_FREE(x) (((x) >> 13) & 0x1) 2281 #define C_008224_GCRIU_WAIT_ON_FREE 0xFFFFDFFF 2282 #define R_008228_CP_CPC_BUSY_STAT2 0x008228 /* >= gfx10 */ 2283 #define S_008228_MES_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 0) 2284 #define G_008228_MES_LOAD_BUSY(x) (((x) >> 0) & 0x1) 2285 #define C_008228_MES_LOAD_BUSY 0xFFFFFFFE 2286 #define S_008228_MES_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 2) 2287 #define G_008228_MES_MUTEX_BUSY(x) (((x) >> 2) & 0x1) 2288 #define C_008228_MES_MUTEX_BUSY 0xFFFFFFFB 2289 #define S_008228_MES_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 3) 2290 #define G_008228_MES_MESSAGE_BUSY(x) (((x) >> 3) & 0x1) 2291 #define C_008228_MES_MESSAGE_BUSY 0xFFFFFFF7 2292 #define S_008228_MES_TC_BUSY(x) (((unsigned)(x) & 0x1) << 7) 2293 #define G_008228_MES_TC_BUSY(x) (((x) >> 7) & 0x1) 2294 #define C_008228_MES_TC_BUSY 0xFFFFFF7F 2295 #define S_008228_MES_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) 2296 #define G_008228_MES_DMA_BUSY(x) (((x) >> 8) & 0x1) 2297 #define C_008228_MES_DMA_BUSY 0xFFFFFEFF 2298 #define S_008228_MES_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 10) 2299 #define G_008228_MES_PIPE0_BUSY(x) (((x) >> 10) & 0x1) 2300 #define C_008228_MES_PIPE0_BUSY 0xFFFFFBFF 2301 #define S_008228_MES_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 11) 2302 #define G_008228_MES_PIPE1_BUSY(x) (((x) >> 11) & 0x1) 2303 #define C_008228_MES_PIPE1_BUSY 0xFFFFF7FF 2304 #define S_008228_MES_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 12) 2305 #define G_008228_MES_PIPE2_BUSY(x) (((x) >> 12) & 0x1) 2306 #define C_008228_MES_PIPE2_BUSY 0xFFFFEFFF 2307 #define S_008228_MES_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 13) 2308 #define G_008228_MES_PIPE3_BUSY(x) (((x) >> 13) & 0x1) 2309 #define C_008228_MES_PIPE3_BUSY 0xFFFFDFFF 2310 #define R_008228_CP_CPC_MC_CNTL 0x008228 /* gfx7 */ 2311 #define S_008228_PACK_DELAY_CNT(x) (((unsigned)(x) & 0x1F) << 0) 2312 #define G_008228_PACK_DELAY_CNT(x) (((x) >> 0) & 0x1F) 2313 #define C_008228_PACK_DELAY_CNT 0xFFFFFFE0 2314 #define R_00822C_CP_CPC_GRBM_FREE_COUNT 0x00822C /* >= gfx7 */ 2315 #define S_00822C_FREE_COUNT(x) (((unsigned)(x) & 0x3F) << 0) 2316 #define G_00822C_FREE_COUNT(x) (((x) >> 0) & 0x3F) 2317 #define C_00822C_FREE_COUNT 0xFFFFFFC0 2318 #define R_008230_CP_CPC_PRIV_VIOLATION_ADDR 0x008230 /* >= gfx103 */ 2319 #define S_008230_PRIV_VIOLATION_ADDR(x) (((unsigned)(x) & 0xFFFF) << 0) 2320 #define G_008230_PRIV_VIOLATION_ADDR(x) (((x) >> 0) & 0xFFFF) 2321 #define C_008230_PRIV_VIOLATION_ADDR 0xFFFF0000 2322 #define R_008240_CP_CPC_SCRATCH_INDEX 0x008240 /* >= gfx7 */ 2323 #define S_008240_SCRATCH_INDEX(x) (((unsigned)(x) & 0x1FF) << 0) 2324 #define G_008240_SCRATCH_INDEX(x) (((x) >> 0) & 0x1FF) 2325 #define C_008240_SCRATCH_INDEX 0xFFFFFE00 2326 #define S_008240_SCRATCH_INDEX_64BIT_MODE(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx10 */ 2327 #define G_008240_SCRATCH_INDEX_64BIT_MODE(x) (((x) >> 31) & 0x1) 2328 #define C_008240_SCRATCH_INDEX_64BIT_MODE 0x7FFFFFFF 2329 #define R_008244_CP_CPC_SCRATCH_DATA 0x008244 /* >= gfx7 */ 2330 #define R_008248_CP_CPF_GRBM_FREE_COUNT 0x008248 /* >= gfx9 */ 2331 #define S_008248_FREE_COUNT(x) (((unsigned)(x) & 0x7) << 0) 2332 #define G_008248_FREE_COUNT(x) (((x) >> 0) & 0x7) 2333 #define C_008248_FREE_COUNT 0xFFFFFFF8 2334 #define R_00824C_CP_CPF_BUSY_STAT2 0x00824C /* >= gfx10 */ 2335 #define S_00824C_MES_HQD_DISPATCH_BUSY(x) (((unsigned)(x) & 0x1) << 12) 2336 #define G_00824C_MES_HQD_DISPATCH_BUSY(x) (((x) >> 12) & 0x1) 2337 #define C_00824C_MES_HQD_DISPATCH_BUSY 0xFFFFEFFF 2338 #define S_00824C_MES_HQD_DMA_OFFLOAD_BUSY(x) (((unsigned)(x) & 0x1) << 14) 2339 #define G_00824C_MES_HQD_DMA_OFFLOAD_BUSY(x) (((x) >> 14) & 0x1) 2340 #define C_00824C_MES_HQD_DMA_OFFLOAD_BUSY 0xFFFFBFFF 2341 #define S_00824C_MES_HQD_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 17) 2342 #define G_00824C_MES_HQD_MESSAGE_BUSY(x) (((x) >> 17) & 0x1) 2343 #define C_00824C_MES_HQD_MESSAGE_BUSY 0xFFFDFFFF 2344 #define S_00824C_MES_HQD_PQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 18) 2345 #define G_00824C_MES_HQD_PQ_FETCHER_BUSY(x) (((x) >> 18) & 0x1) 2346 #define C_00824C_MES_HQD_PQ_FETCHER_BUSY 0xFFFBFFFF 2347 #define S_00824C_MES_HQD_CONSUMED_RPTR_BUSY(x) (((unsigned)(x) & 0x1) << 22) 2348 #define G_00824C_MES_HQD_CONSUMED_RPTR_BUSY(x) (((x) >> 22) & 0x1) 2349 #define C_00824C_MES_HQD_CONSUMED_RPTR_BUSY 0xFFBFFFFF 2350 #define S_00824C_MES_HQD_FETCHER_ARB_BUSY(x) (((unsigned)(x) & 0x1) << 23) 2351 #define G_00824C_MES_HQD_FETCHER_ARB_BUSY(x) (((x) >> 23) & 0x1) 2352 #define C_00824C_MES_HQD_FETCHER_ARB_BUSY 0xFF7FFFFF 2353 #define S_00824C_MES_HQD_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 24) 2354 #define G_00824C_MES_HQD_ROQ_ALIGN_BUSY(x) (((x) >> 24) & 0x1) 2355 #define C_00824C_MES_HQD_ROQ_ALIGN_BUSY 0xFEFFFFFF 2356 #define S_00824C_MES_HQD_ROQ_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 27) 2357 #define G_00824C_MES_HQD_ROQ_PQ_BUSY(x) (((x) >> 27) & 0x1) 2358 #define C_00824C_MES_HQD_ROQ_PQ_BUSY 0xF7FFFFFF 2359 #define S_00824C_MES_HQD_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 30) 2360 #define G_00824C_MES_HQD_PQ_BUSY(x) (((x) >> 30) & 0x1) 2361 #define C_00824C_MES_HQD_PQ_BUSY 0xBFFFFFFF 2362 #define R_00829C_CP_CPC_HALT_HYST_COUNT 0x00829C /* >= gfx7 */ 2363 #define S_00829C_COUNT(x) (((unsigned)(x) & 0xF) << 0) 2364 #define G_00829C_COUNT(x) (((x) >> 0) & 0xF) 2365 #define C_00829C_COUNT 0xFFFFFFF0 2366 #define R_008300_SQ_INTERRUPT_WORD_AUTO 0x008300 /* <= gfx6 */ 2367 #define S_008300_THREAD_TRACE(x) (((unsigned)(x) & 0x1) << 0) 2368 #define G_008300_THREAD_TRACE(x) (((x) >> 0) & 0x1) 2369 #define C_008300_THREAD_TRACE 0xFFFFFFFE 2370 #define S_008300_WLT(x) (((unsigned)(x) & 0x1) << 1) 2371 #define G_008300_WLT(x) (((x) >> 1) & 0x1) 2372 #define C_008300_WLT 0xFFFFFFFD 2373 #define S_008300_THREAD_TRACE_BUF_FULL(x) (((unsigned)(x) & 0x1) << 2) 2374 #define G_008300_THREAD_TRACE_BUF_FULL(x) (((x) >> 2) & 0x1) 2375 #define C_008300_THREAD_TRACE_BUF_FULL 0xFFFFFFFB 2376 #define S_008300_REG_TIMESTAMP(x) (((unsigned)(x) & 0x1) << 3) 2377 #define G_008300_REG_TIMESTAMP(x) (((x) >> 3) & 0x1) 2378 #define C_008300_REG_TIMESTAMP 0xFFFFFFF7 2379 #define S_008300_CMD_TIMESTAMP(x) (((unsigned)(x) & 0x1) << 4) 2380 #define G_008300_CMD_TIMESTAMP(x) (((x) >> 4) & 0x1) 2381 #define C_008300_CMD_TIMESTAMP 0xFFFFFFEF 2382 #define S_008300_HOST_CMD_OVERFLOW(x) (((unsigned)(x) & 0x1) << 5) 2383 #define G_008300_HOST_CMD_OVERFLOW(x) (((x) >> 5) & 0x1) 2384 #define C_008300_HOST_CMD_OVERFLOW 0xFFFFFFDF 2385 #define S_008300_HOST_REG_OVERFLOW(x) (((unsigned)(x) & 0x1) << 6) 2386 #define G_008300_HOST_REG_OVERFLOW(x) (((x) >> 6) & 0x1) 2387 #define C_008300_HOST_REG_OVERFLOW 0xFFFFFFBF 2388 #define S_008300_IMMED_OVERFLOW(x) (((unsigned)(x) & 0x1) << 7) 2389 #define G_008300_IMMED_OVERFLOW(x) (((x) >> 7) & 0x1) 2390 #define C_008300_IMMED_OVERFLOW 0xFFFFFF7F 2391 #define S_008300_SE_ID(x) (((unsigned)(x) & 0x1) << 25) 2392 #define G_008300_SE_ID(x) (((x) >> 25) & 0x1) 2393 #define C_008300_SE_ID 0xFDFFFFFF 2394 #define S_008300_ENCODING(x) (((unsigned)(x) & 0x3) << 26) 2395 #define G_008300_ENCODING(x) (((x) >> 26) & 0x3) 2396 #define C_008300_ENCODING 0xF3FFFFFF 2397 #define R_008400_CP_EOP_DONE_ADDR_LO 0x008400 /* <= gfx6 */ 2398 #define S_008400_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) 2399 #define G_008400_ADDR_SWAP(x) (((x) >> 0) & 0x3) 2400 #define C_008400_ADDR_SWAP 0xFFFFFFFC 2401 #define S_008400_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 2402 #define G_008400_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 2403 #define C_008400_ADDR_LO 0x00000003 2404 #define R_008404_CP_EOP_DONE_ADDR_HI 0x008404 /* <= gfx6 */ 2405 #define S_008404_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 2406 #define G_008404_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 2407 #define C_008404_ADDR_HI 0xFFFF0000 2408 #define R_008408_CP_EOP_DONE_DATA_LO 0x008408 /* <= gfx6 */ 2409 #define R_00840C_CP_EOP_DONE_DATA_HI 0x00840C /* <= gfx6 */ 2410 #define R_008410_CP_EOP_LAST_FENCE_LO 0x008410 /* <= gfx6 */ 2411 #define R_008414_CP_EOP_LAST_FENCE_HI 0x008414 /* <= gfx6 */ 2412 #define R_008418_CP_STREAM_OUT_ADDR_LO 0x008418 /* <= gfx6 */ 2413 #define S_008418_STREAM_OUT_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) 2414 #define G_008418_STREAM_OUT_ADDR_SWAP(x) (((x) >> 0) & 0x3) 2415 #define C_008418_STREAM_OUT_ADDR_SWAP 0xFFFFFFFC 2416 #define S_008418_STREAM_OUT_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 2417 #define G_008418_STREAM_OUT_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 2418 #define C_008418_STREAM_OUT_ADDR_LO 0x00000003 2419 #define R_00841C_CP_STREAM_OUT_ADDR_HI 0x00841C /* <= gfx6 */ 2420 #define R_008420_CP_NUM_PRIM_WRITTEN_COUNT0_LO 0x008420 /* <= gfx6 */ 2421 #define R_008424_CP_NUM_PRIM_WRITTEN_COUNT0_HI 0x008424 /* <= gfx6 */ 2422 #define R_008428_CP_NUM_PRIM_NEEDED_COUNT0_LO 0x008428 /* <= gfx6 */ 2423 #define R_00842C_CP_NUM_PRIM_NEEDED_COUNT0_HI 0x00842C /* <= gfx6 */ 2424 #define R_008430_CP_NUM_PRIM_WRITTEN_COUNT1_LO 0x008430 /* <= gfx6 */ 2425 #define R_008434_CP_NUM_PRIM_WRITTEN_COUNT1_HI 0x008434 /* <= gfx6 */ 2426 #define R_008438_CP_NUM_PRIM_NEEDED_COUNT1_LO 0x008438 /* <= gfx6 */ 2427 #define R_00843C_CP_NUM_PRIM_NEEDED_COUNT1_HI 0x00843C /* <= gfx6 */ 2428 #define R_008440_CP_NUM_PRIM_WRITTEN_COUNT2_LO 0x008440 /* <= gfx6 */ 2429 #define R_008444_CP_NUM_PRIM_WRITTEN_COUNT2_HI 0x008444 /* <= gfx6 */ 2430 #define R_008448_CP_NUM_PRIM_NEEDED_COUNT2_LO 0x008448 /* <= gfx6 */ 2431 #define R_00844C_CP_NUM_PRIM_NEEDED_COUNT2_HI 0x00844C /* <= gfx6 */ 2432 #define R_008450_CP_NUM_PRIM_WRITTEN_COUNT3_LO 0x008450 /* <= gfx6 */ 2433 #define R_008454_CP_NUM_PRIM_WRITTEN_COUNT3_HI 0x008454 /* <= gfx6 */ 2434 #define R_008458_CP_NUM_PRIM_NEEDED_COUNT3_LO 0x008458 /* <= gfx6 */ 2435 #define R_00845C_CP_NUM_PRIM_NEEDED_COUNT3_HI 0x00845C /* <= gfx6 */ 2436 #define R_008460_CP_PIPE_STATS_ADDR_LO 0x008460 /* <= gfx6 */ 2437 #define S_008460_PIPE_STATS_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) 2438 #define G_008460_PIPE_STATS_ADDR_SWAP(x) (((x) >> 0) & 0x3) 2439 #define C_008460_PIPE_STATS_ADDR_SWAP 0xFFFFFFFC 2440 #define S_008460_PIPE_STATS_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 2441 #define G_008460_PIPE_STATS_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 2442 #define C_008460_PIPE_STATS_ADDR_LO 0x00000003 2443 #define R_008464_CP_PIPE_STATS_ADDR_HI 0x008464 /* <= gfx6 */ 2444 #define R_008468_CP_VGT_IAVERT_COUNT_LO 0x008468 /* <= gfx6 */ 2445 #define R_00846C_CP_VGT_IAVERT_COUNT_HI 0x00846C /* <= gfx6 */ 2446 #define R_008470_CP_VGT_IAPRIM_COUNT_LO 0x008470 /* <= gfx6 */ 2447 #define R_008474_CP_VGT_IAPRIM_COUNT_HI 0x008474 /* <= gfx6 */ 2448 #define R_008478_CP_VGT_GSPRIM_COUNT_LO 0x008478 /* <= gfx6 */ 2449 #define R_00847C_CP_VGT_GSPRIM_COUNT_HI 0x00847C /* <= gfx6 */ 2450 #define R_008480_CP_VGT_VSINVOC_COUNT_LO 0x008480 /* <= gfx6 */ 2451 #define R_008484_CP_VGT_VSINVOC_COUNT_HI 0x008484 /* <= gfx6 */ 2452 #define R_008488_CP_VGT_GSINVOC_COUNT_LO 0x008488 /* <= gfx6 */ 2453 #define R_00848C_CP_VGT_GSINVOC_COUNT_HI 0x00848C /* <= gfx6 */ 2454 #define R_008490_CP_VGT_HSINVOC_COUNT_LO 0x008490 /* <= gfx6 */ 2455 #define R_008494_CP_VGT_HSINVOC_COUNT_HI 0x008494 /* <= gfx6 */ 2456 #define R_008498_CP_VGT_DSINVOC_COUNT_LO 0x008498 /* <= gfx6 */ 2457 #define R_00849C_CP_VGT_DSINVOC_COUNT_HI 0x00849C /* <= gfx6 */ 2458 #define R_0084A0_CP_PA_CINVOC_COUNT_LO 0x0084A0 /* <= gfx6 */ 2459 #define R_0084A4_CP_PA_CINVOC_COUNT_HI 0x0084A4 /* <= gfx6 */ 2460 #define R_0084A8_CP_PA_CPRIM_COUNT_LO 0x0084A8 /* <= gfx6 */ 2461 #define R_0084AC_CP_PA_CPRIM_COUNT_HI 0x0084AC /* <= gfx6 */ 2462 #define R_0084B0_CP_SC_PSINVOC_COUNT0_LO 0x0084B0 /* <= gfx6 */ 2463 #define R_0084B4_CP_SC_PSINVOC_COUNT0_HI 0x0084B4 /* <= gfx6 */ 2464 #define R_0084B8_CP_SC_PSINVOC_COUNT1_LO 0x0084B8 /* <= gfx6 */ 2465 #define R_0084BC_CP_SC_PSINVOC_COUNT1_HI 0x0084BC /* <= gfx6 */ 2466 #define R_0084C0_CP_VGT_CSINVOC_COUNT_LO 0x0084C0 /* <= gfx6 */ 2467 #define R_0084C4_CP_VGT_CSINVOC_COUNT_HI 0x0084C4 /* <= gfx6 */ 2468 #define R_0084FC_CP_STRMOUT_CNTL 0x0084FC /* <= gfx6 */ 2469 #define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) 2470 #define G_0084FC_OFFSET_UPDATE_DONE(x) (((x) >> 0) & 0x1) 2471 #define C_0084FC_OFFSET_UPDATE_DONE 0xFFFFFFFE 2472 #define R_008500_SCRATCH_REG0 0x008500 /* <= gfx6 */ 2473 #define R_008504_SCRATCH_REG1 0x008504 /* <= gfx6 */ 2474 #define R_008508_SCRATCH_REG2 0x008508 /* <= gfx6 */ 2475 #define R_00850C_SCRATCH_REG3 0x00850C /* <= gfx6 */ 2476 #define R_008510_SCRATCH_REG4 0x008510 /* <= gfx6 */ 2477 #define R_008514_SCRATCH_REG5 0x008514 /* <= gfx6 */ 2478 #define R_008518_SCRATCH_REG6 0x008518 /* <= gfx6 */ 2479 #define R_00851C_SCRATCH_REG7 0x00851C /* <= gfx6 */ 2480 #define R_008540_SCRATCH_UMSK 0x008540 /* <= gfx6 */ 2481 #define S_008540_OBSOLETE_UMSK(x) (((unsigned)(x) & 0xFF) << 0) 2482 #define G_008540_OBSOLETE_UMSK(x) (((x) >> 0) & 0xFF) 2483 #define C_008540_OBSOLETE_UMSK 0xFFFFFF00 2484 #define S_008540_OBSOLETE_SWAP(x) (((unsigned)(x) & 0x3) << 16) 2485 #define G_008540_OBSOLETE_SWAP(x) (((x) >> 16) & 0x3) 2486 #define C_008540_OBSOLETE_SWAP 0xFFFCFFFF 2487 #define R_008544_SCRATCH_ADDR 0x008544 /* <= gfx6 */ 2488 #define R_008560_CP_APPEND_ADDR_LO 0x008560 /* <= gfx6 */ 2489 #define S_008560_MEM_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 2490 #define G_008560_MEM_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 2491 #define C_008560_MEM_ADDR_LO 0x00000003 2492 #define R_008564_CP_APPEND_ADDR_HI 0x008564 /* <= gfx6 */ 2493 #define S_008564_MEM_ADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 2494 #define G_008564_MEM_ADDR_HI(x) (((x) >> 0) & 0xFF) 2495 #define C_008564_MEM_ADDR_HI 0xFFFFFF00 2496 #define S_008564_CS_PS_SEL(x) (((unsigned)(x) & 0x3) << 16) 2497 #define G_008564_CS_PS_SEL(x) (((x) >> 16) & 0x3) 2498 #define C_008564_CS_PS_SEL 0xFFFCFFFF 2499 #define S_008564_COMMAND(x) (((unsigned)(x) & 0x7) << 29) 2500 #define G_008564_COMMAND(x) (((x) >> 29) & 0x7) 2501 #define C_008564_COMMAND 0x1FFFFFFF 2502 #define R_008568_CP_APPEND_DATA 0x008568 /* <= gfx6 */ 2503 #define R_00856C_CP_APPEND_LAST_CS_FENCE 0x00856C /* <= gfx6 */ 2504 #define R_008570_CP_APPEND_LAST_PS_FENCE 0x008570 /* <= gfx6 */ 2505 #define R_008574_CP_ATOMIC_PREOP_LO 0x008574 /* <= gfx6 */ 2506 #define R_008578_CP_ATOMIC_PREOP_HI 0x008578 /* <= gfx6 */ 2507 #define R_00857C_CP_GDS_ATOMIC0_PREOP_LO 0x00857C /* <= gfx6 */ 2508 #define R_008580_CP_GDS_ATOMIC0_PREOP_HI 0x008580 /* <= gfx6 */ 2509 #define R_008584_CP_GDS_ATOMIC1_PREOP_LO 0x008584 /* <= gfx6 */ 2510 #define R_008588_CP_GDS_ATOMIC1_PREOP_HI 0x008588 /* <= gfx6 */ 2511 #define R_0085A4_CP_ME_MC_WADDR_LO 0x0085A4 /* <= gfx6 */ 2512 #define S_0085A4_ME_MC_WADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) 2513 #define G_0085A4_ME_MC_WADDR_SWAP(x) (((x) >> 0) & 0x3) 2514 #define C_0085A4_ME_MC_WADDR_SWAP 0xFFFFFFFC 2515 #define S_0085A4_ME_MC_WADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 2516 #define G_0085A4_ME_MC_WADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 2517 #define C_0085A4_ME_MC_WADDR_LO 0x00000003 2518 #define R_0085A8_CP_ME_MC_WADDR_HI 0x0085A8 /* <= gfx6 */ 2519 #define S_0085A8_ME_MC_WADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 2520 #define G_0085A8_ME_MC_WADDR_HI(x) (((x) >> 0) & 0xFF) 2521 #define C_0085A8_ME_MC_WADDR_HI 0xFFFFFF00 2522 #define R_0085AC_CP_ME_MC_WDATA_LO 0x0085AC /* <= gfx6 */ 2523 #define R_0085B0_CP_ME_MC_WDATA_HI 0x0085B0 /* <= gfx6 */ 2524 #define R_0085B4_CP_ME_MC_RADDR_LO 0x0085B4 /* <= gfx6 */ 2525 #define S_0085B4_ME_MC_RADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) 2526 #define G_0085B4_ME_MC_RADDR_SWAP(x) (((x) >> 0) & 0x3) 2527 #define C_0085B4_ME_MC_RADDR_SWAP 0xFFFFFFFC 2528 #define S_0085B4_ME_MC_RADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 2529 #define G_0085B4_ME_MC_RADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 2530 #define C_0085B4_ME_MC_RADDR_LO 0x00000003 2531 #define R_0085B8_CP_ME_MC_RADDR_HI 0x0085B8 /* <= gfx6 */ 2532 #define S_0085B8_ME_MC_RADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 2533 #define G_0085B8_ME_MC_RADDR_HI(x) (((x) >> 0) & 0xFF) 2534 #define C_0085B8_ME_MC_RADDR_HI 0xFFFFFF00 2535 #define R_0085BC_CP_SEM_WAIT_TIMER 0x0085BC /* <= gfx6 */ 2536 #define R_0085C0_CP_SIG_SEM_ADDR_LO 0x0085C0 /* <= gfx6 */ 2537 #define S_0085C0_SEM_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) 2538 #define G_0085C0_SEM_ADDR_SWAP(x) (((x) >> 0) & 0x3) 2539 #define C_0085C0_SEM_ADDR_SWAP 0xFFFFFFFC 2540 #define S_0085C0_SEM_ADDR_LO(x) (((unsigned)(x) & 0x1FFFFFFF) << 3) 2541 #define G_0085C0_SEM_ADDR_LO(x) (((x) >> 3) & 0x1FFFFFFF) 2542 #define C_0085C0_SEM_ADDR_LO 0x00000007 2543 #define R_0085C4_CP_SIG_SEM_ADDR_HI 0x0085C4 /* <= gfx6 */ 2544 #define S_0085C4_SEM_ADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 2545 #define G_0085C4_SEM_ADDR_HI(x) (((x) >> 0) & 0xFF) 2546 #define C_0085C4_SEM_ADDR_HI 0xFFFFFF00 2547 #define S_0085C4_SEM_USE_MAILBOX(x) (((unsigned)(x) & 0x1) << 16) 2548 #define G_0085C4_SEM_USE_MAILBOX(x) (((x) >> 16) & 0x1) 2549 #define C_0085C4_SEM_USE_MAILBOX 0xFFFEFFFF 2550 #define S_0085C4_SEM_SIGNAL_TYPE(x) (((unsigned)(x) & 0x1) << 20) 2551 #define G_0085C4_SEM_SIGNAL_TYPE(x) (((x) >> 20) & 0x1) 2552 #define C_0085C4_SEM_SIGNAL_TYPE 0xFFEFFFFF 2553 #define S_0085C4_SEM_CLIENT_CODE(x) (((unsigned)(x) & 0x3) << 24) 2554 #define G_0085C4_SEM_CLIENT_CODE(x) (((x) >> 24) & 0x3) 2555 #define C_0085C4_SEM_CLIENT_CODE 0xFCFFFFFF 2556 #define S_0085C4_SEM_SELECT(x) (((unsigned)(x) & 0x7) << 29) 2557 #define G_0085C4_SEM_SELECT(x) (((x) >> 29) & 0x7) 2558 #define C_0085C4_SEM_SELECT 0x1FFFFFFF 2559 #define R_0085D0_CP_WAIT_REG_MEM_TIMEOUT 0x0085D0 /* <= gfx6 */ 2560 #define R_0085D4_CP_WAIT_SEM_ADDR_LO 0x0085D4 /* <= gfx6 */ 2561 #define S_0085D4_SEM_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) 2562 #define G_0085D4_SEM_ADDR_SWAP(x) (((x) >> 0) & 0x3) 2563 #define C_0085D4_SEM_ADDR_SWAP 0xFFFFFFFC 2564 #define S_0085D4_SEM_ADDR_LO(x) (((unsigned)(x) & 0x1FFFFFFF) << 3) 2565 #define G_0085D4_SEM_ADDR_LO(x) (((x) >> 3) & 0x1FFFFFFF) 2566 #define C_0085D4_SEM_ADDR_LO 0x00000007 2567 #define R_0085D8_CP_WAIT_SEM_ADDR_HI 0x0085D8 /* <= gfx6 */ 2568 #define S_0085D8_SEM_ADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 2569 #define G_0085D8_SEM_ADDR_HI(x) (((x) >> 0) & 0xFF) 2570 #define C_0085D8_SEM_ADDR_HI 0xFFFFFF00 2571 #define S_0085D8_SEM_USE_MAILBOX(x) (((unsigned)(x) & 0x1) << 16) 2572 #define G_0085D8_SEM_USE_MAILBOX(x) (((x) >> 16) & 0x1) 2573 #define C_0085D8_SEM_USE_MAILBOX 0xFFFEFFFF 2574 #define S_0085D8_SEM_SIGNAL_TYPE(x) (((unsigned)(x) & 0x1) << 20) 2575 #define G_0085D8_SEM_SIGNAL_TYPE(x) (((x) >> 20) & 0x1) 2576 #define C_0085D8_SEM_SIGNAL_TYPE 0xFFEFFFFF 2577 #define S_0085D8_SEM_CLIENT_CODE(x) (((unsigned)(x) & 0x3) << 24) 2578 #define G_0085D8_SEM_CLIENT_CODE(x) (((x) >> 24) & 0x3) 2579 #define C_0085D8_SEM_CLIENT_CODE 0xFCFFFFFF 2580 #define S_0085D8_SEM_SELECT(x) (((unsigned)(x) & 0x7) << 29) 2581 #define G_0085D8_SEM_SELECT(x) (((x) >> 29) & 0x7) 2582 #define C_0085D8_SEM_SELECT 0x1FFFFFFF 2583 #define R_0085EC_CP_COHER_START_DELAY 0x0085EC /* <= gfx6 */ 2584 #define S_0085EC_START_DELAY_COUNT(x) (((unsigned)(x) & 0x3F) << 0) 2585 #define G_0085EC_START_DELAY_COUNT(x) (((x) >> 0) & 0x3F) 2586 #define C_0085EC_START_DELAY_COUNT 0xFFFFFFC0 2587 #define R_0085F0_CP_COHER_CNTL 0x0085F0 /* <= gfx6 */ 2588 #define S_0085F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) 2589 #define G_0085F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) 2590 #define C_0085F0_DEST_BASE_0_ENA 0xFFFFFFFE 2591 #define S_0085F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) 2592 #define G_0085F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) 2593 #define C_0085F0_DEST_BASE_1_ENA 0xFFFFFFFD 2594 #define S_0085F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) 2595 #define G_0085F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) 2596 #define C_0085F0_CB0_DEST_BASE_ENA 0xFFFFFFBF 2597 #define S_0085F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) 2598 #define G_0085F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) 2599 #define C_0085F0_CB1_DEST_BASE_ENA 0xFFFFFF7F 2600 #define S_0085F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) 2601 #define G_0085F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) 2602 #define C_0085F0_CB2_DEST_BASE_ENA 0xFFFFFEFF 2603 #define S_0085F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) 2604 #define G_0085F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) 2605 #define C_0085F0_CB3_DEST_BASE_ENA 0xFFFFFDFF 2606 #define S_0085F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) 2607 #define G_0085F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) 2608 #define C_0085F0_CB4_DEST_BASE_ENA 0xFFFFFBFF 2609 #define S_0085F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) 2610 #define G_0085F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) 2611 #define C_0085F0_CB5_DEST_BASE_ENA 0xFFFFF7FF 2612 #define S_0085F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) 2613 #define G_0085F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) 2614 #define C_0085F0_CB6_DEST_BASE_ENA 0xFFFFEFFF 2615 #define S_0085F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) 2616 #define G_0085F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) 2617 #define C_0085F0_CB7_DEST_BASE_ENA 0xFFFFDFFF 2618 #define S_0085F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) 2619 #define G_0085F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) 2620 #define C_0085F0_DB_DEST_BASE_ENA 0xFFFFBFFF 2621 #define S_0085F0_TCL1_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 15) 2622 #define G_0085F0_TCL1_VOL_ACTION_ENA(x) (((x) >> 15) & 0x1) 2623 #define C_0085F0_TCL1_VOL_ACTION_ENA 0xFFFF7FFF 2624 #define S_0085F0_TC_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 16) 2625 #define G_0085F0_TC_VOL_ACTION_ENA(x) (((x) >> 16) & 0x1) 2626 #define C_0085F0_TC_VOL_ACTION_ENA 0xFFFEFFFF 2627 #define S_0085F0_TC_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 18) 2628 #define G_0085F0_TC_WB_ACTION_ENA(x) (((x) >> 18) & 0x1) 2629 #define C_0085F0_TC_WB_ACTION_ENA 0xFFFBFFFF 2630 #define S_0085F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) 2631 #define G_0085F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) 2632 #define C_0085F0_DEST_BASE_2_ENA 0xFFF7FFFF 2633 #define S_0085F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) 2634 #define G_0085F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) 2635 #define C_0085F0_DEST_BASE_3_ENA 0xFFDFFFFF 2636 #define S_0085F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) 2637 #define G_0085F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) 2638 #define C_0085F0_TCL1_ACTION_ENA 0xFFBFFFFF 2639 #define S_0085F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) 2640 #define G_0085F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) 2641 #define C_0085F0_TC_ACTION_ENA 0xFF7FFFFF 2642 #define S_0085F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) 2643 #define G_0085F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) 2644 #define C_0085F0_CB_ACTION_ENA 0xFDFFFFFF 2645 #define S_0085F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) 2646 #define G_0085F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) 2647 #define C_0085F0_DB_ACTION_ENA 0xFBFFFFFF 2648 #define S_0085F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) 2649 #define G_0085F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) 2650 #define C_0085F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF 2651 #define S_0085F0_SH_KCACHE_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 28) 2652 #define G_0085F0_SH_KCACHE_VOL_ACTION_ENA(x) (((x) >> 28) & 0x1) 2653 #define C_0085F0_SH_KCACHE_VOL_ACTION_ENA 0xEFFFFFFF 2654 #define S_0085F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) 2655 #define G_0085F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) 2656 #define C_0085F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF 2657 #define R_0085F4_CP_COHER_SIZE 0x0085F4 /* <= gfx6 */ 2658 #define R_0085F8_CP_COHER_BASE 0x0085F8 /* <= gfx6 */ 2659 #define R_0085FC_CP_COHER_STATUS 0x0085FC /* <= gfx6 */ 2660 #define S_0085FC_MATCHING_GFX_CNTX(x) (((unsigned)(x) & 0xFF) << 0) 2661 #define G_0085FC_MATCHING_GFX_CNTX(x) (((x) >> 0) & 0xFF) 2662 #define C_0085FC_MATCHING_GFX_CNTX 0xFFFFFF00 2663 #define S_0085FC_MEID(x) (((unsigned)(x) & 0x3) << 24) 2664 #define G_0085FC_MEID(x) (((x) >> 24) & 0x3) 2665 #define C_0085FC_MEID 0xFCFFFFFF 2666 #define S_0085FC_PHASE1_STATUS(x) (((unsigned)(x) & 0x1) << 30) 2667 #define G_0085FC_PHASE1_STATUS(x) (((x) >> 30) & 0x1) 2668 #define C_0085FC_PHASE1_STATUS 0xBFFFFFFF 2669 #define S_0085FC_STATUS(x) (((unsigned)(x) & 0x1) << 31) 2670 #define G_0085FC_STATUS(x) (((x) >> 31) & 0x1) 2671 #define C_0085FC_STATUS 0x7FFFFFFF 2672 #define R_008600_CP_DMA_ME_SRC_ADDR 0x008600 /* <= gfx6 */ 2673 #define R_008604_CP_DMA_ME_SRC_ADDR_HI 0x008604 /* <= gfx6 */ 2674 #define S_008604_SRC_ADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 2675 #define G_008604_SRC_ADDR_HI(x) (((x) >> 0) & 0xFF) 2676 #define C_008604_SRC_ADDR_HI 0xFFFFFF00 2677 #define R_008608_CP_DMA_ME_DST_ADDR 0x008608 /* <= gfx6 */ 2678 #define R_00860C_CP_DMA_ME_DST_ADDR_HI 0x00860C /* <= gfx6 */ 2679 #define S_00860C_DST_ADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 2680 #define G_00860C_DST_ADDR_HI(x) (((x) >> 0) & 0xFF) 2681 #define C_00860C_DST_ADDR_HI 0xFFFFFF00 2682 #define R_008610_CP_DMA_ME_COMMAND 0x008610 /* <= gfx6 */ 2683 #define S_008610_BYTE_COUNT(x) (((unsigned)(x) & 0x1FFFFF) << 0) 2684 #define G_008610_BYTE_COUNT(x) (((x) >> 0) & 0x1FFFFF) 2685 #define C_008610_BYTE_COUNT 0xFFE00000 2686 #define S_008610_DIS_WC(x) (((unsigned)(x) & 0x1) << 21) 2687 #define G_008610_DIS_WC(x) (((x) >> 21) & 0x1) 2688 #define C_008610_DIS_WC 0xFFDFFFFF 2689 #define S_008610_SRC_SWAP(x) (((unsigned)(x) & 0x3) << 22) 2690 #define G_008610_SRC_SWAP(x) (((x) >> 22) & 0x3) 2691 #define C_008610_SRC_SWAP 0xFF3FFFFF 2692 #define S_008610_DST_SWAP(x) (((unsigned)(x) & 0x3) << 24) 2693 #define G_008610_DST_SWAP(x) (((x) >> 24) & 0x3) 2694 #define C_008610_DST_SWAP 0xFCFFFFFF 2695 #define S_008610_SAS(x) (((unsigned)(x) & 0x1) << 26) 2696 #define G_008610_SAS(x) (((x) >> 26) & 0x1) 2697 #define C_008610_SAS 0xFBFFFFFF 2698 #define S_008610_DAS(x) (((unsigned)(x) & 0x1) << 27) 2699 #define G_008610_DAS(x) (((x) >> 27) & 0x1) 2700 #define C_008610_DAS 0xF7FFFFFF 2701 #define S_008610_SAIC(x) (((unsigned)(x) & 0x1) << 28) 2702 #define G_008610_SAIC(x) (((x) >> 28) & 0x1) 2703 #define C_008610_SAIC 0xEFFFFFFF 2704 #define S_008610_DAIC(x) (((unsigned)(x) & 0x1) << 29) 2705 #define G_008610_DAIC(x) (((x) >> 29) & 0x1) 2706 #define C_008610_DAIC 0xDFFFFFFF 2707 #define S_008610_RAW_WAIT(x) (((unsigned)(x) & 0x1) << 30) 2708 #define G_008610_RAW_WAIT(x) (((x) >> 30) & 0x1) 2709 #define C_008610_RAW_WAIT 0xBFFFFFFF 2710 #define R_008614_CP_DMA_PFP_SRC_ADDR 0x008614 /* <= gfx6 */ 2711 #define R_008618_CP_DMA_PFP_SRC_ADDR_HI 0x008618 /* <= gfx6 */ 2712 #define S_008618_SRC_ADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 2713 #define G_008618_SRC_ADDR_HI(x) (((x) >> 0) & 0xFF) 2714 #define C_008618_SRC_ADDR_HI 0xFFFFFF00 2715 #define R_00861C_CP_DMA_PFP_DST_ADDR 0x00861C /* <= gfx6 */ 2716 #define R_008620_CP_DMA_PFP_DST_ADDR_HI 0x008620 /* <= gfx6 */ 2717 #define S_008620_DST_ADDR_HI(x) (((unsigned)(x) & 0xFF) << 0) 2718 #define G_008620_DST_ADDR_HI(x) (((x) >> 0) & 0xFF) 2719 #define C_008620_DST_ADDR_HI 0xFFFFFF00 2720 #define R_008624_CP_DMA_PFP_COMMAND 0x008624 /* <= gfx6 */ 2721 #define S_008624_BYTE_COUNT(x) (((unsigned)(x) & 0x1FFFFF) << 0) 2722 #define G_008624_BYTE_COUNT(x) (((x) >> 0) & 0x1FFFFF) 2723 #define C_008624_BYTE_COUNT 0xFFE00000 2724 #define S_008624_DIS_WC(x) (((unsigned)(x) & 0x1) << 21) 2725 #define G_008624_DIS_WC(x) (((x) >> 21) & 0x1) 2726 #define C_008624_DIS_WC 0xFFDFFFFF 2727 #define S_008624_SRC_SWAP(x) (((unsigned)(x) & 0x3) << 22) 2728 #define G_008624_SRC_SWAP(x) (((x) >> 22) & 0x3) 2729 #define C_008624_SRC_SWAP 0xFF3FFFFF 2730 #define S_008624_DST_SWAP(x) (((unsigned)(x) & 0x3) << 24) 2731 #define G_008624_DST_SWAP(x) (((x) >> 24) & 0x3) 2732 #define C_008624_DST_SWAP 0xFCFFFFFF 2733 #define S_008624_SAS(x) (((unsigned)(x) & 0x1) << 26) 2734 #define G_008624_SAS(x) (((x) >> 26) & 0x1) 2735 #define C_008624_SAS 0xFBFFFFFF 2736 #define S_008624_DAS(x) (((unsigned)(x) & 0x1) << 27) 2737 #define G_008624_DAS(x) (((x) >> 27) & 0x1) 2738 #define C_008624_DAS 0xF7FFFFFF 2739 #define S_008624_SAIC(x) (((unsigned)(x) & 0x1) << 28) 2740 #define G_008624_SAIC(x) (((x) >> 28) & 0x1) 2741 #define C_008624_SAIC 0xEFFFFFFF 2742 #define S_008624_DAIC(x) (((unsigned)(x) & 0x1) << 29) 2743 #define G_008624_DAIC(x) (((x) >> 29) & 0x1) 2744 #define C_008624_DAIC 0xDFFFFFFF 2745 #define S_008624_RAW_WAIT(x) (((unsigned)(x) & 0x1) << 30) 2746 #define G_008624_RAW_WAIT(x) (((x) >> 30) & 0x1) 2747 #define C_008624_RAW_WAIT 0xBFFFFFFF 2748 #define R_008628_CP_DMA_CNTL 0x008628 /* <= gfx6 */ 2749 #define S_008628_MIN_AVAILSZ(x) (((unsigned)(x) & 0x3) << 4) 2750 #define G_008628_MIN_AVAILSZ(x) (((x) >> 4) & 0x3) 2751 #define C_008628_MIN_AVAILSZ 0xFFFFFFCF 2752 #define S_008628_BUFFER_DEPTH(x) (((unsigned)(x) & 0xF) << 16) 2753 #define G_008628_BUFFER_DEPTH(x) (((x) >> 16) & 0xF) 2754 #define C_008628_BUFFER_DEPTH 0xFFF0FFFF 2755 #define S_008628_PIO_FIFO_EMPTY(x) (((unsigned)(x) & 0x1) << 28) 2756 #define G_008628_PIO_FIFO_EMPTY(x) (((x) >> 28) & 0x1) 2757 #define C_008628_PIO_FIFO_EMPTY 0xEFFFFFFF 2758 #define S_008628_PIO_FIFO_FULL(x) (((unsigned)(x) & 0x1) << 29) 2759 #define G_008628_PIO_FIFO_FULL(x) (((x) >> 29) & 0x1) 2760 #define C_008628_PIO_FIFO_FULL 0xDFFFFFFF 2761 #define S_008628_PIO_COUNT(x) (((unsigned)(x) & 0x3) << 30) 2762 #define G_008628_PIO_COUNT(x) (((x) >> 30) & 0x3) 2763 #define C_008628_PIO_COUNT 0x3FFFFFFF 2764 #define R_00862C_CP_DMA_READ_TAGS 0x00862C /* <= gfx6 */ 2765 #define S_00862C_DMA_READ_TAG(x) (((unsigned)(x) & 0x3FFFFFF) << 0) 2766 #define G_00862C_DMA_READ_TAG(x) (((x) >> 0) & 0x3FFFFFF) 2767 #define C_00862C_DMA_READ_TAG 0xFC000000 2768 #define S_00862C_DMA_READ_TAG_VALID(x) (((unsigned)(x) & 0x1) << 28) 2769 #define G_00862C_DMA_READ_TAG_VALID(x) (((x) >> 28) & 0x1) 2770 #define C_00862C_DMA_READ_TAG_VALID 0xEFFFFFFF 2771 #define R_008634_CP_PFP_IB_CONTROL 0x008634 /* <= gfx6 */ 2772 #define S_008634_IB_EN(x) (((unsigned)(x) & 0x1) << 0) 2773 #define G_008634_IB_EN(x) (((x) >> 0) & 0x1) 2774 #define C_008634_IB_EN 0xFFFFFFFE 2775 #define R_008638_CP_PFP_LOAD_CONTROL 0x008638 /* <= gfx6 */ 2776 #define S_008638_CONFIG_REG_EN(x) (((unsigned)(x) & 0x1) << 0) 2777 #define G_008638_CONFIG_REG_EN(x) (((x) >> 0) & 0x1) 2778 #define C_008638_CONFIG_REG_EN 0xFFFFFFFE 2779 #define S_008638_CNTX_REG_EN(x) (((unsigned)(x) & 0x1) << 1) 2780 #define G_008638_CNTX_REG_EN(x) (((x) >> 1) & 0x1) 2781 #define C_008638_CNTX_REG_EN 0xFFFFFFFD 2782 #define S_008638_UCONFIG_REG_EN(x) (((unsigned)(x) & 0x1) << 15) 2783 #define G_008638_UCONFIG_REG_EN(x) (((x) >> 15) & 0x1) 2784 #define C_008638_UCONFIG_REG_EN 0xFFFF7FFF 2785 #define S_008638_SH_GFX_REG_EN(x) (((unsigned)(x) & 0x1) << 16) 2786 #define G_008638_SH_GFX_REG_EN(x) (((x) >> 16) & 0x1) 2787 #define C_008638_SH_GFX_REG_EN 0xFFFEFFFF 2788 #define S_008638_SH_CS_REG_EN(x) (((unsigned)(x) & 0x1) << 24) 2789 #define G_008638_SH_CS_REG_EN(x) (((x) >> 24) & 0x1) 2790 #define C_008638_SH_CS_REG_EN 0xFEFFFFFF 2791 #define R_00863C_CP_SCRATCH_INDEX 0x00863C /* <= gfx6 */ 2792 #define S_00863C_SCRATCH_INDEX(x) (((unsigned)(x) & 0xFF) << 0) 2793 #define G_00863C_SCRATCH_INDEX(x) (((x) >> 0) & 0xFF) 2794 #define C_00863C_SCRATCH_INDEX 0xFFFFFF00 2795 #define R_008640_CP_SCRATCH_DATA 0x008640 /* <= gfx6 */ 2796 #define R_008644_CP_RB_OFFSET 0x008644 /* <= gfx6 */ 2797 #define S_008644_RB_OFFSET(x) (((unsigned)(x) & 0xFFFFF) << 0) 2798 #define G_008644_RB_OFFSET(x) (((x) >> 0) & 0xFFFFF) 2799 #define C_008644_RB_OFFSET 0xFFF00000 2800 #define R_008648_CP_IB1_OFFSET 0x008648 /* <= gfx6 */ 2801 #define S_008648_IB1_OFFSET(x) (((unsigned)(x) & 0xFFFFF) << 0) 2802 #define G_008648_IB1_OFFSET(x) (((x) >> 0) & 0xFFFFF) 2803 #define C_008648_IB1_OFFSET 0xFFF00000 2804 #define R_00864C_CP_IB2_OFFSET 0x00864C /* <= gfx6 */ 2805 #define S_00864C_IB2_OFFSET(x) (((unsigned)(x) & 0xFFFFF) << 0) 2806 #define G_00864C_IB2_OFFSET(x) (((x) >> 0) & 0xFFFFF) 2807 #define C_00864C_IB2_OFFSET 0xFFF00000 2808 #define R_008650_CP_IB1_PREAMBLE_BEGIN 0x008650 /* <= gfx6 */ 2809 #define S_008650_IB1_PREAMBLE_BEGIN(x) (((unsigned)(x) & 0xFFFFF) << 0) 2810 #define G_008650_IB1_PREAMBLE_BEGIN(x) (((x) >> 0) & 0xFFFFF) 2811 #define C_008650_IB1_PREAMBLE_BEGIN 0xFFF00000 2812 #define R_008654_CP_IB1_PREAMBLE_END 0x008654 /* <= gfx6 */ 2813 #define S_008654_IB1_PREAMBLE_END(x) (((unsigned)(x) & 0xFFFFF) << 0) 2814 #define G_008654_IB1_PREAMBLE_END(x) (((x) >> 0) & 0xFFFFF) 2815 #define C_008654_IB1_PREAMBLE_END 0xFFF00000 2816 #define R_008658_CP_IB2_PREAMBLE_BEGIN 0x008658 /* <= gfx6 */ 2817 #define S_008658_IB2_PREAMBLE_BEGIN(x) (((unsigned)(x) & 0xFFFFF) << 0) 2818 #define G_008658_IB2_PREAMBLE_BEGIN(x) (((x) >> 0) & 0xFFFFF) 2819 #define C_008658_IB2_PREAMBLE_BEGIN 0xFFF00000 2820 #define R_00865C_CP_IB2_PREAMBLE_END 0x00865C /* <= gfx6 */ 2821 #define S_00865C_IB2_PREAMBLE_END(x) (((unsigned)(x) & 0xFFFFF) << 0) 2822 #define G_00865C_IB2_PREAMBLE_END(x) (((x) >> 0) & 0xFFFFF) 2823 #define C_00865C_IB2_PREAMBLE_END 0xFFF00000 2824 #define R_008670_CP_STALLED_STAT3 0x008670 /* <= gfx6 */ 2825 #define S_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) 2826 #define G_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) 2827 #define C_008670_CE_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE 2828 #define S_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) 2829 #define G_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) 2830 #define C_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV 0xFFFFFFFD 2831 #define S_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((unsigned)(x) & 0x1) << 2) 2832 #define G_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((x) >> 2) & 0x1) 2833 #define C_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER 0xFFFFFFFB 2834 #define S_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((unsigned)(x) & 0x1) << 3) 2835 #define G_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((x) >> 3) & 0x1) 2836 #define C_008670_CE_TO_RAM_INIT_NOT_RDY 0xFFFFFFF7 2837 #define S_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((unsigned)(x) & 0x1) << 4) 2838 #define G_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((x) >> 4) & 0x1) 2839 #define C_008670_CE_TO_RAM_DUMP_NOT_RDY 0xFFFFFFEF 2840 #define S_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((unsigned)(x) & 0x1) << 5) 2841 #define G_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((x) >> 5) & 0x1) 2842 #define C_008670_CE_TO_RAM_WRITE_NOT_RDY 0xFFFFFFDF 2843 #define S_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 6) 2844 #define G_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 6) & 0x1) 2845 #define C_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV 0xFFFFFFBF 2846 #define S_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 7) 2847 #define G_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 7) & 0x1) 2848 #define C_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV 0xFFFFFF7F 2849 #define S_008670_CE_TO_MIU_WRITE_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 8) 2850 #define G_008670_CE_TO_MIU_WRITE_NOT_RDY_TO_RCV(x) (((x) >> 8) & 0x1) 2851 #define C_008670_CE_TO_MIU_WRITE_NOT_RDY_TO_RCV 0xFFFFFEFF 2852 #define S_008670_CE_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 10) 2853 #define G_008670_CE_WAITING_ON_BUFFER_DATA(x) (((x) >> 10) & 0x1) 2854 #define C_008670_CE_WAITING_ON_BUFFER_DATA 0xFFFFFBFF 2855 #define S_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) 2856 #define G_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) 2857 #define C_008670_CE_WAITING_ON_CE_BUFFER_FLAG 0xFFFFF7FF 2858 #define S_008670_CE_WAITING_ON_DE_COUNTER(x) (((unsigned)(x) & 0x1) << 12) 2859 #define G_008670_CE_WAITING_ON_DE_COUNTER(x) (((x) >> 12) & 0x1) 2860 #define C_008670_CE_WAITING_ON_DE_COUNTER 0xFFFFEFFF 2861 #define S_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((unsigned)(x) & 0x1) << 13) 2862 #define G_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((x) >> 13) & 0x1) 2863 #define C_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW 0xFFFFDFFF 2864 #define S_008670_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 14) 2865 #define G_008670_TCIU_WAITING_ON_FREE(x) (((x) >> 14) & 0x1) 2866 #define C_008670_TCIU_WAITING_ON_FREE 0xFFFFBFFF 2867 #define S_008670_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 15) 2868 #define G_008670_TCIU_WAITING_ON_TAGS(x) (((x) >> 15) & 0x1) 2869 #define C_008670_TCIU_WAITING_ON_TAGS 0xFFFF7FFF 2870 #define R_008674_CP_STALLED_STAT1 0x008674 /* <= gfx6 */ 2871 #define S_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) 2872 #define G_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) 2873 #define C_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV 0xFFFFFFFE 2874 #define S_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) 2875 #define G_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) 2876 #define C_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV 0xFFFFFFFB 2877 #define S_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 4) 2878 #define G_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((x) >> 4) & 0x1) 2879 #define C_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV 0xFFFFFFEF 2880 #define S_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 10) 2881 #define G_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((x) >> 10) & 0x1) 2882 #define C_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG 0xFFFFFBFF 2883 #define S_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) 2884 #define G_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) 2885 #define C_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG 0xFFFFF7FF 2886 #define S_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 12) 2887 #define G_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 12) & 0x1) 2888 #define C_008674_ME_STALLED_ON_TC_WR_CONFIRM 0xFFFFEFFF 2889 #define S_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 13) 2890 #define G_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 13) & 0x1) 2891 #define C_008674_ME_STALLED_ON_ATOMIC_RTN_DATA 0xFFFFDFFF 2892 #define S_008674_ME_WAITING_ON_MC_READ_DATA(x) (((unsigned)(x) & 0x1) << 14) 2893 #define G_008674_ME_WAITING_ON_MC_READ_DATA(x) (((x) >> 14) & 0x1) 2894 #define C_008674_ME_WAITING_ON_MC_READ_DATA 0xFFFFBFFF 2895 #define S_008674_ME_WAITING_ON_REG_READ_DATA(x) (((unsigned)(x) & 0x1) << 15) 2896 #define G_008674_ME_WAITING_ON_REG_READ_DATA(x) (((x) >> 15) & 0x1) 2897 #define C_008674_ME_WAITING_ON_REG_READ_DATA 0xFFFF7FFF 2898 #define S_008674_MIU_WAITING_ON_RDREQ_FREE(x) (((unsigned)(x) & 0x1) << 16) 2899 #define G_008674_MIU_WAITING_ON_RDREQ_FREE(x) (((x) >> 16) & 0x1) 2900 #define C_008674_MIU_WAITING_ON_RDREQ_FREE 0xFFFEFFFF 2901 #define S_008674_MIU_WAITING_ON_WRREQ_FREE(x) (((unsigned)(x) & 0x1) << 17) 2902 #define G_008674_MIU_WAITING_ON_WRREQ_FREE(x) (((x) >> 17) & 0x1) 2903 #define C_008674_MIU_WAITING_ON_WRREQ_FREE 0xFFFDFFFF 2904 #define S_008674_RCIU_WAITING_ON_GDS_FREE(x) (((unsigned)(x) & 0x1) << 23) 2905 #define G_008674_RCIU_WAITING_ON_GDS_FREE(x) (((x) >> 23) & 0x1) 2906 #define C_008674_RCIU_WAITING_ON_GDS_FREE 0xFF7FFFFF 2907 #define S_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((unsigned)(x) & 0x1) << 24) 2908 #define G_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((x) >> 24) & 0x1) 2909 #define C_008674_RCIU_WAITING_ON_GRBM_FREE 0xFEFFFFFF 2910 #define S_008674_RCIU_WAITING_ON_VGT_FREE(x) (((unsigned)(x) & 0x1) << 25) 2911 #define G_008674_RCIU_WAITING_ON_VGT_FREE(x) (((x) >> 25) & 0x1) 2912 #define C_008674_RCIU_WAITING_ON_VGT_FREE 0xFDFFFFFF 2913 #define S_008674_RCIU_STALLED_ON_ME_READ(x) (((unsigned)(x) & 0x1) << 26) 2914 #define G_008674_RCIU_STALLED_ON_ME_READ(x) (((x) >> 26) & 0x1) 2915 #define C_008674_RCIU_STALLED_ON_ME_READ 0xFBFFFFFF 2916 #define S_008674_RCIU_STALLED_ON_DMA_READ(x) (((unsigned)(x) & 0x1) << 27) 2917 #define G_008674_RCIU_STALLED_ON_DMA_READ(x) (((x) >> 27) & 0x1) 2918 #define C_008674_RCIU_STALLED_ON_DMA_READ 0xF7FFFFFF 2919 #define S_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((unsigned)(x) & 0x1) << 28) 2920 #define G_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((x) >> 28) & 0x1) 2921 #define C_008674_RCIU_HALTED_BY_REG_VIOLATION 0xEFFFFFFF 2922 #define S_008674_RCIU_STALLED_ON_APPEND_READ(x) (((unsigned)(x) & 0x1) << 28) 2923 #define G_008674_RCIU_STALLED_ON_APPEND_READ(x) (((x) >> 28) & 0x1) 2924 #define C_008674_RCIU_STALLED_ON_APPEND_READ 0xEFFFFFFF 2925 #define R_008678_CP_STALLED_STAT2 0x008678 /* <= gfx6 */ 2926 #define S_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) 2927 #define G_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) 2928 #define C_008678_PFP_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE 2929 #define S_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) 2930 #define G_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) 2931 #define C_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV 0xFFFFFFFD 2932 #define S_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) 2933 #define G_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) 2934 #define C_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV 0xFFFFFFFB 2935 #define S_008678_PFP_TO_VGT_WRITES_PENDING(x) (((unsigned)(x) & 0x1) << 4) 2936 #define G_008678_PFP_TO_VGT_WRITES_PENDING(x) (((x) >> 4) & 0x1) 2937 #define C_008678_PFP_TO_VGT_WRITES_PENDING 0xFFFFFFEF 2938 #define S_008678_PFP_RCIU_READ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 2939 #define G_008678_PFP_RCIU_READ_PENDING(x) (((x) >> 5) & 0x1) 2940 #define C_008678_PFP_RCIU_READ_PENDING 0xFFFFFFDF 2941 #define S_008678_PFP_MIU_READ_PENDING(x) (((unsigned)(x) & 0x1) << 6) 2942 #define G_008678_PFP_MIU_READ_PENDING(x) (((x) >> 6) & 0x1) 2943 #define C_008678_PFP_MIU_READ_PENDING 0xFFFFFFBF 2944 #define S_008678_PFP_TO_MIU_WRITE_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 7) 2945 #define G_008678_PFP_TO_MIU_WRITE_NOT_RDY_TO_RCV(x) (((x) >> 7) & 0x1) 2946 #define C_008678_PFP_TO_MIU_WRITE_NOT_RDY_TO_RCV 0xFFFFFF7F 2947 #define S_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 8) 2948 #define G_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((x) >> 8) & 0x1) 2949 #define C_008678_PFP_WAITING_ON_BUFFER_DATA 0xFFFFFEFF 2950 #define S_008678_ME_WAIT_ON_CE_COUNTER(x) (((unsigned)(x) & 0x1) << 9) 2951 #define G_008678_ME_WAIT_ON_CE_COUNTER(x) (((x) >> 9) & 0x1) 2952 #define C_008678_ME_WAIT_ON_CE_COUNTER 0xFFFFFDFF 2953 #define S_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((unsigned)(x) & 0x1) << 10) 2954 #define G_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((x) >> 10) & 0x1) 2955 #define C_008678_ME_WAIT_ON_AVAIL_BUFFER 0xFFFFFBFF 2956 #define S_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((unsigned)(x) & 0x1) << 11) 2957 #define G_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((x) >> 11) & 0x1) 2958 #define C_008678_GFX_CNTX_NOT_AVAIL_TO_ME 0xFFFFF7FF 2959 #define S_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 12) 2960 #define G_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 12) & 0x1) 2961 #define C_008678_ME_RCIU_NOT_RDY_TO_RCV 0xFFFFEFFF 2962 #define S_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 13) 2963 #define G_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((x) >> 13) & 0x1) 2964 #define C_008678_ME_TO_CONST_NOT_RDY_TO_RCV 0xFFFFDFFF 2965 #define S_008678_ME_WAITING_DATA_FROM_PFP(x) (((unsigned)(x) & 0x1) << 14) 2966 #define G_008678_ME_WAITING_DATA_FROM_PFP(x) (((x) >> 14) & 0x1) 2967 #define C_008678_ME_WAITING_DATA_FROM_PFP 0xFFFFBFFF 2968 #define S_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((unsigned)(x) & 0x1) << 15) 2969 #define G_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((x) >> 15) & 0x1) 2970 #define C_008678_ME_WAITING_ON_PARTIAL_FLUSH 0xFFFF7FFF 2971 #define S_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 16) 2972 #define G_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 16) & 0x1) 2973 #define C_008678_MEQ_TO_ME_NOT_RDY_TO_RCV 0xFFFEFFFF 2974 #define S_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 17) 2975 #define G_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 17) & 0x1) 2976 #define C_008678_STQ_TO_ME_NOT_RDY_TO_RCV 0xFFFDFFFF 2977 #define S_008678_ME_WAITING_DATA_FROM_STQ(x) (((unsigned)(x) & 0x1) << 18) 2978 #define G_008678_ME_WAITING_DATA_FROM_STQ(x) (((x) >> 18) & 0x1) 2979 #define C_008678_ME_WAITING_DATA_FROM_STQ 0xFFFBFFFF 2980 #define S_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 19) 2981 #define G_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 19) & 0x1) 2982 #define C_008678_PFP_STALLED_ON_TC_WR_CONFIRM 0xFFF7FFFF 2983 #define S_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 20) 2984 #define G_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 20) & 0x1) 2985 #define C_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA 0xFFEFFFFF 2986 #define S_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((unsigned)(x) & 0x1) << 21) 2987 #define G_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((x) >> 21) & 0x1) 2988 #define C_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE 0xFFDFFFFF 2989 #define S_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 22) 2990 #define G_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((x) >> 22) & 0x1) 2991 #define C_008678_EOPD_FIFO_NEEDS_WR_CONFIRM 0xFFBFFFFF 2992 #define S_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 23) 2993 #define G_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((x) >> 23) & 0x1) 2994 #define C_008678_STRMO_WR_OF_PRIM_DATA_PENDING 0xFF7FFFFF 2995 #define S_008678_PIPE_STATS_WR_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 24) 2996 #define G_008678_PIPE_STATS_WR_DATA_PENDING(x) (((x) >> 24) & 0x1) 2997 #define C_008678_PIPE_STATS_WR_DATA_PENDING 0xFEFFFFFF 2998 #define S_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((unsigned)(x) & 0x1) << 25) 2999 #define G_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((x) >> 25) & 0x1) 3000 #define C_008678_APPEND_RDY_WAIT_ON_CS_DONE 0xFDFFFFFF 3001 #define S_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((unsigned)(x) & 0x1) << 26) 3002 #define G_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((x) >> 26) & 0x1) 3003 #define C_008678_APPEND_RDY_WAIT_ON_PS_DONE 0xFBFFFFFF 3004 #define S_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 27) 3005 #define G_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((x) >> 27) & 0x1) 3006 #define C_008678_APPEND_WAIT_ON_WR_CONFIRM 0xF7FFFFFF 3007 #define S_008678_APPEND_ACTIVE_PARTITION(x) (((unsigned)(x) & 0x1) << 28) 3008 #define G_008678_APPEND_ACTIVE_PARTITION(x) (((x) >> 28) & 0x1) 3009 #define C_008678_APPEND_ACTIVE_PARTITION 0xEFFFFFFF 3010 #define S_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((unsigned)(x) & 0x1) << 29) 3011 #define G_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((x) >> 29) & 0x1) 3012 #define C_008678_APPEND_WAITING_TO_SEND_MEMWRITE 0xDFFFFFFF 3013 #define S_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((unsigned)(x) & 0x1) << 30) 3014 #define G_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((x) >> 30) & 0x1) 3015 #define C_008678_SURF_SYNC_NEEDS_IDLE_CNTXS 0xBFFFFFFF 3016 #define S_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((unsigned)(x) & 0x1) << 31) 3017 #define G_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((x) >> 31) & 0x1) 3018 #define C_008678_SURF_SYNC_NEEDS_ALL_CLEAN 0x7FFFFFFF 3019 #define R_00867C_CP_BUSY_STAT 0x00867C /* <= gfx6 */ 3020 #define S_00867C_REG_BUS_FIFO_BUSY(x) (((unsigned)(x) & 0x1) << 0) 3021 #define G_00867C_REG_BUS_FIFO_BUSY(x) (((x) >> 0) & 0x1) 3022 #define C_00867C_REG_BUS_FIFO_BUSY 0xFFFFFFFE 3023 #define S_00867C_COHER_CNT_NEQ_ZERO(x) (((unsigned)(x) & 0x1) << 6) 3024 #define G_00867C_COHER_CNT_NEQ_ZERO(x) (((x) >> 6) & 0x1) 3025 #define C_00867C_COHER_CNT_NEQ_ZERO 0xFFFFFFBF 3026 #define S_00867C_PFP_PARSING_PACKETS(x) (((unsigned)(x) & 0x1) << 7) 3027 #define G_00867C_PFP_PARSING_PACKETS(x) (((x) >> 7) & 0x1) 3028 #define C_00867C_PFP_PARSING_PACKETS 0xFFFFFF7F 3029 #define S_00867C_ME_PARSING_PACKETS(x) (((unsigned)(x) & 0x1) << 8) 3030 #define G_00867C_ME_PARSING_PACKETS(x) (((x) >> 8) & 0x1) 3031 #define C_00867C_ME_PARSING_PACKETS 0xFFFFFEFF 3032 #define S_00867C_RCIU_PFP_BUSY(x) (((unsigned)(x) & 0x1) << 9) 3033 #define G_00867C_RCIU_PFP_BUSY(x) (((x) >> 9) & 0x1) 3034 #define C_00867C_RCIU_PFP_BUSY 0xFFFFFDFF 3035 #define S_00867C_RCIU_ME_BUSY(x) (((unsigned)(x) & 0x1) << 10) 3036 #define G_00867C_RCIU_ME_BUSY(x) (((x) >> 10) & 0x1) 3037 #define C_00867C_RCIU_ME_BUSY 0xFFFFFBFF 3038 #define S_00867C_SEM_CMDFIFO_NOT_EMPTY(x) (((unsigned)(x) & 0x1) << 12) 3039 #define G_00867C_SEM_CMDFIFO_NOT_EMPTY(x) (((x) >> 12) & 0x1) 3040 #define C_00867C_SEM_CMDFIFO_NOT_EMPTY 0xFFFFEFFF 3041 #define S_00867C_SEM_FAILED_AND_HOLDING(x) (((unsigned)(x) & 0x1) << 13) 3042 #define G_00867C_SEM_FAILED_AND_HOLDING(x) (((x) >> 13) & 0x1) 3043 #define C_00867C_SEM_FAILED_AND_HOLDING 0xFFFFDFFF 3044 #define S_00867C_SEM_POLLING_FOR_PASS(x) (((unsigned)(x) & 0x1) << 14) 3045 #define G_00867C_SEM_POLLING_FOR_PASS(x) (((x) >> 14) & 0x1) 3046 #define C_00867C_SEM_POLLING_FOR_PASS 0xFFFFBFFF 3047 #define S_00867C_GFX_CONTEXT_BUSY(x) (((unsigned)(x) & 0x1) << 15) 3048 #define G_00867C_GFX_CONTEXT_BUSY(x) (((x) >> 15) & 0x1) 3049 #define C_00867C_GFX_CONTEXT_BUSY 0xFFFF7FFF 3050 #define S_00867C_ME_PARSER_BUSY(x) (((unsigned)(x) & 0x1) << 17) 3051 #define G_00867C_ME_PARSER_BUSY(x) (((x) >> 17) & 0x1) 3052 #define C_00867C_ME_PARSER_BUSY 0xFFFDFFFF 3053 #define S_00867C_EOP_DONE_BUSY(x) (((unsigned)(x) & 0x1) << 18) 3054 #define G_00867C_EOP_DONE_BUSY(x) (((x) >> 18) & 0x1) 3055 #define C_00867C_EOP_DONE_BUSY 0xFFFBFFFF 3056 #define S_00867C_STRM_OUT_BUSY(x) (((unsigned)(x) & 0x1) << 19) 3057 #define G_00867C_STRM_OUT_BUSY(x) (((x) >> 19) & 0x1) 3058 #define C_00867C_STRM_OUT_BUSY 0xFFF7FFFF 3059 #define S_00867C_PIPE_STATS_BUSY(x) (((unsigned)(x) & 0x1) << 20) 3060 #define G_00867C_PIPE_STATS_BUSY(x) (((x) >> 20) & 0x1) 3061 #define C_00867C_PIPE_STATS_BUSY 0xFFEFFFFF 3062 #define S_00867C_RCIU_CE_BUSY(x) (((unsigned)(x) & 0x1) << 21) 3063 #define G_00867C_RCIU_CE_BUSY(x) (((x) >> 21) & 0x1) 3064 #define C_00867C_RCIU_CE_BUSY 0xFFDFFFFF 3065 #define S_00867C_CE_PARSING_PACKETS(x) (((unsigned)(x) & 0x1) << 22) 3066 #define G_00867C_CE_PARSING_PACKETS(x) (((x) >> 22) & 0x1) 3067 #define C_00867C_CE_PARSING_PACKETS 0xFFBFFFFF 3068 #define R_008680_CP_STAT 0x008680 /* <= gfx6 */ 3069 #define S_008680_MIU_RDREQ_BUSY(x) (((unsigned)(x) & 0x1) << 7) 3070 #define G_008680_MIU_RDREQ_BUSY(x) (((x) >> 7) & 0x1) 3071 #define C_008680_MIU_RDREQ_BUSY 0xFFFFFF7F 3072 #define S_008680_MIU_WRREQ_BUSY(x) (((unsigned)(x) & 0x1) << 8) 3073 #define G_008680_MIU_WRREQ_BUSY(x) (((x) >> 8) & 0x1) 3074 #define C_008680_MIU_WRREQ_BUSY 0xFFFFFEFF 3075 #define S_008680_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) 3076 #define G_008680_ROQ_RING_BUSY(x) (((x) >> 9) & 0x1) 3077 #define C_008680_ROQ_RING_BUSY 0xFFFFFDFF 3078 #define S_008680_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) 3079 #define G_008680_ROQ_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) 3080 #define C_008680_ROQ_INDIRECT1_BUSY 0xFFFFFBFF 3081 #define S_008680_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) 3082 #define G_008680_ROQ_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) 3083 #define C_008680_ROQ_INDIRECT2_BUSY 0xFFFFF7FF 3084 #define S_008680_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 12) 3085 #define G_008680_ROQ_STATE_BUSY(x) (((x) >> 12) & 0x1) 3086 #define C_008680_ROQ_STATE_BUSY 0xFFFFEFFF 3087 #define S_008680_DC_BUSY(x) (((unsigned)(x) & 0x1) << 13) 3088 #define G_008680_DC_BUSY(x) (((x) >> 13) & 0x1) 3089 #define C_008680_DC_BUSY 0xFFFFDFFF 3090 #define S_008680_PFP_BUSY(x) (((unsigned)(x) & 0x1) << 15) 3091 #define G_008680_PFP_BUSY(x) (((x) >> 15) & 0x1) 3092 #define C_008680_PFP_BUSY 0xFFFF7FFF 3093 #define S_008680_MEQ_BUSY(x) (((unsigned)(x) & 0x1) << 16) 3094 #define G_008680_MEQ_BUSY(x) (((x) >> 16) & 0x1) 3095 #define C_008680_MEQ_BUSY 0xFFFEFFFF 3096 #define S_008680_ME_BUSY(x) (((unsigned)(x) & 0x1) << 17) 3097 #define G_008680_ME_BUSY(x) (((x) >> 17) & 0x1) 3098 #define C_008680_ME_BUSY 0xFFFDFFFF 3099 #define S_008680_QUERY_BUSY(x) (((unsigned)(x) & 0x1) << 18) 3100 #define G_008680_QUERY_BUSY(x) (((x) >> 18) & 0x1) 3101 #define C_008680_QUERY_BUSY 0xFFFBFFFF 3102 #define S_008680_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 19) 3103 #define G_008680_SEMAPHORE_BUSY(x) (((x) >> 19) & 0x1) 3104 #define C_008680_SEMAPHORE_BUSY 0xFFF7FFFF 3105 #define S_008680_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 20) 3106 #define G_008680_INTERRUPT_BUSY(x) (((x) >> 20) & 0x1) 3107 #define C_008680_INTERRUPT_BUSY 0xFFEFFFFF 3108 #define S_008680_SURFACE_SYNC_BUSY(x) (((unsigned)(x) & 0x1) << 21) 3109 #define G_008680_SURFACE_SYNC_BUSY(x) (((x) >> 21) & 0x1) 3110 #define C_008680_SURFACE_SYNC_BUSY 0xFFDFFFFF 3111 #define S_008680_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 22) 3112 #define G_008680_DMA_BUSY(x) (((x) >> 22) & 0x1) 3113 #define C_008680_DMA_BUSY 0xFFBFFFFF 3114 #define S_008680_RCIU_BUSY(x) (((unsigned)(x) & 0x1) << 23) 3115 #define G_008680_RCIU_BUSY(x) (((x) >> 23) & 0x1) 3116 #define C_008680_RCIU_BUSY 0xFF7FFFFF 3117 #define S_008680_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 24) 3118 #define G_008680_SCRATCH_RAM_BUSY(x) (((x) >> 24) & 0x1) 3119 #define C_008680_SCRATCH_RAM_BUSY 0xFEFFFFFF 3120 #define S_008680_CPC_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 25) 3121 #define G_008680_CPC_CPG_BUSY(x) (((x) >> 25) & 0x1) 3122 #define C_008680_CPC_CPG_BUSY 0xFDFFFFFF 3123 #define S_008680_CE_BUSY(x) (((unsigned)(x) & 0x1) << 26) 3124 #define G_008680_CE_BUSY(x) (((x) >> 26) & 0x1) 3125 #define C_008680_CE_BUSY 0xFBFFFFFF 3126 #define S_008680_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 27) 3127 #define G_008680_TCIU_BUSY(x) (((x) >> 27) & 0x1) 3128 #define C_008680_TCIU_BUSY 0xF7FFFFFF 3129 #define S_008680_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 28) 3130 #define G_008680_ROQ_CE_RING_BUSY(x) (((x) >> 28) & 0x1) 3131 #define C_008680_ROQ_CE_RING_BUSY 0xEFFFFFFF 3132 #define S_008680_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 29) 3133 #define G_008680_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 29) & 0x1) 3134 #define C_008680_ROQ_CE_INDIRECT1_BUSY 0xDFFFFFFF 3135 #define S_008680_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 30) 3136 #define G_008680_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 30) & 0x1) 3137 #define C_008680_ROQ_CE_INDIRECT2_BUSY 0xBFFFFFFF 3138 #define S_008680_CP_BUSY(x) (((unsigned)(x) & 0x1) << 31) 3139 #define G_008680_CP_BUSY(x) (((x) >> 31) & 0x1) 3140 #define C_008680_CP_BUSY 0x7FFFFFFF 3141 #define R_008684_CP_ME_HEADER_DUMP 0x008684 /* <= gfx6 */ 3142 #define R_008688_CP_PFP_HEADER_DUMP 0x008688 /* <= gfx6 */ 3143 #define R_00868C_CP_GRBM_FREE_COUNT 0x00868C /* <= gfx6 */ 3144 #define S_00868C_FREE_COUNT(x) (((unsigned)(x) & 0x3F) << 0) 3145 #define G_00868C_FREE_COUNT(x) (((x) >> 0) & 0x3F) 3146 #define C_00868C_FREE_COUNT 0xFFFFFFC0 3147 #define S_00868C_FREE_COUNT_GDS(x) (((unsigned)(x) & 0x3F) << 8) 3148 #define G_00868C_FREE_COUNT_GDS(x) (((x) >> 8) & 0x3F) 3149 #define C_00868C_FREE_COUNT_GDS 0xFFFFC0FF 3150 #define S_00868C_FREE_COUNT_PFP(x) (((unsigned)(x) & 0x3F) << 16) 3151 #define G_00868C_FREE_COUNT_PFP(x) (((x) >> 16) & 0x3F) 3152 #define C_00868C_FREE_COUNT_PFP 0xFFC0FFFF 3153 #define R_008690_CP_CE_HEADER_DUMP 0x008690 /* <= gfx6 */ 3154 #define R_00869C_CP_MC_PACK_DELAY_CNT 0x00869C /* <= gfx6 */ 3155 #define S_00869C_PACK_DELAY_CNT(x) (((unsigned)(x) & 0x1F) << 0) 3156 #define G_00869C_PACK_DELAY_CNT(x) (((x) >> 0) & 0x1F) 3157 #define C_00869C_PACK_DELAY_CNT 0xFFFFFFE0 3158 #define R_0086D0_CP_CSF_STAT 0x0086D0 /* <= gfx6 */ 3159 #define S_0086D0_BUFFER_SLOTS_ALLOCATED(x) (((unsigned)(x) & 0xF) << 0) 3160 #define G_0086D0_BUFFER_SLOTS_ALLOCATED(x) (((x) >> 0) & 0xF) 3161 #define C_0086D0_BUFFER_SLOTS_ALLOCATED 0xFFFFFFF0 3162 #define S_0086D0_BUFFER_REQUEST_COUNT(x) (((unsigned)(x) & 0x3F) << 8) 3163 #define G_0086D0_BUFFER_REQUEST_COUNT(x) (((x) >> 8) & 0x3F) 3164 #define C_0086D0_BUFFER_REQUEST_COUNT 0xFFFFC0FF 3165 #define R_0086D4_CP_CSF_CNTL 0x0086D4 /* <= gfx6 */ 3166 #define S_0086D4_FETCH_BUFFER_DEPTH(x) (((unsigned)(x) & 0xF) << 0) 3167 #define G_0086D4_FETCH_BUFFER_DEPTH(x) (((x) >> 0) & 0xF) 3168 #define C_0086D4_FETCH_BUFFER_DEPTH 0xFFFFFFF0 3169 #define R_0086D8_CP_ME_CNTL 0x0086D8 /* <= gfx6 */ 3170 #define S_0086D8_CE_INVALIDATE_ICACHE(x) (((unsigned)(x) & 0x1) << 4) 3171 #define G_0086D8_CE_INVALIDATE_ICACHE(x) (((x) >> 4) & 0x1) 3172 #define C_0086D8_CE_INVALIDATE_ICACHE 0xFFFFFFEF 3173 #define S_0086D8_PFP_INVALIDATE_ICACHE(x) (((unsigned)(x) & 0x1) << 6) 3174 #define G_0086D8_PFP_INVALIDATE_ICACHE(x) (((x) >> 6) & 0x1) 3175 #define C_0086D8_PFP_INVALIDATE_ICACHE 0xFFFFFFBF 3176 #define S_0086D8_ME_INVALIDATE_ICACHE(x) (((unsigned)(x) & 0x1) << 8) 3177 #define G_0086D8_ME_INVALIDATE_ICACHE(x) (((x) >> 8) & 0x1) 3178 #define C_0086D8_ME_INVALIDATE_ICACHE 0xFFFFFEFF 3179 #define S_0086D8_CE_HALT(x) (((unsigned)(x) & 0x1) << 24) 3180 #define G_0086D8_CE_HALT(x) (((x) >> 24) & 0x1) 3181 #define C_0086D8_CE_HALT 0xFEFFFFFF 3182 #define S_0086D8_CE_STEP(x) (((unsigned)(x) & 0x1) << 25) 3183 #define G_0086D8_CE_STEP(x) (((x) >> 25) & 0x1) 3184 #define C_0086D8_CE_STEP 0xFDFFFFFF 3185 #define S_0086D8_PFP_HALT(x) (((unsigned)(x) & 0x1) << 26) 3186 #define G_0086D8_PFP_HALT(x) (((x) >> 26) & 0x1) 3187 #define C_0086D8_PFP_HALT 0xFBFFFFFF 3188 #define S_0086D8_PFP_STEP(x) (((unsigned)(x) & 0x1) << 27) 3189 #define G_0086D8_PFP_STEP(x) (((x) >> 27) & 0x1) 3190 #define C_0086D8_PFP_STEP 0xF7FFFFFF 3191 #define S_0086D8_ME_HALT(x) (((unsigned)(x) & 0x1) << 28) 3192 #define G_0086D8_ME_HALT(x) (((x) >> 28) & 0x1) 3193 #define C_0086D8_ME_HALT 0xEFFFFFFF 3194 #define S_0086D8_ME_STEP(x) (((unsigned)(x) & 0x1) << 29) 3195 #define G_0086D8_ME_STEP(x) (((x) >> 29) & 0x1) 3196 #define C_0086D8_ME_STEP 0xDFFFFFFF 3197 #define R_0086E0_CP_CNTX_STAT 0x0086E0 /* <= gfx6 */ 3198 #define S_0086E0_ACTIVE_HP3D_CONTEXTS(x) (((unsigned)(x) & 0xFF) << 0) 3199 #define G_0086E0_ACTIVE_HP3D_CONTEXTS(x) (((x) >> 0) & 0xFF) 3200 #define C_0086E0_ACTIVE_HP3D_CONTEXTS 0xFFFFFF00 3201 #define S_0086E0_CURRENT_HP3D_CONTEXT(x) (((unsigned)(x) & 0x7) << 8) 3202 #define G_0086E0_CURRENT_HP3D_CONTEXT(x) (((x) >> 8) & 0x7) 3203 #define C_0086E0_CURRENT_HP3D_CONTEXT 0xFFFFF8FF 3204 #define S_0086E0_ACTIVE_GFX_CONTEXTS(x) (((unsigned)(x) & 0xFF) << 20) 3205 #define G_0086E0_ACTIVE_GFX_CONTEXTS(x) (((x) >> 20) & 0xFF) 3206 #define C_0086E0_ACTIVE_GFX_CONTEXTS 0xF00FFFFF 3207 #define S_0086E0_CURRENT_GFX_CONTEXT(x) (((unsigned)(x) & 0x7) << 28) 3208 #define G_0086E0_CURRENT_GFX_CONTEXT(x) (((x) >> 28) & 0x7) 3209 #define C_0086E0_CURRENT_GFX_CONTEXT 0x8FFFFFFF 3210 #define R_0086E4_CP_ME_PREEMPTION 0x0086E4 /* <= gfx6 */ 3211 #define S_0086E4_ME_CNTXSW_PREEMPTION(x) (((unsigned)(x) & 0x1) << 0) 3212 #define G_0086E4_ME_CNTXSW_PREEMPTION(x) (((x) >> 0) & 0x1) 3213 #define C_0086E4_ME_CNTXSW_PREEMPTION 0xFFFFFFFE 3214 #define R_0086F8_CP_RB2_RPTR 0x0086F8 /* <= gfx6 */ 3215 #define S_0086F8_RB_RPTR(x) (((unsigned)(x) & 0xFFFFF) << 0) 3216 #define G_0086F8_RB_RPTR(x) (((x) >> 0) & 0xFFFFF) 3217 #define C_0086F8_RB_RPTR 0xFFF00000 3218 #define R_0086FC_CP_RB1_RPTR 0x0086FC /* <= gfx6 */ 3219 #define R_008700_CP_RB0_RPTR 0x008700 /* <= gfx6 */ 3220 #define R_008704_CP_RB_WPTR_DELAY 0x008704 /* <= gfx6 */ 3221 #define S_008704_PRE_WRITE_TIMER(x) (((unsigned)(x) & 0xFFFFFFF) << 0) 3222 #define G_008704_PRE_WRITE_TIMER(x) (((x) >> 0) & 0xFFFFFFF) 3223 #define C_008704_PRE_WRITE_TIMER 0xF0000000 3224 #define S_008704_PRE_WRITE_LIMIT(x) (((unsigned)(x) & 0xF) << 28) 3225 #define G_008704_PRE_WRITE_LIMIT(x) (((x) >> 28) & 0xF) 3226 #define C_008704_PRE_WRITE_LIMIT 0x0FFFFFFF 3227 #define R_008708_CP_RB_WPTR_POLL_CNTL 0x008708 /* <= gfx6 */ 3228 #define S_008708_POLL_FREQUENCY(x) (((unsigned)(x) & 0xFFFF) << 0) 3229 #define G_008708_POLL_FREQUENCY(x) (((x) >> 0) & 0xFFFF) 3230 #define C_008708_POLL_FREQUENCY 0xFFFF0000 3231 #define S_008708_IDLE_POLL_COUNT(x) (((unsigned)(x) & 0xFFFF) << 16) 3232 #define G_008708_IDLE_POLL_COUNT(x) (((x) >> 16) & 0xFFFF) 3233 #define C_008708_IDLE_POLL_COUNT 0x0000FFFF 3234 #define R_00870C_CP_CE_INIT_BASE_LO 0x00870C /* <= gfx6 */ 3235 #define S_00870C_INIT_BASE_LO(x) (((unsigned)(x) & 0x7FFFFFF) << 5) 3236 #define G_00870C_INIT_BASE_LO(x) (((x) >> 5) & 0x7FFFFFF) 3237 #define C_00870C_INIT_BASE_LO 0x0000001F 3238 #define R_008710_CP_CE_INIT_BASE_HI 0x008710 /* <= gfx6 */ 3239 #define S_008710_INIT_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 3240 #define G_008710_INIT_BASE_HI(x) (((x) >> 0) & 0xFF) 3241 #define C_008710_INIT_BASE_HI 0xFFFFFF00 3242 #define R_008714_CP_CE_INIT_BUFSZ 0x008714 /* <= gfx6 */ 3243 #define S_008714_INIT_BUFSZ(x) (((unsigned)(x) & 0xFFF) << 0) 3244 #define G_008714_INIT_BUFSZ(x) (((x) >> 0) & 0xFFF) 3245 #define C_008714_INIT_BUFSZ 0xFFFFF000 3246 #define R_008718_CP_CE_IB1_BASE_LO 0x008718 /* <= gfx6 */ 3247 #define S_008718_IB1_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 3248 #define G_008718_IB1_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 3249 #define C_008718_IB1_BASE_LO 0x00000003 3250 #define R_00871C_CP_CE_IB1_BASE_HI 0x00871C /* <= gfx6 */ 3251 #define S_00871C_IB1_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 3252 #define G_00871C_IB1_BASE_HI(x) (((x) >> 0) & 0xFF) 3253 #define C_00871C_IB1_BASE_HI 0xFFFFFF00 3254 #define R_008720_CP_CE_IB1_BUFSZ 0x008720 /* <= gfx6 */ 3255 #define S_008720_IB1_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 3256 #define G_008720_IB1_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 3257 #define C_008720_IB1_BUFSZ 0xFFF00000 3258 #define R_008724_CP_CE_IB2_BASE_LO 0x008724 /* <= gfx6 */ 3259 #define S_008724_IB2_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 3260 #define G_008724_IB2_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 3261 #define C_008724_IB2_BASE_LO 0x00000003 3262 #define R_008728_CP_CE_IB2_BASE_HI 0x008728 /* <= gfx6 */ 3263 #define S_008728_IB2_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 3264 #define G_008728_IB2_BASE_HI(x) (((x) >> 0) & 0xFF) 3265 #define C_008728_IB2_BASE_HI 0xFFFFFF00 3266 #define R_00872C_CP_CE_IB2_BUFSZ 0x00872C /* <= gfx6 */ 3267 #define S_00872C_IB2_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 3268 #define G_00872C_IB2_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 3269 #define C_00872C_IB2_BUFSZ 0xFFF00000 3270 #define R_008730_CP_IB1_BASE_LO 0x008730 /* <= gfx6 */ 3271 #define S_008730_IB1_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 3272 #define G_008730_IB1_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 3273 #define C_008730_IB1_BASE_LO 0x00000003 3274 #define R_008734_CP_IB1_BASE_HI 0x008734 /* <= gfx6 */ 3275 #define S_008734_IB1_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 3276 #define G_008734_IB1_BASE_HI(x) (((x) >> 0) & 0xFF) 3277 #define C_008734_IB1_BASE_HI 0xFFFFFF00 3278 #define R_008738_CP_IB1_BUFSZ 0x008738 /* <= gfx6 */ 3279 #define S_008738_IB1_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 3280 #define G_008738_IB1_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 3281 #define C_008738_IB1_BUFSZ 0xFFF00000 3282 #define R_00873C_CP_IB2_BASE_LO 0x00873C /* <= gfx6 */ 3283 #define S_00873C_IB2_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 3284 #define G_00873C_IB2_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 3285 #define C_00873C_IB2_BASE_LO 0x00000003 3286 #define R_008740_CP_IB2_BASE_HI 0x008740 /* <= gfx6 */ 3287 #define S_008740_IB2_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 3288 #define G_008740_IB2_BASE_HI(x) (((x) >> 0) & 0xFF) 3289 #define C_008740_IB2_BASE_HI 0xFFFFFF00 3290 #define R_008744_CP_IB2_BUFSZ 0x008744 /* <= gfx6 */ 3291 #define S_008744_IB2_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 3292 #define G_008744_IB2_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 3293 #define C_008744_IB2_BUFSZ 0xFFF00000 3294 #define R_008748_CP_ST_BASE_LO 0x008748 /* <= gfx6 */ 3295 #define S_008748_ST_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 3296 #define G_008748_ST_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 3297 #define C_008748_ST_BASE_LO 0x00000003 3298 #define R_00874C_CP_ST_BASE_HI 0x00874C /* <= gfx6 */ 3299 #define S_00874C_ST_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 3300 #define G_00874C_ST_BASE_HI(x) (((x) >> 0) & 0xFF) 3301 #define C_00874C_ST_BASE_HI 0xFFFFFF00 3302 #define R_008750_CP_ST_BUFSZ 0x008750 /* <= gfx6 */ 3303 #define S_008750_ST_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 3304 #define G_008750_ST_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 3305 #define C_008750_ST_BUFSZ 0xFFF00000 3306 #define R_008754_CP_ROQ1_THRESHOLDS 0x008754 /* <= gfx6 */ 3307 #define S_008754_RB1_START(x) (((unsigned)(x) & 0xFF) << 0) 3308 #define G_008754_RB1_START(x) (((x) >> 0) & 0xFF) 3309 #define C_008754_RB1_START 0xFFFFFF00 3310 #define S_008754_RB2_START(x) (((unsigned)(x) & 0xFF) << 8) 3311 #define G_008754_RB2_START(x) (((x) >> 8) & 0xFF) 3312 #define C_008754_RB2_START 0xFFFF00FF 3313 #define S_008754_R0_IB1_START(x) (((unsigned)(x) & 0xFF) << 16) 3314 #define G_008754_R0_IB1_START(x) (((x) >> 16) & 0xFF) 3315 #define C_008754_R0_IB1_START 0xFF00FFFF 3316 #define S_008754_R1_IB1_START(x) (((unsigned)(x) & 0xFF) << 24) 3317 #define G_008754_R1_IB1_START(x) (((x) >> 24) & 0xFF) 3318 #define C_008754_R1_IB1_START 0x00FFFFFF 3319 #define R_008758_CP_ROQ2_THRESHOLDS 0x008758 /* <= gfx6 */ 3320 #define S_008758_R2_IB1_START(x) (((unsigned)(x) & 0xFF) << 0) 3321 #define G_008758_R2_IB1_START(x) (((x) >> 0) & 0xFF) 3322 #define C_008758_R2_IB1_START 0xFFFFFF00 3323 #define S_008758_R0_IB2_START(x) (((unsigned)(x) & 0xFF) << 8) 3324 #define G_008758_R0_IB2_START(x) (((x) >> 8) & 0xFF) 3325 #define C_008758_R0_IB2_START 0xFFFF00FF 3326 #define S_008758_R1_IB2_START(x) (((unsigned)(x) & 0xFF) << 16) 3327 #define G_008758_R1_IB2_START(x) (((x) >> 16) & 0xFF) 3328 #define C_008758_R1_IB2_START 0xFF00FFFF 3329 #define S_008758_R2_IB2_START(x) (((unsigned)(x) & 0xFF) << 24) 3330 #define G_008758_R2_IB2_START(x) (((x) >> 24) & 0xFF) 3331 #define C_008758_R2_IB2_START 0x00FFFFFF 3332 #define R_00875C_CP_STQ_THRESHOLDS 0x00875C /* <= gfx6 */ 3333 #define S_00875C_STQ0_START(x) (((unsigned)(x) & 0xFF) << 0) 3334 #define G_00875C_STQ0_START(x) (((x) >> 0) & 0xFF) 3335 #define C_00875C_STQ0_START 0xFFFFFF00 3336 #define S_00875C_STQ1_START(x) (((unsigned)(x) & 0xFF) << 8) 3337 #define G_00875C_STQ1_START(x) (((x) >> 8) & 0xFF) 3338 #define C_00875C_STQ1_START 0xFFFF00FF 3339 #define S_00875C_STQ2_START(x) (((unsigned)(x) & 0xFF) << 16) 3340 #define G_00875C_STQ2_START(x) (((x) >> 16) & 0xFF) 3341 #define C_00875C_STQ2_START 0xFF00FFFF 3342 #define R_008760_CP_QUEUE_THRESHOLDS 0x008760 /* <= gfx6 */ 3343 #define S_008760_ROQ_IB1_START(x) (((unsigned)(x) & 0x3F) << 0) 3344 #define G_008760_ROQ_IB1_START(x) (((x) >> 0) & 0x3F) 3345 #define C_008760_ROQ_IB1_START 0xFFFFFFC0 3346 #define S_008760_ROQ_IB2_START(x) (((unsigned)(x) & 0x3F) << 8) 3347 #define G_008760_ROQ_IB2_START(x) (((x) >> 8) & 0x3F) 3348 #define C_008760_ROQ_IB2_START 0xFFFFC0FF 3349 #define R_008764_CP_MEQ_THRESHOLDS 0x008764 /* <= gfx6 */ 3350 #define S_008764_MEQ1_START(x) (((unsigned)(x) & 0xFF) << 0) 3351 #define G_008764_MEQ1_START(x) (((x) >> 0) & 0xFF) 3352 #define C_008764_MEQ1_START 0xFFFFFF00 3353 #define S_008764_MEQ2_START(x) (((unsigned)(x) & 0xFF) << 8) 3354 #define G_008764_MEQ2_START(x) (((x) >> 8) & 0xFF) 3355 #define C_008764_MEQ2_START 0xFFFF00FF 3356 #define R_008768_CP_ROQ_AVAIL 0x008768 /* <= gfx6 */ 3357 #define S_008768_ROQ_CNT_RING(x) (((unsigned)(x) & 0x7FF) << 0) 3358 #define G_008768_ROQ_CNT_RING(x) (((x) >> 0) & 0x7FF) 3359 #define C_008768_ROQ_CNT_RING 0xFFFFF800 3360 #define S_008768_ROQ_CNT_IB1(x) (((unsigned)(x) & 0x7FF) << 16) 3361 #define G_008768_ROQ_CNT_IB1(x) (((x) >> 16) & 0x7FF) 3362 #define C_008768_ROQ_CNT_IB1 0xF800FFFF 3363 #define R_00876C_CP_STQ_AVAIL 0x00876C /* <= gfx6 */ 3364 #define S_00876C_STQ_CNT(x) (((unsigned)(x) & 0x1FF) << 0) 3365 #define G_00876C_STQ_CNT(x) (((x) >> 0) & 0x1FF) 3366 #define C_00876C_STQ_CNT 0xFFFFFE00 3367 #define R_008770_CP_ROQ2_AVAIL 0x008770 /* <= gfx6 */ 3368 #define S_008770_ROQ_CNT_IB2(x) (((unsigned)(x) & 0x7FF) << 0) 3369 #define G_008770_ROQ_CNT_IB2(x) (((x) >> 0) & 0x7FF) 3370 #define C_008770_ROQ_CNT_IB2 0xFFFFF800 3371 #define R_008774_CP_MEQ_AVAIL 0x008774 /* <= gfx6 */ 3372 #define S_008774_MEQ_CNT(x) (((unsigned)(x) & 0x3FF) << 0) 3373 #define G_008774_MEQ_CNT(x) (((x) >> 0) & 0x3FF) 3374 #define C_008774_MEQ_CNT 0xFFFFFC00 3375 #define R_008778_CP_CMD_INDEX 0x008778 /* <= gfx6 */ 3376 #define S_008778_CMD_INDEX(x) (((unsigned)(x) & 0x7FF) << 0) 3377 #define G_008778_CMD_INDEX(x) (((x) >> 0) & 0x7FF) 3378 #define C_008778_CMD_INDEX 0xFFFFF800 3379 #define S_008778_CMD_ME_SEL(x) (((unsigned)(x) & 0x3) << 12) 3380 #define G_008778_CMD_ME_SEL(x) (((x) >> 12) & 0x3) 3381 #define C_008778_CMD_ME_SEL 0xFFFFCFFF 3382 #define S_008778_CMD_QUEUE_SEL(x) (((unsigned)(x) & 0x3) << 16) 3383 #define G_008778_CMD_QUEUE_SEL(x) (((x) >> 16) & 0x3) 3384 #define C_008778_CMD_QUEUE_SEL 0xFFFCFFFF 3385 #define R_00877C_CP_CMD_DATA 0x00877C /* <= gfx6 */ 3386 #define R_008780_CP_ROQ_RB_STAT 0x008780 /* <= gfx6 */ 3387 #define S_008780_ROQ_RPTR_PRIMARY(x) (((unsigned)(x) & 0x3FF) << 0) 3388 #define G_008780_ROQ_RPTR_PRIMARY(x) (((x) >> 0) & 0x3FF) 3389 #define C_008780_ROQ_RPTR_PRIMARY 0xFFFFFC00 3390 #define S_008780_ROQ_WPTR_PRIMARY(x) (((unsigned)(x) & 0x3FF) << 16) 3391 #define G_008780_ROQ_WPTR_PRIMARY(x) (((x) >> 16) & 0x3FF) 3392 #define C_008780_ROQ_WPTR_PRIMARY 0xFC00FFFF 3393 #define R_008784_CP_ROQ_IB1_STAT 0x008784 /* <= gfx6 */ 3394 #define S_008784_ROQ_RPTR_INDIRECT1(x) (((unsigned)(x) & 0x3FF) << 0) 3395 #define G_008784_ROQ_RPTR_INDIRECT1(x) (((x) >> 0) & 0x3FF) 3396 #define C_008784_ROQ_RPTR_INDIRECT1 0xFFFFFC00 3397 #define S_008784_ROQ_WPTR_INDIRECT1(x) (((unsigned)(x) & 0x3FF) << 16) 3398 #define G_008784_ROQ_WPTR_INDIRECT1(x) (((x) >> 16) & 0x3FF) 3399 #define C_008784_ROQ_WPTR_INDIRECT1 0xFC00FFFF 3400 #define R_008788_CP_ROQ_IB2_STAT 0x008788 /* <= gfx6 */ 3401 #define S_008788_ROQ_RPTR_INDIRECT2(x) (((unsigned)(x) & 0x3FF) << 0) 3402 #define G_008788_ROQ_RPTR_INDIRECT2(x) (((x) >> 0) & 0x3FF) 3403 #define C_008788_ROQ_RPTR_INDIRECT2 0xFFFFFC00 3404 #define S_008788_ROQ_WPTR_INDIRECT2(x) (((unsigned)(x) & 0x3FF) << 16) 3405 #define G_008788_ROQ_WPTR_INDIRECT2(x) (((x) >> 16) & 0x3FF) 3406 #define C_008788_ROQ_WPTR_INDIRECT2 0xFC00FFFF 3407 #define R_00878C_CP_STQ_STAT 0x00878C /* <= gfx6 */ 3408 #define S_00878C_STQ_RPTR(x) (((unsigned)(x) & 0x3FF) << 0) 3409 #define G_00878C_STQ_RPTR(x) (((x) >> 0) & 0x3FF) 3410 #define C_00878C_STQ_RPTR 0xFFFFFC00 3411 #define R_008794_CP_MEQ_STAT 0x008794 /* <= gfx6 */ 3412 #define S_008794_MEQ_RPTR(x) (((unsigned)(x) & 0x3FF) << 0) 3413 #define G_008794_MEQ_RPTR(x) (((x) >> 0) & 0x3FF) 3414 #define C_008794_MEQ_RPTR 0xFFFFFC00 3415 #define S_008794_MEQ_WPTR(x) (((unsigned)(x) & 0x3FF) << 16) 3416 #define G_008794_MEQ_WPTR(x) (((x) >> 16) & 0x3FF) 3417 #define C_008794_MEQ_WPTR 0xFC00FFFF 3418 #define R_008798_CP_CEQ1_AVAIL 0x008798 /* <= gfx6 */ 3419 #define S_008798_CEQ_CNT_RING(x) (((unsigned)(x) & 0x7FF) << 0) 3420 #define G_008798_CEQ_CNT_RING(x) (((x) >> 0) & 0x7FF) 3421 #define C_008798_CEQ_CNT_RING 0xFFFFF800 3422 #define S_008798_CEQ_CNT_IB1(x) (((unsigned)(x) & 0x7FF) << 16) 3423 #define G_008798_CEQ_CNT_IB1(x) (((x) >> 16) & 0x7FF) 3424 #define C_008798_CEQ_CNT_IB1 0xF800FFFF 3425 #define R_00879C_CP_CEQ2_AVAIL 0x00879C /* <= gfx6 */ 3426 #define S_00879C_CEQ_CNT_IB2(x) (((unsigned)(x) & 0x7FF) << 0) 3427 #define G_00879C_CEQ_CNT_IB2(x) (((x) >> 0) & 0x7FF) 3428 #define C_00879C_CEQ_CNT_IB2 0xFFFFF800 3429 #define R_0087A0_CP_CE_ROQ_RB_STAT 0x0087A0 /* <= gfx6 */ 3430 #define S_0087A0_CEQ_RPTR_PRIMARY(x) (((unsigned)(x) & 0x3FF) << 0) 3431 #define G_0087A0_CEQ_RPTR_PRIMARY(x) (((x) >> 0) & 0x3FF) 3432 #define C_0087A0_CEQ_RPTR_PRIMARY 0xFFFFFC00 3433 #define S_0087A0_CEQ_WPTR_PRIMARY(x) (((unsigned)(x) & 0x3FF) << 16) 3434 #define G_0087A0_CEQ_WPTR_PRIMARY(x) (((x) >> 16) & 0x3FF) 3435 #define C_0087A0_CEQ_WPTR_PRIMARY 0xFC00FFFF 3436 #define R_0087A4_CP_CE_ROQ_IB1_STAT 0x0087A4 /* <= gfx6 */ 3437 #define S_0087A4_CEQ_RPTR_INDIRECT1(x) (((unsigned)(x) & 0x3FF) << 0) 3438 #define G_0087A4_CEQ_RPTR_INDIRECT1(x) (((x) >> 0) & 0x3FF) 3439 #define C_0087A4_CEQ_RPTR_INDIRECT1 0xFFFFFC00 3440 #define S_0087A4_CEQ_WPTR_INDIRECT1(x) (((unsigned)(x) & 0x3FF) << 16) 3441 #define G_0087A4_CEQ_WPTR_INDIRECT1(x) (((x) >> 16) & 0x3FF) 3442 #define C_0087A4_CEQ_WPTR_INDIRECT1 0xFC00FFFF 3443 #define R_0087A8_CP_CE_ROQ_IB2_STAT 0x0087A8 /* <= gfx6 */ 3444 #define S_0087A8_CEQ_RPTR_INDIRECT2(x) (((unsigned)(x) & 0x3FF) << 0) 3445 #define G_0087A8_CEQ_RPTR_INDIRECT2(x) (((x) >> 0) & 0x3FF) 3446 #define C_0087A8_CEQ_RPTR_INDIRECT2 0xFFFFFC00 3447 #define S_0087A8_CEQ_WPTR_INDIRECT2(x) (((unsigned)(x) & 0x3FF) << 16) 3448 #define G_0087A8_CEQ_WPTR_INDIRECT2(x) (((x) >> 16) & 0x3FF) 3449 #define C_0087A8_CEQ_WPTR_INDIRECT2 0xFC00FFFF 3450 #define R_0087DC_CP_INT_STAT_DEBUG 0x0087DC /* <= gfx6 */ 3451 #define S_0087DC_CP_ECC_ERROR_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 14) 3452 #define G_0087DC_CP_ECC_ERROR_INT_ASSERTED(x) (((x) >> 14) & 0x1) 3453 #define C_0087DC_CP_ECC_ERROR_INT_ASSERTED 0xFFFFBFFF 3454 #define S_0087DC_WRM_POLL_TIMEOUT_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 17) 3455 #define G_0087DC_WRM_POLL_TIMEOUT_INT_ASSERTED(x) (((x) >> 17) & 0x1) 3456 #define C_0087DC_WRM_POLL_TIMEOUT_INT_ASSERTED 0xFFFDFFFF 3457 #define S_0087DC_CNTX_BUSY_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 19) 3458 #define G_0087DC_CNTX_BUSY_INT_ASSERTED(x) (((x) >> 19) & 0x1) 3459 #define C_0087DC_CNTX_BUSY_INT_ASSERTED 0xFFF7FFFF 3460 #define S_0087DC_CNTX_EMPTY_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 20) 3461 #define G_0087DC_CNTX_EMPTY_INT_ASSERTED(x) (((x) >> 20) & 0x1) 3462 #define C_0087DC_CNTX_EMPTY_INT_ASSERTED 0xFFEFFFFF 3463 #define S_0087DC_PRIV_INSTR_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 22) 3464 #define G_0087DC_PRIV_INSTR_INT_ASSERTED(x) (((x) >> 22) & 0x1) 3465 #define C_0087DC_PRIV_INSTR_INT_ASSERTED 0xFFBFFFFF 3466 #define S_0087DC_PRIV_REG_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 23) 3467 #define G_0087DC_PRIV_REG_INT_ASSERTED(x) (((x) >> 23) & 0x1) 3468 #define C_0087DC_PRIV_REG_INT_ASSERTED 0xFF7FFFFF 3469 #define S_0087DC_OPCODE_ERROR_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 24) 3470 #define G_0087DC_OPCODE_ERROR_INT_ASSERTED(x) (((x) >> 24) & 0x1) 3471 #define C_0087DC_OPCODE_ERROR_INT_ASSERTED 0xFEFFFFFF 3472 #define S_0087DC_TIME_STAMP_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 26) 3473 #define G_0087DC_TIME_STAMP_INT_ASSERTED(x) (((x) >> 26) & 0x1) 3474 #define C_0087DC_TIME_STAMP_INT_ASSERTED 0xFBFFFFFF 3475 #define S_0087DC_RESERVED_BIT_ERROR_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 27) 3476 #define G_0087DC_RESERVED_BIT_ERROR_INT_ASSERTED(x) (((x) >> 27) & 0x1) 3477 #define C_0087DC_RESERVED_BIT_ERROR_INT_ASSERTED 0xF7FFFFFF 3478 #define S_0087DC_GENERIC2_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 29) 3479 #define G_0087DC_GENERIC2_INT_ASSERTED(x) (((x) >> 29) & 0x1) 3480 #define C_0087DC_GENERIC2_INT_ASSERTED 0xDFFFFFFF 3481 #define S_0087DC_GENERIC1_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 30) 3482 #define G_0087DC_GENERIC1_INT_ASSERTED(x) (((x) >> 30) & 0x1) 3483 #define C_0087DC_GENERIC1_INT_ASSERTED 0xBFFFFFFF 3484 #define S_0087DC_GENERIC0_INT_ASSERTED(x) (((unsigned)(x) & 0x1) << 31) 3485 #define G_0087DC_GENERIC0_INT_ASSERTED(x) (((x) >> 31) & 0x1) 3486 #define C_0087DC_GENERIC0_INT_ASSERTED 0x7FFFFFFF 3487 #define R_0087FC_CP_PERFMON_CNTL 0x0087FC /* <= gfx6 */ 3488 #define S_0087FC_PERFMON_STATE(x) (((unsigned)(x) & 0xF) << 0) 3489 #define G_0087FC_PERFMON_STATE(x) (((x) >> 0) & 0xF) 3490 #define C_0087FC_PERFMON_STATE 0xFFFFFFF0 3491 #define V_0087FC_CP_PERFMON_STATE_DISABLE_AND_RESET 0 3492 #define V_0087FC_CP_PERFMON_STATE_START_COUNTING 1 3493 #define V_0087FC_CP_PERFMON_STATE_STOP_COUNTING 2 3494 #define V_0087FC_CP_PERFMON_STATE_RESERVED_3 3 3495 #define V_0087FC_CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM 4 3496 #define V_0087FC_CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM 5 3497 #define S_0087FC_SPM_PERFMON_STATE(x) (((unsigned)(x) & 0xF) << 4) 3498 #define G_0087FC_SPM_PERFMON_STATE(x) (((x) >> 4) & 0xF) 3499 #define C_0087FC_SPM_PERFMON_STATE 0xFFFFFF0F 3500 #define V_0087FC_STRM_PERFMON_STATE_DISABLE_AND_RESET 0 3501 #define V_0087FC_STRM_PERFMON_STATE_START_COUNTING 1 3502 #define V_0087FC_STRM_PERFMON_STATE_STOP_COUNTING 2 3503 #define V_0087FC_STRM_PERFMON_STATE_RESERVED_3 3 3504 #define V_0087FC_STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM 4 3505 #define V_0087FC_STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM 5 3506 #define S_0087FC_PERFMON_ENABLE_MODE(x) (((unsigned)(x) & 0x3) << 8) 3507 #define G_0087FC_PERFMON_ENABLE_MODE(x) (((x) >> 8) & 0x3) 3508 #define C_0087FC_PERFMON_ENABLE_MODE 0xFFFFFCFF 3509 #define V_0087FC_CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT 0 3510 #define V_0087FC_CP_PERFMON_ENABLE_MODE_RESERVED_1 1 3511 #define V_0087FC_CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE 2 3512 #define V_0087FC_CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE 3 3513 #define S_0087FC_PERFMON_SAMPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 10) 3514 #define G_0087FC_PERFMON_SAMPLE_ENABLE(x) (((x) >> 10) & 0x1) 3515 #define C_0087FC_PERFMON_SAMPLE_ENABLE 0xFFFFFBFF 3516 #define R_008880_IA_PERFCOUNTER0_SELECT 0x008880 /* <= gfx6 */ 3517 #define S_008880_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 3518 #define G_008880_PERF_SEL(x) (((x) >> 0) & 0xFF) 3519 #define C_008880_PERF_SEL 0xFFFFFF00 3520 #define S_008880_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 3521 #define G_008880_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 3522 #define C_008880_PERF_SEL1 0xFFF003FF 3523 #define S_008880_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 3524 #define G_008880_CNTR_MODE(x) (((x) >> 20) & 0xF) 3525 #define C_008880_CNTR_MODE 0xFF0FFFFF 3526 #define S_008880_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 3527 #define G_008880_PERF_MODE1(x) (((x) >> 24) & 0xF) 3528 #define C_008880_PERF_MODE1 0xF0FFFFFF 3529 #define S_008880_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 3530 #define G_008880_PERF_MODE(x) (((x) >> 28) & 0xF) 3531 #define C_008880_PERF_MODE 0x0FFFFFFF 3532 #define R_008884_IA_PERFCOUNTER1_SELECT 0x008884 /* <= gfx6 */ 3533 #define S_008884_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 3534 #define G_008884_PERF_SEL(x) (((x) >> 0) & 0xFF) 3535 #define C_008884_PERF_SEL 0xFFFFFF00 3536 #define S_008884_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 3537 #define G_008884_PERF_MODE(x) (((x) >> 28) & 0xF) 3538 #define C_008884_PERF_MODE 0x0FFFFFFF 3539 #define R_008888_IA_PERFCOUNTER2_SELECT 0x008888 /* <= gfx6 */ 3540 #define R_00888C_IA_PERFCOUNTER3_SELECT 0x00888C /* <= gfx6 */ 3541 #define R_008890_IA_PERFCOUNTER0_LO 0x008890 /* <= gfx6 */ 3542 #define R_008894_IA_PERFCOUNTER0_HI 0x008894 /* <= gfx6 */ 3543 #define R_008898_IA_PERFCOUNTER1_LO 0x008898 /* <= gfx6 */ 3544 #define R_00889C_IA_PERFCOUNTER1_HI 0x00889C /* <= gfx6 */ 3545 #define R_0088A0_IA_PERFCOUNTER2_LO 0x0088A0 /* <= gfx6 */ 3546 #define R_0088A4_IA_PERFCOUNTER2_HI 0x0088A4 /* <= gfx6 */ 3547 #define R_0088A8_IA_PERFCOUNTER3_LO 0x0088A8 /* <= gfx6 */ 3548 #define R_0088AC_IA_PERFCOUNTER3_HI 0x0088AC /* <= gfx6 */ 3549 #define R_0088B0_VGT_VTX_VECT_EJECT_REG 0x0088B0 /* <= gfx6 */ 3550 #define S_0088B0_PRIM_COUNT(x) (((unsigned)(x) & 0x3FF) << 0) 3551 #define G_0088B0_PRIM_COUNT(x) (((x) >> 0) & 0x3FF) 3552 #define C_0088B0_PRIM_COUNT 0xFFFFFC00 3553 #define R_0088B4_VGT_DMA_DATA_FIFO_DEPTH 0x0088B4 /* <= gfx6 */ 3554 #define S_0088B4_DMA_DATA_FIFO_DEPTH(x) (((unsigned)(x) & 0x1FF) << 0) 3555 #define G_0088B4_DMA_DATA_FIFO_DEPTH(x) (((x) >> 0) & 0x1FF) 3556 #define C_0088B4_DMA_DATA_FIFO_DEPTH 0xFFFFFE00 3557 #define R_0088B8_VGT_DMA_REQ_FIFO_DEPTH 0x0088B8 /* <= gfx6 */ 3558 #define S_0088B8_DMA_REQ_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 0) 3559 #define G_0088B8_DMA_REQ_FIFO_DEPTH(x) (((x) >> 0) & 0x3F) 3560 #define C_0088B8_DMA_REQ_FIFO_DEPTH 0xFFFFFFC0 3561 #define R_0088BC_VGT_DRAW_INIT_FIFO_DEPTH 0x0088BC /* <= gfx6 */ 3562 #define S_0088BC_DRAW_INIT_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 0) 3563 #define G_0088BC_DRAW_INIT_FIFO_DEPTH(x) (((x) >> 0) & 0x3F) 3564 #define C_0088BC_DRAW_INIT_FIFO_DEPTH 0xFFFFFFC0 3565 #define R_0088C0_VGT_LAST_COPY_STATE 0x0088C0 /* <= gfx6 */ 3566 #define S_0088C0_SRC_STATE_ID(x) (((unsigned)(x) & 0x7) << 0) 3567 #define G_0088C0_SRC_STATE_ID(x) (((x) >> 0) & 0x7) 3568 #define C_0088C0_SRC_STATE_ID 0xFFFFFFF8 3569 #define S_0088C0_DST_STATE_ID(x) (((unsigned)(x) & 0x7) << 16) 3570 #define G_0088C0_DST_STATE_ID(x) (((x) >> 16) & 0x7) 3571 #define C_0088C0_DST_STATE_ID 0xFFF8FFFF 3572 #define R_0088C4_VGT_CACHE_INVALIDATION 0x0088C4 /* <= gfx6 */ 3573 #define S_0088C4_CACHE_INVALIDATION(x) (((unsigned)(x) & 0x3) << 0) 3574 #define G_0088C4_CACHE_INVALIDATION(x) (((x) >> 0) & 0x3) 3575 #define C_0088C4_CACHE_INVALIDATION 0xFFFFFFFC 3576 #define S_0088C4_VS_NO_EXTRA_BUFFER(x) (((unsigned)(x) & 0x1) << 5) 3577 #define G_0088C4_VS_NO_EXTRA_BUFFER(x) (((x) >> 5) & 0x1) 3578 #define C_0088C4_VS_NO_EXTRA_BUFFER 0xFFFFFFDF 3579 #define S_0088C4_AUTO_INVLD_EN(x) (((unsigned)(x) & 0x3) << 6) 3580 #define G_0088C4_AUTO_INVLD_EN(x) (((x) >> 6) & 0x3) 3581 #define C_0088C4_AUTO_INVLD_EN 0xFFFFFF3F 3582 #define S_0088C4_USE_GS_DONE(x) (((unsigned)(x) & 0x1) << 9) 3583 #define G_0088C4_USE_GS_DONE(x) (((x) >> 9) & 0x1) 3584 #define C_0088C4_USE_GS_DONE 0xFFFFFDFF 3585 #define S_0088C4_DIS_RANGE_FULL_INVLD(x) (((unsigned)(x) & 0x1) << 11) 3586 #define G_0088C4_DIS_RANGE_FULL_INVLD(x) (((x) >> 11) & 0x1) 3587 #define C_0088C4_DIS_RANGE_FULL_INVLD 0xFFFFF7FF 3588 #define S_0088C4_GS_LATE_ALLOC_EN(x) (((unsigned)(x) & 0x1) << 12) 3589 #define G_0088C4_GS_LATE_ALLOC_EN(x) (((x) >> 12) & 0x1) 3590 #define C_0088C4_GS_LATE_ALLOC_EN 0xFFFFEFFF 3591 #define S_0088C4_STREAMOUT_FULL_FLUSH(x) (((unsigned)(x) & 0x1) << 13) 3592 #define G_0088C4_STREAMOUT_FULL_FLUSH(x) (((x) >> 13) & 0x1) 3593 #define C_0088C4_STREAMOUT_FULL_FLUSH 0xFFFFDFFF 3594 #define S_0088C4_ES_LIMIT(x) (((unsigned)(x) & 0x1F) << 16) 3595 #define G_0088C4_ES_LIMIT(x) (((x) >> 16) & 0x1F) 3596 #define C_0088C4_ES_LIMIT 0xFFE0FFFF 3597 #define R_0088C8_VGT_ESGS_RING_SIZE 0x0088C8 /* <= gfx6 */ 3598 #define R_0088CC_VGT_GSVS_RING_SIZE 0x0088CC /* <= gfx6 */ 3599 #define R_0088D0_VGT_FIFO_DEPTHS 0x0088D0 /* <= gfx6 */ 3600 #define S_0088D0_VS_DEALLOC_TBL_DEPTH(x) (((unsigned)(x) & 0x7F) << 0) 3601 #define G_0088D0_VS_DEALLOC_TBL_DEPTH(x) (((x) >> 0) & 0x7F) 3602 #define C_0088D0_VS_DEALLOC_TBL_DEPTH 0xFFFFFF80 3603 #define S_0088D0_RESERVED_0(x) (((unsigned)(x) & 0x1) << 7) 3604 #define G_0088D0_RESERVED_0(x) (((x) >> 7) & 0x1) 3605 #define C_0088D0_RESERVED_0 0xFFFFFF7F 3606 #define S_0088D0_CLIPP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3FFF) << 8) 3607 #define G_0088D0_CLIPP_FIFO_DEPTH(x) (((x) >> 8) & 0x3FFF) 3608 #define C_0088D0_CLIPP_FIFO_DEPTH 0xFFC000FF 3609 #define S_0088D0_RESERVED_1(x) (((unsigned)(x) & 0x3FF) << 22) 3610 #define G_0088D0_RESERVED_1(x) (((x) >> 22) & 0x3FF) 3611 #define C_0088D0_RESERVED_1 0x003FFFFF 3612 #define R_0088D4_VGT_GS_VERTEX_REUSE 0x0088D4 /* <= gfx6 */ 3613 #define S_0088D4_VERT_REUSE(x) (((unsigned)(x) & 0x1F) << 0) 3614 #define G_0088D4_VERT_REUSE(x) (((x) >> 0) & 0x1F) 3615 #define C_0088D4_VERT_REUSE 0xFFFFFFE0 3616 #define R_0088D8_VGT_MC_LAT_CNTL 0x0088D8 /* <= gfx6 */ 3617 #define S_0088D8_MC_TIME_STAMP_RES(x) (((unsigned)(x) & 0x3) << 0) 3618 #define G_0088D8_MC_TIME_STAMP_RES(x) (((x) >> 0) & 0x3) 3619 #define C_0088D8_MC_TIME_STAMP_RES 0xFFFFFFFC 3620 #define R_0088DC_IA_CNTL_STATUS 0x0088DC /* <= gfx6 */ 3621 #define S_0088DC_IA_BUSY(x) (((unsigned)(x) & 0x1) << 0) 3622 #define G_0088DC_IA_BUSY(x) (((x) >> 0) & 0x1) 3623 #define C_0088DC_IA_BUSY 0xFFFFFFFE 3624 #define S_0088DC_IA_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 1) 3625 #define G_0088DC_IA_DMA_BUSY(x) (((x) >> 1) & 0x1) 3626 #define C_0088DC_IA_DMA_BUSY 0xFFFFFFFD 3627 #define S_0088DC_IA_DMA_REQ_BUSY(x) (((unsigned)(x) & 0x1) << 2) 3628 #define G_0088DC_IA_DMA_REQ_BUSY(x) (((x) >> 2) & 0x1) 3629 #define C_0088DC_IA_DMA_REQ_BUSY 0xFFFFFFFB 3630 #define S_0088DC_IA_GRP_BUSY(x) (((unsigned)(x) & 0x1) << 3) 3631 #define G_0088DC_IA_GRP_BUSY(x) (((x) >> 3) & 0x1) 3632 #define C_0088DC_IA_GRP_BUSY 0xFFFFFFF7 3633 #define S_0088DC_IA_ADC_BUSY(x) (((unsigned)(x) & 0x1) << 4) 3634 #define G_0088DC_IA_ADC_BUSY(x) (((x) >> 4) & 0x1) 3635 #define C_0088DC_IA_ADC_BUSY 0xFFFFFFEF 3636 #define R_0088E0_VGT_DEBUG_CNTL 0x0088E0 /* <= gfx6 */ 3637 #define S_0088E0_VGT_DEBUG_INDX(x) (((unsigned)(x) & 0x3F) << 0) 3638 #define G_0088E0_VGT_DEBUG_INDX(x) (((x) >> 0) & 0x3F) 3639 #define C_0088E0_VGT_DEBUG_INDX 0xFFFFFFC0 3640 #define S_0088E0_VGT_DEBUG_SEL_BUS_B(x) (((unsigned)(x) & 0x1) << 6) 3641 #define G_0088E0_VGT_DEBUG_SEL_BUS_B(x) (((x) >> 6) & 0x1) 3642 #define C_0088E0_VGT_DEBUG_SEL_BUS_B 0xFFFFFFBF 3643 #define R_0088E4_VGT_DEBUG_DATA 0x0088E4 /* <= gfx6 */ 3644 #define R_0088E8_IA_DEBUG_CNTL 0x0088E8 /* <= gfx6 */ 3645 #define S_0088E8_IA_DEBUG_INDX(x) (((unsigned)(x) & 0x3F) << 0) 3646 #define G_0088E8_IA_DEBUG_INDX(x) (((x) >> 0) & 0x3F) 3647 #define C_0088E8_IA_DEBUG_INDX 0xFFFFFFC0 3648 #define S_0088E8_IA_DEBUG_SEL_BUS_B(x) (((unsigned)(x) & 0x1) << 6) 3649 #define G_0088E8_IA_DEBUG_SEL_BUS_B(x) (((x) >> 6) & 0x1) 3650 #define C_0088E8_IA_DEBUG_SEL_BUS_B 0xFFFFFFBF 3651 #define R_0088EC_IA_DEBUG_DATA 0x0088EC /* <= gfx6 */ 3652 #define R_0088F0_VGT_CNTL_STATUS 0x0088F0 /* <= gfx6 */ 3653 #define S_0088F0_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 0) 3654 #define G_0088F0_VGT_BUSY(x) (((x) >> 0) & 0x1) 3655 #define C_0088F0_VGT_BUSY 0xFFFFFFFE 3656 #define S_0088F0_VGT_OUT_INDX_BUSY(x) (((unsigned)(x) & 0x1) << 1) 3657 #define G_0088F0_VGT_OUT_INDX_BUSY(x) (((x) >> 1) & 0x1) 3658 #define C_0088F0_VGT_OUT_INDX_BUSY 0xFFFFFFFD 3659 #define S_0088F0_VGT_OUT_BUSY(x) (((unsigned)(x) & 0x1) << 2) 3660 #define G_0088F0_VGT_OUT_BUSY(x) (((x) >> 2) & 0x1) 3661 #define C_0088F0_VGT_OUT_BUSY 0xFFFFFFFB 3662 #define S_0088F0_VGT_PT_BUSY(x) (((unsigned)(x) & 0x1) << 3) 3663 #define G_0088F0_VGT_PT_BUSY(x) (((x) >> 3) & 0x1) 3664 #define C_0088F0_VGT_PT_BUSY 0xFFFFFFF7 3665 #define S_0088F0_VGT_TE_BUSY(x) (((unsigned)(x) & 0x1) << 4) 3666 #define G_0088F0_VGT_TE_BUSY(x) (((x) >> 4) & 0x1) 3667 #define C_0088F0_VGT_TE_BUSY 0xFFFFFFEF 3668 #define S_0088F0_VGT_VR_BUSY(x) (((unsigned)(x) & 0x1) << 5) 3669 #define G_0088F0_VGT_VR_BUSY(x) (((x) >> 5) & 0x1) 3670 #define C_0088F0_VGT_VR_BUSY 0xFFFFFFDF 3671 #define S_0088F0_VGT_PI_BUSY(x) (((unsigned)(x) & 0x1) << 6) 3672 #define G_0088F0_VGT_PI_BUSY(x) (((x) >> 6) & 0x1) 3673 #define C_0088F0_VGT_PI_BUSY 0xFFFFFFBF 3674 #define S_0088F0_VGT_GS_BUSY(x) (((unsigned)(x) & 0x1) << 7) 3675 #define G_0088F0_VGT_GS_BUSY(x) (((x) >> 7) & 0x1) 3676 #define C_0088F0_VGT_GS_BUSY 0xFFFFFF7F 3677 #define S_0088F0_VGT_HS_BUSY(x) (((unsigned)(x) & 0x1) << 8) 3678 #define G_0088F0_VGT_HS_BUSY(x) (((x) >> 8) & 0x1) 3679 #define C_0088F0_VGT_HS_BUSY 0xFFFFFEFF 3680 #define S_0088F0_VGT_TE11_BUSY(x) (((unsigned)(x) & 0x1) << 9) 3681 #define G_0088F0_VGT_TE11_BUSY(x) (((x) >> 9) & 0x1) 3682 #define C_0088F0_VGT_TE11_BUSY 0xFFFFFDFF 3683 #define R_00891C_VGT_PERFCOUNTER_SEID_MASK 0x00891C /* <= gfx6 */ 3684 #define S_00891C_PERF_SEID_IGNORE_MASK(x) (((unsigned)(x) & 0xFF) << 0) 3685 #define G_00891C_PERF_SEID_IGNORE_MASK(x) (((x) >> 0) & 0xFF) 3686 #define C_00891C_PERF_SEID_IGNORE_MASK 0xFFFFFF00 3687 #define R_008920_VGT_PERFCOUNTER0_SELECT 0x008920 /* <= gfx6 */ 3688 #define S_008920_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 3689 #define G_008920_PERF_SEL(x) (((x) >> 0) & 0xFF) 3690 #define C_008920_PERF_SEL 0xFFFFFF00 3691 #define S_008920_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 3692 #define G_008920_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 3693 #define C_008920_PERF_SEL1 0xFFF003FF 3694 #define S_008920_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 3695 #define G_008920_CNTR_MODE(x) (((x) >> 20) & 0xF) 3696 #define C_008920_CNTR_MODE 0xFF0FFFFF 3697 #define S_008920_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 3698 #define G_008920_PERF_MODE1(x) (((x) >> 24) & 0xF) 3699 #define C_008920_PERF_MODE1 0xF0FFFFFF 3700 #define S_008920_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 3701 #define G_008920_PERF_MODE(x) (((x) >> 28) & 0xF) 3702 #define C_008920_PERF_MODE 0x0FFFFFFF 3703 #define R_008924_VGT_PERFCOUNTER1_SELECT 0x008924 /* <= gfx6 */ 3704 #define R_008928_VGT_PERFCOUNTER2_SELECT 0x008928 /* <= gfx6 */ 3705 #define S_008928_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 3706 #define G_008928_PERF_SEL(x) (((x) >> 0) & 0xFF) 3707 #define C_008928_PERF_SEL 0xFFFFFF00 3708 #define S_008928_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 3709 #define G_008928_PERF_MODE(x) (((x) >> 28) & 0xF) 3710 #define C_008928_PERF_MODE 0x0FFFFFFF 3711 #define R_00892C_VGT_PERFCOUNTER3_SELECT 0x00892C /* <= gfx6 */ 3712 #define R_008930_VGT_PERFCOUNTER0_LO 0x008930 /* <= gfx6 */ 3713 #define R_008934_VGT_PERFCOUNTER0_HI 0x008934 /* <= gfx6 */ 3714 #define R_008938_VGT_PERFCOUNTER1_LO 0x008938 /* <= gfx6 */ 3715 #define R_00893C_VGT_PERFCOUNTER1_HI 0x00893C /* <= gfx6 */ 3716 #define R_008940_VGT_PERFCOUNTER2_LO 0x008940 /* <= gfx6 */ 3717 #define R_008944_VGT_PERFCOUNTER2_HI 0x008944 /* <= gfx6 */ 3718 #define R_008948_VGT_PERFCOUNTER3_LO 0x008948 /* <= gfx6 */ 3719 #define R_00894C_VGT_PERFCOUNTER3_HI 0x00894C /* <= gfx6 */ 3720 #define R_008958_VGT_PRIMITIVE_TYPE 0x008958 /* <= gfx6 */ 3721 #define S_008958_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 3722 #define G_008958_PRIM_TYPE(x) (((x) >> 0) & 0x3F) 3723 #define C_008958_PRIM_TYPE 0xFFFFFFC0 3724 #define V_008958_DI_PT_NONE 0 3725 #define V_008958_DI_PT_POINTLIST 1 3726 #define V_008958_DI_PT_LINELIST 2 3727 #define V_008958_DI_PT_LINESTRIP 3 3728 #define V_008958_DI_PT_TRILIST 4 3729 #define V_008958_DI_PT_TRIFAN 5 3730 #define V_008958_DI_PT_TRISTRIP 6 3731 #define V_008958_DI_PT_UNUSED_0 7 3732 #define V_008958_DI_PT_UNUSED_1 8 3733 #define V_008958_DI_PT_PATCH 9 3734 #define V_008958_DI_PT_LINELIST_ADJ 10 3735 #define V_008958_DI_PT_LINESTRIP_ADJ 11 3736 #define V_008958_DI_PT_TRILIST_ADJ 12 3737 #define V_008958_DI_PT_TRISTRIP_ADJ 13 3738 #define V_008958_DI_PT_UNUSED_3 14 3739 #define V_008958_DI_PT_UNUSED_4 15 3740 #define V_008958_DI_PT_TRI_WITH_WFLAGS 16 3741 #define V_008958_DI_PT_RECTLIST 17 3742 #define V_008958_DI_PT_LINELOOP 18 3743 #define V_008958_DI_PT_QUADLIST 19 3744 #define V_008958_DI_PT_QUADSTRIP 20 3745 #define V_008958_DI_PT_POLYGON 21 3746 #define V_008958_DI_PT_2D_COPY_RECT_LIST_V0 22 3747 #define V_008958_DI_PT_2D_COPY_RECT_LIST_V1 23 3748 #define V_008958_DI_PT_2D_COPY_RECT_LIST_V2 24 3749 #define V_008958_DI_PT_2D_COPY_RECT_LIST_V3 25 3750 #define V_008958_DI_PT_2D_FILL_RECT_LIST 26 3751 #define V_008958_DI_PT_2D_LINE_STRIP 27 3752 #define V_008958_DI_PT_2D_TRI_STRIP 28 3753 #define R_00895C_VGT_INDEX_TYPE 0x00895C /* <= gfx6 */ 3754 #define S_00895C_INDEX_TYPE(x) (((unsigned)(x) & 0x3) << 0) 3755 #define G_00895C_INDEX_TYPE(x) (((x) >> 0) & 0x3) 3756 #define C_00895C_INDEX_TYPE 0xFFFFFFFC 3757 #define V_00895C_VGT_INDEX_16 0 3758 #define V_00895C_VGT_INDEX_32 1 3759 #define R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x008960 /* <= gfx6 */ 3760 #define R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x008964 /* <= gfx6 */ 3761 #define R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x008968 /* <= gfx6 */ 3762 #define R_00896C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x00896C /* <= gfx6 */ 3763 #define R_008970_VGT_NUM_INDICES 0x008970 /* <= gfx6 */ 3764 #define R_008974_VGT_NUM_INSTANCES 0x008974 /* <= gfx6 */ 3765 #define R_00897C_CGTT_VGT_CLK_CTRL 0x00897C /* <= gfx6 */ 3766 #define S_00897C_ON_DELAY(x) (((unsigned)(x) & 0xF) << 0) 3767 #define G_00897C_ON_DELAY(x) (((x) >> 0) & 0xF) 3768 #define C_00897C_ON_DELAY 0xFFFFFFF0 3769 #define S_00897C_OFF_HYSTERESIS(x) (((unsigned)(x) & 0xFF) << 4) 3770 #define G_00897C_OFF_HYSTERESIS(x) (((x) >> 4) & 0xFF) 3771 #define C_00897C_OFF_HYSTERESIS 0xFFFFF00F 3772 #define S_00897C_SOFT_OVERRIDE7(x) (((unsigned)(x) & 0x1) << 24) 3773 #define G_00897C_SOFT_OVERRIDE7(x) (((x) >> 24) & 0x1) 3774 #define C_00897C_SOFT_OVERRIDE7 0xFEFFFFFF 3775 #define S_00897C_PERF_ENABLE(x) (((unsigned)(x) & 0x1) << 25) 3776 #define G_00897C_PERF_ENABLE(x) (((x) >> 25) & 0x1) 3777 #define C_00897C_PERF_ENABLE 0xFDFFFFFF 3778 #define S_00897C_DBG_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 3779 #define G_00897C_DBG_ENABLE(x) (((x) >> 26) & 0x1) 3780 #define C_00897C_DBG_ENABLE 0xFBFFFFFF 3781 #define S_00897C_SOFT_OVERRIDE4(x) (((unsigned)(x) & 0x1) << 27) 3782 #define G_00897C_SOFT_OVERRIDE4(x) (((x) >> 27) & 0x1) 3783 #define C_00897C_SOFT_OVERRIDE4 0xF7FFFFFF 3784 #define S_00897C_SOFT_OVERRIDE3(x) (((unsigned)(x) & 0x1) << 28) 3785 #define G_00897C_SOFT_OVERRIDE3(x) (((x) >> 28) & 0x1) 3786 #define C_00897C_SOFT_OVERRIDE3 0xEFFFFFFF 3787 #define S_00897C_GS_OVERRIDE(x) (((unsigned)(x) & 0x1) << 29) 3788 #define G_00897C_GS_OVERRIDE(x) (((x) >> 29) & 0x1) 3789 #define C_00897C_GS_OVERRIDE 0xDFFFFFFF 3790 #define S_00897C_CORE_OVERRIDE(x) (((unsigned)(x) & 0x1) << 30) 3791 #define G_00897C_CORE_OVERRIDE(x) (((x) >> 30) & 0x1) 3792 #define C_00897C_CORE_OVERRIDE 0xBFFFFFFF 3793 #define S_00897C_REG_OVERRIDE(x) (((unsigned)(x) & 0x1) << 31) 3794 #define G_00897C_REG_OVERRIDE(x) (((x) >> 31) & 0x1) 3795 #define C_00897C_REG_OVERRIDE 0x7FFFFFFF 3796 #define R_008980_IA_VMID_OVERRIDE 0x008980 /* <= gfx6 */ 3797 #define S_008980_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 3798 #define G_008980_ENABLE(x) (((x) >> 0) & 0x1) 3799 #define C_008980_ENABLE 0xFFFFFFFE 3800 #define S_008980_VMID(x) (((unsigned)(x) & 0xF) << 1) 3801 #define G_008980_VMID(x) (((x) >> 1) & 0xF) 3802 #define C_008980_VMID 0xFFFFFFE1 3803 #define R_008984_CGTT_IA_CLK_CTRL 0x008984 /* <= gfx6 */ 3804 #define S_008984_ON_DELAY(x) (((unsigned)(x) & 0xF) << 0) 3805 #define G_008984_ON_DELAY(x) (((x) >> 0) & 0xF) 3806 #define C_008984_ON_DELAY 0xFFFFFFF0 3807 #define S_008984_OFF_HYSTERESIS(x) (((unsigned)(x) & 0xFF) << 4) 3808 #define G_008984_OFF_HYSTERESIS(x) (((x) >> 4) & 0xFF) 3809 #define C_008984_OFF_HYSTERESIS 0xFFFFF00F 3810 #define S_008984_SOFT_OVERRIDE7(x) (((unsigned)(x) & 0x1) << 24) 3811 #define G_008984_SOFT_OVERRIDE7(x) (((x) >> 24) & 0x1) 3812 #define C_008984_SOFT_OVERRIDE7 0xFEFFFFFF 3813 #define S_008984_PERF_ENABLE(x) (((unsigned)(x) & 0x1) << 25) 3814 #define G_008984_PERF_ENABLE(x) (((x) >> 25) & 0x1) 3815 #define C_008984_PERF_ENABLE 0xFDFFFFFF 3816 #define S_008984_DBG_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 3817 #define G_008984_DBG_ENABLE(x) (((x) >> 26) & 0x1) 3818 #define C_008984_DBG_ENABLE 0xFBFFFFFF 3819 #define S_008984_SOFT_OVERRIDE4(x) (((unsigned)(x) & 0x1) << 27) 3820 #define G_008984_SOFT_OVERRIDE4(x) (((x) >> 27) & 0x1) 3821 #define C_008984_SOFT_OVERRIDE4 0xF7FFFFFF 3822 #define S_008984_SOFT_OVERRIDE3(x) (((unsigned)(x) & 0x1) << 28) 3823 #define G_008984_SOFT_OVERRIDE3(x) (((x) >> 28) & 0x1) 3824 #define C_008984_SOFT_OVERRIDE3 0xEFFFFFFF 3825 #define S_008984_CORE_OVERRIDE(x) (((unsigned)(x) & 0x1) << 29) 3826 #define G_008984_CORE_OVERRIDE(x) (((x) >> 29) & 0x1) 3827 #define C_008984_CORE_OVERRIDE 0xDFFFFFFF 3828 #define S_008984_SOFT_OVERRIDE2(x) (((unsigned)(x) & 0x1) << 29) 3829 #define G_008984_SOFT_OVERRIDE2(x) (((x) >> 29) & 0x1) 3830 #define C_008984_SOFT_OVERRIDE2 0xDFFFFFFF 3831 #define S_008984_REG_OVERRIDE(x) (((unsigned)(x) & 0x1) << 31) 3832 #define G_008984_REG_OVERRIDE(x) (((x) >> 31) & 0x1) 3833 #define C_008984_REG_OVERRIDE 0x7FFFFFFF 3834 #define R_008988_VGT_TF_RING_SIZE 0x008988 /* <= gfx6 */ 3835 #define S_008988_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 3836 #define G_008988_SIZE(x) (((x) >> 0) & 0xFFFF) 3837 #define C_008988_SIZE 0xFFFF0000 3838 #define R_00898C_VGT_SYS_CONFIG 0x00898C /* <= gfx6 */ 3839 #define S_00898C_DUAL_CORE_EN(x) (((unsigned)(x) & 0x1) << 0) 3840 #define G_00898C_DUAL_CORE_EN(x) (((x) >> 0) & 0x1) 3841 #define C_00898C_DUAL_CORE_EN 0xFFFFFFFE 3842 #define S_00898C_MAX_LS_HS_THDGRP(x) (((unsigned)(x) & 0x3F) << 1) 3843 #define G_00898C_MAX_LS_HS_THDGRP(x) (((x) >> 1) & 0x3F) 3844 #define C_00898C_MAX_LS_HS_THDGRP 0xFFFFFF81 3845 #define S_00898C_ADC_EVENT_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 7) 3846 #define G_00898C_ADC_EVENT_FILTER_DISABLE(x) (((x) >> 7) & 0x1) 3847 #define C_00898C_ADC_EVENT_FILTER_DISABLE 0xFFFFFF7F 3848 #define R_0089B0_VGT_HS_OFFCHIP_PARAM 0x0089B0 /* <= gfx6 */ 3849 #define S_0089B0_OFFCHIP_BUFFERING(x) (((unsigned)(x) & 0x7F) << 0) 3850 #define G_0089B0_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x7F) 3851 #define C_0089B0_OFFCHIP_BUFFERING 0xFFFFFF80 3852 #define S_0089B0_OFFCHIP_GRANULARITY(x) (((unsigned)(x) & 0x3) << 9) 3853 #define G_0089B0_OFFCHIP_GRANULARITY(x) (((x) >> 9) & 0x3) 3854 #define C_0089B0_OFFCHIP_GRANULARITY 0xFFFFF9FF 3855 #define V_0089B0_X_8K_DWORDS 0 3856 #define V_0089B0_X_4K_DWORDS 1 3857 #define V_0089B0_X_2K_DWORDS 2 3858 #define V_0089B0_X_1K_DWORDS 3 3859 #define R_0089B8_VGT_TF_MEMORY_BASE 0x0089B8 /* <= gfx6 */ 3860 #define R_0089BC_CC_GC_SHADER_ARRAY_CONFIG 0x0089BC /* <= gfx6 */ 3861 #define S_0089BC_DPFP_RATE(x) (((unsigned)(x) & 0x3) << 1) 3862 #define G_0089BC_DPFP_RATE(x) (((x) >> 1) & 0x3) 3863 #define C_0089BC_DPFP_RATE 0xFFFFFFF9 3864 #define S_0089BC_SQC_BALANCE_DISABLE(x) (((unsigned)(x) & 0x1) << 3) 3865 #define G_0089BC_SQC_BALANCE_DISABLE(x) (((x) >> 3) & 0x1) 3866 #define C_0089BC_SQC_BALANCE_DISABLE 0xFFFFFFF7 3867 #define S_0089BC_HALF_LDS(x) (((unsigned)(x) & 0x1) << 4) 3868 #define G_0089BC_HALF_LDS(x) (((x) >> 4) & 0x1) 3869 #define C_0089BC_HALF_LDS 0xFFFFFFEF 3870 #define S_0089BC_INACTIVE_CUS(x) (((unsigned)(x) & 0xFFFF) << 16) 3871 #define G_0089BC_INACTIVE_CUS(x) (((x) >> 16) & 0xFFFF) 3872 #define C_0089BC_INACTIVE_CUS 0x0000FFFF 3873 #define R_0089C0_GC_USER_SHADER_ARRAY_CONFIG 0x0089C0 /* <= gfx6 */ 3874 #define S_0089C0_DPFP_RATE(x) (((unsigned)(x) & 0x3) << 1) 3875 #define G_0089C0_DPFP_RATE(x) (((x) >> 1) & 0x3) 3876 #define C_0089C0_DPFP_RATE 0xFFFFFFF9 3877 #define S_0089C0_SQC_BALANCE_DISABLE(x) (((unsigned)(x) & 0x1) << 3) 3878 #define G_0089C0_SQC_BALANCE_DISABLE(x) (((x) >> 3) & 0x1) 3879 #define C_0089C0_SQC_BALANCE_DISABLE 0xFFFFFFF7 3880 #define S_0089C0_HALF_LDS(x) (((unsigned)(x) & 0x1) << 4) 3881 #define G_0089C0_HALF_LDS(x) (((x) >> 4) & 0x1) 3882 #define C_0089C0_HALF_LDS 0xFFFFFFEF 3883 #define S_0089C0_INACTIVE_CUS(x) (((unsigned)(x) & 0xFFFF) << 16) 3884 #define G_0089C0_INACTIVE_CUS(x) (((x) >> 16) & 0xFFFF) 3885 #define C_0089C0_INACTIVE_CUS 0x0000FFFF 3886 #define R_008A00_PA_SU_DEBUG_CNTL 0x008A00 /* <= gfx6 */ 3887 #define S_008A00_SU_DEBUG_INDX(x) (((unsigned)(x) & 0x1F) << 0) 3888 #define G_008A00_SU_DEBUG_INDX(x) (((x) >> 0) & 0x1F) 3889 #define C_008A00_SU_DEBUG_INDX 0xFFFFFFE0 3890 #define R_008A04_PA_SU_DEBUG_DATA 0x008A04 /* <= gfx6 */ 3891 #define R_008A10_PA_CL_CNTL_STATUS 0x008A10 /* <= gfx6 */ 3892 #define S_008A10_CL_BUSY(x) (((unsigned)(x) & 0x1) << 31) 3893 #define G_008A10_CL_BUSY(x) (((x) >> 31) & 0x1) 3894 #define C_008A10_CL_BUSY 0x7FFFFFFF 3895 #define R_008A14_PA_CL_ENHANCE 0x008A14 /* <= gfx6 */ 3896 #define S_008A14_CLIP_VTX_REORDER_ENA(x) (((unsigned)(x) & 0x1) << 0) 3897 #define G_008A14_CLIP_VTX_REORDER_ENA(x) (((x) >> 0) & 0x1) 3898 #define C_008A14_CLIP_VTX_REORDER_ENA 0xFFFFFFFE 3899 #define S_008A14_NUM_CLIP_SEQ(x) (((unsigned)(x) & 0x3) << 1) 3900 #define G_008A14_NUM_CLIP_SEQ(x) (((x) >> 1) & 0x3) 3901 #define C_008A14_NUM_CLIP_SEQ 0xFFFFFFF9 3902 #define S_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((unsigned)(x) & 0x1) << 3) 3903 #define G_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((x) >> 3) & 0x1) 3904 #define C_008A14_CLIPPED_PRIM_SEQ_STALL 0xFFFFFFF7 3905 #define S_008A14_VE_NAN_PROC_DISABLE(x) (((unsigned)(x) & 0x1) << 4) 3906 #define G_008A14_VE_NAN_PROC_DISABLE(x) (((x) >> 4) & 0x1) 3907 #define C_008A14_VE_NAN_PROC_DISABLE 0xFFFFFFEF 3908 #define S_008A14_XTRA_DEBUG_REG_SEL(x) (((unsigned)(x) & 0x1) << 5) 3909 #define G_008A14_XTRA_DEBUG_REG_SEL(x) (((x) >> 5) & 0x1) 3910 #define C_008A14_XTRA_DEBUG_REG_SEL 0xFFFFFFDF 3911 #define S_008A14_ECO_SPARE3(x) (((unsigned)(x) & 0x1) << 28) 3912 #define G_008A14_ECO_SPARE3(x) (((x) >> 28) & 0x1) 3913 #define C_008A14_ECO_SPARE3 0xEFFFFFFF 3914 #define S_008A14_ECO_SPARE2(x) (((unsigned)(x) & 0x1) << 29) 3915 #define G_008A14_ECO_SPARE2(x) (((x) >> 29) & 0x1) 3916 #define C_008A14_ECO_SPARE2 0xDFFFFFFF 3917 #define S_008A14_ECO_SPARE1(x) (((unsigned)(x) & 0x1) << 30) 3918 #define G_008A14_ECO_SPARE1(x) (((x) >> 30) & 0x1) 3919 #define C_008A14_ECO_SPARE1 0xBFFFFFFF 3920 #define S_008A14_ECO_SPARE0(x) (((unsigned)(x) & 0x1) << 31) 3921 #define G_008A14_ECO_SPARE0(x) (((x) >> 31) & 0x1) 3922 #define C_008A14_ECO_SPARE0 0x7FFFFFFF 3923 #define R_008A18_CGTT_PA_CLK_CTRL 0x008A18 /* <= gfx6 */ 3924 #define S_008A18_ON_DELAY(x) (((unsigned)(x) & 0xF) << 0) 3925 #define G_008A18_ON_DELAY(x) (((x) >> 0) & 0xF) 3926 #define C_008A18_ON_DELAY 0xFFFFFFF0 3927 #define S_008A18_OFF_HYSTERESIS(x) (((unsigned)(x) & 0xFF) << 4) 3928 #define G_008A18_OFF_HYSTERESIS(x) (((x) >> 4) & 0xFF) 3929 #define C_008A18_OFF_HYSTERESIS 0xFFFFF00F 3930 #define S_008A18_SOFT_OVERRIDE7(x) (((unsigned)(x) & 0x1) << 24) 3931 #define G_008A18_SOFT_OVERRIDE7(x) (((x) >> 24) & 0x1) 3932 #define C_008A18_SOFT_OVERRIDE7 0xFEFFFFFF 3933 #define S_008A18_SOFT_OVERRIDE6(x) (((unsigned)(x) & 0x1) << 25) 3934 #define G_008A18_SOFT_OVERRIDE6(x) (((x) >> 25) & 0x1) 3935 #define C_008A18_SOFT_OVERRIDE6 0xFDFFFFFF 3936 #define S_008A18_SOFT_OVERRIDE5(x) (((unsigned)(x) & 0x1) << 26) 3937 #define G_008A18_SOFT_OVERRIDE5(x) (((x) >> 26) & 0x1) 3938 #define C_008A18_SOFT_OVERRIDE5 0xFBFFFFFF 3939 #define S_008A18_SOFT_OVERRIDE4(x) (((unsigned)(x) & 0x1) << 27) 3940 #define G_008A18_SOFT_OVERRIDE4(x) (((x) >> 27) & 0x1) 3941 #define C_008A18_SOFT_OVERRIDE4 0xF7FFFFFF 3942 #define S_008A18_SOFT_OVERRIDE3(x) (((unsigned)(x) & 0x1) << 28) 3943 #define G_008A18_SOFT_OVERRIDE3(x) (((x) >> 28) & 0x1) 3944 #define C_008A18_SOFT_OVERRIDE3 0xEFFFFFFF 3945 #define S_008A18_SU_CLK_OVERRIDE(x) (((unsigned)(x) & 0x1) << 29) 3946 #define G_008A18_SU_CLK_OVERRIDE(x) (((x) >> 29) & 0x1) 3947 #define C_008A18_SU_CLK_OVERRIDE 0xDFFFFFFF 3948 #define S_008A18_CL_CLK_OVERRIDE(x) (((unsigned)(x) & 0x1) << 30) 3949 #define G_008A18_CL_CLK_OVERRIDE(x) (((x) >> 30) & 0x1) 3950 #define C_008A18_CL_CLK_OVERRIDE 0xBFFFFFFF 3951 #define S_008A18_REG_CLK_OVERRIDE(x) (((unsigned)(x) & 0x1) << 31) 3952 #define G_008A18_REG_CLK_OVERRIDE(x) (((x) >> 31) & 0x1) 3953 #define C_008A18_REG_CLK_OVERRIDE 0x7FFFFFFF 3954 #define R_008A20_PA_SU_PERFCOUNTER0_SELECT 0x008A20 /* <= gfx6 */ 3955 #define S_008A20_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 3956 #define G_008A20_PERF_SEL(x) (((x) >> 0) & 0xFF) 3957 #define C_008A20_PERF_SEL 0xFFFFFF00 3958 #define S_008A20_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 3959 #define G_008A20_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 3960 #define C_008A20_PERF_SEL1 0xFFF003FF 3961 #define S_008A20_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 3962 #define G_008A20_CNTR_MODE(x) (((x) >> 20) & 0xF) 3963 #define C_008A20_CNTR_MODE 0xFF0FFFFF 3964 #define R_008A24_PA_SU_PERFCOUNTER1_SELECT 0x008A24 /* <= gfx6 */ 3965 #define R_008A28_PA_SU_PERFCOUNTER2_SELECT 0x008A28 /* <= gfx6 */ 3966 #define S_008A28_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 3967 #define G_008A28_PERF_SEL(x) (((x) >> 0) & 0xFF) 3968 #define C_008A28_PERF_SEL 0xFFFFFF00 3969 #define S_008A28_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 3970 #define G_008A28_CNTR_MODE(x) (((x) >> 20) & 0xF) 3971 #define C_008A28_CNTR_MODE 0xFF0FFFFF 3972 #define R_008A2C_PA_SU_PERFCOUNTER3_SELECT 0x008A2C /* <= gfx6 */ 3973 #define R_008A30_PA_SU_PERFCOUNTER0_LO 0x008A30 /* <= gfx6 */ 3974 #define R_008A34_PA_SU_PERFCOUNTER0_HI 0x008A34 /* <= gfx6 */ 3975 #define S_008A34_PERFCOUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 3976 #define G_008A34_PERFCOUNTER_HI(x) (((x) >> 0) & 0xFFFF) 3977 #define C_008A34_PERFCOUNTER_HI 0xFFFF0000 3978 #define R_008A38_PA_SU_PERFCOUNTER1_LO 0x008A38 /* <= gfx6 */ 3979 #define R_008A3C_PA_SU_PERFCOUNTER1_HI 0x008A3C /* <= gfx6 */ 3980 #define R_008A40_PA_SU_PERFCOUNTER2_LO 0x008A40 /* <= gfx6 */ 3981 #define R_008A44_PA_SU_PERFCOUNTER2_HI 0x008A44 /* <= gfx6 */ 3982 #define R_008A48_PA_SU_PERFCOUNTER3_LO 0x008A48 /* <= gfx6 */ 3983 #define R_008A4C_PA_SU_PERFCOUNTER3_HI 0x008A4C /* <= gfx6 */ 3984 #define R_008A50_PA_SU_CNTL_STATUS 0x008A50 /* <= gfx6 */ 3985 #define S_008A50_SU_BUSY(x) (((unsigned)(x) & 0x1) << 31) 3986 #define G_008A50_SU_BUSY(x) (((x) >> 31) & 0x1) 3987 #define C_008A50_SU_BUSY 0x7FFFFFFF 3988 #define R_008A54_PA_SC_FIFO_DEPTH_CNTL 0x008A54 /* <= gfx6 */ 3989 #define S_008A54_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) 3990 #define G_008A54_DEPTH(x) (((x) >> 0) & 0xFF) 3991 #define C_008A54_DEPTH 0xFFFFFF00 3992 #define R_008A60_PA_SU_LINE_STIPPLE_VALUE 0x008A60 /* <= gfx6 */ 3993 #define S_008A60_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) 3994 #define G_008A60_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) 3995 #define C_008A60_LINE_STIPPLE_VALUE 0xFF000000 3996 #define R_008A80_PA_SC_PERFCOUNTER0_SELECT 0x008A80 /* <= gfx6 */ 3997 #define S_008A80_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 3998 #define G_008A80_PERF_SEL(x) (((x) >> 0) & 0x1FF) 3999 #define C_008A80_PERF_SEL 0xFFFFFE00 4000 #define S_008A80_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4001 #define G_008A80_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4002 #define C_008A80_PERF_SEL1 0xFFF003FF 4003 #define S_008A80_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 4004 #define G_008A80_CNTR_MODE(x) (((x) >> 20) & 0xF) 4005 #define C_008A80_CNTR_MODE 0xFF0FFFFF 4006 #define R_008A84_PA_SC_PERFCOUNTER1_SELECT 0x008A84 /* <= gfx6 */ 4007 #define S_008A84_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 4008 #define G_008A84_PERF_SEL(x) (((x) >> 0) & 0x1FF) 4009 #define C_008A84_PERF_SEL 0xFFFFFE00 4010 #define R_008A88_PA_SC_PERFCOUNTER2_SELECT 0x008A88 /* <= gfx6 */ 4011 #define R_008A8C_PA_SC_PERFCOUNTER3_SELECT 0x008A8C /* <= gfx6 */ 4012 #define R_008A90_PA_SC_PERFCOUNTER4_SELECT 0x008A90 /* <= gfx6 */ 4013 #define R_008A94_PA_SC_PERFCOUNTER5_SELECT 0x008A94 /* <= gfx6 */ 4014 #define R_008A98_PA_SC_PERFCOUNTER6_SELECT 0x008A98 /* <= gfx6 */ 4015 #define R_008A9C_PA_SC_PERFCOUNTER7_SELECT 0x008A9C /* <= gfx6 */ 4016 #define R_008AA0_PA_SC_PERFCOUNTER0_LO 0x008AA0 /* <= gfx6 */ 4017 #define R_008AA4_PA_SC_PERFCOUNTER0_HI 0x008AA4 /* <= gfx6 */ 4018 #define R_008AA8_PA_SC_PERFCOUNTER1_LO 0x008AA8 /* <= gfx6 */ 4019 #define R_008AAC_PA_SC_PERFCOUNTER1_HI 0x008AAC /* <= gfx6 */ 4020 #define R_008AB0_PA_SC_PERFCOUNTER2_LO 0x008AB0 /* <= gfx6 */ 4021 #define R_008AB4_PA_SC_PERFCOUNTER2_HI 0x008AB4 /* <= gfx6 */ 4022 #define R_008AB8_PA_SC_PERFCOUNTER3_LO 0x008AB8 /* <= gfx6 */ 4023 #define R_008ABC_PA_SC_PERFCOUNTER3_HI 0x008ABC /* <= gfx6 */ 4024 #define R_008AC0_PA_SC_PERFCOUNTER4_LO 0x008AC0 /* <= gfx6 */ 4025 #define R_008AC4_PA_SC_PERFCOUNTER4_HI 0x008AC4 /* <= gfx6 */ 4026 #define R_008AC8_PA_SC_PERFCOUNTER5_LO 0x008AC8 /* <= gfx6 */ 4027 #define R_008ACC_PA_SC_PERFCOUNTER5_HI 0x008ACC /* <= gfx6 */ 4028 #define R_008AD0_PA_SC_PERFCOUNTER6_LO 0x008AD0 /* <= gfx6 */ 4029 #define R_008AD4_PA_SC_PERFCOUNTER6_HI 0x008AD4 /* <= gfx6 */ 4030 #define R_008AD8_PA_SC_PERFCOUNTER7_LO 0x008AD8 /* <= gfx6 */ 4031 #define R_008ADC_PA_SC_PERFCOUNTER7_HI 0x008ADC /* <= gfx6 */ 4032 #define R_008B10_PA_SC_LINE_STIPPLE_STATE 0x008B10 /* <= gfx6 */ 4033 #define S_008B10_CURRENT_PTR(x) (((unsigned)(x) & 0xF) << 0) 4034 #define G_008B10_CURRENT_PTR(x) (((x) >> 0) & 0xF) 4035 #define C_008B10_CURRENT_PTR 0xFFFFFFF0 4036 #define S_008B10_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) 4037 #define G_008B10_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) 4038 #define C_008B10_CURRENT_COUNT 0xFFFF00FF 4039 #define R_008B24_PA_SC_FORCE_EOV_MAX_CNTS 0x008B24 /* <= gfx6 */ 4040 #define S_008B24_FORCE_EOV_MAX_CLK_CNT(x) (((unsigned)(x) & 0xFFFF) << 0) 4041 #define G_008B24_FORCE_EOV_MAX_CLK_CNT(x) (((x) >> 0) & 0xFFFF) 4042 #define C_008B24_FORCE_EOV_MAX_CLK_CNT 0xFFFF0000 4043 #define S_008B24_FORCE_EOV_MAX_REZ_CNT(x) (((unsigned)(x) & 0xFFFF) << 16) 4044 #define G_008B24_FORCE_EOV_MAX_REZ_CNT(x) (((x) >> 16) & 0xFFFF) 4045 #define C_008B24_FORCE_EOV_MAX_REZ_CNT 0x0000FFFF 4046 #define R_008B28_CGTT_SC_CLK_CTRL 0x008B28 /* <= gfx6 */ 4047 #define S_008B28_ON_DELAY(x) (((unsigned)(x) & 0xF) << 0) 4048 #define G_008B28_ON_DELAY(x) (((x) >> 0) & 0xF) 4049 #define C_008B28_ON_DELAY 0xFFFFFFF0 4050 #define S_008B28_OFF_HYSTERESIS(x) (((unsigned)(x) & 0xFF) << 4) 4051 #define G_008B28_OFF_HYSTERESIS(x) (((x) >> 4) & 0xFF) 4052 #define C_008B28_OFF_HYSTERESIS 0xFFFFF00F 4053 #define S_008B28_SOFT_OVERRIDE7(x) (((unsigned)(x) & 0x1) << 24) 4054 #define G_008B28_SOFT_OVERRIDE7(x) (((x) >> 24) & 0x1) 4055 #define C_008B28_SOFT_OVERRIDE7 0xFEFFFFFF 4056 #define S_008B28_SOFT_OVERRIDE6(x) (((unsigned)(x) & 0x1) << 25) 4057 #define G_008B28_SOFT_OVERRIDE6(x) (((x) >> 25) & 0x1) 4058 #define C_008B28_SOFT_OVERRIDE6 0xFDFFFFFF 4059 #define S_008B28_SOFT_OVERRIDE5(x) (((unsigned)(x) & 0x1) << 26) 4060 #define G_008B28_SOFT_OVERRIDE5(x) (((x) >> 26) & 0x1) 4061 #define C_008B28_SOFT_OVERRIDE5 0xFBFFFFFF 4062 #define S_008B28_SOFT_OVERRIDE4(x) (((unsigned)(x) & 0x1) << 27) 4063 #define G_008B28_SOFT_OVERRIDE4(x) (((x) >> 27) & 0x1) 4064 #define C_008B28_SOFT_OVERRIDE4 0xF7FFFFFF 4065 #define S_008B28_SOFT_OVERRIDE3(x) (((unsigned)(x) & 0x1) << 28) 4066 #define G_008B28_SOFT_OVERRIDE3(x) (((x) >> 28) & 0x1) 4067 #define C_008B28_SOFT_OVERRIDE3 0xEFFFFFFF 4068 #define S_008B28_SOFT_OVERRIDE2(x) (((unsigned)(x) & 0x1) << 29) 4069 #define G_008B28_SOFT_OVERRIDE2(x) (((x) >> 29) & 0x1) 4070 #define C_008B28_SOFT_OVERRIDE2 0xDFFFFFFF 4071 #define S_008B28_SOFT_OVERRIDE1(x) (((unsigned)(x) & 0x1) << 30) 4072 #define G_008B28_SOFT_OVERRIDE1(x) (((x) >> 30) & 0x1) 4073 #define C_008B28_SOFT_OVERRIDE1 0xBFFFFFFF 4074 #define S_008B28_SOFT_OVERRIDE0(x) (((unsigned)(x) & 0x1) << 31) 4075 #define G_008B28_SOFT_OVERRIDE0(x) (((x) >> 31) & 0x1) 4076 #define C_008B28_SOFT_OVERRIDE0 0x7FFFFFFF 4077 #define R_008BCC_PA_SC_FIFO_SIZE 0x008BCC /* <= gfx6 */ 4078 #define S_008BCC_SC_FRONTEND_PRIM_FIFO_SIZE(x) (((unsigned)(x) & 0x3F) << 0) 4079 #define G_008BCC_SC_FRONTEND_PRIM_FIFO_SIZE(x) (((x) >> 0) & 0x3F) 4080 #define C_008BCC_SC_FRONTEND_PRIM_FIFO_SIZE 0xFFFFFFC0 4081 #define S_008BCC_SC_BACKEND_PRIM_FIFO_SIZE(x) (((unsigned)(x) & 0x1FF) << 6) 4082 #define G_008BCC_SC_BACKEND_PRIM_FIFO_SIZE(x) (((x) >> 6) & 0x1FF) 4083 #define C_008BCC_SC_BACKEND_PRIM_FIFO_SIZE 0xFFFF803F 4084 #define S_008BCC_SC_HIZ_TILE_FIFO_SIZE(x) (((unsigned)(x) & 0x3F) << 15) 4085 #define G_008BCC_SC_HIZ_TILE_FIFO_SIZE(x) (((x) >> 15) & 0x3F) 4086 #define C_008BCC_SC_HIZ_TILE_FIFO_SIZE 0xFFE07FFF 4087 #define S_008BCC_SC_EARLYZ_TILE_FIFO_SIZE(x) (((unsigned)(x) & 0x1FF) << 23) 4088 #define G_008BCC_SC_EARLYZ_TILE_FIFO_SIZE(x) (((x) >> 23) & 0x1FF) 4089 #define C_008BCC_SC_EARLYZ_TILE_FIFO_SIZE 0x007FFFFF 4090 #define R_008BD4_PA_SC_IF_FIFO_SIZE 0x008BD4 /* <= gfx6 */ 4091 #define S_008BD4_SC_DB_TILE_IF_FIFO_SIZE(x) (((unsigned)(x) & 0x3F) << 0) 4092 #define G_008BD4_SC_DB_TILE_IF_FIFO_SIZE(x) (((x) >> 0) & 0x3F) 4093 #define C_008BD4_SC_DB_TILE_IF_FIFO_SIZE 0xFFFFFFC0 4094 #define S_008BD4_SC_DB_QUAD_IF_FIFO_SIZE(x) (((unsigned)(x) & 0x3F) << 6) 4095 #define G_008BD4_SC_DB_QUAD_IF_FIFO_SIZE(x) (((x) >> 6) & 0x3F) 4096 #define C_008BD4_SC_DB_QUAD_IF_FIFO_SIZE 0xFFFFF03F 4097 #define S_008BD4_SC_SPI_IF_FIFO_SIZE(x) (((unsigned)(x) & 0x3F) << 12) 4098 #define G_008BD4_SC_SPI_IF_FIFO_SIZE(x) (((x) >> 12) & 0x3F) 4099 #define C_008BD4_SC_SPI_IF_FIFO_SIZE 0xFFFC0FFF 4100 #define S_008BD4_SC_BCI_IF_FIFO_SIZE(x) (((unsigned)(x) & 0x3F) << 18) 4101 #define G_008BD4_SC_BCI_IF_FIFO_SIZE(x) (((x) >> 18) & 0x3F) 4102 #define C_008BD4_SC_BCI_IF_FIFO_SIZE 0xFF03FFFF 4103 #define R_008BD8_PA_SC_DEBUG_CNTL 0x008BD8 /* <= gfx6 */ 4104 #define S_008BD8_SC_DEBUG_INDX(x) (((unsigned)(x) & 0x3F) << 0) 4105 #define G_008BD8_SC_DEBUG_INDX(x) (((x) >> 0) & 0x3F) 4106 #define C_008BD8_SC_DEBUG_INDX 0xFFFFFFC0 4107 #define R_008BDC_PA_SC_DEBUG_DATA 0x008BDC /* <= gfx6 */ 4108 #define R_008BF0_PA_SC_ENHANCE 0x008BF0 /* <= gfx6 */ 4109 #define S_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((unsigned)(x) & 0x1) << 0) 4110 #define G_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((x) >> 0) & 0x1) 4111 #define C_008BF0_ENABLE_PA_SC_OUT_OF_ORDER 0xFFFFFFFE 4112 #define S_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((unsigned)(x) & 0x1) << 1) 4113 #define G_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((x) >> 1) & 0x1) 4114 #define C_008BF0_DISABLE_SC_DB_TILE_FIX 0xFFFFFFFD 4115 #define S_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((unsigned)(x) & 0x1) << 2) 4116 #define G_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((x) >> 2) & 0x1) 4117 #define C_008BF0_DISABLE_AA_MASK_FULL_FIX 0xFFFFFFFB 4118 #define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((unsigned)(x) & 0x1) << 3) 4119 #define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((x) >> 3) & 0x1) 4120 #define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS 0xFFFFFFF7 4121 #define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((unsigned)(x) & 0x1) << 4) 4122 #define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((x) >> 4) & 0x1) 4123 #define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID 0xFFFFFFEF 4124 #define S_008BF0_DISABLE_SCISSOR_FIX(x) (((unsigned)(x) & 0x1) << 5) 4125 #define G_008BF0_DISABLE_SCISSOR_FIX(x) (((x) >> 5) & 0x1) 4126 #define C_008BF0_DISABLE_SCISSOR_FIX 0xFFFFFFDF 4127 #define S_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((unsigned)(x) & 0x3) << 6) 4128 #define G_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((x) >> 6) & 0x3) 4129 #define C_008BF0_DISABLE_PW_BUBBLE_COLLAPSE 0xFFFFFF3F 4130 #define S_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((unsigned)(x) & 0x1) << 8) 4131 #define G_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((x) >> 8) & 0x1) 4132 #define C_008BF0_SEND_UNLIT_STILES_TO_PACKER 0xFFFFFEFF 4133 #define S_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 9) 4134 #define G_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((x) >> 9) & 0x1) 4135 #define C_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION 0xFFFFFDFF 4136 #define S_008BF0_DISABLE_SC_PROCESS_RESET_PRIM(x) (((unsigned)(x) & 0x1) << 10) 4137 #define G_008BF0_DISABLE_SC_PROCESS_RESET_PRIM(x) (((x) >> 10) & 0x1) 4138 #define C_008BF0_DISABLE_SC_PROCESS_RESET_PRIM 0xFFFFFBFF 4139 #define S_008BF0_DISABLE_SC_PROCESS_RESET_SUPERTILE(x) (((unsigned)(x) & 0x1) << 11) 4140 #define G_008BF0_DISABLE_SC_PROCESS_RESET_SUPERTILE(x) (((x) >> 11) & 0x1) 4141 #define C_008BF0_DISABLE_SC_PROCESS_RESET_SUPERTILE 0xFFFFF7FF 4142 #define S_008BF0_DISABLE_SC_PROCESS_RESET_TILE(x) (((unsigned)(x) & 0x1) << 12) 4143 #define G_008BF0_DISABLE_SC_PROCESS_RESET_TILE(x) (((x) >> 12) & 0x1) 4144 #define C_008BF0_DISABLE_SC_PROCESS_RESET_TILE 0xFFFFEFFF 4145 #define S_008BF0_DISABLE_PA_SC_GUIDANCE(x) (((unsigned)(x) & 0x1) << 13) 4146 #define G_008BF0_DISABLE_PA_SC_GUIDANCE(x) (((x) >> 13) & 0x1) 4147 #define C_008BF0_DISABLE_PA_SC_GUIDANCE 0xFFFFDFFF 4148 #define S_008BF0_DISABLE_EOV_ALL_CTRL_ONLY_COMBINATIONS(x) (((unsigned)(x) & 0x1) << 14) 4149 #define G_008BF0_DISABLE_EOV_ALL_CTRL_ONLY_COMBINATIONS(x) (((x) >> 14) & 0x1) 4150 #define C_008BF0_DISABLE_EOV_ALL_CTRL_ONLY_COMBINATIONS 0xFFFFBFFF 4151 #define S_008BF0_ENABLE_MULTICYCLE_BUBBLE_FREEZE(x) (((unsigned)(x) & 0x1) << 15) 4152 #define G_008BF0_ENABLE_MULTICYCLE_BUBBLE_FREEZE(x) (((x) >> 15) & 0x1) 4153 #define C_008BF0_ENABLE_MULTICYCLE_BUBBLE_FREEZE 0xFFFF7FFF 4154 #define S_008BF0_DISABLE_OUT_OF_ORDER_PA_SC_GUIDANCE(x) (((unsigned)(x) & 0x1) << 16) 4155 #define G_008BF0_DISABLE_OUT_OF_ORDER_PA_SC_GUIDANCE(x) (((x) >> 16) & 0x1) 4156 #define C_008BF0_DISABLE_OUT_OF_ORDER_PA_SC_GUIDANCE 0xFFFEFFFF 4157 #define S_008BF0_ENABLE_OUT_OF_ORDER_POLY_MODE(x) (((unsigned)(x) & 0x1) << 17) 4158 #define G_008BF0_ENABLE_OUT_OF_ORDER_POLY_MODE(x) (((x) >> 17) & 0x1) 4159 #define C_008BF0_ENABLE_OUT_OF_ORDER_POLY_MODE 0xFFFDFFFF 4160 #define S_008BF0_DISABLE_OUT_OF_ORDER_EOP_SYNC_NULL_PRIMS_LAST(x) (((unsigned)(x) & 0x1) << 18) 4161 #define G_008BF0_DISABLE_OUT_OF_ORDER_EOP_SYNC_NULL_PRIMS_LAST(x) (((x) >> 18) & 0x1) 4162 #define C_008BF0_DISABLE_OUT_OF_ORDER_EOP_SYNC_NULL_PRIMS_LAST 0xFFFBFFFF 4163 #define S_008BF0_DISABLE_OUT_OF_ORDER_THRESHOLD_SWITCHING(x) (((unsigned)(x) & 0x1) << 19) 4164 #define G_008BF0_DISABLE_OUT_OF_ORDER_THRESHOLD_SWITCHING(x) (((x) >> 19) & 0x1) 4165 #define C_008BF0_DISABLE_OUT_OF_ORDER_THRESHOLD_SWITCHING 0xFFF7FFFF 4166 #define S_008BF0_ENABLE_OUT_OF_ORDER_THRESHOLD_SWITCH_AT_EOPG_ONLY(x) (((unsigned)(x) & 0x1) << 20) 4167 #define G_008BF0_ENABLE_OUT_OF_ORDER_THRESHOLD_SWITCH_AT_EOPG_ONLY(x) (((x) >> 20) & 0x1) 4168 #define C_008BF0_ENABLE_OUT_OF_ORDER_THRESHOLD_SWITCH_AT_EOPG_ONLY 0xFFEFFFFF 4169 #define S_008BF0_DISABLE_OUT_OF_ORDER_DESIRED_FIFO_EMPTY_SWITCHING(x) (((unsigned)(x) & 0x1) << 21) 4170 #define G_008BF0_DISABLE_OUT_OF_ORDER_DESIRED_FIFO_EMPTY_SWITCHING(x) (((x) >> 21) & 0x1) 4171 #define C_008BF0_DISABLE_OUT_OF_ORDER_DESIRED_FIFO_EMPTY_SWITCHING 0xFFDFFFFF 4172 #define S_008BF0_DISABLE_OUT_OF_ORDER_SELECTED_FIFO_EMPTY_SWITCHING(x) (((unsigned)(x) & 0x1) << 22) 4173 #define G_008BF0_DISABLE_OUT_OF_ORDER_SELECTED_FIFO_EMPTY_SWITCHING(x) (((x) >> 22) & 0x1) 4174 #define C_008BF0_DISABLE_OUT_OF_ORDER_SELECTED_FIFO_EMPTY_SWITCHING 0xFFBFFFFF 4175 #define S_008BF0_DISABLE_OUT_OF_ORDER_EMPTY_SWITCHING_HYSTERYSIS(x) (((unsigned)(x) & 0x1) << 23) 4176 #define G_008BF0_DISABLE_OUT_OF_ORDER_EMPTY_SWITCHING_HYSTERYSIS(x) (((x) >> 23) & 0x1) 4177 #define C_008BF0_DISABLE_OUT_OF_ORDER_EMPTY_SWITCHING_HYSTERYSIS 0xFF7FFFFF 4178 #define S_008BF0_ENABLE_OUT_OF_ORDER_DESIRED_FIFO_IS_NEXT_FEID(x) (((unsigned)(x) & 0x1) << 24) 4179 #define G_008BF0_ENABLE_OUT_OF_ORDER_DESIRED_FIFO_IS_NEXT_FEID(x) (((x) >> 24) & 0x1) 4180 #define C_008BF0_ENABLE_OUT_OF_ORDER_DESIRED_FIFO_IS_NEXT_FEID 0xFEFFFFFF 4181 #define S_008BF0_ECO_SPARE1(x) (((unsigned)(x) & 0x1) << 30) 4182 #define G_008BF0_ECO_SPARE1(x) (((x) >> 30) & 0x1) 4183 #define C_008BF0_ECO_SPARE1 0xBFFFFFFF 4184 #define S_008BF0_ECO_SPARE0(x) (((unsigned)(x) & 0x1) << 31) 4185 #define G_008BF0_ECO_SPARE0(x) (((x) >> 31) & 0x1) 4186 #define C_008BF0_ECO_SPARE0 0x7FFFFFFF 4187 #define R_008C00_SQ_CONFIG 0x008C00 /* <= gfx6 */ 4188 #define S_008C00_UNUSED(x) (((unsigned)(x) & 0xFF) << 0) 4189 #define G_008C00_UNUSED(x) (((x) >> 0) & 0xFF) 4190 #define C_008C00_UNUSED 0xFFFFFF00 4191 #define S_008C00_DEBUG_EN(x) (((unsigned)(x) & 0x1) << 8) 4192 #define G_008C00_DEBUG_EN(x) (((x) >> 8) & 0x1) 4193 #define C_008C00_DEBUG_EN 0xFFFFFEFF 4194 #define S_008C00_DISABLE_SCA_BYPASS(x) (((unsigned)(x) & 0x1) << 9) 4195 #define G_008C00_DISABLE_SCA_BYPASS(x) (((x) >> 9) & 0x1) 4196 #define C_008C00_DISABLE_SCA_BYPASS 0xFFFFFDFF 4197 #define S_008C00_DISABLE_IB_DEP_CHECK(x) (((unsigned)(x) & 0x1) << 10) 4198 #define G_008C00_DISABLE_IB_DEP_CHECK(x) (((x) >> 10) & 0x1) 4199 #define C_008C00_DISABLE_IB_DEP_CHECK 0xFFFFFBFF 4200 #define S_008C00_ENABLE_SOFT_CLAUSE(x) (((unsigned)(x) & 0x1) << 11) 4201 #define G_008C00_ENABLE_SOFT_CLAUSE(x) (((x) >> 11) & 0x1) 4202 #define C_008C00_ENABLE_SOFT_CLAUSE 0xFFFFF7FF 4203 #define S_008C00_EARLY_TA_DONE_DISABLE(x) (((unsigned)(x) & 0x1) << 12) 4204 #define G_008C00_EARLY_TA_DONE_DISABLE(x) (((x) >> 12) & 0x1) 4205 #define C_008C00_EARLY_TA_DONE_DISABLE 0xFFFFEFFF 4206 #define S_008C00_DUA_FLAT_LOCK_ENABLE(x) (((unsigned)(x) & 0x1) << 13) 4207 #define G_008C00_DUA_FLAT_LOCK_ENABLE(x) (((x) >> 13) & 0x1) 4208 #define C_008C00_DUA_FLAT_LOCK_ENABLE 0xFFFFDFFF 4209 #define S_008C00_DUA_LDS_BYPASS_DISABLE(x) (((unsigned)(x) & 0x1) << 14) 4210 #define G_008C00_DUA_LDS_BYPASS_DISABLE(x) (((x) >> 14) & 0x1) 4211 #define C_008C00_DUA_LDS_BYPASS_DISABLE 0xFFFFBFFF 4212 #define S_008C00_DUA_FLAT_LDS_PINGPONG_DISABLE(x) (((unsigned)(x) & 0x1) << 15) 4213 #define G_008C00_DUA_FLAT_LDS_PINGPONG_DISABLE(x) (((x) >> 15) & 0x1) 4214 #define C_008C00_DUA_FLAT_LDS_PINGPONG_DISABLE 0xFFFF7FFF 4215 #define R_008C04_SQC_CONFIG 0x008C04 /* <= gfx6 */ 4216 #define S_008C04_INST_CACHE_SIZE(x) (((unsigned)(x) & 0x3) << 0) 4217 #define G_008C04_INST_CACHE_SIZE(x) (((x) >> 0) & 0x3) 4218 #define C_008C04_INST_CACHE_SIZE 0xFFFFFFFC 4219 #define S_008C04_DATA_CACHE_SIZE(x) (((unsigned)(x) & 0x3) << 2) 4220 #define G_008C04_DATA_CACHE_SIZE(x) (((x) >> 2) & 0x3) 4221 #define C_008C04_DATA_CACHE_SIZE 0xFFFFFFF3 4222 #define S_008C04_MISS_FIFO_DEPTH(x) (((unsigned)(x) & 0x3) << 4) 4223 #define G_008C04_MISS_FIFO_DEPTH(x) (((x) >> 4) & 0x3) 4224 #define C_008C04_MISS_FIFO_DEPTH 0xFFFFFFCF 4225 #define S_008C04_HIT_FIFO_DEPTH(x) (((unsigned)(x) & 0x1) << 6) 4226 #define G_008C04_HIT_FIFO_DEPTH(x) (((x) >> 6) & 0x1) 4227 #define C_008C04_HIT_FIFO_DEPTH 0xFFFFFFBF 4228 #define S_008C04_FORCE_ALWAYS_MISS(x) (((unsigned)(x) & 0x1) << 7) 4229 #define G_008C04_FORCE_ALWAYS_MISS(x) (((x) >> 7) & 0x1) 4230 #define C_008C04_FORCE_ALWAYS_MISS 0xFFFFFF7F 4231 #define S_008C04_FORCE_IN_ORDER(x) (((unsigned)(x) & 0x1) << 8) 4232 #define G_008C04_FORCE_IN_ORDER(x) (((x) >> 8) & 0x1) 4233 #define C_008C04_FORCE_IN_ORDER 0xFFFFFEFF 4234 #define S_008C04_IDENTITY_HASH_BANK(x) (((unsigned)(x) & 0x1) << 9) 4235 #define G_008C04_IDENTITY_HASH_BANK(x) (((x) >> 9) & 0x1) 4236 #define C_008C04_IDENTITY_HASH_BANK 0xFFFFFDFF 4237 #define S_008C04_IDENTITY_HASH_SET(x) (((unsigned)(x) & 0x1) << 10) 4238 #define G_008C04_IDENTITY_HASH_SET(x) (((x) >> 10) & 0x1) 4239 #define C_008C04_IDENTITY_HASH_SET 0xFFFFFBFF 4240 #define S_008C04_PER_VMID_INV_DISABLE(x) (((unsigned)(x) & 0x1) << 11) 4241 #define G_008C04_PER_VMID_INV_DISABLE(x) (((x) >> 11) & 0x1) 4242 #define C_008C04_PER_VMID_INV_DISABLE 0xFFFFF7FF 4243 #define R_008C08_SQC_CACHES 0x008C08 /* <= gfx6 */ 4244 #define S_008C08_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) 4245 #define G_008C08_INST_INVALIDATE(x) (((x) >> 0) & 0x1) 4246 #define C_008C08_INST_INVALIDATE 0xFFFFFFFE 4247 #define S_008C08_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) 4248 #define G_008C08_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) 4249 #define C_008C08_DATA_INVALIDATE 0xFFFFFFFD 4250 #define S_008C08_INVALIDATE_VOLATILE(x) (((unsigned)(x) & 0x1) << 2) 4251 #define G_008C08_INVALIDATE_VOLATILE(x) (((x) >> 2) & 0x1) 4252 #define C_008C08_INVALIDATE_VOLATILE 0xFFFFFFFB 4253 #define R_008C0C_SQ_RANDOM_WAVE_PRI 0x008C0C /* <= gfx6 */ 4254 #define S_008C0C_RET(x) (((unsigned)(x) & 0x7F) << 0) 4255 #define G_008C0C_RET(x) (((x) >> 0) & 0x7F) 4256 #define C_008C0C_RET 0xFFFFFF80 4257 #define S_008C0C_RUI(x) (((unsigned)(x) & 0x7) << 7) 4258 #define G_008C0C_RUI(x) (((x) >> 7) & 0x7) 4259 #define C_008C0C_RUI 0xFFFFFC7F 4260 #define S_008C0C_RNG(x) (((unsigned)(x) & 0x7FF) << 10) 4261 #define G_008C0C_RNG(x) (((x) >> 10) & 0x7FF) 4262 #define C_008C0C_RNG 0xFFE003FF 4263 #define R_008C10_SQ_REG_CREDITS 0x008C10 /* <= gfx6 */ 4264 #define S_008C10_SRBM_CREDITS(x) (((unsigned)(x) & 0x3F) << 0) 4265 #define G_008C10_SRBM_CREDITS(x) (((x) >> 0) & 0x3F) 4266 #define C_008C10_SRBM_CREDITS 0xFFFFFFC0 4267 #define S_008C10_CMD_CREDITS(x) (((unsigned)(x) & 0xF) << 8) 4268 #define G_008C10_CMD_CREDITS(x) (((x) >> 8) & 0xF) 4269 #define C_008C10_CMD_CREDITS 0xFFFFF0FF 4270 #define S_008C10_REG_BUSY(x) (((unsigned)(x) & 0x1) << 28) 4271 #define G_008C10_REG_BUSY(x) (((x) >> 28) & 0x1) 4272 #define C_008C10_REG_BUSY 0xEFFFFFFF 4273 #define S_008C10_SRBM_OVERFLOW(x) (((unsigned)(x) & 0x1) << 29) 4274 #define G_008C10_SRBM_OVERFLOW(x) (((x) >> 29) & 0x1) 4275 #define C_008C10_SRBM_OVERFLOW 0xDFFFFFFF 4276 #define S_008C10_IMMED_OVERFLOW(x) (((unsigned)(x) & 0x1) << 30) 4277 #define G_008C10_IMMED_OVERFLOW(x) (((x) >> 30) & 0x1) 4278 #define C_008C10_IMMED_OVERFLOW 0xBFFFFFFF 4279 #define S_008C10_CMD_OVERFLOW(x) (((unsigned)(x) & 0x1) << 31) 4280 #define G_008C10_CMD_OVERFLOW(x) (((x) >> 31) & 0x1) 4281 #define C_008C10_CMD_OVERFLOW 0x7FFFFFFF 4282 #define R_008C14_SQ_FIFO_SIZES 0x008C14 /* <= gfx6 */ 4283 #define S_008C14_INTERRUPT_FIFO_SIZE(x) (((unsigned)(x) & 0xF) << 0) 4284 #define G_008C14_INTERRUPT_FIFO_SIZE(x) (((x) >> 0) & 0xF) 4285 #define C_008C14_INTERRUPT_FIFO_SIZE 0xFFFFFFF0 4286 #define S_008C14_TTRACE_FIFO_SIZE(x) (((unsigned)(x) & 0xF) << 8) 4287 #define G_008C14_TTRACE_FIFO_SIZE(x) (((x) >> 8) & 0xF) 4288 #define C_008C14_TTRACE_FIFO_SIZE 0xFFFFF0FF 4289 #define S_008C14_EXPORT_BUF_SIZE(x) (((unsigned)(x) & 0x3) << 16) 4290 #define G_008C14_EXPORT_BUF_SIZE(x) (((x) >> 16) & 0x3) 4291 #define C_008C14_EXPORT_BUF_SIZE 0xFFFCFFFF 4292 #define S_008C14_VMEM_DATA_FIFO_SIZE(x) (((unsigned)(x) & 0x3) << 18) 4293 #define G_008C14_VMEM_DATA_FIFO_SIZE(x) (((x) >> 18) & 0x3) 4294 #define C_008C14_VMEM_DATA_FIFO_SIZE 0xFFF3FFFF 4295 #define R_008C18_SQ_PERFCOUNTER_CTRL 0x008C18 /* <= gfx6 */ 4296 #define S_008C18_PS_EN(x) (((unsigned)(x) & 0x1) << 0) 4297 #define G_008C18_PS_EN(x) (((x) >> 0) & 0x1) 4298 #define C_008C18_PS_EN 0xFFFFFFFE 4299 #define S_008C18_VS_EN(x) (((unsigned)(x) & 0x1) << 1) 4300 #define G_008C18_VS_EN(x) (((x) >> 1) & 0x1) 4301 #define C_008C18_VS_EN 0xFFFFFFFD 4302 #define V_008C18_VS_STAGE_REAL 0 4303 #define V_008C18_VS_STAGE_DS 1 4304 #define V_008C18_VS_STAGE_COPY_SHADER 2 4305 #define V_008C18_RESERVED_VS 3 4306 #define S_008C18_GS_EN(x) (((unsigned)(x) & 0x1) << 2) 4307 #define G_008C18_GS_EN(x) (((x) >> 2) & 0x1) 4308 #define C_008C18_GS_EN 0xFFFFFFFB 4309 #define V_008C18_GS_STAGE_OFF 0 4310 #define V_008C18_GS_STAGE_ON 1 4311 #define S_008C18_ES_EN(x) (((unsigned)(x) & 0x1) << 3) 4312 #define G_008C18_ES_EN(x) (((x) >> 3) & 0x1) 4313 #define C_008C18_ES_EN 0xFFFFFFF7 4314 #define V_008C18_ES_STAGE_OFF 0 4315 #define V_008C18_ES_STAGE_DS 1 4316 #define V_008C18_ES_STAGE_REAL 2 4317 #define V_008C18_RESERVED_ES 3 4318 #define S_008C18_HS_EN(x) (((unsigned)(x) & 0x1) << 4) 4319 #define G_008C18_HS_EN(x) (((x) >> 4) & 0x1) 4320 #define C_008C18_HS_EN 0xFFFFFFEF 4321 #define V_008C18_HS_STAGE_OFF 0 4322 #define V_008C18_HS_STAGE_ON 1 4323 #define S_008C18_LS_EN(x) (((unsigned)(x) & 0x1) << 5) 4324 #define G_008C18_LS_EN(x) (((x) >> 5) & 0x1) 4325 #define C_008C18_LS_EN 0xFFFFFFDF 4326 #define V_008C18_LS_STAGE_OFF 0 4327 #define V_008C18_LS_STAGE_ON 1 4328 #define V_008C18_CS_STAGE_ON 2 4329 #define V_008C18_RESERVED_LS 3 4330 #define S_008C18_CS_EN(x) (((unsigned)(x) & 0x1) << 6) 4331 #define G_008C18_CS_EN(x) (((x) >> 6) & 0x1) 4332 #define C_008C18_CS_EN 0xFFFFFFBF 4333 #define S_008C18_CNTR_RATE(x) (((unsigned)(x) & 0x1F) << 8) 4334 #define G_008C18_CNTR_RATE(x) (((x) >> 8) & 0x1F) 4335 #define C_008C18_CNTR_RATE 0xFFFFE0FF 4336 #define S_008C18_DISABLE_FLUSH(x) (((unsigned)(x) & 0x1) << 13) 4337 #define G_008C18_DISABLE_FLUSH(x) (((x) >> 13) & 0x1) 4338 #define C_008C18_DISABLE_FLUSH 0xFFFFDFFF 4339 #define R_008C1C_CC_SQC_BANK_DISABLE 0x008C1C /* <= gfx6 */ 4340 #define S_008C1C_SQC0_BANK_DISABLE(x) (((unsigned)(x) & 0xF) << 16) 4341 #define G_008C1C_SQC0_BANK_DISABLE(x) (((x) >> 16) & 0xF) 4342 #define C_008C1C_SQC0_BANK_DISABLE 0xFFF0FFFF 4343 #define S_008C1C_SQC1_BANK_DISABLE(x) (((unsigned)(x) & 0xF) << 20) 4344 #define G_008C1C_SQC1_BANK_DISABLE(x) (((x) >> 20) & 0xF) 4345 #define C_008C1C_SQC1_BANK_DISABLE 0xFF0FFFFF 4346 #define S_008C1C_SQC2_BANK_DISABLE(x) (((unsigned)(x) & 0xF) << 24) 4347 #define G_008C1C_SQC2_BANK_DISABLE(x) (((x) >> 24) & 0xF) 4348 #define C_008C1C_SQC2_BANK_DISABLE 0xF0FFFFFF 4349 #define S_008C1C_SQC3_BANK_DISABLE(x) (((unsigned)(x) & 0xF) << 28) 4350 #define G_008C1C_SQC3_BANK_DISABLE(x) (((x) >> 28) & 0xF) 4351 #define C_008C1C_SQC3_BANK_DISABLE 0x0FFFFFFF 4352 #define R_008C20_USER_SQC_BANK_DISABLE 0x008C20 /* <= gfx6 */ 4353 #define S_008C20_SQC0_BANK_DISABLE(x) (((unsigned)(x) & 0xF) << 16) 4354 #define G_008C20_SQC0_BANK_DISABLE(x) (((x) >> 16) & 0xF) 4355 #define C_008C20_SQC0_BANK_DISABLE 0xFFF0FFFF 4356 #define S_008C20_SQC1_BANK_DISABLE(x) (((unsigned)(x) & 0xF) << 20) 4357 #define G_008C20_SQC1_BANK_DISABLE(x) (((x) >> 20) & 0xF) 4358 #define C_008C20_SQC1_BANK_DISABLE 0xFF0FFFFF 4359 #define S_008C20_SQC2_BANK_DISABLE(x) (((unsigned)(x) & 0xF) << 24) 4360 #define G_008C20_SQC2_BANK_DISABLE(x) (((x) >> 24) & 0xF) 4361 #define C_008C20_SQC2_BANK_DISABLE 0xF0FFFFFF 4362 #define S_008C20_SQC3_BANK_DISABLE(x) (((unsigned)(x) & 0xF) << 28) 4363 #define G_008C20_SQC3_BANK_DISABLE(x) (((x) >> 28) & 0xF) 4364 #define C_008C20_SQC3_BANK_DISABLE 0x0FFFFFFF 4365 #define R_008C24_SQ_DEBUG_STS_GLOBAL 0x008C24 /* <= gfx6 */ 4366 #define S_008C24_BUSY(x) (((unsigned)(x) & 0x1) << 0) 4367 #define G_008C24_BUSY(x) (((x) >> 0) & 0x1) 4368 #define C_008C24_BUSY 0xFFFFFFFE 4369 #define S_008C24_INTERRUPT_MSG_BUSY(x) (((unsigned)(x) & 0x1) << 1) 4370 #define G_008C24_INTERRUPT_MSG_BUSY(x) (((x) >> 1) & 0x1) 4371 #define C_008C24_INTERRUPT_MSG_BUSY 0xFFFFFFFD 4372 #define S_008C24_WAVE_LEVEL_SH0(x) (((unsigned)(x) & 0xFFF) << 4) 4373 #define G_008C24_WAVE_LEVEL_SH0(x) (((x) >> 4) & 0xFFF) 4374 #define C_008C24_WAVE_LEVEL_SH0 0xFFFF000F 4375 #define S_008C24_WAVE_LEVEL_SH1(x) (((unsigned)(x) & 0xFFF) << 16) 4376 #define G_008C24_WAVE_LEVEL_SH1(x) (((x) >> 16) & 0xFFF) 4377 #define C_008C24_WAVE_LEVEL_SH1 0xF000FFFF 4378 #define R_008C80_SQ_PERFCOUNTER0_LO 0x008C80 /* <= gfx6 */ 4379 #define R_008C84_SQ_PERFCOUNTER0_HI 0x008C84 /* <= gfx6 */ 4380 #define R_008C88_SQ_PERFCOUNTER1_LO 0x008C88 /* <= gfx6 */ 4381 #define R_008C8C_SQ_PERFCOUNTER1_HI 0x008C8C /* <= gfx6 */ 4382 #define R_008C90_SQ_PERFCOUNTER2_LO 0x008C90 /* <= gfx6 */ 4383 #define R_008C94_SQ_PERFCOUNTER2_HI 0x008C94 /* <= gfx6 */ 4384 #define R_008C98_SQ_PERFCOUNTER3_LO 0x008C98 /* <= gfx6 */ 4385 #define R_008C9C_SQ_PERFCOUNTER3_HI 0x008C9C /* <= gfx6 */ 4386 #define R_008CA0_SQ_PERFCOUNTER4_LO 0x008CA0 /* <= gfx6 */ 4387 #define R_008CA4_SQ_PERFCOUNTER4_HI 0x008CA4 /* <= gfx6 */ 4388 #define R_008CA8_SQ_PERFCOUNTER5_LO 0x008CA8 /* <= gfx6 */ 4389 #define R_008CAC_SQ_PERFCOUNTER5_HI 0x008CAC /* <= gfx6 */ 4390 #define R_008CB0_SQ_PERFCOUNTER6_LO 0x008CB0 /* <= gfx6 */ 4391 #define R_008CB4_SQ_PERFCOUNTER6_HI 0x008CB4 /* <= gfx6 */ 4392 #define R_008CB8_SQ_PERFCOUNTER7_LO 0x008CB8 /* <= gfx6 */ 4393 #define R_008CBC_SQ_PERFCOUNTER7_HI 0x008CBC /* <= gfx6 */ 4394 #define R_008CC0_SQ_PERFCOUNTER8_LO 0x008CC0 /* <= gfx6 */ 4395 #define R_008CC4_SQ_PERFCOUNTER8_HI 0x008CC4 /* <= gfx6 */ 4396 #define R_008CC8_SQ_PERFCOUNTER9_LO 0x008CC8 /* <= gfx6 */ 4397 #define R_008CCC_SQ_PERFCOUNTER9_HI 0x008CCC /* <= gfx6 */ 4398 #define R_008CD0_SQ_PERFCOUNTER10_LO 0x008CD0 /* <= gfx6 */ 4399 #define R_008CD4_SQ_PERFCOUNTER10_HI 0x008CD4 /* <= gfx6 */ 4400 #define R_008CD8_SQ_PERFCOUNTER11_LO 0x008CD8 /* <= gfx6 */ 4401 #define R_008CDC_SQ_PERFCOUNTER11_HI 0x008CDC /* <= gfx6 */ 4402 #define R_008CE0_SQ_PERFCOUNTER12_LO 0x008CE0 /* <= gfx6 */ 4403 #define R_008CE4_SQ_PERFCOUNTER12_HI 0x008CE4 /* <= gfx6 */ 4404 #define R_008CE8_SQ_PERFCOUNTER13_LO 0x008CE8 /* <= gfx6 */ 4405 #define R_008CEC_SQ_PERFCOUNTER13_HI 0x008CEC /* <= gfx6 */ 4406 #define R_008CF0_SQ_PERFCOUNTER14_LO 0x008CF0 /* <= gfx6 */ 4407 #define R_008CF4_SQ_PERFCOUNTER14_HI 0x008CF4 /* <= gfx6 */ 4408 #define R_008CF8_SQ_PERFCOUNTER15_LO 0x008CF8 /* <= gfx6 */ 4409 #define R_008CFC_SQ_PERFCOUNTER15_HI 0x008CFC /* <= gfx6 */ 4410 #define R_008D00_SQ_PERFCOUNTER0_SELECT 0x008D00 /* <= gfx6 */ 4411 #define S_008D00_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 4412 #define G_008D00_PERF_SEL(x) (((x) >> 0) & 0x1FF) 4413 #define C_008D00_PERF_SEL 0xFFFFFE00 4414 #define S_008D00_SQC_BANK_MASK(x) (((unsigned)(x) & 0xF) << 12) 4415 #define G_008D00_SQC_BANK_MASK(x) (((x) >> 12) & 0xF) 4416 #define C_008D00_SQC_BANK_MASK 0xFFFF0FFF 4417 #define S_008D00_SQC_CLIENT_MASK(x) (((unsigned)(x) & 0xF) << 16) 4418 #define G_008D00_SQC_CLIENT_MASK(x) (((x) >> 16) & 0xF) 4419 #define C_008D00_SQC_CLIENT_MASK 0xFFF0FFFF 4420 #define S_008D00_SPM_MODE(x) (((unsigned)(x) & 0xF) << 20) 4421 #define G_008D00_SPM_MODE(x) (((x) >> 20) & 0xF) 4422 #define C_008D00_SPM_MODE 0xFF0FFFFF 4423 #define S_008D00_SIMD_MASK(x) (((unsigned)(x) & 0xF) << 24) 4424 #define G_008D00_SIMD_MASK(x) (((x) >> 24) & 0xF) 4425 #define C_008D00_SIMD_MASK 0xF0FFFFFF 4426 #define S_008D00_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 4427 #define G_008D00_PERF_MODE(x) (((x) >> 28) & 0xF) 4428 #define C_008D00_PERF_MODE 0x0FFFFFFF 4429 #define R_008D00_SQ_THREAD_TRACE_BUF0_BASE 0x008D00 /* >= gfx10 */ 4430 #define R_008D04_SQ_PERFCOUNTER1_SELECT 0x008D04 /* <= gfx6 */ 4431 #define R_008D04_SQ_THREAD_TRACE_BUF0_SIZE 0x008D04 /* >= gfx10 */ 4432 #define S_008D04_BASE_HI(x) (((unsigned)(x) & 0xF) << 0) 4433 #define G_008D04_BASE_HI(x) (((x) >> 0) & 0xF) 4434 #define C_008D04_BASE_HI 0xFFFFFFF0 4435 #define S_008D04_SIZE(x) (((unsigned)(x) & 0x3FFFFF) << 8) 4436 #define G_008D04_SIZE(x) (((x) >> 8) & 0x3FFFFF) 4437 #define C_008D04_SIZE 0xC00000FF 4438 #define R_008D08_SQ_PERFCOUNTER2_SELECT 0x008D08 /* <= gfx6 */ 4439 #define R_008D08_SQ_THREAD_TRACE_BUF1_BASE 0x008D08 /* >= gfx10 */ 4440 #define R_008D0C_SQ_PERFCOUNTER3_SELECT 0x008D0C /* <= gfx6 */ 4441 #define R_008D0C_SQ_THREAD_TRACE_BUF1_SIZE 0x008D0C /* >= gfx10 */ 4442 #define R_008D10_SQ_PERFCOUNTER4_SELECT 0x008D10 /* <= gfx6 */ 4443 #define R_008D10_SQ_THREAD_TRACE_WPTR 0x008D10 /* >= gfx10 */ 4444 #define S_008D10_OFFSET(x) (((unsigned)(x) & 0x1FFFFFFF) << 0) 4445 #define G_008D10_OFFSET(x) (((x) >> 0) & 0x1FFFFFFF) 4446 #define C_008D10_OFFSET 0xE0000000 4447 #define S_008D10_BUFFER_ID(x) (((unsigned)(x) & 0x1) << 31) 4448 #define G_008D10_BUFFER_ID(x) (((x) >> 31) & 0x1) 4449 #define C_008D10_BUFFER_ID 0x7FFFFFFF 4450 #define R_008D14_SQ_PERFCOUNTER5_SELECT 0x008D14 /* <= gfx6 */ 4451 #define R_008D14_SQ_THREAD_TRACE_MASK 0x008D14 /* >= gfx10 */ 4452 #define S_008D14_SIMD_SEL(x) (((unsigned)(x) & 0x3) << 0) 4453 #define G_008D14_SIMD_SEL(x) (((x) >> 0) & 0x3) 4454 #define C_008D14_SIMD_SEL 0xFFFFFFFC 4455 #define S_008D14_WGP_SEL(x) (((unsigned)(x) & 0xF) << 4) 4456 #define G_008D14_WGP_SEL(x) (((x) >> 4) & 0xF) 4457 #define C_008D14_WGP_SEL 0xFFFFFF0F 4458 #define S_008D14_SA_SEL(x) (((unsigned)(x) & 0x1) << 9) 4459 #define G_008D14_SA_SEL(x) (((x) >> 9) & 0x1) 4460 #define C_008D14_SA_SEL 0xFFFFFDFF 4461 #define S_008D14_WTYPE_INCLUDE(x) (((unsigned)(x) & 0x7F) << 10) 4462 #define G_008D14_WTYPE_INCLUDE(x) (((x) >> 10) & 0x7F) 4463 #define C_008D14_WTYPE_INCLUDE 0xFFFE03FF 4464 #define R_008D18_SQ_PERFCOUNTER6_SELECT 0x008D18 /* <= gfx6 */ 4465 #define R_008D18_SQ_THREAD_TRACE_TOKEN_MASK 0x008D18 /* >= gfx10 */ 4466 #define S_008D18_TOKEN_EXCLUDE(x) (((unsigned)(x) & 0xFFF) << 0) 4467 #define G_008D18_TOKEN_EXCLUDE(x) (((x) >> 0) & 0xFFF) 4468 #define C_008D18_TOKEN_EXCLUDE 0xFFFFF000 4469 #define V_008D18_TOKEN_EXCLUDE_VMEMEXEC 1 4470 #define V_008D18_TOKEN_EXCLUDE_ALUEXEC 2 4471 #define V_008D18_TOKEN_EXCLUDE_VALUINST 4 4472 #define V_008D18_TOKEN_EXCLUDE_WAVERDY 8 4473 #define V_008D18_TOKEN_EXCLUDE_IMMED1 16 4474 #define V_008D18_TOKEN_EXCLUDE_IMMEDIATE 32 4475 #define V_008D18_TOKEN_EXCLUDE_REG 64 4476 #define V_008D18_TOKEN_EXCLUDE_EVENT 128 4477 #define V_008D18_TOKEN_EXCLUDE_INST 256 4478 #define V_008D18_TOKEN_EXCLUDE_UTILCTR 512 4479 #define V_008D18_TOKEN_EXCLUDE_WAVEALLOC 1024 4480 #define V_008D18_TOKEN_EXCLUDE_PERF 2048 4481 #define S_008D18_BOP_EVENTS_TOKEN_INCLUDE(x) (((unsigned)(x) & 0x1) << 12) /* >= gfx103 */ 4482 #define G_008D18_BOP_EVENTS_TOKEN_INCLUDE(x) (((x) >> 12) & 0x1) 4483 #define C_008D18_BOP_EVENTS_TOKEN_INCLUDE 0xFFFFEFFF 4484 #define S_008D18_REG_INCLUDE(x) (((unsigned)(x) & 0xFF) << 16) 4485 #define G_008D18_REG_INCLUDE(x) (((x) >> 16) & 0xFF) 4486 #define C_008D18_REG_INCLUDE 0xFF00FFFF 4487 #define V_008D18_REG_INCLUDE_SQDEC 1 4488 #define V_008D18_REG_INCLUDE_SHDEC 2 4489 #define V_008D18_REG_INCLUDE_GFXUDEC 4 4490 #define V_008D18_REG_INCLUDE_COMP 8 4491 #define V_008D18_REG_INCLUDE_CONTEXT 16 4492 #define V_008D18_REG_INCLUDE_CONFIG 32 4493 #define V_008D18_REG_INCLUDE_OTHER 64 4494 #define V_008D18_REG_INCLUDE_READS 128 4495 #define S_008D18_INST_EXCLUDE(x) (((unsigned)(x) & 0x3) << 24) 4496 #define G_008D18_INST_EXCLUDE(x) (((x) >> 24) & 0x3) 4497 #define C_008D18_INST_EXCLUDE 0xFCFFFFFF 4498 #define S_008D18_REG_EXCLUDE(x) (((unsigned)(x) & 0x7) << 26) /* >= gfx103 */ 4499 #define G_008D18_REG_EXCLUDE(x) (((x) >> 26) & 0x7) 4500 #define C_008D18_REG_EXCLUDE 0xE3FFFFFF 4501 #define S_008D18_REG_DETAIL_ALL(x) (((unsigned)(x) & 0x1) << 31) 4502 #define G_008D18_REG_DETAIL_ALL(x) (((x) >> 31) & 0x1) 4503 #define C_008D18_REG_DETAIL_ALL 0x7FFFFFFF 4504 #define R_008D1C_SQ_PERFCOUNTER7_SELECT 0x008D1C /* <= gfx6 */ 4505 #define R_008D1C_SQ_THREAD_TRACE_CTRL 0x008D1C /* >= gfx10 */ 4506 #define S_008D1C_MODE(x) (((unsigned)(x) & 0x3) << 0) 4507 #define G_008D1C_MODE(x) (((x) >> 0) & 0x3) 4508 #define C_008D1C_MODE 0xFFFFFFFC 4509 #define S_008D1C_ALL_VMID(x) (((unsigned)(x) & 0x1) << 2) 4510 #define G_008D1C_ALL_VMID(x) (((x) >> 2) & 0x1) 4511 #define C_008D1C_ALL_VMID 0xFFFFFFFB 4512 #define S_008D1C_CH_PERF_EN(x) (((unsigned)(x) & 0x1) << 3) 4513 #define G_008D1C_CH_PERF_EN(x) (((x) >> 3) & 0x1) 4514 #define C_008D1C_CH_PERF_EN 0xFFFFFFF7 4515 #define S_008D1C_INTERRUPT_EN(x) (((unsigned)(x) & 0x1) << 4) 4516 #define G_008D1C_INTERRUPT_EN(x) (((x) >> 4) & 0x1) 4517 #define C_008D1C_INTERRUPT_EN 0xFFFFFFEF 4518 #define S_008D1C_DOUBLE_BUFFER(x) (((unsigned)(x) & 0x1) << 5) 4519 #define G_008D1C_DOUBLE_BUFFER(x) (((x) >> 5) & 0x1) 4520 #define C_008D1C_DOUBLE_BUFFER 0xFFFFFFDF 4521 #define S_008D1C_HIWATER(x) (((unsigned)(x) & 0x7) << 6) 4522 #define G_008D1C_HIWATER(x) (((x) >> 6) & 0x7) 4523 #define C_008D1C_HIWATER 0xFFFFFE3F 4524 #define S_008D1C_REG_STALL_EN(x) (((unsigned)(x) & 0x1) << 9) 4525 #define G_008D1C_REG_STALL_EN(x) (((x) >> 9) & 0x1) 4526 #define C_008D1C_REG_STALL_EN 0xFFFFFDFF 4527 #define S_008D1C_SPI_STALL_EN(x) (((unsigned)(x) & 0x1) << 10) 4528 #define G_008D1C_SPI_STALL_EN(x) (((x) >> 10) & 0x1) 4529 #define C_008D1C_SPI_STALL_EN 0xFFFFFBFF 4530 #define S_008D1C_SQ_STALL_EN(x) (((unsigned)(x) & 0x1) << 11) 4531 #define G_008D1C_SQ_STALL_EN(x) (((x) >> 11) & 0x1) 4532 #define C_008D1C_SQ_STALL_EN 0xFFFFF7FF 4533 #define S_008D1C_REG_DROP_ON_STALL(x) (((unsigned)(x) & 0x1) << 12) 4534 #define G_008D1C_REG_DROP_ON_STALL(x) (((x) >> 12) & 0x1) 4535 #define C_008D1C_REG_DROP_ON_STALL 0xFFFFEFFF 4536 #define S_008D1C_UTIL_TIMER(x) (((unsigned)(x) & 0x1) << 13) 4537 #define G_008D1C_UTIL_TIMER(x) (((x) >> 13) & 0x1) 4538 #define C_008D1C_UTIL_TIMER 0xFFFFDFFF 4539 #define S_008D1C_WAVESTART_MODE(x) (((unsigned)(x) & 0x3) << 14) 4540 #define G_008D1C_WAVESTART_MODE(x) (((x) >> 14) & 0x3) 4541 #define C_008D1C_WAVESTART_MODE 0xFFFF3FFF 4542 #define S_008D1C_RT_FREQ(x) (((unsigned)(x) & 0x3) << 16) 4543 #define G_008D1C_RT_FREQ(x) (((x) >> 16) & 0x3) 4544 #define C_008D1C_RT_FREQ 0xFFFCFFFF 4545 #define S_008D1C_SYNC_COUNT_MARKERS(x) (((unsigned)(x) & 0x1) << 18) 4546 #define G_008D1C_SYNC_COUNT_MARKERS(x) (((x) >> 18) & 0x1) 4547 #define C_008D1C_SYNC_COUNT_MARKERS 0xFFFBFFFF 4548 #define S_008D1C_SYNC_COUNT_DRAWS(x) (((unsigned)(x) & 0x1) << 19) 4549 #define G_008D1C_SYNC_COUNT_DRAWS(x) (((x) >> 19) & 0x1) 4550 #define C_008D1C_SYNC_COUNT_DRAWS 0xFFF7FFFF 4551 #define S_008D1C_LOWATER_OFFSET(x) (((unsigned)(x) & 0x7) << 20) /* >= gfx103 */ 4552 #define G_008D1C_LOWATER_OFFSET(x) (((x) >> 20) & 0x7) 4553 #define C_008D1C_LOWATER_OFFSET 0xFF8FFFFF 4554 #define S_008D1C_AUTO_FLUSH_PADDING_DIS(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx103 */ 4555 #define G_008D1C_AUTO_FLUSH_PADDING_DIS(x) (((x) >> 28) & 0x1) 4556 #define C_008D1C_AUTO_FLUSH_PADDING_DIS 0xEFFFFFFF 4557 #define S_008D1C_AUTO_FLUSH_MODE(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx103 */ 4558 #define G_008D1C_AUTO_FLUSH_MODE(x) (((x) >> 29) & 0x1) 4559 #define C_008D1C_AUTO_FLUSH_MODE 0xDFFFFFFF 4560 #define S_008D1C_CAPTURE_ALL(x) (((unsigned)(x) & 0x1) << 30) 4561 #define G_008D1C_CAPTURE_ALL(x) (((x) >> 30) & 0x1) 4562 #define C_008D1C_CAPTURE_ALL 0xBFFFFFFF 4563 #define S_008D1C_DRAW_EVENT_EN(x) (((unsigned)(x) & 0x1) << 31) 4564 #define G_008D1C_DRAW_EVENT_EN(x) (((x) >> 31) & 0x1) 4565 #define C_008D1C_DRAW_EVENT_EN 0x7FFFFFFF 4566 #define R_008D20_SQ_PERFCOUNTER8_SELECT 0x008D20 /* <= gfx6 */ 4567 #define R_008D20_SQ_THREAD_TRACE_STATUS 0x008D20 /* >= gfx10 */ 4568 #define S_008D20_FINISH_PENDING(x) (((unsigned)(x) & 0xFFF) << 0) 4569 #define G_008D20_FINISH_PENDING(x) (((x) >> 0) & 0xFFF) 4570 #define C_008D20_FINISH_PENDING 0xFFFFF000 4571 #define S_008D20_FINISH_DONE(x) (((unsigned)(x) & 0xFFF) << 12) 4572 #define G_008D20_FINISH_DONE(x) (((x) >> 12) & 0xFFF) 4573 #define C_008D20_FINISH_DONE 0xFF000FFF 4574 #define S_008D20_UTC_ERR(x) (((unsigned)(x) & 0x1) << 24) 4575 #define G_008D20_UTC_ERR(x) (((x) >> 24) & 0x1) 4576 #define C_008D20_UTC_ERR 0xFEFFFFFF 4577 #define S_008D20_BUSY(x) (((unsigned)(x) & 0x1) << 25) 4578 #define G_008D20_BUSY(x) (((x) >> 25) & 0x1) 4579 #define C_008D20_BUSY 0xFDFFFFFF 4580 #define S_008D20_EVENT_CNTR_OVERFLOW(x) (((unsigned)(x) & 0x1) << 26) 4581 #define G_008D20_EVENT_CNTR_OVERFLOW(x) (((x) >> 26) & 0x1) 4582 #define C_008D20_EVENT_CNTR_OVERFLOW 0xFBFFFFFF 4583 #define S_008D20_EVENT_CNTR_STALL(x) (((unsigned)(x) & 0x1) << 27) 4584 #define G_008D20_EVENT_CNTR_STALL(x) (((x) >> 27) & 0x1) 4585 #define C_008D20_EVENT_CNTR_STALL 0xF7FFFFFF 4586 #define S_008D20_OWNER_VMID(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx103 */ 4587 #define G_008D20_OWNER_VMID(x) (((x) >> 28) & 0xF) 4588 #define C_008D20_OWNER_VMID 0x0FFFFFFF 4589 #define R_008D24_SQ_PERFCOUNTER9_SELECT 0x008D24 /* <= gfx6 */ 4590 #define R_008D24_SQ_THREAD_TRACE_DROPPED_CNTR 0x008D24 /* >= gfx10 */ 4591 #define R_008D28_SQ_PERFCOUNTER10_SELECT 0x008D28 /* <= gfx6 */ 4592 #define R_008D2C_SQ_PERFCOUNTER11_SELECT 0x008D2C /* <= gfx6 */ 4593 #define R_008D2C_SQ_THREAD_TRACE_GFX_DRAW_CNTR 0x008D2C /* >= gfx10 */ 4594 #define R_008D30_SQ_PERFCOUNTER12_SELECT 0x008D30 /* <= gfx6 */ 4595 #define R_008D30_SQ_THREAD_TRACE_GFX_MARKER_CNTR 0x008D30 /* >= gfx10 */ 4596 #define R_008D34_SQ_PERFCOUNTER13_SELECT 0x008D34 /* <= gfx6 */ 4597 #define R_008D34_SQ_THREAD_TRACE_HP3D_DRAW_CNTR 0x008D34 /* >= gfx10 */ 4598 #define R_008D38_SQ_PERFCOUNTER14_SELECT 0x008D38 /* <= gfx6 */ 4599 #define R_008D38_SQ_THREAD_TRACE_HP3D_MARKER_CNTR 0x008D38 /* >= gfx10 */ 4600 #define R_008D3C_SQ_PERFCOUNTER15_SELECT 0x008D3C /* <= gfx6 */ 4601 #define R_008D3C_SQ_THREAD_TRACE_STATUS2 0x008D3C /* >= gfx103 */ 4602 #define S_008D3C_BUF0_FULL(x) (((unsigned)(x) & 0x1) << 0) 4603 #define G_008D3C_BUF0_FULL(x) (((x) >> 0) & 0x1) 4604 #define C_008D3C_BUF0_FULL 0xFFFFFFFE 4605 #define S_008D3C_BUF1_FULL(x) (((unsigned)(x) & 0x1) << 1) 4606 #define G_008D3C_BUF1_FULL(x) (((x) >> 1) & 0x1) 4607 #define C_008D3C_BUF1_FULL 0xFFFFFFFD 4608 #define S_008D3C_PACKET_LOST_BUF_NO_LOCKDOWN(x) (((unsigned)(x) & 0x1) << 4) 4609 #define G_008D3C_PACKET_LOST_BUF_NO_LOCKDOWN(x) (((x) >> 4) & 0x1) 4610 #define C_008D3C_PACKET_LOST_BUF_NO_LOCKDOWN 0xFFFFFFEF 4611 #define R_008D80_SQ_ALU_CLK_CTRL 0x008D80 /* <= gfx6 */ 4612 #define S_008D80_FORCE_CU_ON_SH0(x) (((unsigned)(x) & 0xFFFF) << 0) 4613 #define G_008D80_FORCE_CU_ON_SH0(x) (((x) >> 0) & 0xFFFF) 4614 #define C_008D80_FORCE_CU_ON_SH0 0xFFFF0000 4615 #define S_008D80_FORCE_CU_ON_SH1(x) (((unsigned)(x) & 0xFFFF) << 16) 4616 #define G_008D80_FORCE_CU_ON_SH1(x) (((x) >> 16) & 0xFFFF) 4617 #define C_008D80_FORCE_CU_ON_SH1 0x0000FFFF 4618 #define R_008D84_SQ_TEX_CLK_CTRL 0x008D84 /* <= gfx6 */ 4619 #define S_008D84_FORCE_CU_ON_SH0(x) (((unsigned)(x) & 0xFFFF) << 0) 4620 #define G_008D84_FORCE_CU_ON_SH0(x) (((x) >> 0) & 0xFFFF) 4621 #define C_008D84_FORCE_CU_ON_SH0 0xFFFF0000 4622 #define S_008D84_FORCE_CU_ON_SH1(x) (((unsigned)(x) & 0xFFFF) << 16) 4623 #define G_008D84_FORCE_CU_ON_SH1(x) (((x) >> 16) & 0xFFFF) 4624 #define C_008D84_FORCE_CU_ON_SH1 0x0000FFFF 4625 #define R_008D88_CGTT_SQ_CLK_CTRL 0x008D88 /* <= gfx6 */ 4626 #define S_008D88_ON_DELAY(x) (((unsigned)(x) & 0xF) << 0) 4627 #define G_008D88_ON_DELAY(x) (((x) >> 0) & 0xF) 4628 #define C_008D88_ON_DELAY 0xFFFFFFF0 4629 #define S_008D88_OFF_HYSTERESIS(x) (((unsigned)(x) & 0xFF) << 4) 4630 #define G_008D88_OFF_HYSTERESIS(x) (((x) >> 4) & 0xFF) 4631 #define C_008D88_OFF_HYSTERESIS 0xFFFFF00F 4632 #define S_008D88_CORE_OVERRIDE(x) (((unsigned)(x) & 0x1) << 30) 4633 #define G_008D88_CORE_OVERRIDE(x) (((x) >> 30) & 0x1) 4634 #define C_008D88_CORE_OVERRIDE 0xBFFFFFFF 4635 #define S_008D88_REG_OVERRIDE(x) (((unsigned)(x) & 0x1) << 31) 4636 #define G_008D88_REG_OVERRIDE(x) (((x) >> 31) & 0x1) 4637 #define C_008D88_REG_OVERRIDE 0x7FFFFFFF 4638 #define R_008D8C_CGTT_SQG_CLK_CTRL 0x008D8C /* <= gfx6 */ 4639 #define S_008D8C_ON_DELAY(x) (((unsigned)(x) & 0xF) << 0) 4640 #define G_008D8C_ON_DELAY(x) (((x) >> 0) & 0xF) 4641 #define C_008D8C_ON_DELAY 0xFFFFFFF0 4642 #define S_008D8C_OFF_HYSTERESIS(x) (((unsigned)(x) & 0xFF) << 4) 4643 #define G_008D8C_OFF_HYSTERESIS(x) (((x) >> 4) & 0xFF) 4644 #define C_008D8C_OFF_HYSTERESIS 0xFFFFF00F 4645 #define S_008D8C_CORE_OVERRIDE(x) (((unsigned)(x) & 0x1) << 30) 4646 #define G_008D8C_CORE_OVERRIDE(x) (((x) >> 30) & 0x1) 4647 #define C_008D8C_CORE_OVERRIDE 0xBFFFFFFF 4648 #define S_008D8C_REG_OVERRIDE(x) (((unsigned)(x) & 0x1) << 31) 4649 #define G_008D8C_REG_OVERRIDE(x) (((x) >> 31) & 0x1) 4650 #define C_008D8C_REG_OVERRIDE 0x7FFFFFFF 4651 #define R_008DE0_SQ_IND_INDEX 0x008DE0 /* <= gfx6 */ 4652 #define S_008DE0_WAVE_ID(x) (((unsigned)(x) & 0xF) << 0) 4653 #define G_008DE0_WAVE_ID(x) (((x) >> 0) & 0xF) 4654 #define C_008DE0_WAVE_ID 0xFFFFFFF0 4655 #define S_008DE0_SIMD_ID(x) (((unsigned)(x) & 0x3) << 4) 4656 #define G_008DE0_SIMD_ID(x) (((x) >> 4) & 0x3) 4657 #define C_008DE0_SIMD_ID 0xFFFFFFCF 4658 #define S_008DE0_THREAD_ID(x) (((unsigned)(x) & 0x3F) << 6) 4659 #define G_008DE0_THREAD_ID(x) (((x) >> 6) & 0x3F) 4660 #define C_008DE0_THREAD_ID 0xFFFFF03F 4661 #define S_008DE0_AUTO_INCR(x) (((unsigned)(x) & 0x1) << 12) 4662 #define G_008DE0_AUTO_INCR(x) (((x) >> 12) & 0x1) 4663 #define C_008DE0_AUTO_INCR 0xFFFFEFFF 4664 #define S_008DE0_FORCE_READ(x) (((unsigned)(x) & 0x1) << 13) 4665 #define G_008DE0_FORCE_READ(x) (((x) >> 13) & 0x1) 4666 #define C_008DE0_FORCE_READ 0xFFFFDFFF 4667 #define S_008DE0_READ_TIMEOUT(x) (((unsigned)(x) & 0x1) << 14) 4668 #define G_008DE0_READ_TIMEOUT(x) (((x) >> 14) & 0x1) 4669 #define C_008DE0_READ_TIMEOUT 0xFFFFBFFF 4670 #define S_008DE0_UNINDEXED(x) (((unsigned)(x) & 0x1) << 15) 4671 #define G_008DE0_UNINDEXED(x) (((x) >> 15) & 0x1) 4672 #define C_008DE0_UNINDEXED 0xFFFF7FFF 4673 #define S_008DE0_INDEX(x) (((unsigned)(x) & 0xFFFF) << 16) 4674 #define G_008DE0_INDEX(x) (((x) >> 16) & 0xFFFF) 4675 #define C_008DE0_INDEX 0x0000FFFF 4676 #define R_008DE4_SQ_IND_DATA 0x008DE4 /* <= gfx6 */ 4677 #define R_008DF0_SQ_TIME_HI 0x008DF0 /* <= gfx6 */ 4678 #define R_008DF4_SQ_TIME_LO 0x008DF4 /* <= gfx6 */ 4679 #define R_008DFC_SQ_EXP_0 0x008DFC /* >= gfx10 */ 4680 #define S_008DFC_EN(x) (((unsigned)(x) & 0xF) << 0) 4681 #define G_008DFC_EN(x) (((x) >> 0) & 0xF) 4682 #define C_008DFC_EN 0xFFFFFFF0 4683 #define S_008DFC_TGT(x) (((unsigned)(x) & 0x3F) << 4) 4684 #define G_008DFC_TGT(x) (((x) >> 4) & 0x3F) 4685 #define C_008DFC_TGT 0xFFFFFC0F 4686 #define V_008DFC_SQ_EXP_MRT 0 4687 #define V_008DFC_SQ_EXP_MRTZ 8 4688 #define V_008DFC_SQ_EXP_NULL 9 4689 #define V_008DFC_SQ_EXP_POS 12 4690 #define V_008DFC_SQ_EXP_PRIM 20 4691 #define V_008DFC_SQ_EXP_PARAM 32 4692 #define S_008DFC_COMPR(x) (((unsigned)(x) & 0x1) << 10) 4693 #define G_008DFC_COMPR(x) (((x) >> 10) & 0x1) 4694 #define C_008DFC_COMPR 0xFFFFFBFF 4695 #define S_008DFC_DONE(x) (((unsigned)(x) & 0x1) << 11) 4696 #define G_008DFC_DONE(x) (((x) >> 11) & 0x1) 4697 #define C_008DFC_DONE 0xFFFFF7FF 4698 #define S_008DFC_VM(x) (((unsigned)(x) & 0x1) << 12) 4699 #define G_008DFC_VM(x) (((x) >> 12) & 0x1) 4700 #define C_008DFC_VM 0xFFFFEFFF 4701 #define R_008E00_SQ_THREAD_TRACE_BASE 0x008E00 /* <= gfx7 */ 4702 #define R_008E04_SQ_THREAD_TRACE_SIZE 0x008E04 /* <= gfx7 */ 4703 #define S_008E04_SIZE(x) (((unsigned)(x) & 0x3FFFFF) << 0) 4704 #define G_008E04_SIZE(x) (((x) >> 0) & 0x3FFFFF) 4705 #define C_008E04_SIZE 0xFFC00000 4706 #define R_008E08_SQ_THREAD_TRACE_MASK 0x008E08 /* <= gfx7 */ 4707 #define S_008E08_CU_SEL(x) (((unsigned)(x) & 0x1F) << 0) 4708 #define G_008E08_CU_SEL(x) (((x) >> 0) & 0x1F) 4709 #define C_008E08_CU_SEL 0xFFFFFFE0 4710 #define S_008E08_SH_SEL(x) (((unsigned)(x) & 0x1) << 5) 4711 #define G_008E08_SH_SEL(x) (((x) >> 5) & 0x1) 4712 #define C_008E08_SH_SEL 0xFFFFFFDF 4713 #define S_008E08_REG_STALL_EN(x) (((unsigned)(x) & 0x1) << 7) 4714 #define G_008E08_REG_STALL_EN(x) (((x) >> 7) & 0x1) 4715 #define C_008E08_REG_STALL_EN 0xFFFFFF7F 4716 #define S_008E08_SIMD_EN(x) (((unsigned)(x) & 0xF) << 8) /* gfx7 */ 4717 #define G_008E08_SIMD_EN(x) (((x) >> 8) & 0xF) 4718 #define C_008E08_SIMD_EN 0xFFFFF0FF 4719 #define S_008E08_VM_ID_MASK(x) (((unsigned)(x) & 0x3) << 12) 4720 #define G_008E08_VM_ID_MASK(x) (((x) >> 12) & 0x3) 4721 #define C_008E08_VM_ID_MASK 0xFFFFCFFF 4722 #define S_008E08_SPI_STALL_EN(x) (((unsigned)(x) & 0x1) << 14) 4723 #define G_008E08_SPI_STALL_EN(x) (((x) >> 14) & 0x1) 4724 #define C_008E08_SPI_STALL_EN 0xFFFFBFFF 4725 #define S_008E08_SQ_STALL_EN(x) (((unsigned)(x) & 0x1) << 15) 4726 #define G_008E08_SQ_STALL_EN(x) (((x) >> 15) & 0x1) 4727 #define C_008E08_SQ_STALL_EN 0xFFFF7FFF 4728 #define S_008E08_RANDOM_SEED(x) (((unsigned)(x) & 0xFFFF) << 16) 4729 #define G_008E08_RANDOM_SEED(x) (((x) >> 16) & 0xFFFF) 4730 #define C_008E08_RANDOM_SEED 0x0000FFFF 4731 #define R_008E0C_SQ_THREAD_TRACE_TOKEN_MASK 0x008E0C /* <= gfx7 */ 4732 #define S_008E0C_TOKEN_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) 4733 #define G_008E0C_TOKEN_MASK(x) (((x) >> 0) & 0xFFFF) 4734 #define C_008E0C_TOKEN_MASK 0xFFFF0000 4735 #define S_008E0C_REG_MASK(x) (((unsigned)(x) & 0xFF) << 16) 4736 #define G_008E0C_REG_MASK(x) (((x) >> 16) & 0xFF) 4737 #define C_008E0C_REG_MASK 0xFF00FFFF 4738 #define S_008E0C_REG_DROP_ON_STALL(x) (((unsigned)(x) & 0x1) << 24) 4739 #define G_008E0C_REG_DROP_ON_STALL(x) (((x) >> 24) & 0x1) 4740 #define C_008E0C_REG_DROP_ON_STALL 0xFEFFFFFF 4741 #define R_008E10_SQ_THREAD_TRACE_PERF_MASK 0x008E10 /* <= gfx7 */ 4742 #define S_008E10_SH0_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) 4743 #define G_008E10_SH0_MASK(x) (((x) >> 0) & 0xFFFF) 4744 #define C_008E10_SH0_MASK 0xFFFF0000 4745 #define S_008E10_SH1_MASK(x) (((unsigned)(x) & 0xFFFF) << 16) 4746 #define G_008E10_SH1_MASK(x) (((x) >> 16) & 0xFFFF) 4747 #define C_008E10_SH1_MASK 0x0000FFFF 4748 #define R_008E14_SQ_THREAD_TRACE_BASE2 0x008E14 /* gfx7 */ 4749 #define S_008E14_ADDR_HI(x) (((unsigned)(x) & 0xF) << 0) 4750 #define G_008E14_ADDR_HI(x) (((x) >> 0) & 0xF) 4751 #define C_008E14_ADDR_HI 0xFFFFFFF0 4752 #define S_008E14_ATC(x) (((unsigned)(x) & 0x1) << 4) 4753 #define G_008E14_ATC(x) (((x) >> 4) & 0x1) 4754 #define C_008E14_ATC 0xFFFFFFEF 4755 #define R_008E18_SQ_THREAD_TRACE_TOKEN_MASK2 0x008E18 /* gfx7 */ 4756 #define S_008E18_INST_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) 4757 #define G_008E18_INST_MASK(x) (((x) >> 0) & 0xFFFF) 4758 #define C_008E18_INST_MASK 0xFFFF0000 4759 #define R_008E20_SQ_THREAD_TRACE_USERDATA_0 0x008E20 /* <= gfx6 */ 4760 #define R_008E24_SQ_THREAD_TRACE_USERDATA_1 0x008E24 /* <= gfx6 */ 4761 #define R_008E28_SQ_THREAD_TRACE_USERDATA_2 0x008E28 /* <= gfx6 */ 4762 #define R_008E2C_SQ_THREAD_TRACE_USERDATA_3 0x008E2C /* <= gfx6 */ 4763 #define R_008E30_SQ_THREAD_TRACE_WPTR 0x008E30 /* <= gfx7 */ 4764 #define S_008E30_WPTR(x) (((unsigned)(x) & 0x3FFFFFFF) << 0) 4765 #define G_008E30_WPTR(x) (((x) >> 0) & 0x3FFFFFFF) 4766 #define C_008E30_WPTR 0xC0000000 4767 #define S_008E30_READ_OFFSET(x) (((unsigned)(x) & 0x3) << 30) 4768 #define G_008E30_READ_OFFSET(x) (((x) >> 30) & 0x3) 4769 #define C_008E30_READ_OFFSET 0x3FFFFFFF 4770 #define R_008E34_SQ_THREAD_TRACE_STATUS 0x008E34 /* <= gfx7 */ 4771 #define S_008E34_FINISH_PENDING(x) (((unsigned)(x) & 0x3FF) << 0) 4772 #define G_008E34_FINISH_PENDING(x) (((x) >> 0) & 0x3FF) 4773 #define C_008E34_FINISH_PENDING 0xFFFFFC00 4774 #define S_008E34_FINISH_DONE(x) (((unsigned)(x) & 0x3FF) << 16) 4775 #define G_008E34_FINISH_DONE(x) (((x) >> 16) & 0x3FF) 4776 #define C_008E34_FINISH_DONE 0xFC00FFFF 4777 #define S_008E34_NEW_BUF(x) (((unsigned)(x) & 0x1) << 29) 4778 #define G_008E34_NEW_BUF(x) (((x) >> 29) & 0x1) 4779 #define C_008E34_NEW_BUF 0xDFFFFFFF 4780 #define S_008E34_BUSY(x) (((unsigned)(x) & 0x1) << 30) 4781 #define G_008E34_BUSY(x) (((x) >> 30) & 0x1) 4782 #define C_008E34_BUSY 0xBFFFFFFF 4783 #define S_008E34_FULL(x) (((unsigned)(x) & 0x1) << 31) 4784 #define G_008E34_FULL(x) (((x) >> 31) & 0x1) 4785 #define C_008E34_FULL 0x7FFFFFFF 4786 #define R_008E38_SQ_THREAD_TRACE_MODE 0x008E38 /* <= gfx7 */ 4787 #define S_008E38_MASK_PS(x) (((unsigned)(x) & 0x7) << 0) 4788 #define G_008E38_MASK_PS(x) (((x) >> 0) & 0x7) 4789 #define C_008E38_MASK_PS 0xFFFFFFF8 4790 #define S_008E38_MASK_VS(x) (((unsigned)(x) & 0x7) << 3) 4791 #define G_008E38_MASK_VS(x) (((x) >> 3) & 0x7) 4792 #define C_008E38_MASK_VS 0xFFFFFFC7 4793 #define S_008E38_MASK_GS(x) (((unsigned)(x) & 0x7) << 6) 4794 #define G_008E38_MASK_GS(x) (((x) >> 6) & 0x7) 4795 #define C_008E38_MASK_GS 0xFFFFFE3F 4796 #define S_008E38_MASK_ES(x) (((unsigned)(x) & 0x7) << 9) 4797 #define G_008E38_MASK_ES(x) (((x) >> 9) & 0x7) 4798 #define C_008E38_MASK_ES 0xFFFFF1FF 4799 #define S_008E38_MASK_HS(x) (((unsigned)(x) & 0x7) << 12) 4800 #define G_008E38_MASK_HS(x) (((x) >> 12) & 0x7) 4801 #define C_008E38_MASK_HS 0xFFFF8FFF 4802 #define S_008E38_MASK_LS(x) (((unsigned)(x) & 0x7) << 15) 4803 #define G_008E38_MASK_LS(x) (((x) >> 15) & 0x7) 4804 #define C_008E38_MASK_LS 0xFFFC7FFF 4805 #define S_008E38_MASK_CS(x) (((unsigned)(x) & 0x7) << 18) 4806 #define G_008E38_MASK_CS(x) (((x) >> 18) & 0x7) 4807 #define C_008E38_MASK_CS 0xFFE3FFFF 4808 #define S_008E38_MODE(x) (((unsigned)(x) & 0x3) << 21) 4809 #define G_008E38_MODE(x) (((x) >> 21) & 0x3) 4810 #define C_008E38_MODE 0xFF9FFFFF 4811 #define S_008E38_CAPTURE_MODE(x) (((unsigned)(x) & 0x3) << 23) 4812 #define G_008E38_CAPTURE_MODE(x) (((x) >> 23) & 0x3) 4813 #define C_008E38_CAPTURE_MODE 0xFE7FFFFF 4814 #define S_008E38_AUTOFLUSH_EN(x) (((unsigned)(x) & 0x1) << 25) 4815 #define G_008E38_AUTOFLUSH_EN(x) (((x) >> 25) & 0x1) 4816 #define C_008E38_AUTOFLUSH_EN 0xFDFFFFFF 4817 #define S_008E38_PRIV(x) (((unsigned)(x) & 0x1) << 26) 4818 #define G_008E38_PRIV(x) (((x) >> 26) & 0x1) 4819 #define C_008E38_PRIV 0xFBFFFFFF 4820 #define S_008E38_ISSUE_MASK(x) (((unsigned)(x) & 0x3) << 27) 4821 #define G_008E38_ISSUE_MASK(x) (((x) >> 27) & 0x3) 4822 #define C_008E38_ISSUE_MASK 0xE7FFFFFF 4823 #define S_008E38_TEST_MODE(x) (((unsigned)(x) & 0x1) << 29) 4824 #define G_008E38_TEST_MODE(x) (((x) >> 29) & 0x1) 4825 #define C_008E38_TEST_MODE 0xDFFFFFFF 4826 #define S_008E38_INTERRUPT_EN(x) (((unsigned)(x) & 0x1) << 30) 4827 #define G_008E38_INTERRUPT_EN(x) (((x) >> 30) & 0x1) 4828 #define C_008E38_INTERRUPT_EN 0xBFFFFFFF 4829 #define S_008E38_WRAP(x) (((unsigned)(x) & 0x1) << 31) 4830 #define G_008E38_WRAP(x) (((x) >> 31) & 0x1) 4831 #define C_008E38_WRAP 0x7FFFFFFF 4832 #define R_008E3C_SQ_THREAD_TRACE_CTRL 0x008E3C /* <= gfx7 */ 4833 #define S_008E3C_RESET_BUFFER(x) (((unsigned)(x) & 0x1) << 31) 4834 #define G_008E3C_RESET_BUFFER(x) (((x) >> 31) & 0x1) 4835 #define C_008E3C_RESET_BUFFER 0x7FFFFFFF 4836 #define R_008E40_SQ_THREAD_TRACE_CNTR 0x008E40 /* <= gfx81 */ 4837 #define R_008E48_SQ_THREAD_TRACE_HIWATER 0x008E48 /* <= gfx7 */ 4838 #define S_008E48_HIWATER(x) (((unsigned)(x) & 0x7) << 0) 4839 #define G_008E48_HIWATER(x) (((x) >> 0) & 0x7) 4840 #define C_008E48_HIWATER 0xFFFFFFF8 4841 #define R_008E58_SQ_POWER_THROTTLE 0x008E58 /* <= gfx6 */ 4842 #define S_008E58_MIN_POWER(x) (((unsigned)(x) & 0x3FFF) << 0) 4843 #define G_008E58_MIN_POWER(x) (((x) >> 0) & 0x3FFF) 4844 #define C_008E58_MIN_POWER 0xFFFFC000 4845 #define S_008E58_MAX_POWER(x) (((unsigned)(x) & 0x3FFF) << 16) 4846 #define G_008E58_MAX_POWER(x) (((x) >> 16) & 0x3FFF) 4847 #define C_008E58_MAX_POWER 0xC000FFFF 4848 #define S_008E58_PHASE_OFFSET(x) (((unsigned)(x) & 0x3) << 30) 4849 #define G_008E58_PHASE_OFFSET(x) (((x) >> 30) & 0x3) 4850 #define C_008E58_PHASE_OFFSET 0x3FFFFFFF 4851 #define R_008E5C_SQ_POWER_THROTTLE2 0x008E5C /* <= gfx6 */ 4852 #define S_008E5C_MAX_POWER_DELTA(x) (((unsigned)(x) & 0x3FFF) << 0) 4853 #define G_008E5C_MAX_POWER_DELTA(x) (((x) >> 0) & 0x3FFF) 4854 #define C_008E5C_MAX_POWER_DELTA 0xFFFFC000 4855 #define S_008E5C_SHORT_TERM_INTERVAL_SIZE(x) (((unsigned)(x) & 0x3FF) << 16) 4856 #define G_008E5C_SHORT_TERM_INTERVAL_SIZE(x) (((x) >> 16) & 0x3FF) 4857 #define C_008E5C_SHORT_TERM_INTERVAL_SIZE 0xFC00FFFF 4858 #define S_008E5C_LONG_TERM_INTERVAL_RATIO(x) (((unsigned)(x) & 0xF) << 27) 4859 #define G_008E5C_LONG_TERM_INTERVAL_RATIO(x) (((x) >> 27) & 0xF) 4860 #define C_008E5C_LONG_TERM_INTERVAL_RATIO 0x87FFFFFF 4861 #define S_008E5C_USE_REF_CLOCK(x) (((unsigned)(x) & 0x1) << 31) 4862 #define G_008E5C_USE_REF_CLOCK(x) (((x) >> 31) & 0x1) 4863 #define C_008E5C_USE_REF_CLOCK 0x7FFFFFFF 4864 #define R_008E60_SQ_LB_CTR_CTRL 0x008E60 /* <= gfx6 */ 4865 #define S_008E60_START(x) (((unsigned)(x) & 0x1) << 0) 4866 #define G_008E60_START(x) (((x) >> 0) & 0x1) 4867 #define C_008E60_START 0xFFFFFFFE 4868 #define S_008E60_LOAD(x) (((unsigned)(x) & 0x1) << 1) 4869 #define G_008E60_LOAD(x) (((x) >> 1) & 0x1) 4870 #define C_008E60_LOAD 0xFFFFFFFD 4871 #define S_008E60_CLEAR(x) (((unsigned)(x) & 0x1) << 2) 4872 #define G_008E60_CLEAR(x) (((x) >> 2) & 0x1) 4873 #define C_008E60_CLEAR 0xFFFFFFFB 4874 #define R_008E64_SQ_LB_DATA_ALU_CYCLES 0x008E64 /* <= gfx6 */ 4875 #define R_008E68_SQ_LB_DATA_TEX_CYCLES 0x008E68 /* <= gfx6 */ 4876 #define R_008E6C_SQ_LB_DATA_ALU_STALLS 0x008E6C /* <= gfx6 */ 4877 #define R_008E70_SQ_LB_DATA_TEX_STALLS 0x008E70 /* <= gfx6 */ 4878 #define R_008E80_SQC_SECDED_CNT 0x008E80 /* <= gfx6 */ 4879 #define S_008E80_INST_SEC(x) (((unsigned)(x) & 0xFF) << 0) 4880 #define G_008E80_INST_SEC(x) (((x) >> 0) & 0xFF) 4881 #define C_008E80_INST_SEC 0xFFFFFF00 4882 #define S_008E80_INST_DED(x) (((unsigned)(x) & 0xFF) << 8) 4883 #define G_008E80_INST_DED(x) (((x) >> 8) & 0xFF) 4884 #define C_008E80_INST_DED 0xFFFF00FF 4885 #define S_008E80_DATA_SEC(x) (((unsigned)(x) & 0xFF) << 16) 4886 #define G_008E80_DATA_SEC(x) (((x) >> 16) & 0xFF) 4887 #define C_008E80_DATA_SEC 0xFF00FFFF 4888 #define S_008E80_DATA_DED(x) (((unsigned)(x) & 0xFF) << 24) 4889 #define G_008E80_DATA_DED(x) (((x) >> 24) & 0xFF) 4890 #define C_008E80_DATA_DED 0x00FFFFFF 4891 #define R_008E84_SQ_SEC_CNT 0x008E84 /* <= gfx6 */ 4892 #define S_008E84_LDS_SEC(x) (((unsigned)(x) & 0x3F) << 0) 4893 #define G_008E84_LDS_SEC(x) (((x) >> 0) & 0x3F) 4894 #define C_008E84_LDS_SEC 0xFFFFFFC0 4895 #define S_008E84_SGPR_SEC(x) (((unsigned)(x) & 0x1F) << 8) 4896 #define G_008E84_SGPR_SEC(x) (((x) >> 8) & 0x1F) 4897 #define C_008E84_SGPR_SEC 0xFFFFE0FF 4898 #define S_008E84_VGPR_SEC(x) (((unsigned)(x) & 0x1FF) << 16) 4899 #define G_008E84_VGPR_SEC(x) (((x) >> 16) & 0x1FF) 4900 #define C_008E84_VGPR_SEC 0xFE00FFFF 4901 #define R_008E88_SQ_DED_CNT 0x008E88 /* <= gfx6 */ 4902 #define S_008E88_LDS_DED(x) (((unsigned)(x) & 0x3F) << 0) 4903 #define G_008E88_LDS_DED(x) (((x) >> 0) & 0x3F) 4904 #define C_008E88_LDS_DED 0xFFFFFFC0 4905 #define S_008E88_SGPR_DED(x) (((unsigned)(x) & 0x1F) << 8) 4906 #define G_008E88_SGPR_DED(x) (((x) >> 8) & 0x1F) 4907 #define C_008E88_SGPR_DED 0xFFFFE0FF 4908 #define S_008E88_VGPR_DED(x) (((unsigned)(x) & 0x1FF) << 16) 4909 #define G_008E88_VGPR_DED(x) (((x) >> 16) & 0x1FF) 4910 #define C_008E88_VGPR_DED 0xFE00FFFF 4911 #define R_008E8C_SQ_DED_INFO 0x008E8C /* <= gfx6 */ 4912 #define S_008E8C_WAVE_ID(x) (((unsigned)(x) & 0xF) << 0) 4913 #define G_008E8C_WAVE_ID(x) (((x) >> 0) & 0xF) 4914 #define C_008E8C_WAVE_ID 0xFFFFFFF0 4915 #define S_008E8C_SIMD_ID(x) (((unsigned)(x) & 0x3) << 4) 4916 #define G_008E8C_SIMD_ID(x) (((x) >> 4) & 0x3) 4917 #define C_008E8C_SIMD_ID 0xFFFFFFCF 4918 #define S_008E8C_SOURCE(x) (((unsigned)(x) & 0x7) << 6) 4919 #define G_008E8C_SOURCE(x) (((x) >> 6) & 0x7) 4920 #define C_008E8C_SOURCE 0xFFFFFE3F 4921 #define S_008E8C_VM_ID(x) (((unsigned)(x) & 0xF) << 9) 4922 #define G_008E8C_VM_ID(x) (((x) >> 9) & 0xF) 4923 #define C_008E8C_VM_ID 0xFFFFE1FF 4924 #define R_008F00_SQ_BUF_RSRC_WORD0 0x008F00 4925 #define R_008F04_SQ_BUF_RSRC_WORD1 0x008F04 4926 #define S_008F04_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 4927 #define G_008F04_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFFFF) 4928 #define C_008F04_BASE_ADDRESS_HI 0xFFFF0000 4929 #define S_008F04_STRIDE(x) (((unsigned)(x) & 0x3FFF) << 16) 4930 #define G_008F04_STRIDE(x) (((x) >> 16) & 0x3FFF) 4931 #define C_008F04_STRIDE 0xC000FFFF 4932 #define S_008F04_CACHE_SWIZZLE(x) (((unsigned)(x) & 0x1) << 30) 4933 #define G_008F04_CACHE_SWIZZLE(x) (((x) >> 30) & 0x1) 4934 #define C_008F04_CACHE_SWIZZLE 0xBFFFFFFF 4935 #define S_008F04_SWIZZLE_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 4936 #define G_008F04_SWIZZLE_ENABLE(x) (((x) >> 31) & 0x1) 4937 #define C_008F04_SWIZZLE_ENABLE 0x7FFFFFFF 4938 #define R_008F08_SQ_BUF_RSRC_WORD2 0x008F08 4939 #define R_008F0C_SQ_BUF_RSRC_WORD3 0x008F0C 4940 #define S_008F0C_DST_SEL_X(x) (((unsigned)(x) & 0x7) << 0) 4941 #define G_008F0C_DST_SEL_X(x) (((x) >> 0) & 0x7) 4942 #define C_008F0C_DST_SEL_X 0xFFFFFFF8 4943 #define V_008F0C_SQ_SEL_0 0 /* <= gfx9 */ 4944 #define V_008F0C_SQ_SEL_1 1 /* <= gfx9 */ 4945 #define V_008F0C_SQ_SEL_RESERVED_0 2 /* <= gfx9 */ 4946 #define V_008F0C_SQ_SEL_RESERVED_1 3 /* <= gfx9 */ 4947 #define V_008F0C_SQ_SEL_X 4 /* <= gfx9 */ 4948 #define V_008F0C_SQ_SEL_Y 5 /* <= gfx9 */ 4949 #define V_008F0C_SQ_SEL_Z 6 /* <= gfx9 */ 4950 #define V_008F0C_SQ_SEL_W 7 /* <= gfx9 */ 4951 #define S_008F0C_DST_SEL_Y(x) (((unsigned)(x) & 0x7) << 3) 4952 #define G_008F0C_DST_SEL_Y(x) (((x) >> 3) & 0x7) 4953 #define C_008F0C_DST_SEL_Y 0xFFFFFFC7 4954 #define S_008F0C_DST_SEL_Z(x) (((unsigned)(x) & 0x7) << 6) 4955 #define G_008F0C_DST_SEL_Z(x) (((x) >> 6) & 0x7) 4956 #define C_008F0C_DST_SEL_Z 0xFFFFFE3F 4957 #define S_008F0C_DST_SEL_W(x) (((unsigned)(x) & 0x7) << 9) 4958 #define G_008F0C_DST_SEL_W(x) (((x) >> 9) & 0x7) 4959 #define C_008F0C_DST_SEL_W 0xFFFFF1FF 4960 #define S_008F0C_FORMAT(x) (((unsigned)(x) & 0x7F) << 12) /* >= gfx10 */ 4961 #define G_008F0C_FORMAT(x) (((x) >> 12) & 0x7F) 4962 #define C_008F0C_FORMAT 0xFFF80FFF 4963 #define V_008F0C_GFX10_FORMAT_INVALID 0 4964 #define V_008F0C_GFX10_FORMAT_8_UNORM 1 4965 #define V_008F0C_GFX10_FORMAT_8_SNORM 2 4966 #define V_008F0C_GFX10_FORMAT_8_USCALED 3 4967 #define V_008F0C_GFX10_FORMAT_8_SSCALED 4 4968 #define V_008F0C_GFX10_FORMAT_8_UINT 5 4969 #define V_008F0C_GFX10_FORMAT_8_SINT 6 4970 #define V_008F0C_GFX10_FORMAT_16_UNORM 7 4971 #define V_008F0C_GFX10_FORMAT_16_SNORM 8 4972 #define V_008F0C_GFX10_FORMAT_16_USCALED 9 4973 #define V_008F0C_GFX10_FORMAT_16_SSCALED 10 4974 #define V_008F0C_GFX10_FORMAT_16_UINT 11 4975 #define V_008F0C_GFX10_FORMAT_16_SINT 12 4976 #define V_008F0C_GFX10_FORMAT_16_FLOAT 13 4977 #define V_008F0C_GFX10_FORMAT_8_8_UNORM 14 4978 #define V_008F0C_GFX10_FORMAT_8_8_SNORM 15 4979 #define V_008F0C_GFX10_FORMAT_8_8_USCALED 16 4980 #define V_008F0C_GFX10_FORMAT_8_8_SSCALED 17 4981 #define V_008F0C_GFX10_FORMAT_8_8_UINT 18 4982 #define V_008F0C_GFX10_FORMAT_8_8_SINT 19 4983 #define V_008F0C_GFX10_FORMAT_32_UINT 20 4984 #define V_008F0C_GFX10_FORMAT_32_SINT 21 4985 #define V_008F0C_GFX10_FORMAT_32_FLOAT 22 4986 #define V_008F0C_GFX10_FORMAT_16_16_UNORM 23 4987 #define V_008F0C_GFX10_FORMAT_16_16_SNORM 24 4988 #define V_008F0C_GFX10_FORMAT_16_16_USCALED 25 4989 #define V_008F0C_GFX10_FORMAT_16_16_SSCALED 26 4990 #define V_008F0C_GFX10_FORMAT_16_16_UINT 27 4991 #define V_008F0C_GFX10_FORMAT_16_16_SINT 28 4992 #define V_008F0C_GFX10_FORMAT_16_16_FLOAT 29 4993 #define V_008F0C_GFX10_FORMAT_10_11_11_UNORM 30 4994 #define V_008F0C_GFX10_FORMAT_10_11_11_SNORM 31 4995 #define V_008F0C_GFX10_FORMAT_10_11_11_USCALED 32 4996 #define V_008F0C_GFX10_FORMAT_10_11_11_SSCALED 33 4997 #define V_008F0C_GFX10_FORMAT_10_11_11_UINT 34 4998 #define V_008F0C_GFX10_FORMAT_10_11_11_SINT 35 4999 #define V_008F0C_GFX10_FORMAT_10_11_11_FLOAT 36 5000 #define V_008F0C_GFX10_FORMAT_11_11_10_UNORM 37 5001 #define V_008F0C_GFX10_FORMAT_11_11_10_SNORM 38 5002 #define V_008F0C_GFX10_FORMAT_11_11_10_USCALED 39 5003 #define V_008F0C_GFX10_FORMAT_11_11_10_SSCALED 40 5004 #define V_008F0C_GFX10_FORMAT_11_11_10_UINT 41 5005 #define V_008F0C_GFX10_FORMAT_11_11_10_SINT 42 5006 #define V_008F0C_GFX10_FORMAT_11_11_10_FLOAT 43 5007 #define V_008F0C_GFX10_FORMAT_10_10_10_2_UNORM 44 5008 #define V_008F0C_GFX10_FORMAT_10_10_10_2_SNORM 45 5009 #define V_008F0C_GFX10_FORMAT_10_10_10_2_USCALED 46 5010 #define V_008F0C_GFX10_FORMAT_10_10_10_2_SSCALED 47 5011 #define V_008F0C_GFX10_FORMAT_10_10_10_2_UINT 48 5012 #define V_008F0C_GFX10_FORMAT_10_10_10_2_SINT 49 5013 #define V_008F0C_GFX10_FORMAT_2_10_10_10_UNORM 50 5014 #define V_008F0C_GFX10_FORMAT_2_10_10_10_SNORM 51 5015 #define V_008F0C_GFX10_FORMAT_2_10_10_10_USCALED 52 5016 #define V_008F0C_GFX10_FORMAT_2_10_10_10_SSCALED 53 5017 #define V_008F0C_GFX10_FORMAT_2_10_10_10_UINT 54 5018 #define V_008F0C_GFX10_FORMAT_2_10_10_10_SINT 55 5019 #define V_008F0C_GFX10_FORMAT_8_8_8_8_UNORM 56 5020 #define V_008F0C_GFX10_FORMAT_8_8_8_8_SNORM 57 5021 #define V_008F0C_GFX10_FORMAT_8_8_8_8_USCALED 58 5022 #define V_008F0C_GFX10_FORMAT_8_8_8_8_SSCALED 59 5023 #define V_008F0C_GFX10_FORMAT_8_8_8_8_UINT 60 5024 #define V_008F0C_GFX10_FORMAT_8_8_8_8_SINT 61 5025 #define V_008F0C_GFX10_FORMAT_32_32_UINT 62 5026 #define V_008F0C_GFX10_FORMAT_32_32_SINT 63 5027 #define V_008F0C_GFX10_FORMAT_32_32_FLOAT 64 5028 #define V_008F0C_GFX10_FORMAT_16_16_16_16_UNORM 65 5029 #define V_008F0C_GFX10_FORMAT_16_16_16_16_SNORM 66 5030 #define V_008F0C_GFX10_FORMAT_16_16_16_16_USCALED 67 5031 #define V_008F0C_GFX10_FORMAT_16_16_16_16_SSCALED 68 5032 #define V_008F0C_GFX10_FORMAT_16_16_16_16_UINT 69 5033 #define V_008F0C_GFX10_FORMAT_16_16_16_16_SINT 70 5034 #define V_008F0C_GFX10_FORMAT_16_16_16_16_FLOAT 71 5035 #define V_008F0C_GFX10_FORMAT_32_32_32_UINT 72 5036 #define V_008F0C_GFX10_FORMAT_32_32_32_SINT 73 5037 #define V_008F0C_GFX10_FORMAT_32_32_32_FLOAT 74 5038 #define V_008F0C_GFX10_FORMAT_32_32_32_32_UINT 75 5039 #define V_008F0C_GFX10_FORMAT_32_32_32_32_SINT 76 5040 #define V_008F0C_GFX10_FORMAT_32_32_32_32_FLOAT 77 5041 #define V_008F0C_GFX10_FORMAT_8_SRGB 128 5042 #define V_008F0C_GFX10_FORMAT_8_8_SRGB 129 5043 #define V_008F0C_GFX10_FORMAT_8_8_8_8_SRGB 130 5044 #define V_008F0C_GFX10_FORMAT_6E4_FLOAT 131 5045 #define V_008F0C_GFX10_FORMAT_5_9_9_9_FLOAT 132 5046 #define V_008F0C_GFX10_FORMAT_5_6_5_UNORM 133 5047 #define V_008F0C_GFX10_FORMAT_1_5_5_5_UNORM 134 5048 #define V_008F0C_GFX10_FORMAT_5_5_5_1_UNORM 135 5049 #define V_008F0C_GFX10_FORMAT_4_4_4_4_UNORM 136 5050 #define V_008F0C_GFX10_FORMAT_4_4_UNORM 137 5051 #define V_008F0C_GFX10_FORMAT_1_UNORM 138 5052 #define V_008F0C_GFX10_FORMAT_1_REVERSED_UNORM 139 5053 #define V_008F0C_GFX10_FORMAT_32_FLOAT_CLAMP 140 5054 #define V_008F0C_GFX10_FORMAT_8_24_UNORM 141 5055 #define V_008F0C_GFX10_FORMAT_8_24_UINT 142 5056 #define V_008F0C_GFX10_FORMAT_24_8_UNORM 143 5057 #define V_008F0C_GFX10_FORMAT_24_8_UINT 144 5058 #define V_008F0C_GFX10_FORMAT_X24_8_32_UINT 145 5059 #define V_008F0C_GFX10_FORMAT_X24_8_32_FLOAT 146 5060 #define V_008F0C_GFX10_FORMAT_GB_GR_UNORM 147 5061 #define V_008F0C_GFX10_FORMAT_GB_GR_SNORM 148 5062 #define V_008F0C_GFX10_FORMAT_GB_GR_UINT 149 5063 #define V_008F0C_GFX10_FORMAT_GB_GR_SRGB 150 5064 #define V_008F0C_GFX10_FORMAT_BG_RG_UNORM 151 5065 #define V_008F0C_GFX10_FORMAT_BG_RG_SNORM 152 5066 #define V_008F0C_GFX10_FORMAT_BG_RG_UINT 153 5067 #define V_008F0C_GFX10_FORMAT_BG_RG_SRGB 154 5068 #define V_008F0C_GFX10_FORMAT_FMASK8_S2_F1 156 5069 #define V_008F0C_GFX10_FORMAT_FMASK8_S4_F1 157 5070 #define V_008F0C_GFX10_FORMAT_FMASK8_S8_F1 158 5071 #define V_008F0C_GFX10_FORMAT_FMASK8_S2_F2 159 5072 #define V_008F0C_GFX10_FORMAT_FMASK8_S4_F2 160 5073 #define V_008F0C_GFX10_FORMAT_FMASK8_S4_F4 161 5074 #define V_008F0C_GFX10_FORMAT_FMASK16_S16_F1 162 5075 #define V_008F0C_GFX10_FORMAT_FMASK16_S8_F2 163 5076 #define V_008F0C_GFX10_FORMAT_FMASK32_S16_F2 164 5077 #define V_008F0C_GFX10_FORMAT_FMASK32_S8_F4 165 5078 #define V_008F0C_GFX10_FORMAT_FMASK32_S8_F8 166 5079 #define V_008F0C_GFX10_FORMAT_FMASK64_S16_F4 167 5080 #define V_008F0C_GFX10_FORMAT_FMASK64_S16_F8 168 5081 #define V_008F0C_GFX10_FORMAT_BC1_UNORM 169 5082 #define V_008F0C_GFX10_FORMAT_BC1_SRGB 170 5083 #define V_008F0C_GFX10_FORMAT_BC2_UNORM 171 5084 #define V_008F0C_GFX10_FORMAT_BC2_SRGB 172 5085 #define V_008F0C_GFX10_FORMAT_BC3_UNORM 173 5086 #define V_008F0C_GFX10_FORMAT_BC3_SRGB 174 5087 #define V_008F0C_GFX10_FORMAT_BC4_UNORM 175 5088 #define V_008F0C_GFX10_FORMAT_BC4_SNORM 176 5089 #define V_008F0C_GFX10_FORMAT_BC5_UNORM 177 5090 #define V_008F0C_GFX10_FORMAT_BC5_SNORM 178 5091 #define V_008F0C_GFX10_FORMAT_BC6_UFLOAT 179 5092 #define V_008F0C_GFX10_FORMAT_BC6_SFLOAT 180 5093 #define V_008F0C_GFX10_FORMAT_BC7_UNORM 181 5094 #define V_008F0C_GFX10_FORMAT_BC7_SRGB 182 5095 #define V_008F0C_GFX10_FORMAT_MM_8_UNORM 265 5096 #define V_008F0C_GFX10_FORMAT_MM_8_UINT 266 5097 #define V_008F0C_GFX10_FORMAT_MM_8_8_UNORM 267 5098 #define V_008F0C_GFX10_FORMAT_MM_8_8_UINT 268 5099 #define V_008F0C_GFX10_FORMAT_MM_8_8_8_8_UNORM 269 5100 #define V_008F0C_GFX10_FORMAT_MM_8_8_8_8_UINT 270 5101 #define V_008F0C_GFX10_FORMAT_MM_VYUY8_UNORM 271 5102 #define V_008F0C_GFX10_FORMAT_MM_VYUY8_UINT 272 5103 #define V_008F0C_GFX10_FORMAT_MM_10_11_11_UNORM 273 5104 #define V_008F0C_GFX10_FORMAT_MM_10_11_11_UINT 274 5105 #define V_008F0C_GFX10_FORMAT_MM_2_10_10_10_UNORM 275 5106 #define V_008F0C_GFX10_FORMAT_MM_2_10_10_10_UINT 276 5107 #define V_008F0C_GFX10_FORMAT_MM_16_16_16_16_UNORM 277 5108 #define V_008F0C_GFX10_FORMAT_MM_16_16_16_16_UINT 278 5109 #define V_008F0C_GFX10_FORMAT_MM_10_IN_16_UNORM 279 5110 #define V_008F0C_GFX10_FORMAT_MM_10_IN_16_UINT 280 5111 #define V_008F0C_GFX10_FORMAT_MM_10_IN_16_16_UNORM 281 5112 #define V_008F0C_GFX10_FORMAT_MM_10_IN_16_16_UINT 282 5113 #define V_008F0C_GFX10_FORMAT_MM_10_IN_16_16_16_16_UNORM 283 5114 #define V_008F0C_GFX10_FORMAT_MM_10_IN_16_16_16_16_UINT 284 5115 #define V_008F0C_GFX10_FORMAT_7E3_FLOAT 285 5116 #define V_008F0C_GFX10_FORMAT_YCBCR_UNORM 286 5117 #define V_008F0C_GFX10_FORMAT_YCBCR_SNORM 287 5118 #define V_008F0C_GFX10_FORMAT_YCBCR_USCALED 288 5119 #define V_008F0C_GFX10_FORMAT_YCBCR_SSCALED 289 5120 #define V_008F0C_GFX10_FORMAT_YCBCR_UINT 290 5121 #define V_008F0C_GFX10_FORMAT_YCBCR_SINT 291 5122 #define V_008F0C_GFX10_FORMAT_YCBCR_SRGB 292 5123 #define S_008F0C_NUM_FORMAT(x) (((unsigned)(x) & 0x7) << 12) /* <= gfx9 */ 5124 #define G_008F0C_NUM_FORMAT(x) (((x) >> 12) & 0x7) 5125 #define C_008F0C_NUM_FORMAT 0xFFFF8FFF 5126 #define V_008F0C_BUF_NUM_FORMAT_UNORM 0 5127 #define V_008F0C_BUF_NUM_FORMAT_SNORM 1 5128 #define V_008F0C_BUF_NUM_FORMAT_USCALED 2 5129 #define V_008F0C_BUF_NUM_FORMAT_SSCALED 3 5130 #define V_008F0C_BUF_NUM_FORMAT_UINT 4 5131 #define V_008F0C_BUF_NUM_FORMAT_SINT 5 5132 #define V_008F0C_BUF_NUM_FORMAT_RESERVED_6 6 /* gfx8, gfx81 */ 5133 #define V_008F0C_BUF_NUM_FORMAT_SNORM_OGL 6 /* <= gfx7 */ 5134 #define V_008F0C_BUF_NUM_FORMAT_UNORM_UINT 6 /* gfx9 */ 5135 #define V_008F0C_BUF_NUM_FORMAT_FLOAT 7 5136 #define S_008F0C_DATA_FORMAT(x) (((unsigned)(x) & 0xF) << 15) /* <= gfx9 */ 5137 #define G_008F0C_DATA_FORMAT(x) (((x) >> 15) & 0xF) 5138 #define C_008F0C_DATA_FORMAT 0xFFF87FFF 5139 #define V_008F0C_BUF_DATA_FORMAT_INVALID 0 5140 #define V_008F0C_BUF_DATA_FORMAT_8 1 5141 #define V_008F0C_BUF_DATA_FORMAT_16 2 5142 #define V_008F0C_BUF_DATA_FORMAT_8_8 3 5143 #define V_008F0C_BUF_DATA_FORMAT_32 4 5144 #define V_008F0C_BUF_DATA_FORMAT_16_16 5 5145 #define V_008F0C_BUF_DATA_FORMAT_10_11_11 6 5146 #define V_008F0C_BUF_DATA_FORMAT_11_11_10 7 5147 #define V_008F0C_BUF_DATA_FORMAT_10_10_10_2 8 5148 #define V_008F0C_BUF_DATA_FORMAT_2_10_10_10 9 5149 #define V_008F0C_BUF_DATA_FORMAT_8_8_8_8 10 5150 #define V_008F0C_BUF_DATA_FORMAT_32_32 11 5151 #define V_008F0C_BUF_DATA_FORMAT_16_16_16_16 12 5152 #define V_008F0C_BUF_DATA_FORMAT_32_32_32 13 5153 #define V_008F0C_BUF_DATA_FORMAT_32_32_32_32 14 5154 #define V_008F0C_BUF_DATA_FORMAT_RESERVED_15 15 5155 #define S_008F0C_ELEMENT_SIZE(x) (((unsigned)(x) & 0x3) << 19) /* <= gfx81 */ 5156 #define G_008F0C_ELEMENT_SIZE(x) (((x) >> 19) & 0x3) 5157 #define C_008F0C_ELEMENT_SIZE 0xFFE7FFFF 5158 #define S_008F0C_USER_VM_ENABLE(x) (((unsigned)(x) & 0x1) << 19) /* gfx9 */ 5159 #define G_008F0C_USER_VM_ENABLE(x) (((x) >> 19) & 0x1) 5160 #define C_008F0C_USER_VM_ENABLE 0xFFF7FFFF 5161 #define S_008F0C_USER_VM_MODE(x) (((unsigned)(x) & 0x1) << 20) /* gfx9 */ 5162 #define G_008F0C_USER_VM_MODE(x) (((x) >> 20) & 0x1) 5163 #define C_008F0C_USER_VM_MODE 0xFFEFFFFF 5164 #define S_008F0C_INDEX_STRIDE(x) (((unsigned)(x) & 0x3) << 21) 5165 #define G_008F0C_INDEX_STRIDE(x) (((x) >> 21) & 0x3) 5166 #define C_008F0C_INDEX_STRIDE 0xFF9FFFFF 5167 #define S_008F0C_ADD_TID_ENABLE(x) (((unsigned)(x) & 0x1) << 23) 5168 #define G_008F0C_ADD_TID_ENABLE(x) (((x) >> 23) & 0x1) 5169 #define C_008F0C_ADD_TID_ENABLE 0xFF7FFFFF 5170 #define S_008F0C_ATC(x) (((unsigned)(x) & 0x1) << 24) /* <= gfx81 */ 5171 #define G_008F0C_ATC(x) (((x) >> 24) & 0x1) 5172 #define C_008F0C_ATC 0xFEFFFFFF 5173 #define S_008F0C_RESOURCE_LEVEL(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx10 */ 5174 #define G_008F0C_RESOURCE_LEVEL(x) (((x) >> 24) & 0x1) 5175 #define C_008F0C_RESOURCE_LEVEL 0xFEFFFFFF 5176 #define S_008F0C_HASH_ENABLE(x) (((unsigned)(x) & 0x1) << 25) /* <= gfx81 */ 5177 #define G_008F0C_HASH_ENABLE(x) (((x) >> 25) & 0x1) 5178 #define C_008F0C_HASH_ENABLE 0xFDFFFFFF 5179 #define S_008F0C_HEAP(x) (((unsigned)(x) & 0x1) << 26) /* <= gfx81 */ 5180 #define G_008F0C_HEAP(x) (((x) >> 26) & 0x1) 5181 #define C_008F0C_HEAP 0xFBFFFFFF 5182 #define S_008F0C_LLC_NOALLOC(x) (((unsigned)(x) & 0x3) << 26) /* >= gfx103 */ 5183 #define G_008F0C_LLC_NOALLOC(x) (((x) >> 26) & 0x3) 5184 #define C_008F0C_LLC_NOALLOC 0xF3FFFFFF 5185 #define S_008F0C_MTYPE(x) (((unsigned)(x) & 0x7) << 27) /* <= gfx81 */ 5186 #define G_008F0C_MTYPE(x) (((x) >> 27) & 0x7) 5187 #define C_008F0C_MTYPE 0xC7FFFFFF 5188 #define S_008F0C_NV(x) (((unsigned)(x) & 0x1) << 27) /* gfx9 */ 5189 #define G_008F0C_NV(x) (((x) >> 27) & 0x1) 5190 #define C_008F0C_NV 0xF7FFFFFF 5191 #define S_008F0C_OOB_SELECT(x) (((unsigned)(x) & 0x3) << 28) /* >= gfx10 */ 5192 #define G_008F0C_OOB_SELECT(x) (((x) >> 28) & 0x3) 5193 #define C_008F0C_OOB_SELECT 0xCFFFFFFF 5194 #define V_008F0C_OOB_SELECT_STRUCTURED_WITH_OFFSET 0 5195 #define V_008F0C_OOB_SELECT_STRUCTURED 1 5196 #define V_008F0C_OOB_SELECT_DISABLED 2 5197 #define V_008F0C_OOB_SELECT_RAW 3 5198 #define S_008F0C_TYPE(x) (((unsigned)(x) & 0x3) << 30) 5199 #define G_008F0C_TYPE(x) (((x) >> 30) & 0x3) 5200 #define C_008F0C_TYPE 0x3FFFFFFF 5201 #define V_008F0C_SQ_RSRC_BUF 0 /* <= gfx9 */ 5202 #define V_008F0C_SQ_RSRC_BUF_RSVD_1 1 /* <= gfx9 */ 5203 #define V_008F0C_SQ_RSRC_BUF_RSVD_2 2 /* <= gfx9 */ 5204 #define V_008F0C_SQ_RSRC_BUF_RSVD_3 3 /* <= gfx9 */ 5205 #define R_008F10_SQ_IMG_RSRC_WORD0 0x008F10 /* <= gfx9 */ 5206 #define R_008F14_SQ_IMG_RSRC_WORD1 0x008F14 /* <= gfx9 */ 5207 #define S_008F14_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFF) << 0) 5208 #define G_008F14_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFF) 5209 #define C_008F14_BASE_ADDRESS_HI 0xFFFFFF00 5210 #define S_008F14_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 8) 5211 #define G_008F14_MIN_LOD(x) (((x) >> 8) & 0xFFF) 5212 #define C_008F14_MIN_LOD 0xFFF000FF 5213 #define S_008F14_DATA_FORMAT(x) (((unsigned)(x) & 0x3F) << 20) 5214 #define G_008F14_DATA_FORMAT(x) (((x) >> 20) & 0x3F) 5215 #define C_008F14_DATA_FORMAT 0xFC0FFFFF 5216 #define V_008F14_IMG_DATA_FORMAT_INVALID 0 5217 #define V_008F14_IMG_DATA_FORMAT_8 1 5218 #define V_008F14_IMG_DATA_FORMAT_16 2 5219 #define V_008F14_IMG_DATA_FORMAT_8_8 3 5220 #define V_008F14_IMG_DATA_FORMAT_32 4 5221 #define V_008F14_IMG_DATA_FORMAT_16_16 5 5222 #define V_008F14_IMG_DATA_FORMAT_10_11_11 6 5223 #define V_008F14_IMG_DATA_FORMAT_11_11_10 7 5224 #define V_008F14_IMG_DATA_FORMAT_10_10_10_2 8 5225 #define V_008F14_IMG_DATA_FORMAT_2_10_10_10 9 5226 #define V_008F14_IMG_DATA_FORMAT_8_8_8_8 10 5227 #define V_008F14_IMG_DATA_FORMAT_32_32 11 5228 #define V_008F14_IMG_DATA_FORMAT_16_16_16_16 12 5229 #define V_008F14_IMG_DATA_FORMAT_32_32_32 13 5230 #define V_008F14_IMG_DATA_FORMAT_32_32_32_32 14 5231 #define V_008F14_IMG_DATA_FORMAT_16_AS_32_32_GFX81 15 /* gfx81 */ 5232 #define V_008F14_IMG_DATA_FORMAT_RESERVED_15 15 /* <= gfx8, gfx9 */ 5233 #define V_008F14_IMG_DATA_FORMAT_5_6_5 16 5234 #define V_008F14_IMG_DATA_FORMAT_1_5_5_5 17 5235 #define V_008F14_IMG_DATA_FORMAT_5_5_5_1 18 5236 #define V_008F14_IMG_DATA_FORMAT_4_4_4_4 19 5237 #define V_008F14_IMG_DATA_FORMAT_8_24 20 5238 #define V_008F14_IMG_DATA_FORMAT_24_8 21 5239 #define V_008F14_IMG_DATA_FORMAT_X24_8_32 22 5240 #define V_008F14_IMG_DATA_FORMAT_8_AS_8_8_8_8 23 /* gfx81, gfx9 */ 5241 #define V_008F14_IMG_DATA_FORMAT_RESERVED_23 23 /* <= gfx8 */ 5242 #define V_008F14_IMG_DATA_FORMAT_ETC2_RGB 24 /* gfx81, gfx9 */ 5243 #define V_008F14_IMG_DATA_FORMAT_RESERVED_24 24 /* <= gfx8 */ 5244 #define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA 25 /* gfx81, gfx9 */ 5245 #define V_008F14_IMG_DATA_FORMAT_RESERVED_25 25 /* <= gfx8 */ 5246 #define V_008F14_IMG_DATA_FORMAT_ETC2_R 26 /* gfx81, gfx9 */ 5247 #define V_008F14_IMG_DATA_FORMAT_RESERVED_26 26 /* <= gfx8 */ 5248 #define V_008F14_IMG_DATA_FORMAT_ETC2_RG 27 /* gfx81, gfx9 */ 5249 #define V_008F14_IMG_DATA_FORMAT_RESERVED_27 27 /* <= gfx8 */ 5250 #define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA1 28 /* gfx81, gfx9 */ 5251 #define V_008F14_IMG_DATA_FORMAT_RESERVED_28 28 /* <= gfx8 */ 5252 #define V_008F14_IMG_DATA_FORMAT_RESERVED_29 29 5253 #define V_008F14_IMG_DATA_FORMAT_RESERVED_30 30 5254 #define V_008F14_IMG_DATA_FORMAT_6E4 31 /* gfx9 */ 5255 #define V_008F14_IMG_DATA_FORMAT_RESERVED_31 31 /* <= gfx81 */ 5256 #define V_008F14_IMG_DATA_FORMAT_GB_GR 32 5257 #define V_008F14_IMG_DATA_FORMAT_BG_RG 33 5258 #define V_008F14_IMG_DATA_FORMAT_5_9_9_9 34 5259 #define V_008F14_IMG_DATA_FORMAT_BC1 35 5260 #define V_008F14_IMG_DATA_FORMAT_BC2 36 5261 #define V_008F14_IMG_DATA_FORMAT_BC3 37 5262 #define V_008F14_IMG_DATA_FORMAT_BC4 38 5263 #define V_008F14_IMG_DATA_FORMAT_BC5 39 5264 #define V_008F14_IMG_DATA_FORMAT_BC6 40 5265 #define V_008F14_IMG_DATA_FORMAT_BC7 41 5266 #define V_008F14_IMG_DATA_FORMAT_16_AS_16_16_16_16_GFX81 42 /* gfx81 */ 5267 #define V_008F14_IMG_DATA_FORMAT_16_AS_32_32_GFX9 42 /* gfx9 */ 5268 #define V_008F14_IMG_DATA_FORMAT_RESERVED_42 42 /* <= gfx8 */ 5269 #define V_008F14_IMG_DATA_FORMAT_16_AS_16_16_16_16_GFX9 43 /* gfx9 */ 5270 #define V_008F14_IMG_DATA_FORMAT_16_AS_32_32_32_32_GFX81 43 /* gfx81 */ 5271 #define V_008F14_IMG_DATA_FORMAT_RESERVED_43 43 /* <= gfx8 */ 5272 #define V_008F14_IMG_DATA_FORMAT_16_AS_32_32_32_32_GFX9 44 /* gfx9 */ 5273 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F1 44 /* <= gfx81 */ 5274 #define V_008F14_IMG_DATA_FORMAT_FMASK 45 /* gfx9 */ 5275 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F1 45 /* <= gfx81 */ 5276 #define V_008F14_IMG_DATA_FORMAT_ASTC_2D_LDR 46 /* gfx9 */ 5277 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S8_F1 46 /* <= gfx81 */ 5278 #define V_008F14_IMG_DATA_FORMAT_ASTC_2D_HDR 47 /* gfx9 */ 5279 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F2 47 /* <= gfx81 */ 5280 #define V_008F14_IMG_DATA_FORMAT_ASTC_2D_LDR_SRGB 48 /* gfx9 */ 5281 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F2 48 /* <= gfx81 */ 5282 #define V_008F14_IMG_DATA_FORMAT_ASTC_3D_LDR 49 /* gfx9 */ 5283 #define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F4 49 /* <= gfx81 */ 5284 #define V_008F14_IMG_DATA_FORMAT_ASTC_3D_HDR 50 /* gfx9 */ 5285 #define V_008F14_IMG_DATA_FORMAT_FMASK16_S16_F1 50 /* <= gfx81 */ 5286 #define V_008F14_IMG_DATA_FORMAT_ASTC_3D_LDR_SRGB 51 /* gfx9 */ 5287 #define V_008F14_IMG_DATA_FORMAT_FMASK16_S8_F2 51 /* <= gfx81 */ 5288 #define V_008F14_IMG_DATA_FORMAT_FMASK32_S16_F2 52 /* <= gfx81 */ 5289 #define V_008F14_IMG_DATA_FORMAT_N_IN_16 52 /* gfx9 */ 5290 #define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F4 53 /* <= gfx81 */ 5291 #define V_008F14_IMG_DATA_FORMAT_N_IN_16_16 53 /* gfx9 */ 5292 #define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F8 54 /* <= gfx81 */ 5293 #define V_008F14_IMG_DATA_FORMAT_N_IN_16_16_16_16 54 /* gfx9 */ 5294 #define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F4 55 /* <= gfx81 */ 5295 #define V_008F14_IMG_DATA_FORMAT_N_IN_16_AS_16_16_16_16 55 /* gfx9 */ 5296 #define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F8 56 /* <= gfx81 */ 5297 #define V_008F14_IMG_DATA_FORMAT_RESERVED_56 56 /* gfx9 */ 5298 #define V_008F14_IMG_DATA_FORMAT_4_4 57 5299 #define V_008F14_IMG_DATA_FORMAT_6_5_5 58 5300 #define V_008F14_IMG_DATA_FORMAT_1 59 /* <= gfx81 */ 5301 #define V_008F14_IMG_DATA_FORMAT_RESERVED_59 59 /* gfx9 */ 5302 #define V_008F14_IMG_DATA_FORMAT_1_REVERSED 60 /* <= gfx81 */ 5303 #define V_008F14_IMG_DATA_FORMAT_RESERVED_60 60 /* gfx9 */ 5304 #define V_008F14_IMG_DATA_FORMAT_32_AS_8 61 /* <= gfx8 */ 5305 #define V_008F14_IMG_DATA_FORMAT_8_AS_32 61 /* gfx81, gfx9 */ 5306 #define V_008F14_IMG_DATA_FORMAT_32_AS_8_8 62 /* <= gfx8 */ 5307 #define V_008F14_IMG_DATA_FORMAT_8_AS_32_32 62 /* gfx81, gfx9 */ 5308 #define V_008F14_IMG_DATA_FORMAT_32_AS_32_32_32_32 63 5309 #define S_008F14_DATA_FORMAT_STENCIL(x) (((unsigned)(x) & 0x3F) << 20) /* gfx9 */ 5310 #define G_008F14_DATA_FORMAT_STENCIL(x) (((x) >> 20) & 0x3F) 5311 #define C_008F14_DATA_FORMAT_STENCIL 0xFC0FFFFF 5312 #define V_008F14_IMG_DATA_FORMAT_S8_16 59 5313 #define V_008F14_IMG_DATA_FORMAT_S8_32 60 5314 #define S_008F14_NUM_FORMAT(x) (((unsigned)(x) & 0xF) << 26) 5315 #define G_008F14_NUM_FORMAT(x) (((x) >> 26) & 0xF) 5316 #define C_008F14_NUM_FORMAT 0xC3FFFFFF 5317 #define V_008F14_IMG_NUM_FORMAT_UNORM 0 5318 #define V_008F14_IMG_NUM_FORMAT_SNORM 1 5319 #define V_008F14_IMG_NUM_FORMAT_USCALED 2 5320 #define V_008F14_IMG_NUM_FORMAT_SSCALED 3 5321 #define V_008F14_IMG_NUM_FORMAT_UINT 4 5322 #define V_008F14_IMG_NUM_FORMAT_SINT 5 5323 #define V_008F14_IMG_NUM_FORMAT_RESERVED_6 6 /* gfx8, gfx81 */ 5324 #define V_008F14_IMG_NUM_FORMAT_SNORM_OGL 6 /* <= gfx7 */ 5325 #define V_008F14_IMG_NUM_FORMAT_UNORM_UINT 6 /* gfx9 */ 5326 #define V_008F14_IMG_NUM_FORMAT_FLOAT 7 5327 #define V_008F14_IMG_NUM_FORMAT_RESERVED_8 8 5328 #define V_008F14_IMG_NUM_FORMAT_SRGB 9 5329 #define V_008F14_IMG_NUM_FORMAT_RESERVED_10 10 /* gfx8, gfx81, gfx9 */ 5330 #define V_008F14_IMG_NUM_FORMAT_UBNORM 10 /* <= gfx7 */ 5331 #define V_008F14_IMG_NUM_FORMAT_RESERVED_11 11 /* gfx8, gfx81, gfx9 */ 5332 #define V_008F14_IMG_NUM_FORMAT_UBNORM_OGL 11 /* <= gfx7 */ 5333 #define V_008F14_IMG_NUM_FORMAT_RESERVED_12 12 /* gfx8, gfx81, gfx9 */ 5334 #define V_008F14_IMG_NUM_FORMAT_UBINT 12 /* <= gfx7 */ 5335 #define V_008F14_IMG_NUM_FORMAT_RESERVED_13 13 /* gfx8, gfx81, gfx9 */ 5336 #define V_008F14_IMG_NUM_FORMAT_UBSCALED 13 /* <= gfx7 */ 5337 #define V_008F14_IMG_NUM_FORMAT_RESERVED_14 14 5338 #define V_008F14_IMG_NUM_FORMAT_RESERVED_15 15 5339 #define S_008F14_NUM_FORMAT_FMASK(x) (((unsigned)(x) & 0xF) << 26) /* gfx9 */ 5340 #define G_008F14_NUM_FORMAT_FMASK(x) (((x) >> 26) & 0xF) 5341 #define C_008F14_NUM_FORMAT_FMASK 0xC3FFFFFF 5342 #define V_008F14_IMG_NUM_FORMAT_FMASK_8_2_1 0 5343 #define V_008F14_IMG_NUM_FORMAT_FMASK_8_4_1 1 5344 #define V_008F14_IMG_NUM_FORMAT_FMASK_8_8_1 2 5345 #define V_008F14_IMG_NUM_FORMAT_FMASK_8_2_2 3 5346 #define V_008F14_IMG_NUM_FORMAT_FMASK_8_4_2 4 5347 #define V_008F14_IMG_NUM_FORMAT_FMASK_8_4_4 5 5348 #define V_008F14_IMG_NUM_FORMAT_FMASK_16_16_1 6 5349 #define V_008F14_IMG_NUM_FORMAT_FMASK_16_8_2 7 5350 #define V_008F14_IMG_NUM_FORMAT_FMASK_32_16_2 8 5351 #define V_008F14_IMG_NUM_FORMAT_FMASK_32_8_4 9 5352 #define V_008F14_IMG_NUM_FORMAT_FMASK_32_8_8 10 5353 #define V_008F14_IMG_NUM_FORMAT_FMASK_64_16_4 11 5354 #define V_008F14_IMG_NUM_FORMAT_FMASK_64_16_8 12 5355 #define V_008F14_IMG_NUM_FORMAT_FMASK_RESERVED_13 13 5356 #define V_008F14_IMG_NUM_FORMAT_FMASK_RESERVED_14 14 5357 #define V_008F14_IMG_NUM_FORMAT_FMASK_RESERVED_15 15 5358 #define S_008F14_MTYPE(x) (((unsigned)(x) & 0x3) << 30) /* <= gfx81 */ 5359 #define G_008F14_MTYPE(x) (((x) >> 30) & 0x3) 5360 #define C_008F14_MTYPE 0x3FFFFFFF 5361 #define S_008F14_NV(x) (((unsigned)(x) & 0x1) << 30) /* gfx9 */ 5362 #define G_008F14_NV(x) (((x) >> 30) & 0x1) 5363 #define C_008F14_NV 0xBFFFFFFF 5364 #define S_008F14_META_DIRECT(x) (((unsigned)(x) & 0x1) << 31) /* gfx9 */ 5365 #define G_008F14_META_DIRECT(x) (((x) >> 31) & 0x1) 5366 #define C_008F14_META_DIRECT 0x7FFFFFFF 5367 #define R_008F18_SQ_IMG_RSRC_WORD2 0x008F18 /* <= gfx9 */ 5368 #define S_008F18_WIDTH(x) (((unsigned)(x) & 0x3FFF) << 0) 5369 #define G_008F18_WIDTH(x) (((x) >> 0) & 0x3FFF) 5370 #define C_008F18_WIDTH 0xFFFFC000 5371 #define S_008F18_HEIGHT(x) (((unsigned)(x) & 0x3FFF) << 14) 5372 #define G_008F18_HEIGHT(x) (((x) >> 14) & 0x3FFF) 5373 #define C_008F18_HEIGHT 0xF0003FFF 5374 #define S_008F18_PERF_MOD(x) (((unsigned)(x) & 0x7) << 28) 5375 #define G_008F18_PERF_MOD(x) (((x) >> 28) & 0x7) 5376 #define C_008F18_PERF_MOD 0x8FFFFFFF 5377 #define S_008F18_INTERLACED(x) (((unsigned)(x) & 0x1) << 31) /* <= gfx81 */ 5378 #define G_008F18_INTERLACED(x) (((x) >> 31) & 0x1) 5379 #define C_008F18_INTERLACED 0x7FFFFFFF 5380 #define R_008F1C_SQ_IMG_RSRC_WORD3 0x008F1C /* <= gfx9 */ 5381 #define S_008F1C_DST_SEL_X(x) (((unsigned)(x) & 0x7) << 0) 5382 #define G_008F1C_DST_SEL_X(x) (((x) >> 0) & 0x7) 5383 #define C_008F1C_DST_SEL_X 0xFFFFFFF8 5384 #define V_008F1C_SQ_SEL_0 0 5385 #define V_008F1C_SQ_SEL_1 1 5386 #define V_008F1C_SQ_SEL_RESERVED_0 2 5387 #define V_008F1C_SQ_SEL_RESERVED_1 3 5388 #define V_008F1C_SQ_SEL_X 4 5389 #define V_008F1C_SQ_SEL_Y 5 5390 #define V_008F1C_SQ_SEL_Z 6 5391 #define V_008F1C_SQ_SEL_W 7 5392 #define S_008F1C_DST_SEL_Y(x) (((unsigned)(x) & 0x7) << 3) 5393 #define G_008F1C_DST_SEL_Y(x) (((x) >> 3) & 0x7) 5394 #define C_008F1C_DST_SEL_Y 0xFFFFFFC7 5395 #define S_008F1C_DST_SEL_Z(x) (((unsigned)(x) & 0x7) << 6) 5396 #define G_008F1C_DST_SEL_Z(x) (((x) >> 6) & 0x7) 5397 #define C_008F1C_DST_SEL_Z 0xFFFFFE3F 5398 #define S_008F1C_DST_SEL_W(x) (((unsigned)(x) & 0x7) << 9) 5399 #define G_008F1C_DST_SEL_W(x) (((x) >> 9) & 0x7) 5400 #define C_008F1C_DST_SEL_W 0xFFFFF1FF 5401 #define S_008F1C_BASE_LEVEL(x) (((unsigned)(x) & 0xF) << 12) 5402 #define G_008F1C_BASE_LEVEL(x) (((x) >> 12) & 0xF) 5403 #define C_008F1C_BASE_LEVEL 0xFFFF0FFF 5404 #define S_008F1C_LAST_LEVEL(x) (((unsigned)(x) & 0xF) << 16) 5405 #define G_008F1C_LAST_LEVEL(x) (((x) >> 16) & 0xF) 5406 #define C_008F1C_LAST_LEVEL 0xFFF0FFFF 5407 #define S_008F1C_SW_MODE(x) (((unsigned)(x) & 0x1F) << 20) /* gfx9 */ 5408 #define G_008F1C_SW_MODE(x) (((x) >> 20) & 0x1F) 5409 #define C_008F1C_SW_MODE 0xFE0FFFFF 5410 #define S_008F1C_TILING_INDEX(x) (((unsigned)(x) & 0x1F) << 20) /* <= gfx81 */ 5411 #define G_008F1C_TILING_INDEX(x) (((x) >> 20) & 0x1F) 5412 #define C_008F1C_TILING_INDEX 0xFE0FFFFF 5413 #define S_008F1C_POW2_PAD(x) (((unsigned)(x) & 0x1) << 25) /* <= gfx81 */ 5414 #define G_008F1C_POW2_PAD(x) (((x) >> 25) & 0x1) 5415 #define C_008F1C_POW2_PAD 0xFDFFFFFF 5416 #define S_008F1C_MTYPE(x) (((unsigned)(x) & 0x1) << 26) /* <= gfx81 */ 5417 #define G_008F1C_MTYPE(x) (((x) >> 26) & 0x1) 5418 #define C_008F1C_MTYPE 0xFBFFFFFF 5419 #define S_008F1C_ATC(x) (((unsigned)(x) & 0x1) << 27) /* <= gfx81 */ 5420 #define G_008F1C_ATC(x) (((x) >> 27) & 0x1) 5421 #define C_008F1C_ATC 0xF7FFFFFF 5422 #define S_008F1C_TYPE(x) (((unsigned)(x) & 0xF) << 28) 5423 #define G_008F1C_TYPE(x) (((x) >> 28) & 0xF) 5424 #define C_008F1C_TYPE 0x0FFFFFFF 5425 #define V_008F1C_SQ_RSRC_IMG_RSVD_0 0 5426 #define V_008F1C_SQ_RSRC_IMG_RSVD_1 1 5427 #define V_008F1C_SQ_RSRC_IMG_RSVD_2 2 5428 #define V_008F1C_SQ_RSRC_IMG_RSVD_3 3 5429 #define V_008F1C_SQ_RSRC_IMG_RSVD_4 4 5430 #define V_008F1C_SQ_RSRC_IMG_RSVD_5 5 5431 #define V_008F1C_SQ_RSRC_IMG_RSVD_6 6 5432 #define V_008F1C_SQ_RSRC_IMG_RSVD_7 7 5433 #define V_008F1C_SQ_RSRC_IMG_1D 8 5434 #define V_008F1C_SQ_RSRC_IMG_2D 9 5435 #define V_008F1C_SQ_RSRC_IMG_3D 10 5436 #define V_008F1C_SQ_RSRC_IMG_CUBE 11 5437 #define V_008F1C_SQ_RSRC_IMG_1D_ARRAY 12 5438 #define V_008F1C_SQ_RSRC_IMG_2D_ARRAY 13 5439 #define V_008F1C_SQ_RSRC_IMG_2D_MSAA 14 5440 #define V_008F1C_SQ_RSRC_IMG_2D_MSAA_ARRAY 15 5441 #define R_008F20_SQ_IMG_RSRC_WORD4 0x008F20 /* <= gfx9 */ 5442 #define S_008F20_DEPTH(x) (((unsigned)(x) & 0x1FFF) << 0) 5443 #define G_008F20_DEPTH(x) (((x) >> 0) & 0x1FFF) 5444 #define C_008F20_DEPTH 0xFFFFE000 5445 #define S_008F20_PITCH(x) (((unsigned)(x) & 0xFFFF) << 13) 5446 #define G_008F20_PITCH(x) (((x) >> 13) & 0xFFFF) 5447 #define C_008F20_PITCH 0xE0001FFF 5448 #define S_008F20_BC_SWIZZLE(x) (((unsigned)(x) & 0x7) << 29) /* gfx9 */ 5449 #define G_008F20_BC_SWIZZLE(x) (((x) >> 29) & 0x7) 5450 #define C_008F20_BC_SWIZZLE 0x1FFFFFFF 5451 #define V_008F20_BC_SWIZZLE_XYZW 0 5452 #define V_008F20_BC_SWIZZLE_XWYZ 1 5453 #define V_008F20_BC_SWIZZLE_WZYX 2 5454 #define V_008F20_BC_SWIZZLE_WXYZ 3 5455 #define V_008F20_BC_SWIZZLE_ZYXW 4 5456 #define V_008F20_BC_SWIZZLE_YXWZ 5 5457 #define R_008F24_SQ_IMG_RSRC_WORD5 0x008F24 /* <= gfx9 */ 5458 #define S_008F24_BASE_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 0) 5459 #define G_008F24_BASE_ARRAY(x) (((x) >> 0) & 0x1FFF) 5460 #define C_008F24_BASE_ARRAY 0xFFFFE000 5461 #define S_008F24_ARRAY_PITCH(x) (((unsigned)(x) & 0xF) << 13) /* gfx9 */ 5462 #define G_008F24_ARRAY_PITCH(x) (((x) >> 13) & 0xF) 5463 #define C_008F24_ARRAY_PITCH 0xFFFE1FFF 5464 #define S_008F24_LAST_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 13) /* <= gfx81 */ 5465 #define G_008F24_LAST_ARRAY(x) (((x) >> 13) & 0x1FFF) 5466 #define C_008F24_LAST_ARRAY 0xFC001FFF 5467 #define S_008F24_META_DATA_ADDRESS(x) (((unsigned)(x) & 0xFF) << 17) /* gfx9 */ 5468 #define G_008F24_META_DATA_ADDRESS(x) (((x) >> 17) & 0xFF) 5469 #define C_008F24_META_DATA_ADDRESS 0xFE01FFFF 5470 #define S_008F24_META_LINEAR(x) (((unsigned)(x) & 0x1) << 25) /* gfx9 */ 5471 #define G_008F24_META_LINEAR(x) (((x) >> 25) & 0x1) 5472 #define C_008F24_META_LINEAR 0xFDFFFFFF 5473 #define S_008F24_META_PIPE_ALIGNED(x) (((unsigned)(x) & 0x1) << 26) /* gfx9 */ 5474 #define G_008F24_META_PIPE_ALIGNED(x) (((x) >> 26) & 0x1) 5475 #define C_008F24_META_PIPE_ALIGNED 0xFBFFFFFF 5476 #define S_008F24_META_RB_ALIGNED(x) (((unsigned)(x) & 0x1) << 27) /* gfx9 */ 5477 #define G_008F24_META_RB_ALIGNED(x) (((x) >> 27) & 0x1) 5478 #define C_008F24_META_RB_ALIGNED 0xF7FFFFFF 5479 #define S_008F24_MAX_MIP(x) (((unsigned)(x) & 0xF) << 28) /* gfx9 */ 5480 #define G_008F24_MAX_MIP(x) (((x) >> 28) & 0xF) 5481 #define C_008F24_MAX_MIP 0x0FFFFFFF 5482 #define R_008F28_SQ_IMG_RSRC_WORD6 0x008F28 /* <= gfx9 */ 5483 #define S_008F28_MIN_LOD_WARN(x) (((unsigned)(x) & 0xFFF) << 0) 5484 #define G_008F28_MIN_LOD_WARN(x) (((x) >> 0) & 0xFFF) 5485 #define C_008F28_MIN_LOD_WARN 0xFFFFF000 5486 #define S_008F28_COUNTER_BANK_ID(x) (((unsigned)(x) & 0xFF) << 12) 5487 #define G_008F28_COUNTER_BANK_ID(x) (((x) >> 12) & 0xFF) 5488 #define C_008F28_COUNTER_BANK_ID 0xFFF00FFF 5489 #define S_008F28_LOD_HDW_CNT_EN(x) (((unsigned)(x) & 0x1) << 20) 5490 #define G_008F28_LOD_HDW_CNT_EN(x) (((x) >> 20) & 0x1) 5491 #define C_008F28_LOD_HDW_CNT_EN 0xFFEFFFFF 5492 #define S_008F28_COMPRESSION_EN(x) (((unsigned)(x) & 0x1) << 21) /* gfx8, gfx81, gfx9 */ 5493 #define G_008F28_COMPRESSION_EN(x) (((x) >> 21) & 0x1) 5494 #define C_008F28_COMPRESSION_EN 0xFFDFFFFF 5495 #define S_008F28_UNUNSED(x) (((unsigned)(x) & 0x7FF) << 21) /* <= gfx7 */ 5496 #define G_008F28_UNUNSED(x) (((x) >> 21) & 0x7FF) 5497 #define C_008F28_UNUNSED 0x001FFFFF 5498 #define S_008F28_ALPHA_IS_ON_MSB(x) (((unsigned)(x) & 0x1) << 22) /* gfx8, gfx81, gfx9 */ 5499 #define G_008F28_ALPHA_IS_ON_MSB(x) (((x) >> 22) & 0x1) 5500 #define C_008F28_ALPHA_IS_ON_MSB 0xFFBFFFFF 5501 #define S_008F28_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x1) << 23) /* gfx8, gfx81, gfx9 */ 5502 #define G_008F28_COLOR_TRANSFORM(x) (((x) >> 23) & 0x1) 5503 #define C_008F28_COLOR_TRANSFORM 0xFF7FFFFF 5504 #define S_008F28_LOST_ALPHA_BITS(x) (((unsigned)(x) & 0xF) << 24) /* gfx8, gfx81, gfx9 */ 5505 #define G_008F28_LOST_ALPHA_BITS(x) (((x) >> 24) & 0xF) 5506 #define C_008F28_LOST_ALPHA_BITS 0xF0FFFFFF 5507 #define S_008F28_LOST_COLOR_BITS(x) (((unsigned)(x) & 0xF) << 28) /* gfx8, gfx81, gfx9 */ 5508 #define G_008F28_LOST_COLOR_BITS(x) (((x) >> 28) & 0xF) 5509 #define C_008F28_LOST_COLOR_BITS 0x0FFFFFFF 5510 #define R_008F2C_SQ_IMG_RSRC_WORD7 0x008F2C /* <= gfx9 */ 5511 #define R_008F30_SQ_IMG_SAMP_WORD0 0x008F30 5512 #define S_008F30_CLAMP_X(x) (((unsigned)(x) & 0x7) << 0) 5513 #define G_008F30_CLAMP_X(x) (((x) >> 0) & 0x7) 5514 #define C_008F30_CLAMP_X 0xFFFFFFF8 5515 #define V_008F30_SQ_TEX_WRAP 0 /* <= gfx9 */ 5516 #define V_008F30_SQ_TEX_MIRROR 1 /* <= gfx9 */ 5517 #define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 2 /* <= gfx9 */ 5518 #define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 3 /* <= gfx9 */ 5519 #define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 4 /* <= gfx9 */ 5520 #define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 5 /* <= gfx9 */ 5521 #define V_008F30_SQ_TEX_CLAMP_BORDER 6 /* <= gfx9 */ 5522 #define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 7 /* <= gfx9 */ 5523 #define S_008F30_CLAMP_Y(x) (((unsigned)(x) & 0x7) << 3) 5524 #define G_008F30_CLAMP_Y(x) (((x) >> 3) & 0x7) 5525 #define C_008F30_CLAMP_Y 0xFFFFFFC7 5526 #define S_008F30_CLAMP_Z(x) (((unsigned)(x) & 0x7) << 6) 5527 #define G_008F30_CLAMP_Z(x) (((x) >> 6) & 0x7) 5528 #define C_008F30_CLAMP_Z 0xFFFFFE3F 5529 #define S_008F30_MAX_ANISO_RATIO(x) (((unsigned)(x) & 0x7) << 9) 5530 #define G_008F30_MAX_ANISO_RATIO(x) (((x) >> 9) & 0x7) 5531 #define C_008F30_MAX_ANISO_RATIO 0xFFFFF1FF 5532 #define S_008F30_DEPTH_COMPARE_FUNC(x) (((unsigned)(x) & 0x7) << 12) 5533 #define G_008F30_DEPTH_COMPARE_FUNC(x) (((x) >> 12) & 0x7) 5534 #define C_008F30_DEPTH_COMPARE_FUNC 0xFFFF8FFF 5535 #define V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER 0 /* <= gfx9 */ 5536 #define V_008F30_SQ_TEX_DEPTH_COMPARE_LESS 1 /* <= gfx9 */ 5537 #define V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL 2 /* <= gfx9 */ 5538 #define V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL 3 /* <= gfx9 */ 5539 #define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER 4 /* <= gfx9 */ 5540 #define V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL 5 /* <= gfx9 */ 5541 #define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL 6 /* <= gfx9 */ 5542 #define V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS 7 /* <= gfx9 */ 5543 #define S_008F30_FORCE_UNNORMALIZED(x) (((unsigned)(x) & 0x1) << 15) 5544 #define G_008F30_FORCE_UNNORMALIZED(x) (((x) >> 15) & 0x1) 5545 #define C_008F30_FORCE_UNNORMALIZED 0xFFFF7FFF 5546 #define S_008F30_ANISO_THRESHOLD(x) (((unsigned)(x) & 0x7) << 16) 5547 #define G_008F30_ANISO_THRESHOLD(x) (((x) >> 16) & 0x7) 5548 #define C_008F30_ANISO_THRESHOLD 0xFFF8FFFF 5549 #define S_008F30_MC_COORD_TRUNC(x) (((unsigned)(x) & 0x1) << 19) 5550 #define G_008F30_MC_COORD_TRUNC(x) (((x) >> 19) & 0x1) 5551 #define C_008F30_MC_COORD_TRUNC 0xFFF7FFFF 5552 #define S_008F30_FORCE_DEGAMMA(x) (((unsigned)(x) & 0x1) << 20) 5553 #define G_008F30_FORCE_DEGAMMA(x) (((x) >> 20) & 0x1) 5554 #define C_008F30_FORCE_DEGAMMA 0xFFEFFFFF 5555 #define S_008F30_ANISO_BIAS(x) (((unsigned)(x) & 0x3F) << 21) 5556 #define G_008F30_ANISO_BIAS(x) (((x) >> 21) & 0x3F) 5557 #define C_008F30_ANISO_BIAS 0xF81FFFFF 5558 #define S_008F30_TRUNC_COORD(x) (((unsigned)(x) & 0x1) << 27) 5559 #define G_008F30_TRUNC_COORD(x) (((x) >> 27) & 0x1) 5560 #define C_008F30_TRUNC_COORD 0xF7FFFFFF 5561 #define S_008F30_DISABLE_CUBE_WRAP(x) (((unsigned)(x) & 0x1) << 28) 5562 #define G_008F30_DISABLE_CUBE_WRAP(x) (((x) >> 28) & 0x1) 5563 #define C_008F30_DISABLE_CUBE_WRAP 0xEFFFFFFF 5564 #define S_008F30_FILTER_MODE(x) (((unsigned)(x) & 0x3) << 29) 5565 #define G_008F30_FILTER_MODE(x) (((x) >> 29) & 0x3) 5566 #define C_008F30_FILTER_MODE 0x9FFFFFFF 5567 #define V_008F30_SQ_IMG_FILTER_MODE_BLEND 0 /* <= gfx9 */ 5568 #define V_008F30_SQ_IMG_FILTER_MODE_MIN 1 /* <= gfx9 */ 5569 #define V_008F30_SQ_IMG_FILTER_MODE_MAX 2 /* <= gfx9 */ 5570 #define S_008F30_COMPAT_MODE(x) (((unsigned)(x) & 0x1) << 31) /* gfx8, gfx81, gfx9 */ 5571 #define G_008F30_COMPAT_MODE(x) (((x) >> 31) & 0x1) 5572 #define C_008F30_COMPAT_MODE 0x7FFFFFFF 5573 #define S_008F30_SKIP_DEGAMMA(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx10 */ 5574 #define G_008F30_SKIP_DEGAMMA(x) (((x) >> 31) & 0x1) 5575 #define C_008F30_SKIP_DEGAMMA 0x7FFFFFFF 5576 #define R_008F34_SQ_IMG_SAMP_WORD1 0x008F34 5577 #define S_008F34_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 0) 5578 #define G_008F34_MIN_LOD(x) (((x) >> 0) & 0xFFF) 5579 #define C_008F34_MIN_LOD 0xFFFFF000 5580 #define S_008F34_MAX_LOD(x) (((unsigned)(x) & 0xFFF) << 12) 5581 #define G_008F34_MAX_LOD(x) (((x) >> 12) & 0xFFF) 5582 #define C_008F34_MAX_LOD 0xFF000FFF 5583 #define S_008F34_PERF_MIP(x) (((unsigned)(x) & 0xF) << 24) 5584 #define G_008F34_PERF_MIP(x) (((x) >> 24) & 0xF) 5585 #define C_008F34_PERF_MIP 0xF0FFFFFF 5586 #define S_008F34_PERF_Z(x) (((unsigned)(x) & 0xF) << 28) 5587 #define G_008F34_PERF_Z(x) (((x) >> 28) & 0xF) 5588 #define C_008F34_PERF_Z 0x0FFFFFFF 5589 #define R_008F38_SQ_IMG_SAMP_WORD2 0x008F38 5590 #define S_008F38_BORDER_COLOR_PTR(x) (((unsigned)(x) & 0xFFF) << 0) /* >= gfx10 */ 5591 #define G_008F38_BORDER_COLOR_PTR(x) (((x) >> 0) & 0xFFF) 5592 #define C_008F38_BORDER_COLOR_PTR 0xFFFFF000 5593 #define S_008F38_LOD_BIAS(x) (((unsigned)(x) & 0x3FFF) << 0) 5594 #define G_008F38_LOD_BIAS(x) (((x) >> 0) & 0x3FFF) 5595 #define C_008F38_LOD_BIAS 0xFFFFC000 5596 #define S_008F38_BORDER_COLOR_TYPE(x) (((unsigned)(x) & 0x3) << 12) /* >= gfx10 */ 5597 #define G_008F38_BORDER_COLOR_TYPE(x) (((x) >> 12) & 0x3) 5598 #define C_008F38_BORDER_COLOR_TYPE 0xFFFFCFFF 5599 #define S_008F38_LOD_BIAS_SEC(x) (((unsigned)(x) & 0x3F) << 14) 5600 #define G_008F38_LOD_BIAS_SEC(x) (((x) >> 14) & 0x3F) 5601 #define C_008F38_LOD_BIAS_SEC 0xFFF03FFF 5602 #define S_008F38_XY_MAG_FILTER(x) (((unsigned)(x) & 0x3) << 20) 5603 #define G_008F38_XY_MAG_FILTER(x) (((x) >> 20) & 0x3) 5604 #define C_008F38_XY_MAG_FILTER 0xFFCFFFFF 5605 #define V_008F38_SQ_TEX_XY_FILTER_POINT 0 /* <= gfx9 */ 5606 #define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 1 /* <= gfx9 */ 5607 #define V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT 2 /* <= gfx9 */ 5608 #define V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR 3 /* <= gfx9 */ 5609 #define S_008F38_XY_MIN_FILTER(x) (((unsigned)(x) & 0x3) << 22) 5610 #define G_008F38_XY_MIN_FILTER(x) (((x) >> 22) & 0x3) 5611 #define C_008F38_XY_MIN_FILTER 0xFF3FFFFF 5612 #define S_008F38_Z_FILTER(x) (((unsigned)(x) & 0x3) << 24) 5613 #define G_008F38_Z_FILTER(x) (((x) >> 24) & 0x3) 5614 #define C_008F38_Z_FILTER 0xFCFFFFFF 5615 #define V_008F38_SQ_TEX_Z_FILTER_NONE 0 /* <= gfx9 */ 5616 #define V_008F38_SQ_TEX_Z_FILTER_POINT 1 /* <= gfx9 */ 5617 #define V_008F38_SQ_TEX_Z_FILTER_LINEAR 2 /* <= gfx9 */ 5618 #define S_008F38_MIP_FILTER(x) (((unsigned)(x) & 0x3) << 26) 5619 #define G_008F38_MIP_FILTER(x) (((x) >> 26) & 0x3) 5620 #define C_008F38_MIP_FILTER 0xF3FFFFFF 5621 #define V_008F38_SQ_TEX_MIP_FILTER_NONE 0 /* <= gfx9 */ 5622 #define V_008F38_SQ_TEX_MIP_FILTER_POINT 1 /* <= gfx9 */ 5623 #define V_008F38_SQ_TEX_MIP_FILTER_LINEAR 2 /* <= gfx9 */ 5624 #define V_008F38_SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ 3 /* gfx8, gfx81, gfx9 */ 5625 #define S_008F38_MIP_POINT_PRECLAMP(x) (((unsigned)(x) & 0x1) << 28) 5626 #define G_008F38_MIP_POINT_PRECLAMP(x) (((x) >> 28) & 0x1) 5627 #define C_008F38_MIP_POINT_PRECLAMP 0xEFFFFFFF 5628 #define S_008F38_ANISO_OVERRIDE_GFX10(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx10 */ 5629 #define G_008F38_ANISO_OVERRIDE_GFX10(x) (((x) >> 29) & 0x1) 5630 #define C_008F38_ANISO_OVERRIDE_GFX10 0xDFFFFFFF 5631 #define S_008F38_BLEND_ZERO_PRT_GFX9(x) (((unsigned)(x) & 0x1) << 29) /* gfx9 */ 5632 #define G_008F38_BLEND_ZERO_PRT_GFX9(x) (((x) >> 29) & 0x1) 5633 #define C_008F38_BLEND_ZERO_PRT_GFX9 0xDFFFFFFF 5634 #define S_008F38_DISABLE_LSB_CEIL(x) (((unsigned)(x) & 0x1) << 29) /* <= gfx81 */ 5635 #define G_008F38_DISABLE_LSB_CEIL(x) (((x) >> 29) & 0x1) 5636 #define C_008F38_DISABLE_LSB_CEIL 0xDFFFFFFF 5637 #define S_008F38_BLEND_ZERO_PRT_GFX10(x) (((unsigned)(x) & 0x1) << 30) /* >= gfx10 */ 5638 #define G_008F38_BLEND_ZERO_PRT_GFX10(x) (((x) >> 30) & 0x1) 5639 #define C_008F38_BLEND_ZERO_PRT_GFX10 0xBFFFFFFF 5640 #define S_008F38_FILTER_PREC_FIX(x) (((unsigned)(x) & 0x1) << 30) /* <= gfx9 */ 5641 #define G_008F38_FILTER_PREC_FIX(x) (((x) >> 30) & 0x1) 5642 #define C_008F38_FILTER_PREC_FIX 0xBFFFFFFF 5643 #define S_008F38_ANISO_OVERRIDE_GFX8(x) (((unsigned)(x) & 0x1) << 31) /* gfx8, gfx81, gfx9 */ 5644 #define G_008F38_ANISO_OVERRIDE_GFX8(x) (((x) >> 31) & 0x1) 5645 #define C_008F38_ANISO_OVERRIDE_GFX8 0x7FFFFFFF 5646 #define S_008F38_DERIV_ADJUST_EN(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx10 */ 5647 #define G_008F38_DERIV_ADJUST_EN(x) (((x) >> 31) & 0x1) 5648 #define C_008F38_DERIV_ADJUST_EN 0x7FFFFFFF 5649 #define R_008F3C_SQ_IMG_SAMP_WORD3 0x008F3C 5650 #define S_008F3C_BORDER_COLOR_PTR(x) (((unsigned)(x) & 0xFFF) << 0) 5651 #define G_008F3C_BORDER_COLOR_PTR(x) (((x) >> 0) & 0xFFF) 5652 #define C_008F3C_BORDER_COLOR_PTR 0xFFFFF000 5653 #define S_008F3C_SKIP_DEGAMMA(x) (((unsigned)(x) & 0x1) << 12) /* gfx9 */ 5654 #define G_008F3C_SKIP_DEGAMMA(x) (((x) >> 12) & 0x1) 5655 #define C_008F3C_SKIP_DEGAMMA 0xFFFFEFFF 5656 #define S_008F3C_UPGRADED_DEPTH(x) (((unsigned)(x) & 0x1) << 29) /* <= gfx81 */ 5657 #define G_008F3C_UPGRADED_DEPTH(x) (((x) >> 29) & 0x1) 5658 #define C_008F3C_UPGRADED_DEPTH 0xDFFFFFFF 5659 #define S_008F3C_BORDER_COLOR_TYPE(x) (((unsigned)(x) & 0x3) << 30) 5660 #define G_008F3C_BORDER_COLOR_TYPE(x) (((x) >> 30) & 0x3) 5661 #define C_008F3C_BORDER_COLOR_TYPE 0x3FFFFFFF 5662 #define V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK 0 /* <= gfx9 */ 5663 #define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK 1 /* <= gfx9 */ 5664 #define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE 2 /* <= gfx9 */ 5665 #define V_008F3C_SQ_TEX_BORDER_COLOR_REGISTER 3 /* <= gfx9 */ 5666 #define R_009100_SPI_CONFIG_CNTL 0x009100 /* <= gfx81, gfx10 */ 5667 #define S_009100_GPR_WRITE_PRIORITY(x) (((unsigned)(x) & 0x1FFFFF) << 0) 5668 #define G_009100_GPR_WRITE_PRIORITY(x) (((x) >> 0) & 0x1FFFFF) 5669 #define C_009100_GPR_WRITE_PRIORITY 0xFFE00000 5670 #define S_009100_EXP_PRIORITY_ORDER(x) (((unsigned)(x) & 0x7) << 21) 5671 #define G_009100_EXP_PRIORITY_ORDER(x) (((x) >> 21) & 0x7) 5672 #define C_009100_EXP_PRIORITY_ORDER 0xFF1FFFFF 5673 #define S_009100_ENABLE_SQG_TOP_EVENTS(x) (((unsigned)(x) & 0x1) << 24) 5674 #define G_009100_ENABLE_SQG_TOP_EVENTS(x) (((x) >> 24) & 0x1) 5675 #define C_009100_ENABLE_SQG_TOP_EVENTS 0xFEFFFFFF 5676 #define S_009100_ENABLE_SQG_BOP_EVENTS(x) (((unsigned)(x) & 0x1) << 25) 5677 #define G_009100_ENABLE_SQG_BOP_EVENTS(x) (((x) >> 25) & 0x1) 5678 #define C_009100_ENABLE_SQG_BOP_EVENTS 0xFDFFFFFF 5679 #define S_009100_RSRC_MGMT_RESET(x) (((unsigned)(x) & 0x1) << 26) 5680 #define G_009100_RSRC_MGMT_RESET(x) (((x) >> 26) & 0x1) 5681 #define C_009100_RSRC_MGMT_RESET 0xFBFFFFFF 5682 #define S_009100_TTRACE_STALL_ALL(x) (((unsigned)(x) & 0x1) << 27) 5683 #define G_009100_TTRACE_STALL_ALL(x) (((x) >> 27) & 0x1) 5684 #define C_009100_TTRACE_STALL_ALL 0xF7FFFFFF 5685 #define S_009100_ALLOC_ARB_LRU_ENA(x) (((unsigned)(x) & 0x1) << 28) /* gfx10 */ 5686 #define G_009100_ALLOC_ARB_LRU_ENA(x) (((x) >> 28) & 0x1) 5687 #define C_009100_ALLOC_ARB_LRU_ENA 0xEFFFFFFF 5688 #define S_009100_EXP_ARB_LRU_ENA(x) (((unsigned)(x) & 0x1) << 29) /* gfx10 */ 5689 #define G_009100_EXP_ARB_LRU_ENA(x) (((x) >> 29) & 0x1) 5690 #define C_009100_EXP_ARB_LRU_ENA 0xDFFFFFFF 5691 #define S_009100_PS_PKR_PRIORITY_CNTL(x) (((unsigned)(x) & 0x3) << 30) /* gfx10 */ 5692 #define G_009100_PS_PKR_PRIORITY_CNTL(x) (((x) >> 30) & 0x3) 5693 #define C_009100_PS_PKR_PRIORITY_CNTL 0x3FFFFFFF 5694 #define R_009130_SPI_CONFIG_CNTL 0x009130 /* >= gfx103 */ 5695 #define S_009130_GPR_WRITE_PRIORITY(x) (((unsigned)(x) & 0x1FFFFF) << 0) 5696 #define G_009130_GPR_WRITE_PRIORITY(x) (((x) >> 0) & 0x1FFFFF) 5697 #define C_009130_GPR_WRITE_PRIORITY 0xFFE00000 5698 #define S_009130_EXP_PRIORITY_ORDER(x) (((unsigned)(x) & 0x7) << 21) 5699 #define G_009130_EXP_PRIORITY_ORDER(x) (((x) >> 21) & 0x7) 5700 #define C_009130_EXP_PRIORITY_ORDER 0xFF1FFFFF 5701 #define S_009130_ENABLE_SQG_TOP_EVENTS(x) (((unsigned)(x) & 0x1) << 24) 5702 #define G_009130_ENABLE_SQG_TOP_EVENTS(x) (((x) >> 24) & 0x1) 5703 #define C_009130_ENABLE_SQG_TOP_EVENTS 0xFEFFFFFF 5704 #define S_009130_ENABLE_SQG_BOP_EVENTS(x) (((unsigned)(x) & 0x1) << 25) 5705 #define G_009130_ENABLE_SQG_BOP_EVENTS(x) (((x) >> 25) & 0x1) 5706 #define C_009130_ENABLE_SQG_BOP_EVENTS 0xFDFFFFFF 5707 #define S_009130_FORCE_HALF_RATE_PC_EXP(x) (((unsigned)(x) & 0x1) << 26) 5708 #define G_009130_FORCE_HALF_RATE_PC_EXP(x) (((x) >> 26) & 0x1) 5709 #define C_009130_FORCE_HALF_RATE_PC_EXP 0xFBFFFFFF 5710 #define S_009130_TTRACE_STALL_ALL(x) (((unsigned)(x) & 0x1) << 27) 5711 #define G_009130_TTRACE_STALL_ALL(x) (((x) >> 27) & 0x1) 5712 #define C_009130_TTRACE_STALL_ALL 0xF7FFFFFF 5713 #define S_009130_ALLOC_ARB_LRU_ENA(x) (((unsigned)(x) & 0x1) << 28) 5714 #define G_009130_ALLOC_ARB_LRU_ENA(x) (((x) >> 28) & 0x1) 5715 #define C_009130_ALLOC_ARB_LRU_ENA 0xEFFFFFFF 5716 #define S_009130_EXP_ARB_LRU_ENA(x) (((unsigned)(x) & 0x1) << 29) 5717 #define G_009130_EXP_ARB_LRU_ENA(x) (((x) >> 29) & 0x1) 5718 #define C_009130_EXP_ARB_LRU_ENA 0xDFFFFFFF 5719 #define S_009130_PS_PKR_PRIORITY_CNTL(x) (((unsigned)(x) & 0x3) << 30) 5720 #define G_009130_PS_PKR_PRIORITY_CNTL(x) (((x) >> 30) & 0x3) 5721 #define C_009130_PS_PKR_PRIORITY_CNTL 0x3FFFFFFF 5722 #define R_00950C_TA_CS_BC_BASE_ADDR 0x00950C /* <= gfx6 */ 5723 #define R_0098F8_GB_ADDR_CONFIG 0x0098F8 5724 #define S_0098F8_NUM_PIPES(x) (((unsigned)(x) & 0x7) << 0) 5725 #define G_0098F8_NUM_PIPES(x) (((x) >> 0) & 0x7) 5726 #define C_0098F8_NUM_PIPES 0xFFFFFFF8 5727 #define S_0098F8_PIPE_INTERLEAVE_SIZE_GFX9(x) (((unsigned)(x) & 0x7) << 3) /* >= gfx9 */ 5728 #define G_0098F8_PIPE_INTERLEAVE_SIZE_GFX9(x) (((x) >> 3) & 0x7) 5729 #define C_0098F8_PIPE_INTERLEAVE_SIZE_GFX9 0xFFFFFFC7 5730 #define S_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(x) (((unsigned)(x) & 0x7) << 4) /* <= gfx81 */ 5731 #define G_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(x) (((x) >> 4) & 0x7) 5732 #define C_0098F8_PIPE_INTERLEAVE_SIZE_GFX6 0xFFFFFF8F 5733 #define S_0098F8_MAX_COMPRESSED_FRAGS(x) (((unsigned)(x) & 0x3) << 6) /* >= gfx9 */ 5734 #define G_0098F8_MAX_COMPRESSED_FRAGS(x) (((x) >> 6) & 0x3) 5735 #define C_0098F8_MAX_COMPRESSED_FRAGS 0xFFFFFF3F 5736 #define S_0098F8_BANK_INTERLEAVE_SIZE(x) (((unsigned)(x) & 0x7) << 8) /* <= gfx9 */ 5737 #define G_0098F8_BANK_INTERLEAVE_SIZE(x) (((x) >> 8) & 0x7) 5738 #define C_0098F8_BANK_INTERLEAVE_SIZE 0xFFFFF8FF 5739 #define S_0098F8_NUM_PKRS(x) (((unsigned)(x) & 0x7) << 8) /* >= gfx103 */ 5740 #define G_0098F8_NUM_PKRS(x) (((x) >> 8) & 0x7) 5741 #define C_0098F8_NUM_PKRS 0xFFFFF8FF 5742 #define S_0098F8_NUM_BANKS(x) (((unsigned)(x) & 0x7) << 12) /* gfx9 */ 5743 #define G_0098F8_NUM_BANKS(x) (((x) >> 12) & 0x7) 5744 #define C_0098F8_NUM_BANKS 0xFFFF8FFF 5745 #define V_0098F8_ADDR_SURF_2_BANK 0 5746 #define V_0098F8_ADDR_SURF_4_BANK 1 5747 #define V_0098F8_ADDR_SURF_8_BANK 2 5748 #define V_0098F8_ADDR_SURF_16_BANK 3 5749 #define S_0098F8_NUM_SHADER_ENGINES_GFX6(x) (((unsigned)(x) & 0x3) << 12) /* <= gfx81 */ 5750 #define G_0098F8_NUM_SHADER_ENGINES_GFX6(x) (((x) >> 12) & 0x3) 5751 #define C_0098F8_NUM_SHADER_ENGINES_GFX6 0xFFFFCFFF 5752 #define S_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((unsigned)(x) & 0x7) << 16) /* <= gfx9 */ 5753 #define G_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((x) >> 16) & 0x7) 5754 #define C_0098F8_SHADER_ENGINE_TILE_SIZE 0xFFF8FFFF 5755 #define S_0098F8_NUM_SHADER_ENGINES_GFX9(x) (((unsigned)(x) & 0x3) << 19) /* >= gfx9 */ 5756 #define G_0098F8_NUM_SHADER_ENGINES_GFX9(x) (((x) >> 19) & 0x3) 5757 #define C_0098F8_NUM_SHADER_ENGINES_GFX9 0xFFE7FFFF 5758 #define S_0098F8_NUM_GPUS_GFX6(x) (((unsigned)(x) & 0x7) << 20) /* <= gfx81 */ 5759 #define G_0098F8_NUM_GPUS_GFX6(x) (((x) >> 20) & 0x7) 5760 #define C_0098F8_NUM_GPUS_GFX6 0xFF8FFFFF 5761 #define S_0098F8_NUM_GPUS_GFX9(x) (((unsigned)(x) & 0x7) << 21) /* gfx9 */ 5762 #define G_0098F8_NUM_GPUS_GFX9(x) (((x) >> 21) & 0x7) 5763 #define C_0098F8_NUM_GPUS_GFX9 0xFF1FFFFF 5764 #define S_0098F8_MULTI_GPU_TILE_SIZE(x) (((unsigned)(x) & 0x3) << 24) /* <= gfx9 */ 5765 #define G_0098F8_MULTI_GPU_TILE_SIZE(x) (((x) >> 24) & 0x3) 5766 #define C_0098F8_MULTI_GPU_TILE_SIZE 0xFCFFFFFF 5767 #define S_0098F8_NUM_RB_PER_SE(x) (((unsigned)(x) & 0x3) << 26) /* >= gfx9 */ 5768 #define G_0098F8_NUM_RB_PER_SE(x) (((x) >> 26) & 0x3) 5769 #define C_0098F8_NUM_RB_PER_SE 0xF3FFFFFF 5770 #define S_0098F8_ROW_SIZE(x) (((unsigned)(x) & 0x3) << 28) /* <= gfx9 */ 5771 #define G_0098F8_ROW_SIZE(x) (((x) >> 28) & 0x3) 5772 #define C_0098F8_ROW_SIZE 0xCFFFFFFF 5773 #define S_0098F8_NUM_LOWER_PIPES(x) (((unsigned)(x) & 0x1) << 30) /* <= gfx9 */ 5774 #define G_0098F8_NUM_LOWER_PIPES(x) (((x) >> 30) & 0x1) 5775 #define C_0098F8_NUM_LOWER_PIPES 0xBFFFFFFF 5776 #define S_0098F8_SE_ENABLE(x) (((unsigned)(x) & 0x1) << 31) /* gfx9 */ 5777 #define G_0098F8_SE_ENABLE(x) (((x) >> 31) & 0x1) 5778 #define C_0098F8_SE_ENABLE 0x7FFFFFFF 5779 #define R_009910_GB_TILE_MODE0 0x009910 /* <= gfx10 */ 5780 #define S_009910_MICRO_TILE_MODE(x) (((unsigned)(x) & 0x3) << 0) /* <= gfx6 */ 5781 #define G_009910_MICRO_TILE_MODE(x) (((x) >> 0) & 0x3) 5782 #define C_009910_MICRO_TILE_MODE 0xFFFFFFFC 5783 #define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0 5784 #define V_009910_ADDR_SURF_THIN_MICRO_TILING 1 5785 #define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 2 5786 #define V_009910_ADDR_SURF_THICK_MICRO_TILING_GFX6 3 5787 #define S_009910_ARRAY_MODE(x) (((unsigned)(x) & 0xF) << 2) 5788 #define G_009910_ARRAY_MODE(x) (((x) >> 2) & 0xF) 5789 #define C_009910_ARRAY_MODE 0xFFFFFFC3 5790 #define V_009910_ARRAY_LINEAR_GENERAL 0 5791 #define V_009910_ARRAY_LINEAR_ALIGNED 1 5792 #define V_009910_ARRAY_1D_TILED_THIN1 2 5793 #define V_009910_ARRAY_1D_TILED_THICK 3 5794 #define V_009910_ARRAY_2D_TILED_THIN1 4 5795 #define V_009910_ARRAY_PRT_TILED_THIN1 5 5796 #define V_009910_ARRAY_PRT_2D_TILED_THIN1 6 5797 #define V_009910_ARRAY_2D_TILED_THICK 7 5798 #define V_009910_ARRAY_2D_TILED_XTHICK 8 5799 #define V_009910_ARRAY_PRT_TILED_THICK 9 5800 #define V_009910_ARRAY_PRT_2D_TILED_THICK 10 5801 #define V_009910_ARRAY_PRT_3D_TILED_THIN1 11 5802 #define V_009910_ARRAY_3D_TILED_THIN1 12 5803 #define V_009910_ARRAY_3D_TILED_THICK 13 5804 #define V_009910_ARRAY_3D_TILED_XTHICK 14 5805 #define V_009910_ARRAY_PRT_3D_TILED_THICK 15 5806 #define S_009910_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 6) 5807 #define G_009910_PIPE_CONFIG(x) (((x) >> 6) & 0x1F) 5808 #define C_009910_PIPE_CONFIG 0xFFFFF83F 5809 #define V_009910_ADDR_SURF_P2 0 5810 #define V_009910_ADDR_SURF_P2_RESERVED0 1 5811 #define V_009910_ADDR_SURF_P2_RESERVED1 2 5812 #define V_009910_ADDR_SURF_P2_RESERVED2 3 5813 #define V_009910_ADDR_SURF_P4_8x16 4 5814 #define V_009910_ADDR_SURF_P4_16x16 5 5815 #define V_009910_ADDR_SURF_P4_16x32 6 5816 #define V_009910_ADDR_SURF_P4_32x32 7 5817 #define V_009910_ADDR_SURF_P8_16x16_8x16 8 5818 #define V_009910_ADDR_SURF_P8_16x32_8x16 9 5819 #define V_009910_ADDR_SURF_P8_32x32_8x16 10 5820 #define V_009910_ADDR_SURF_P8_16x32_16x16 11 5821 #define V_009910_ADDR_SURF_P8_32x32_16x16 12 5822 #define V_009910_ADDR_SURF_P8_32x32_16x32 13 5823 #define V_009910_ADDR_SURF_P8_32x64_32x32 14 5824 #define V_009910_ADDR_SURF_P8_RESERVED0 15 5825 #define V_009910_ADDR_SURF_P16_32x32_8x16 16 5826 #define V_009910_ADDR_SURF_P16_32x32_16x16 17 5827 #define V_009910_ADDR_SURF_P16 18 /* gfx10 */ 5828 #define S_009910_TILE_SPLIT(x) (((unsigned)(x) & 0x7) << 11) 5829 #define G_009910_TILE_SPLIT(x) (((x) >> 11) & 0x7) 5830 #define C_009910_TILE_SPLIT 0xFFFFC7FF 5831 #define V_009910_ADDR_SURF_TILE_SPLIT_64B 0 5832 #define V_009910_ADDR_SURF_TILE_SPLIT_128B 1 5833 #define V_009910_ADDR_SURF_TILE_SPLIT_256B 2 5834 #define V_009910_ADDR_SURF_TILE_SPLIT_512B 3 5835 #define V_009910_ADDR_SURF_TILE_SPLIT_1KB 4 5836 #define V_009910_ADDR_SURF_TILE_SPLIT_2KB 5 5837 #define V_009910_ADDR_SURF_TILE_SPLIT_4KB 6 5838 #define S_009910_MICRO_TILE_MODE_NEW(x) (((unsigned)(x) & 0x7) << 22) 5839 #define G_009910_MICRO_TILE_MODE_NEW(x) (((x) >> 22) & 0x7) 5840 #define C_009910_MICRO_TILE_MODE_NEW 0xFE3FFFFF 5841 #define V_009910_ADDR_SURF_ROTATED_MICRO_TILING 3 5842 #define V_009910_ADDR_SURF_THICK_MICRO_TILING 4 5843 #define S_009910_SAMPLE_SPLIT(x) (((unsigned)(x) & 0x3) << 25) 5844 #define G_009910_SAMPLE_SPLIT(x) (((x) >> 25) & 0x3) 5845 #define C_009910_SAMPLE_SPLIT 0xF9FFFFFF 5846 #define R_009914_GB_TILE_MODE1 0x009914 /* <= gfx10 */ 5847 #define R_009918_GB_TILE_MODE2 0x009918 /* <= gfx10 */ 5848 #define R_00991C_GB_TILE_MODE3 0x00991C /* <= gfx10 */ 5849 #define R_009920_GB_TILE_MODE4 0x009920 /* <= gfx10 */ 5850 #define R_009924_GB_TILE_MODE5 0x009924 /* <= gfx10 */ 5851 #define R_009928_GB_TILE_MODE6 0x009928 /* <= gfx10 */ 5852 #define R_00992C_GB_TILE_MODE7 0x00992C /* <= gfx10 */ 5853 #define R_009930_GB_TILE_MODE8 0x009930 /* <= gfx10 */ 5854 #define R_009934_GB_TILE_MODE9 0x009934 /* <= gfx10 */ 5855 #define R_009938_GB_TILE_MODE10 0x009938 /* <= gfx10 */ 5856 #define R_00993C_GB_TILE_MODE11 0x00993C /* <= gfx10 */ 5857 #define R_009940_GB_TILE_MODE12 0x009940 /* <= gfx10 */ 5858 #define R_009944_GB_TILE_MODE13 0x009944 /* <= gfx10 */ 5859 #define R_009948_GB_TILE_MODE14 0x009948 /* <= gfx10 */ 5860 #define R_00994C_GB_TILE_MODE15 0x00994C /* <= gfx10 */ 5861 #define R_009950_GB_TILE_MODE16 0x009950 /* <= gfx10 */ 5862 #define R_009954_GB_TILE_MODE17 0x009954 /* <= gfx10 */ 5863 #define R_009958_GB_TILE_MODE18 0x009958 /* <= gfx10 */ 5864 #define R_00995C_GB_TILE_MODE19 0x00995C /* <= gfx10 */ 5865 #define R_009960_GB_TILE_MODE20 0x009960 /* <= gfx10 */ 5866 #define R_009964_GB_TILE_MODE21 0x009964 /* <= gfx10 */ 5867 #define R_009968_GB_TILE_MODE22 0x009968 /* <= gfx10 */ 5868 #define R_00996C_GB_TILE_MODE23 0x00996C /* <= gfx10 */ 5869 #define R_009970_GB_TILE_MODE24 0x009970 /* <= gfx10 */ 5870 #define R_009974_GB_TILE_MODE25 0x009974 /* <= gfx10 */ 5871 #define R_009978_GB_TILE_MODE26 0x009978 /* <= gfx10 */ 5872 #define R_00997C_GB_TILE_MODE27 0x00997C /* <= gfx10 */ 5873 #define R_009980_GB_TILE_MODE28 0x009980 /* <= gfx10 */ 5874 #define R_009984_GB_TILE_MODE29 0x009984 /* <= gfx10 */ 5875 #define R_009988_GB_TILE_MODE30 0x009988 /* <= gfx10 */ 5876 #define R_00998C_GB_TILE_MODE31 0x00998C /* <= gfx10 */ 5877 #define R_009990_GB_MACROTILE_MODE0 0x009990 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5878 #define S_009990_BANK_WIDTH(x) (((unsigned)(x) & 0x3) << 0) 5879 #define G_009990_BANK_WIDTH(x) (((x) >> 0) & 0x3) 5880 #define C_009990_BANK_WIDTH 0xFFFFFFFC 5881 #define V_009990_ADDR_SURF_BANK_WIDTH_1 0 5882 #define V_009990_ADDR_SURF_BANK_WIDTH_2 1 5883 #define V_009990_ADDR_SURF_BANK_WIDTH_4 2 5884 #define V_009990_ADDR_SURF_BANK_WIDTH_8 3 5885 #define S_009990_BANK_HEIGHT(x) (((unsigned)(x) & 0x3) << 2) 5886 #define G_009990_BANK_HEIGHT(x) (((x) >> 2) & 0x3) 5887 #define C_009990_BANK_HEIGHT 0xFFFFFFF3 5888 #define V_009990_ADDR_SURF_BANK_HEIGHT_1 0 5889 #define V_009990_ADDR_SURF_BANK_HEIGHT_2 1 5890 #define V_009990_ADDR_SURF_BANK_HEIGHT_4 2 5891 #define V_009990_ADDR_SURF_BANK_HEIGHT_8 3 5892 #define S_009990_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x3) << 4) 5893 #define G_009990_MACRO_TILE_ASPECT(x) (((x) >> 4) & 0x3) 5894 #define C_009990_MACRO_TILE_ASPECT 0xFFFFFFCF 5895 #define V_009990_ADDR_SURF_MACRO_ASPECT_1 0 5896 #define V_009990_ADDR_SURF_MACRO_ASPECT_2 1 5897 #define V_009990_ADDR_SURF_MACRO_ASPECT_4 2 5898 #define V_009990_ADDR_SURF_MACRO_ASPECT_8 3 5899 #define S_009990_NUM_BANKS(x) (((unsigned)(x) & 0x3) << 6) 5900 #define G_009990_NUM_BANKS(x) (((x) >> 6) & 0x3) 5901 #define C_009990_NUM_BANKS 0xFFFFFF3F 5902 #define V_009990_ADDR_SURF_2_BANK 0 5903 #define V_009990_ADDR_SURF_4_BANK 1 5904 #define V_009990_ADDR_SURF_8_BANK 2 5905 #define V_009990_ADDR_SURF_16_BANK 3 5906 #define R_009994_GB_MACROTILE_MODE1 0x009994 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5907 #define R_009998_GB_MACROTILE_MODE2 0x009998 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5908 #define R_00999C_GB_MACROTILE_MODE3 0x00999C /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5909 #define R_0099A0_GB_MACROTILE_MODE4 0x0099A0 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5910 #define R_0099A4_GB_MACROTILE_MODE5 0x0099A4 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5911 #define R_0099A8_GB_MACROTILE_MODE6 0x0099A8 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5912 #define R_0099AC_GB_MACROTILE_MODE7 0x0099AC /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5913 #define R_0099B0_GB_MACROTILE_MODE8 0x0099B0 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5914 #define R_0099B4_GB_MACROTILE_MODE9 0x0099B4 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5915 #define R_0099B8_GB_MACROTILE_MODE10 0x0099B8 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5916 #define R_0099BC_GB_MACROTILE_MODE11 0x0099BC /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5917 #define R_0099C0_GB_MACROTILE_MODE12 0x0099C0 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5918 #define R_0099C4_GB_MACROTILE_MODE13 0x0099C4 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5919 #define R_0099C8_GB_MACROTILE_MODE14 0x0099C8 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5920 #define R_0099CC_GB_MACROTILE_MODE15 0x0099CC /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 5921 #define R_00A000_SQ_IMG_RSRC_WORD0 0x00A000 /* >= gfx10 */ 5922 #define R_00A004_SQ_IMG_RSRC_WORD1 0x00A004 /* >= gfx10 */ 5923 #define S_00A004_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFF) << 0) 5924 #define G_00A004_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFF) 5925 #define C_00A004_BASE_ADDRESS_HI 0xFFFFFF00 5926 #define S_00A004_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 8) 5927 #define G_00A004_MIN_LOD(x) (((x) >> 8) & 0xFFF) 5928 #define C_00A004_MIN_LOD 0xFFF000FF 5929 #define S_00A004_FORMAT(x) (((unsigned)(x) & 0x1FF) << 20) 5930 #define G_00A004_FORMAT(x) (((x) >> 20) & 0x1FF) 5931 #define C_00A004_FORMAT 0xE00FFFFF 5932 #define V_00A004_GFX10_FORMAT_INVALID 0 5933 #define V_00A004_GFX10_FORMAT_8_UNORM 1 5934 #define V_00A004_GFX10_FORMAT_8_SNORM 2 5935 #define V_00A004_GFX10_FORMAT_8_USCALED 3 5936 #define V_00A004_GFX10_FORMAT_8_SSCALED 4 5937 #define V_00A004_GFX10_FORMAT_8_UINT 5 5938 #define V_00A004_GFX10_FORMAT_8_SINT 6 5939 #define V_00A004_GFX10_FORMAT_16_UNORM 7 5940 #define V_00A004_GFX10_FORMAT_16_SNORM 8 5941 #define V_00A004_GFX10_FORMAT_16_USCALED 9 5942 #define V_00A004_GFX10_FORMAT_16_SSCALED 10 5943 #define V_00A004_GFX10_FORMAT_16_UINT 11 5944 #define V_00A004_GFX10_FORMAT_16_SINT 12 5945 #define V_00A004_GFX10_FORMAT_16_FLOAT 13 5946 #define V_00A004_GFX10_FORMAT_8_8_UNORM 14 5947 #define V_00A004_GFX10_FORMAT_8_8_SNORM 15 5948 #define V_00A004_GFX10_FORMAT_8_8_USCALED 16 5949 #define V_00A004_GFX10_FORMAT_8_8_SSCALED 17 5950 #define V_00A004_GFX10_FORMAT_8_8_UINT 18 5951 #define V_00A004_GFX10_FORMAT_8_8_SINT 19 5952 #define V_00A004_GFX10_FORMAT_32_UINT 20 5953 #define V_00A004_GFX10_FORMAT_32_SINT 21 5954 #define V_00A004_GFX10_FORMAT_32_FLOAT 22 5955 #define V_00A004_GFX10_FORMAT_16_16_UNORM 23 5956 #define V_00A004_GFX10_FORMAT_16_16_SNORM 24 5957 #define V_00A004_GFX10_FORMAT_16_16_USCALED 25 5958 #define V_00A004_GFX10_FORMAT_16_16_SSCALED 26 5959 #define V_00A004_GFX10_FORMAT_16_16_UINT 27 5960 #define V_00A004_GFX10_FORMAT_16_16_SINT 28 5961 #define V_00A004_GFX10_FORMAT_16_16_FLOAT 29 5962 #define V_00A004_GFX10_FORMAT_10_11_11_UNORM 30 5963 #define V_00A004_GFX10_FORMAT_10_11_11_SNORM 31 5964 #define V_00A004_GFX10_FORMAT_10_11_11_USCALED 32 5965 #define V_00A004_GFX10_FORMAT_10_11_11_SSCALED 33 5966 #define V_00A004_GFX10_FORMAT_10_11_11_UINT 34 5967 #define V_00A004_GFX10_FORMAT_10_11_11_SINT 35 5968 #define V_00A004_GFX10_FORMAT_10_11_11_FLOAT 36 5969 #define V_00A004_GFX10_FORMAT_11_11_10_UNORM 37 5970 #define V_00A004_GFX10_FORMAT_11_11_10_SNORM 38 5971 #define V_00A004_GFX10_FORMAT_11_11_10_USCALED 39 5972 #define V_00A004_GFX10_FORMAT_11_11_10_SSCALED 40 5973 #define V_00A004_GFX10_FORMAT_11_11_10_UINT 41 5974 #define V_00A004_GFX10_FORMAT_11_11_10_SINT 42 5975 #define V_00A004_GFX10_FORMAT_11_11_10_FLOAT 43 5976 #define V_00A004_GFX10_FORMAT_10_10_10_2_UNORM 44 5977 #define V_00A004_GFX10_FORMAT_10_10_10_2_SNORM 45 5978 #define V_00A004_GFX10_FORMAT_10_10_10_2_USCALED 46 5979 #define V_00A004_GFX10_FORMAT_10_10_10_2_SSCALED 47 5980 #define V_00A004_GFX10_FORMAT_10_10_10_2_UINT 48 5981 #define V_00A004_GFX10_FORMAT_10_10_10_2_SINT 49 5982 #define V_00A004_GFX10_FORMAT_2_10_10_10_UNORM 50 5983 #define V_00A004_GFX10_FORMAT_2_10_10_10_SNORM 51 5984 #define V_00A004_GFX10_FORMAT_2_10_10_10_USCALED 52 5985 #define V_00A004_GFX10_FORMAT_2_10_10_10_SSCALED 53 5986 #define V_00A004_GFX10_FORMAT_2_10_10_10_UINT 54 5987 #define V_00A004_GFX10_FORMAT_2_10_10_10_SINT 55 5988 #define V_00A004_GFX10_FORMAT_8_8_8_8_UNORM 56 5989 #define V_00A004_GFX10_FORMAT_8_8_8_8_SNORM 57 5990 #define V_00A004_GFX10_FORMAT_8_8_8_8_USCALED 58 5991 #define V_00A004_GFX10_FORMAT_8_8_8_8_SSCALED 59 5992 #define V_00A004_GFX10_FORMAT_8_8_8_8_UINT 60 5993 #define V_00A004_GFX10_FORMAT_8_8_8_8_SINT 61 5994 #define V_00A004_GFX10_FORMAT_32_32_UINT 62 5995 #define V_00A004_GFX10_FORMAT_32_32_SINT 63 5996 #define V_00A004_GFX10_FORMAT_32_32_FLOAT 64 5997 #define V_00A004_GFX10_FORMAT_16_16_16_16_UNORM 65 5998 #define V_00A004_GFX10_FORMAT_16_16_16_16_SNORM 66 5999 #define V_00A004_GFX10_FORMAT_16_16_16_16_USCALED 67 6000 #define V_00A004_GFX10_FORMAT_16_16_16_16_SSCALED 68 6001 #define V_00A004_GFX10_FORMAT_16_16_16_16_UINT 69 6002 #define V_00A004_GFX10_FORMAT_16_16_16_16_SINT 70 6003 #define V_00A004_GFX10_FORMAT_16_16_16_16_FLOAT 71 6004 #define V_00A004_GFX10_FORMAT_32_32_32_UINT 72 6005 #define V_00A004_GFX10_FORMAT_32_32_32_SINT 73 6006 #define V_00A004_GFX10_FORMAT_32_32_32_FLOAT 74 6007 #define V_00A004_GFX10_FORMAT_32_32_32_32_UINT 75 6008 #define V_00A004_GFX10_FORMAT_32_32_32_32_SINT 76 6009 #define V_00A004_GFX10_FORMAT_32_32_32_32_FLOAT 77 6010 #define V_00A004_GFX10_FORMAT_8_SRGB 128 6011 #define V_00A004_GFX10_FORMAT_8_8_SRGB 129 6012 #define V_00A004_GFX10_FORMAT_8_8_8_8_SRGB 130 6013 #define V_00A004_GFX10_FORMAT_6E4_FLOAT 131 6014 #define V_00A004_GFX10_FORMAT_5_9_9_9_FLOAT 132 6015 #define V_00A004_GFX10_FORMAT_5_6_5_UNORM 133 6016 #define V_00A004_GFX10_FORMAT_1_5_5_5_UNORM 134 6017 #define V_00A004_GFX10_FORMAT_5_5_5_1_UNORM 135 6018 #define V_00A004_GFX10_FORMAT_4_4_4_4_UNORM 136 6019 #define V_00A004_GFX10_FORMAT_4_4_UNORM 137 6020 #define V_00A004_GFX10_FORMAT_1_UNORM 138 6021 #define V_00A004_GFX10_FORMAT_1_REVERSED_UNORM 139 6022 #define V_00A004_GFX10_FORMAT_32_FLOAT_CLAMP 140 6023 #define V_00A004_GFX10_FORMAT_8_24_UNORM 141 6024 #define V_00A004_GFX10_FORMAT_8_24_UINT 142 6025 #define V_00A004_GFX10_FORMAT_24_8_UNORM 143 6026 #define V_00A004_GFX10_FORMAT_24_8_UINT 144 6027 #define V_00A004_GFX10_FORMAT_X24_8_32_UINT 145 6028 #define V_00A004_GFX10_FORMAT_X24_8_32_FLOAT 146 6029 #define V_00A004_GFX10_FORMAT_GB_GR_UNORM 147 6030 #define V_00A004_GFX10_FORMAT_GB_GR_SNORM 148 6031 #define V_00A004_GFX10_FORMAT_GB_GR_UINT 149 6032 #define V_00A004_GFX10_FORMAT_GB_GR_SRGB 150 6033 #define V_00A004_GFX10_FORMAT_BG_RG_UNORM 151 6034 #define V_00A004_GFX10_FORMAT_BG_RG_SNORM 152 6035 #define V_00A004_GFX10_FORMAT_BG_RG_UINT 153 6036 #define V_00A004_GFX10_FORMAT_BG_RG_SRGB 154 6037 #define V_00A004_GFX10_FORMAT_FMASK8_S2_F1 156 6038 #define V_00A004_GFX10_FORMAT_FMASK8_S4_F1 157 6039 #define V_00A004_GFX10_FORMAT_FMASK8_S8_F1 158 6040 #define V_00A004_GFX10_FORMAT_FMASK8_S2_F2 159 6041 #define V_00A004_GFX10_FORMAT_FMASK8_S4_F2 160 6042 #define V_00A004_GFX10_FORMAT_FMASK8_S4_F4 161 6043 #define V_00A004_GFX10_FORMAT_FMASK16_S16_F1 162 6044 #define V_00A004_GFX10_FORMAT_FMASK16_S8_F2 163 6045 #define V_00A004_GFX10_FORMAT_FMASK32_S16_F2 164 6046 #define V_00A004_GFX10_FORMAT_FMASK32_S8_F4 165 6047 #define V_00A004_GFX10_FORMAT_FMASK32_S8_F8 166 6048 #define V_00A004_GFX10_FORMAT_FMASK64_S16_F4 167 6049 #define V_00A004_GFX10_FORMAT_FMASK64_S16_F8 168 6050 #define V_00A004_GFX10_FORMAT_BC1_UNORM 169 6051 #define V_00A004_GFX10_FORMAT_BC1_SRGB 170 6052 #define V_00A004_GFX10_FORMAT_BC2_UNORM 171 6053 #define V_00A004_GFX10_FORMAT_BC2_SRGB 172 6054 #define V_00A004_GFX10_FORMAT_BC3_UNORM 173 6055 #define V_00A004_GFX10_FORMAT_BC3_SRGB 174 6056 #define V_00A004_GFX10_FORMAT_BC4_UNORM 175 6057 #define V_00A004_GFX10_FORMAT_BC4_SNORM 176 6058 #define V_00A004_GFX10_FORMAT_BC5_UNORM 177 6059 #define V_00A004_GFX10_FORMAT_BC5_SNORM 178 6060 #define V_00A004_GFX10_FORMAT_BC6_UFLOAT 179 6061 #define V_00A004_GFX10_FORMAT_BC6_SFLOAT 180 6062 #define V_00A004_GFX10_FORMAT_BC7_UNORM 181 6063 #define V_00A004_GFX10_FORMAT_BC7_SRGB 182 6064 #define V_00A004_GFX10_FORMAT_MM_8_UNORM 265 6065 #define V_00A004_GFX10_FORMAT_MM_8_UINT 266 6066 #define V_00A004_GFX10_FORMAT_MM_8_8_UNORM 267 6067 #define V_00A004_GFX10_FORMAT_MM_8_8_UINT 268 6068 #define V_00A004_GFX10_FORMAT_MM_8_8_8_8_UNORM 269 6069 #define V_00A004_GFX10_FORMAT_MM_8_8_8_8_UINT 270 6070 #define V_00A004_GFX10_FORMAT_MM_VYUY8_UNORM 271 6071 #define V_00A004_GFX10_FORMAT_MM_VYUY8_UINT 272 6072 #define V_00A004_GFX10_FORMAT_MM_10_11_11_UNORM 273 6073 #define V_00A004_GFX10_FORMAT_MM_10_11_11_UINT 274 6074 #define V_00A004_GFX10_FORMAT_MM_2_10_10_10_UNORM 275 6075 #define V_00A004_GFX10_FORMAT_MM_2_10_10_10_UINT 276 6076 #define V_00A004_GFX10_FORMAT_MM_16_16_16_16_UNORM 277 6077 #define V_00A004_GFX10_FORMAT_MM_16_16_16_16_UINT 278 6078 #define V_00A004_GFX10_FORMAT_MM_10_IN_16_UNORM 279 6079 #define V_00A004_GFX10_FORMAT_MM_10_IN_16_UINT 280 6080 #define V_00A004_GFX10_FORMAT_MM_10_IN_16_16_UNORM 281 6081 #define V_00A004_GFX10_FORMAT_MM_10_IN_16_16_UINT 282 6082 #define V_00A004_GFX10_FORMAT_MM_10_IN_16_16_16_16_UNORM 283 6083 #define V_00A004_GFX10_FORMAT_MM_10_IN_16_16_16_16_UINT 284 6084 #define V_00A004_GFX10_FORMAT_7E3_FLOAT 285 6085 #define V_00A004_GFX10_FORMAT_YCBCR_UNORM 286 6086 #define V_00A004_GFX10_FORMAT_YCBCR_SNORM 287 6087 #define V_00A004_GFX10_FORMAT_YCBCR_USCALED 288 6088 #define V_00A004_GFX10_FORMAT_YCBCR_SSCALED 289 6089 #define V_00A004_GFX10_FORMAT_YCBCR_UINT 290 6090 #define V_00A004_GFX10_FORMAT_YCBCR_SINT 291 6091 #define V_00A004_GFX10_FORMAT_YCBCR_SRGB 292 6092 #define S_00A004_WIDTH_LO(x) (((unsigned)(x) & 0x3) << 30) 6093 #define G_00A004_WIDTH_LO(x) (((x) >> 30) & 0x3) 6094 #define C_00A004_WIDTH_LO 0x3FFFFFFF 6095 #define R_00A008_SQ_IMG_RSRC_WORD2 0x00A008 /* >= gfx10 */ 6096 #define S_00A008_WIDTH_HI(x) (((unsigned)(x) & 0xFFF) << 0) 6097 #define G_00A008_WIDTH_HI(x) (((x) >> 0) & 0xFFF) 6098 #define C_00A008_WIDTH_HI 0xFFFFF000 6099 #define S_00A008_HEIGHT(x) (((unsigned)(x) & 0x3FFF) << 14) 6100 #define G_00A008_HEIGHT(x) (((x) >> 14) & 0x3FFF) 6101 #define C_00A008_HEIGHT 0xF0003FFF 6102 #define S_00A008_RESOURCE_LEVEL(x) (((unsigned)(x) & 0x1) << 31) 6103 #define G_00A008_RESOURCE_LEVEL(x) (((x) >> 31) & 0x1) 6104 #define C_00A008_RESOURCE_LEVEL 0x7FFFFFFF 6105 #define R_00A00C_SQ_IMG_RSRC_WORD3 0x00A00C /* >= gfx10 */ 6106 #define S_00A00C_DST_SEL_X(x) (((unsigned)(x) & 0x7) << 0) 6107 #define G_00A00C_DST_SEL_X(x) (((x) >> 0) & 0x7) 6108 #define C_00A00C_DST_SEL_X 0xFFFFFFF8 6109 #define S_00A00C_DST_SEL_Y(x) (((unsigned)(x) & 0x7) << 3) 6110 #define G_00A00C_DST_SEL_Y(x) (((x) >> 3) & 0x7) 6111 #define C_00A00C_DST_SEL_Y 0xFFFFFFC7 6112 #define S_00A00C_DST_SEL_Z(x) (((unsigned)(x) & 0x7) << 6) 6113 #define G_00A00C_DST_SEL_Z(x) (((x) >> 6) & 0x7) 6114 #define C_00A00C_DST_SEL_Z 0xFFFFFE3F 6115 #define S_00A00C_DST_SEL_W(x) (((unsigned)(x) & 0x7) << 9) 6116 #define G_00A00C_DST_SEL_W(x) (((x) >> 9) & 0x7) 6117 #define C_00A00C_DST_SEL_W 0xFFFFF1FF 6118 #define S_00A00C_BASE_LEVEL(x) (((unsigned)(x) & 0xF) << 12) 6119 #define G_00A00C_BASE_LEVEL(x) (((x) >> 12) & 0xF) 6120 #define C_00A00C_BASE_LEVEL 0xFFFF0FFF 6121 #define S_00A00C_LAST_LEVEL(x) (((unsigned)(x) & 0xF) << 16) 6122 #define G_00A00C_LAST_LEVEL(x) (((x) >> 16) & 0xF) 6123 #define C_00A00C_LAST_LEVEL 0xFFF0FFFF 6124 #define S_00A00C_SW_MODE(x) (((unsigned)(x) & 0x1F) << 20) 6125 #define G_00A00C_SW_MODE(x) (((x) >> 20) & 0x1F) 6126 #define C_00A00C_SW_MODE 0xFE0FFFFF 6127 #define S_00A00C_BC_SWIZZLE(x) (((unsigned)(x) & 0x7) << 25) 6128 #define G_00A00C_BC_SWIZZLE(x) (((x) >> 25) & 0x7) 6129 #define C_00A00C_BC_SWIZZLE 0xF1FFFFFF 6130 #define V_00A00C_BC_SWIZZLE_XYZW 0 6131 #define V_00A00C_BC_SWIZZLE_XWYZ 1 6132 #define V_00A00C_BC_SWIZZLE_WZYX 2 6133 #define V_00A00C_BC_SWIZZLE_WXYZ 3 6134 #define V_00A00C_BC_SWIZZLE_ZYXW 4 6135 #define V_00A00C_BC_SWIZZLE_YXWZ 5 6136 #define S_00A00C_TYPE(x) (((unsigned)(x) & 0xF) << 28) 6137 #define G_00A00C_TYPE(x) (((x) >> 28) & 0xF) 6138 #define C_00A00C_TYPE 0x0FFFFFFF 6139 #define R_00A010_SQ_IMG_RSRC_WORD4 0x00A010 /* >= gfx10 */ 6140 #define S_00A010_DEPTH(x) (((unsigned)(x) & 0x1FFF) << 0) 6141 #define G_00A010_DEPTH(x) (((x) >> 0) & 0x1FFF) 6142 #define C_00A010_DEPTH 0xFFFFE000 6143 #define S_00A010_PITCH(x) (((unsigned)(x) & 0x3FFF) << 0) /* >= gfx103 */ 6144 #define G_00A010_PITCH(x) (((x) >> 0) & 0x3FFF) 6145 #define C_00A010_PITCH 0xFFFFC000 6146 #define S_00A010_BASE_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 16) 6147 #define G_00A010_BASE_ARRAY(x) (((x) >> 16) & 0x1FFF) 6148 #define C_00A010_BASE_ARRAY 0xE000FFFF 6149 #define R_00A014_SQ_IMG_RSRC_WORD5 0x00A014 /* >= gfx10 */ 6150 #define S_00A014_ARRAY_PITCH(x) (((unsigned)(x) & 0xF) << 0) 6151 #define G_00A014_ARRAY_PITCH(x) (((x) >> 0) & 0xF) 6152 #define C_00A014_ARRAY_PITCH 0xFFFFFFF0 6153 #define S_00A014_MAX_MIP(x) (((unsigned)(x) & 0xF) << 4) 6154 #define G_00A014_MAX_MIP(x) (((x) >> 4) & 0xF) 6155 #define C_00A014_MAX_MIP 0xFFFFFF0F 6156 #define S_00A014_MIN_LOD_WARN(x) (((unsigned)(x) & 0xFFF) << 8) 6157 #define G_00A014_MIN_LOD_WARN(x) (((x) >> 8) & 0xFFF) 6158 #define C_00A014_MIN_LOD_WARN 0xFFF000FF 6159 #define S_00A014_PERF_MOD(x) (((unsigned)(x) & 0x7) << 20) 6160 #define G_00A014_PERF_MOD(x) (((x) >> 20) & 0x7) 6161 #define C_00A014_PERF_MOD 0xFF8FFFFF 6162 #define S_00A014_CORNER_SAMPLES(x) (((unsigned)(x) & 0x1) << 23) 6163 #define G_00A014_CORNER_SAMPLES(x) (((x) >> 23) & 0x1) 6164 #define C_00A014_CORNER_SAMPLES 0xFF7FFFFF 6165 #define S_00A014_LOD_HDW_CNT_EN(x) (((unsigned)(x) & 0x1) << 25) 6166 #define G_00A014_LOD_HDW_CNT_EN(x) (((x) >> 25) & 0x1) 6167 #define C_00A014_LOD_HDW_CNT_EN 0xFDFFFFFF 6168 #define S_00A014_PRT_DEFAULT(x) (((unsigned)(x) & 0x1) << 26) 6169 #define G_00A014_PRT_DEFAULT(x) (((x) >> 26) & 0x1) 6170 #define C_00A014_PRT_DEFAULT 0xFBFFFFFF 6171 #define S_00A014_BIG_PAGE(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx103 */ 6172 #define G_00A014_BIG_PAGE(x) (((x) >> 31) & 0x1) 6173 #define C_00A014_BIG_PAGE 0x7FFFFFFF 6174 #define R_00A018_SQ_IMG_RSRC_WORD6 0x00A018 /* >= gfx10 */ 6175 #define S_00A018_COUNTER_BANK_ID(x) (((unsigned)(x) & 0xFF) << 0) 6176 #define G_00A018_COUNTER_BANK_ID(x) (((x) >> 0) & 0xFF) 6177 #define C_00A018_COUNTER_BANK_ID 0xFFFFFF00 6178 #define S_00A018_LLC_NOALLOC(x) (((unsigned)(x) & 0x3) << 8) /* >= gfx103 */ 6179 #define G_00A018_LLC_NOALLOC(x) (((x) >> 8) & 0x3) 6180 #define C_00A018_LLC_NOALLOC 0xFFFFFCFF 6181 #define S_00A018_ITERATE_256(x) (((unsigned)(x) & 0x1) << 10) 6182 #define G_00A018_ITERATE_256(x) (((x) >> 10) & 0x1) 6183 #define C_00A018_ITERATE_256 0xFFFFFBFF 6184 #define S_00A018_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x3) << 15) 6185 #define G_00A018_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 15) & 0x3) 6186 #define C_00A018_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFE7FFF 6187 #define S_00A018_MAX_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x3) << 17) 6188 #define G_00A018_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 17) & 0x3) 6189 #define C_00A018_MAX_COMPRESSED_BLOCK_SIZE 0xFFF9FFFF 6190 #define S_00A018_META_PIPE_ALIGNED(x) (((unsigned)(x) & 0x1) << 19) 6191 #define G_00A018_META_PIPE_ALIGNED(x) (((x) >> 19) & 0x1) 6192 #define C_00A018_META_PIPE_ALIGNED 0xFFF7FFFF 6193 #define S_00A018_WRITE_COMPRESS_ENABLE(x) (((unsigned)(x) & 0x1) << 20) 6194 #define G_00A018_WRITE_COMPRESS_ENABLE(x) (((x) >> 20) & 0x1) 6195 #define C_00A018_WRITE_COMPRESS_ENABLE 0xFFEFFFFF 6196 #define S_00A018_COMPRESSION_EN(x) (((unsigned)(x) & 0x1) << 21) 6197 #define G_00A018_COMPRESSION_EN(x) (((x) >> 21) & 0x1) 6198 #define C_00A018_COMPRESSION_EN 0xFFDFFFFF 6199 #define S_00A018_ALPHA_IS_ON_MSB(x) (((unsigned)(x) & 0x1) << 22) 6200 #define G_00A018_ALPHA_IS_ON_MSB(x) (((x) >> 22) & 0x1) 6201 #define C_00A018_ALPHA_IS_ON_MSB 0xFFBFFFFF 6202 #define S_00A018_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x1) << 23) 6203 #define G_00A018_COLOR_TRANSFORM(x) (((x) >> 23) & 0x1) 6204 #define C_00A018_COLOR_TRANSFORM 0xFF7FFFFF 6205 #define S_00A018_META_DATA_ADDRESS_LO(x) (((unsigned)(x) & 0xFF) << 24) 6206 #define G_00A018_META_DATA_ADDRESS_LO(x) (((x) >> 24) & 0xFF) 6207 #define C_00A018_META_DATA_ADDRESS_LO 0x00FFFFFF 6208 #define R_00A01C_SQ_IMG_RSRC_WORD7 0x00A01C /* >= gfx10 */ 6209 #define R_00B000_SPI_SHADER_TBA_LO_PS 0x00B000 /* <= gfx81 */ 6210 #define R_00B004_SPI_SHADER_PGM_RSRC4_PS 0x00B004 /* >= gfx10 */ 6211 #define S_00B004_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 6212 #define G_00B004_CU_EN(x) (((x) >> 0) & 0xFFFF) 6213 #define C_00B004_CU_EN 0xFFFF0000 6214 #define R_00B004_SPI_SHADER_TBA_HI_PS 0x00B004 /* <= gfx81 */ 6215 #define S_00B004_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6216 #define G_00B004_MEM_BASE(x) (((x) >> 0) & 0xFF) 6217 #define C_00B004_MEM_BASE 0xFFFFFF00 6218 #define R_00B008_SPI_SHADER_TMA_LO_PS 0x00B008 /* <= gfx81 */ 6219 #define R_00B00C_SPI_SHADER_TMA_HI_PS 0x00B00C /* <= gfx81 */ 6220 #define S_00B00C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6221 #define G_00B00C_MEM_BASE(x) (((x) >> 0) & 0xFF) 6222 #define C_00B00C_MEM_BASE 0xFFFFFF00 6223 #define R_00B018_SPI_SHADER_PGM_CHKSUM_PS 0x00B018 /* >= gfx10 */ 6224 #define R_00B01C_SPI_SHADER_PGM_RSRC3_PS 0x00B01C /* >= gfx7 */ 6225 #define S_00B01C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 6226 #define G_00B01C_CU_EN(x) (((x) >> 0) & 0xFFFF) 6227 #define C_00B01C_CU_EN 0xFFFF0000 6228 #define S_00B01C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 6229 #define G_00B01C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 6230 #define C_00B01C_WAVE_LIMIT 0xFFC0FFFF 6231 #define S_00B01C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0xF) << 22) 6232 #define G_00B01C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0xF) 6233 #define C_00B01C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 6234 #define S_00B01C_SIMD_DISABLE(x) (((unsigned)(x) & 0xF) << 26) /* gfx9 */ 6235 #define G_00B01C_SIMD_DISABLE(x) (((x) >> 26) & 0xF) 6236 #define C_00B01C_SIMD_DISABLE 0xC3FFFFFF 6237 #define R_00B020_SPI_SHADER_PGM_LO_PS 0x00B020 6238 #define R_00B024_SPI_SHADER_PGM_HI_PS 0x00B024 6239 #define S_00B024_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6240 #define G_00B024_MEM_BASE(x) (((x) >> 0) & 0xFF) 6241 #define C_00B024_MEM_BASE 0xFFFFFF00 6242 #define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028 6243 #define S_00B028_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 6244 #define G_00B028_VGPRS(x) (((x) >> 0) & 0x3F) 6245 #define C_00B028_VGPRS 0xFFFFFFC0 6246 #define S_00B028_SGPRS(x) (((unsigned)(x) & 0xF) << 6) 6247 #define G_00B028_SGPRS(x) (((x) >> 6) & 0xF) 6248 #define C_00B028_SGPRS 0xFFFFFC3F 6249 #define S_00B028_PRIORITY(x) (((unsigned)(x) & 0x3) << 10) 6250 #define G_00B028_PRIORITY(x) (((x) >> 10) & 0x3) 6251 #define C_00B028_PRIORITY 0xFFFFF3FF 6252 #define S_00B028_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 6253 #define G_00B028_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 6254 #define C_00B028_FLOAT_MODE 0xFFF00FFF 6255 #define V_00B028_FP_32_DENORMS 48 6256 #define V_00B028_FP_64_DENORMS 192 6257 #define V_00B028_FP_ALL_DENORMS 240 6258 #define S_00B028_PRIV(x) (((unsigned)(x) & 0x1) << 20) 6259 #define G_00B028_PRIV(x) (((x) >> 20) & 0x1) 6260 #define C_00B028_PRIV 0xFFEFFFFF 6261 #define S_00B028_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 6262 #define G_00B028_DX10_CLAMP(x) (((x) >> 21) & 0x1) 6263 #define C_00B028_DX10_CLAMP 0xFFDFFFFF 6264 #define S_00B028_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) /* <= gfx9 */ 6265 #define G_00B028_DEBUG_MODE(x) (((x) >> 22) & 0x1) 6266 #define C_00B028_DEBUG_MODE 0xFFBFFFFF 6267 #define S_00B028_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 6268 #define G_00B028_IEEE_MODE(x) (((x) >> 23) & 0x1) 6269 #define C_00B028_IEEE_MODE 0xFF7FFFFF 6270 #define S_00B028_CU_GROUP_DISABLE(x) (((unsigned)(x) & 0x1) << 24) 6271 #define G_00B028_CU_GROUP_DISABLE(x) (((x) >> 24) & 0x1) 6272 #define C_00B028_CU_GROUP_DISABLE 0xFEFFFFFF 6273 #define S_00B028_CACHE_CTL(x) (((unsigned)(x) & 0x7) << 25) /* <= gfx81 */ 6274 #define G_00B028_CACHE_CTL(x) (((x) >> 25) & 0x7) 6275 #define C_00B028_CACHE_CTL 0xF1FFFFFF 6276 #define S_00B028_MEM_ORDERED(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx10 */ 6277 #define G_00B028_MEM_ORDERED(x) (((x) >> 25) & 0x1) 6278 #define C_00B028_MEM_ORDERED 0xFDFFFFFF 6279 #define S_00B028_FWD_PROGRESS(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx10 */ 6280 #define G_00B028_FWD_PROGRESS(x) (((x) >> 26) & 0x1) 6281 #define C_00B028_FWD_PROGRESS 0xFBFFFFFF 6282 #define S_00B028_LOAD_PROVOKING_VTX(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx103 */ 6283 #define G_00B028_LOAD_PROVOKING_VTX(x) (((x) >> 27) & 0x1) 6284 #define C_00B028_LOAD_PROVOKING_VTX 0xF7FFFFFF 6285 #define S_00B028_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) /* <= gfx9 */ 6286 #define G_00B028_CDBG_USER(x) (((x) >> 28) & 0x1) 6287 #define C_00B028_CDBG_USER 0xEFFFFFFF 6288 #define S_00B028_FP16_OVFL(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx9 */ 6289 #define G_00B028_FP16_OVFL(x) (((x) >> 29) & 0x1) 6290 #define C_00B028_FP16_OVFL 0xDFFFFFFF 6291 #define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C 6292 #define S_00B02C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 6293 #define G_00B02C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 6294 #define C_00B02C_SCRATCH_EN 0xFFFFFFFE 6295 #define S_00B02C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 6296 #define G_00B02C_USER_SGPR(x) (((x) >> 1) & 0x1F) 6297 #define C_00B02C_USER_SGPR 0xFFFFFFC1 6298 #define S_00B02C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 6299 #define G_00B02C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 6300 #define C_00B02C_TRAP_PRESENT 0xFFFFFFBF 6301 #define S_00B02C_WAVE_CNT_EN(x) (((unsigned)(x) & 0x1) << 7) 6302 #define G_00B02C_WAVE_CNT_EN(x) (((x) >> 7) & 0x1) 6303 #define C_00B02C_WAVE_CNT_EN 0xFFFFFF7F 6304 #define S_00B02C_EXTRA_LDS_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 6305 #define G_00B02C_EXTRA_LDS_SIZE(x) (((x) >> 8) & 0xFF) 6306 #define C_00B02C_EXTRA_LDS_SIZE 0xFFFF00FF 6307 #define S_00B02C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 16) 6308 #define G_00B02C_EXCP_EN(x) (((x) >> 16) & 0x1FF) 6309 #define C_00B02C_EXCP_EN 0xFE00FFFF 6310 #define V_00B02C_INVALID 1 6311 #define V_00B02C_INPUT_DENORMAL 2 6312 #define V_00B02C_DIVIDE_BY_ZERO 4 6313 #define V_00B02C_OVERFLOW 8 6314 #define V_00B02C_UNDERFLOW 16 6315 #define V_00B02C_INEXACT 32 6316 #define V_00B02C_INT_DIVIDE_BY_ZERO 64 6317 #define V_00B02C_ADDRESS_WATCH 128 6318 #define V_00B02C_MEMORY_VIOLATION 256 6319 #define S_00B02C_LOAD_COLLISION_WAVEID(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx9 */ 6320 #define G_00B02C_LOAD_COLLISION_WAVEID(x) (((x) >> 25) & 0x1) 6321 #define C_00B02C_LOAD_COLLISION_WAVEID 0xFDFFFFFF 6322 #define S_00B02C_LOAD_INTRAWAVE_COLLISION(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx9 */ 6323 #define G_00B02C_LOAD_INTRAWAVE_COLLISION(x) (((x) >> 26) & 0x1) 6324 #define C_00B02C_LOAD_INTRAWAVE_COLLISION 0xFBFFFFFF 6325 #define S_00B02C_SKIP_USGPR0(x) (((unsigned)(x) & 0x1) << 27) /* gfx9 */ 6326 #define G_00B02C_SKIP_USGPR0(x) (((x) >> 27) & 0x1) 6327 #define C_00B02C_SKIP_USGPR0 0xF7FFFFFF 6328 #define S_00B02C_USER_SGPR_MSB_GFX10(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 6329 #define G_00B02C_USER_SGPR_MSB_GFX10(x) (((x) >> 27) & 0x1) 6330 #define C_00B02C_USER_SGPR_MSB_GFX10 0xF7FFFFFF 6331 #define S_00B02C_SHARED_VGPR_CNT(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx10 */ 6332 #define G_00B02C_SHARED_VGPR_CNT(x) (((x) >> 28) & 0xF) 6333 #define C_00B02C_SHARED_VGPR_CNT 0x0FFFFFFF 6334 #define S_00B02C_USER_SGPR_MSB_GFX9(x) (((unsigned)(x) & 0x1) << 28) /* gfx9 */ 6335 #define G_00B02C_USER_SGPR_MSB_GFX9(x) (((x) >> 28) & 0x1) 6336 #define C_00B02C_USER_SGPR_MSB_GFX9 0xEFFFFFFF 6337 #define R_00B030_SPI_SHADER_USER_DATA_PS_0 0x00B030 6338 #define R_00B034_SPI_SHADER_USER_DATA_PS_1 0x00B034 6339 #define R_00B038_SPI_SHADER_USER_DATA_PS_2 0x00B038 6340 #define R_00B03C_SPI_SHADER_USER_DATA_PS_3 0x00B03C 6341 #define R_00B040_SPI_SHADER_USER_DATA_PS_4 0x00B040 6342 #define R_00B044_SPI_SHADER_USER_DATA_PS_5 0x00B044 6343 #define R_00B048_SPI_SHADER_USER_DATA_PS_6 0x00B048 6344 #define R_00B04C_SPI_SHADER_USER_DATA_PS_7 0x00B04C 6345 #define R_00B050_SPI_SHADER_USER_DATA_PS_8 0x00B050 6346 #define R_00B054_SPI_SHADER_USER_DATA_PS_9 0x00B054 6347 #define R_00B058_SPI_SHADER_USER_DATA_PS_10 0x00B058 6348 #define R_00B05C_SPI_SHADER_USER_DATA_PS_11 0x00B05C 6349 #define R_00B060_SPI_SHADER_USER_DATA_PS_12 0x00B060 6350 #define R_00B064_SPI_SHADER_USER_DATA_PS_13 0x00B064 6351 #define R_00B068_SPI_SHADER_USER_DATA_PS_14 0x00B068 6352 #define R_00B06C_SPI_SHADER_USER_DATA_PS_15 0x00B06C 6353 #define R_00B070_SPI_SHADER_USER_DATA_PS_16 0x00B070 /* >= gfx9 */ 6354 #define R_00B074_SPI_SHADER_USER_DATA_PS_17 0x00B074 /* >= gfx9 */ 6355 #define R_00B078_SPI_SHADER_USER_DATA_PS_18 0x00B078 /* >= gfx9 */ 6356 #define R_00B07C_SPI_SHADER_USER_DATA_PS_19 0x00B07C /* >= gfx9 */ 6357 #define R_00B080_SPI_SHADER_USER_DATA_PS_20 0x00B080 /* >= gfx9 */ 6358 #define R_00B084_SPI_SHADER_USER_DATA_PS_21 0x00B084 /* >= gfx9 */ 6359 #define R_00B088_SPI_SHADER_USER_DATA_PS_22 0x00B088 /* >= gfx9 */ 6360 #define R_00B08C_SPI_SHADER_USER_DATA_PS_23 0x00B08C /* >= gfx9 */ 6361 #define R_00B090_SPI_SHADER_USER_DATA_PS_24 0x00B090 /* >= gfx9 */ 6362 #define R_00B094_SPI_SHADER_USER_DATA_PS_25 0x00B094 /* >= gfx9 */ 6363 #define R_00B098_SPI_SHADER_USER_DATA_PS_26 0x00B098 /* >= gfx9 */ 6364 #define R_00B09C_SPI_SHADER_USER_DATA_PS_27 0x00B09C /* >= gfx9 */ 6365 #define R_00B0A0_SPI_SHADER_USER_DATA_PS_28 0x00B0A0 /* >= gfx9 */ 6366 #define R_00B0A4_SPI_SHADER_USER_DATA_PS_29 0x00B0A4 /* >= gfx9 */ 6367 #define R_00B0A8_SPI_SHADER_USER_DATA_PS_30 0x00B0A8 /* >= gfx9 */ 6368 #define R_00B0AC_SPI_SHADER_USER_DATA_PS_31 0x00B0AC /* >= gfx9 */ 6369 #define R_00B0C0_SPI_SHADER_REQ_CTRL_PS 0x00B0C0 /* >= gfx10 */ 6370 #define S_00B0C0_SOFT_GROUPING_EN(x) (((unsigned)(x) & 0x1) << 0) 6371 #define G_00B0C0_SOFT_GROUPING_EN(x) (((x) >> 0) & 0x1) 6372 #define C_00B0C0_SOFT_GROUPING_EN 0xFFFFFFFE 6373 #define S_00B0C0_NUMBER_OF_REQUESTS_PER_CU(x) (((unsigned)(x) & 0xF) << 1) 6374 #define G_00B0C0_NUMBER_OF_REQUESTS_PER_CU(x) (((x) >> 1) & 0xF) 6375 #define C_00B0C0_NUMBER_OF_REQUESTS_PER_CU 0xFFFFFFE1 6376 #define S_00B0C0_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((unsigned)(x) & 0xF) << 5) 6377 #define G_00B0C0_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((x) >> 5) & 0xF) 6378 #define C_00B0C0_SOFT_GROUPING_ALLOCATION_TIMEOUT 0xFFFFFE1F 6379 #define S_00B0C0_HARD_LOCK_HYSTERESIS(x) (((unsigned)(x) & 0x1) << 9) 6380 #define G_00B0C0_HARD_LOCK_HYSTERESIS(x) (((x) >> 9) & 0x1) 6381 #define C_00B0C0_HARD_LOCK_HYSTERESIS 0xFFFFFDFF 6382 #define S_00B0C0_HARD_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x1F) << 10) 6383 #define G_00B0C0_HARD_LOCK_LOW_THRESHOLD(x) (((x) >> 10) & 0x1F) 6384 #define C_00B0C0_HARD_LOCK_LOW_THRESHOLD 0xFFFF83FF 6385 #define S_00B0C0_PRODUCER_REQUEST_LOCKOUT(x) (((unsigned)(x) & 0x1) << 15) 6386 #define G_00B0C0_PRODUCER_REQUEST_LOCKOUT(x) (((x) >> 15) & 0x1) 6387 #define C_00B0C0_PRODUCER_REQUEST_LOCKOUT 0xFFFF7FFF 6388 #define S_00B0C0_GLOBAL_SCANNING_EN(x) (((unsigned)(x) & 0x1) << 16) 6389 #define G_00B0C0_GLOBAL_SCANNING_EN(x) (((x) >> 16) & 0x1) 6390 #define C_00B0C0_GLOBAL_SCANNING_EN 0xFFFEFFFF 6391 #define S_00B0C0_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((unsigned)(x) & 0x7) << 17) 6392 #define G_00B0C0_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((x) >> 17) & 0x7) 6393 #define C_00B0C0_ALLOCATION_RATE_THROTTLING_THRESHOLD 0xFFF1FFFF 6394 #define R_00B0C4_SPI_SHADER_PREF_PRI_CNTR_CTRL_PS 0x00B0C4 /* gfx10 */ 6395 #define S_00B0C4_TOTAL_WAVE_COUNT_HIER_SELECT(x) (((unsigned)(x) & 0x7) << 0) 6396 #define G_00B0C4_TOTAL_WAVE_COUNT_HIER_SELECT(x) (((x) >> 0) & 0x7) 6397 #define C_00B0C4_TOTAL_WAVE_COUNT_HIER_SELECT 0xFFFFFFF8 6398 #define S_00B0C4_PER_TYPE_WAVE_COUNT_HIER_SELECT(x) (((unsigned)(x) & 0x7) << 3) 6399 #define G_00B0C4_PER_TYPE_WAVE_COUNT_HIER_SELECT(x) (((x) >> 3) & 0x7) 6400 #define C_00B0C4_PER_TYPE_WAVE_COUNT_HIER_SELECT 0xFFFFFFC7 6401 #define S_00B0C4_GROUP_UPDATE_EN(x) (((unsigned)(x) & 0x1) << 6) 6402 #define G_00B0C4_GROUP_UPDATE_EN(x) (((x) >> 6) & 0x1) 6403 #define C_00B0C4_GROUP_UPDATE_EN 0xFFFFFFBF 6404 #define S_00B0C4_TOTAL_WAVE_COUNT_COEFFICIENT(x) (((unsigned)(x) & 0xFF) << 8) 6405 #define G_00B0C4_TOTAL_WAVE_COUNT_COEFFICIENT(x) (((x) >> 8) & 0xFF) 6406 #define C_00B0C4_TOTAL_WAVE_COUNT_COEFFICIENT 0xFFFF00FF 6407 #define S_00B0C4_PER_TYPE_WAVE_COUNT_COEFFICIENT(x) (((unsigned)(x) & 0xFF) << 16) 6408 #define G_00B0C4_PER_TYPE_WAVE_COUNT_COEFFICIENT(x) (((x) >> 16) & 0xFF) 6409 #define C_00B0C4_PER_TYPE_WAVE_COUNT_COEFFICIENT 0xFF00FFFF 6410 #define R_00B0C8_SPI_SHADER_USER_ACCUM_PS_0 0x00B0C8 /* >= gfx10 */ 6411 #define S_00B0C8_CONTRIBUTION(x) (((unsigned)(x) & 0x7F) << 0) 6412 #define G_00B0C8_CONTRIBUTION(x) (((x) >> 0) & 0x7F) 6413 #define C_00B0C8_CONTRIBUTION 0xFFFFFF80 6414 #define R_00B0CC_SPI_SHADER_USER_ACCUM_PS_1 0x00B0CC /* >= gfx10 */ 6415 #define R_00B0D0_SPI_SHADER_USER_ACCUM_PS_2 0x00B0D0 /* >= gfx10 */ 6416 #define R_00B0D4_SPI_SHADER_USER_ACCUM_PS_3 0x00B0D4 /* >= gfx10 */ 6417 #define R_00B100_SPI_SHADER_TBA_LO_VS 0x00B100 /* <= gfx81 */ 6418 #define R_00B104_SPI_SHADER_PGM_RSRC4_VS 0x00B104 /* >= gfx10 */ 6419 #define S_00B104_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 6420 #define G_00B104_CU_EN(x) (((x) >> 0) & 0xFFFF) 6421 #define C_00B104_CU_EN 0xFFFF0000 6422 #define R_00B104_SPI_SHADER_TBA_HI_VS 0x00B104 /* <= gfx81 */ 6423 #define S_00B104_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6424 #define G_00B104_MEM_BASE(x) (((x) >> 0) & 0xFF) 6425 #define C_00B104_MEM_BASE 0xFFFFFF00 6426 #define R_00B108_SPI_SHADER_TMA_LO_VS 0x00B108 /* <= gfx81 */ 6427 #define R_00B10C_SPI_SHADER_TMA_HI_VS 0x00B10C /* <= gfx81 */ 6428 #define S_00B10C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6429 #define G_00B10C_MEM_BASE(x) (((x) >> 0) & 0xFF) 6430 #define C_00B10C_MEM_BASE 0xFFFFFF00 6431 #define R_00B114_SPI_SHADER_PGM_CHKSUM_VS 0x00B114 /* >= gfx10 */ 6432 #define R_00B118_SPI_SHADER_PGM_RSRC3_VS 0x00B118 /* >= gfx7 */ 6433 #define S_00B118_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 6434 #define G_00B118_CU_EN(x) (((x) >> 0) & 0xFFFF) 6435 #define C_00B118_CU_EN 0xFFFF0000 6436 #define S_00B118_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 6437 #define G_00B118_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 6438 #define C_00B118_WAVE_LIMIT 0xFFC0FFFF 6439 #define S_00B118_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0xF) << 22) 6440 #define G_00B118_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0xF) 6441 #define C_00B118_LOCK_LOW_THRESHOLD 0xFC3FFFFF 6442 #define S_00B118_SIMD_DISABLE(x) (((unsigned)(x) & 0xF) << 26) /* gfx9 */ 6443 #define G_00B118_SIMD_DISABLE(x) (((x) >> 26) & 0xF) 6444 #define C_00B118_SIMD_DISABLE 0xC3FFFFFF 6445 #define R_00B11C_SPI_SHADER_LATE_ALLOC_VS 0x00B11C /* >= gfx7 */ 6446 #define S_00B11C_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) 6447 #define G_00B11C_LIMIT(x) (((x) >> 0) & 0x3F) 6448 #define C_00B11C_LIMIT 0xFFFFFFC0 6449 #define R_00B120_SPI_SHADER_PGM_LO_VS 0x00B120 6450 #define R_00B124_SPI_SHADER_PGM_HI_VS 0x00B124 6451 #define S_00B124_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6452 #define G_00B124_MEM_BASE(x) (((x) >> 0) & 0xFF) 6453 #define C_00B124_MEM_BASE 0xFFFFFF00 6454 #define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128 6455 #define S_00B128_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 6456 #define G_00B128_VGPRS(x) (((x) >> 0) & 0x3F) 6457 #define C_00B128_VGPRS 0xFFFFFFC0 6458 #define S_00B128_SGPRS(x) (((unsigned)(x) & 0xF) << 6) 6459 #define G_00B128_SGPRS(x) (((x) >> 6) & 0xF) 6460 #define C_00B128_SGPRS 0xFFFFFC3F 6461 #define S_00B128_PRIORITY(x) (((unsigned)(x) & 0x3) << 10) 6462 #define G_00B128_PRIORITY(x) (((x) >> 10) & 0x3) 6463 #define C_00B128_PRIORITY 0xFFFFF3FF 6464 #define S_00B128_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 6465 #define G_00B128_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 6466 #define C_00B128_FLOAT_MODE 0xFFF00FFF 6467 #define V_00B128_FP_32_DENORMS 48 6468 #define V_00B128_FP_64_DENORMS 192 6469 #define V_00B128_FP_ALL_DENORMS 240 6470 #define S_00B128_PRIV(x) (((unsigned)(x) & 0x1) << 20) 6471 #define G_00B128_PRIV(x) (((x) >> 20) & 0x1) 6472 #define C_00B128_PRIV 0xFFEFFFFF 6473 #define S_00B128_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 6474 #define G_00B128_DX10_CLAMP(x) (((x) >> 21) & 0x1) 6475 #define C_00B128_DX10_CLAMP 0xFFDFFFFF 6476 #define S_00B128_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) /* <= gfx9 */ 6477 #define G_00B128_DEBUG_MODE(x) (((x) >> 22) & 0x1) 6478 #define C_00B128_DEBUG_MODE 0xFFBFFFFF 6479 #define S_00B128_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 6480 #define G_00B128_IEEE_MODE(x) (((x) >> 23) & 0x1) 6481 #define C_00B128_IEEE_MODE 0xFF7FFFFF 6482 #define S_00B128_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x3) << 24) 6483 #define G_00B128_VGPR_COMP_CNT(x) (((x) >> 24) & 0x3) 6484 #define C_00B128_VGPR_COMP_CNT 0xFCFFFFFF 6485 #define S_00B128_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 6486 #define G_00B128_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) 6487 #define C_00B128_CU_GROUP_ENABLE 0xFBFFFFFF 6488 #define S_00B128_CACHE_CTL(x) (((unsigned)(x) & 0x7) << 27) /* <= gfx81 */ 6489 #define G_00B128_CACHE_CTL(x) (((x) >> 27) & 0x7) 6490 #define C_00B128_CACHE_CTL 0xC7FFFFFF 6491 #define S_00B128_MEM_ORDERED(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 6492 #define G_00B128_MEM_ORDERED(x) (((x) >> 27) & 0x1) 6493 #define C_00B128_MEM_ORDERED 0xF7FFFFFF 6494 #define S_00B128_FWD_PROGRESS(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx10 */ 6495 #define G_00B128_FWD_PROGRESS(x) (((x) >> 28) & 0x1) 6496 #define C_00B128_FWD_PROGRESS 0xEFFFFFFF 6497 #define S_00B128_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) /* <= gfx9 */ 6498 #define G_00B128_CDBG_USER(x) (((x) >> 30) & 0x1) 6499 #define C_00B128_CDBG_USER 0xBFFFFFFF 6500 #define S_00B128_FP16_OVFL(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx9 */ 6501 #define G_00B128_FP16_OVFL(x) (((x) >> 31) & 0x1) 6502 #define C_00B128_FP16_OVFL 0x7FFFFFFF 6503 #define R_00B12C_SPI_SHADER_PGM_RSRC2_VS 0x00B12C 6504 #define S_00B12C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 6505 #define G_00B12C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 6506 #define C_00B12C_SCRATCH_EN 0xFFFFFFFE 6507 #define S_00B12C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 6508 #define G_00B12C_USER_SGPR(x) (((x) >> 1) & 0x1F) 6509 #define C_00B12C_USER_SGPR 0xFFFFFFC1 6510 #define S_00B12C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 6511 #define G_00B12C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 6512 #define C_00B12C_TRAP_PRESENT 0xFFFFFFBF 6513 #define S_00B12C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) 6514 #define G_00B12C_OC_LDS_EN(x) (((x) >> 7) & 0x1) 6515 #define C_00B12C_OC_LDS_EN 0xFFFFFF7F 6516 #define S_00B12C_SO_BASE0_EN(x) (((unsigned)(x) & 0x1) << 8) 6517 #define G_00B12C_SO_BASE0_EN(x) (((x) >> 8) & 0x1) 6518 #define C_00B12C_SO_BASE0_EN 0xFFFFFEFF 6519 #define S_00B12C_SO_BASE1_EN(x) (((unsigned)(x) & 0x1) << 9) 6520 #define G_00B12C_SO_BASE1_EN(x) (((x) >> 9) & 0x1) 6521 #define C_00B12C_SO_BASE1_EN 0xFFFFFDFF 6522 #define S_00B12C_SO_BASE2_EN(x) (((unsigned)(x) & 0x1) << 10) 6523 #define G_00B12C_SO_BASE2_EN(x) (((x) >> 10) & 0x1) 6524 #define C_00B12C_SO_BASE2_EN 0xFFFFFBFF 6525 #define S_00B12C_SO_BASE3_EN(x) (((unsigned)(x) & 0x1) << 11) 6526 #define G_00B12C_SO_BASE3_EN(x) (((x) >> 11) & 0x1) 6527 #define C_00B12C_SO_BASE3_EN 0xFFFFF7FF 6528 #define S_00B12C_SO_EN(x) (((unsigned)(x) & 0x1) << 12) 6529 #define G_00B12C_SO_EN(x) (((x) >> 12) & 0x1) 6530 #define C_00B12C_SO_EN 0xFFFFEFFF 6531 #define S_00B12C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 13) 6532 #define G_00B12C_EXCP_EN(x) (((x) >> 13) & 0x1FF) 6533 #define C_00B12C_EXCP_EN 0xFFC01FFF 6534 #define V_00B12C_INVALID 1 6535 #define V_00B12C_INPUT_DENORMAL 2 6536 #define V_00B12C_DIVIDE_BY_ZERO 4 6537 #define V_00B12C_OVERFLOW 8 6538 #define V_00B12C_UNDERFLOW 16 6539 #define V_00B12C_INEXACT 32 6540 #define V_00B12C_INT_DIVIDE_BY_ZERO 64 6541 #define V_00B12C_ADDRESS_WATCH 128 6542 #define V_00B12C_MEMORY_VIOLATION 256 6543 #define S_00B12C_PC_BASE_EN(x) (((unsigned)(x) & 0x1) << 22) /* >= gfx9 */ 6544 #define G_00B12C_PC_BASE_EN(x) (((x) >> 22) & 0x1) 6545 #define C_00B12C_PC_BASE_EN 0xFFBFFFFF 6546 #define S_00B12C_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx8 */ 6547 #define G_00B12C_DISPATCH_DRAW_EN(x) (((x) >> 24) & 0x1) 6548 #define C_00B12C_DISPATCH_DRAW_EN 0xFEFFFFFF 6549 #define S_00B12C_SKIP_USGPR0(x) (((unsigned)(x) & 0x1) << 27) /* gfx9 */ 6550 #define G_00B12C_SKIP_USGPR0(x) (((x) >> 27) & 0x1) 6551 #define C_00B12C_SKIP_USGPR0 0xF7FFFFFF 6552 #define S_00B12C_USER_SGPR_MSB_GFX10(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 6553 #define G_00B12C_USER_SGPR_MSB_GFX10(x) (((x) >> 27) & 0x1) 6554 #define C_00B12C_USER_SGPR_MSB_GFX10 0xF7FFFFFF 6555 #define S_00B12C_SHARED_VGPR_CNT(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx10 */ 6556 #define G_00B12C_SHARED_VGPR_CNT(x) (((x) >> 28) & 0xF) 6557 #define C_00B12C_SHARED_VGPR_CNT 0x0FFFFFFF 6558 #define S_00B12C_USER_SGPR_MSB_GFX9(x) (((unsigned)(x) & 0x1) << 28) /* gfx9 */ 6559 #define G_00B12C_USER_SGPR_MSB_GFX9(x) (((x) >> 28) & 0x1) 6560 #define C_00B12C_USER_SGPR_MSB_GFX9 0xEFFFFFFF 6561 #define R_00B130_SPI_SHADER_USER_DATA_VS_0 0x00B130 6562 #define R_00B134_SPI_SHADER_USER_DATA_VS_1 0x00B134 6563 #define R_00B138_SPI_SHADER_USER_DATA_VS_2 0x00B138 6564 #define R_00B13C_SPI_SHADER_USER_DATA_VS_3 0x00B13C 6565 #define R_00B140_SPI_SHADER_USER_DATA_VS_4 0x00B140 6566 #define R_00B144_SPI_SHADER_USER_DATA_VS_5 0x00B144 6567 #define R_00B148_SPI_SHADER_USER_DATA_VS_6 0x00B148 6568 #define R_00B14C_SPI_SHADER_USER_DATA_VS_7 0x00B14C 6569 #define R_00B150_SPI_SHADER_USER_DATA_VS_8 0x00B150 6570 #define R_00B154_SPI_SHADER_USER_DATA_VS_9 0x00B154 6571 #define R_00B158_SPI_SHADER_USER_DATA_VS_10 0x00B158 6572 #define R_00B15C_SPI_SHADER_USER_DATA_VS_11 0x00B15C 6573 #define R_00B160_SPI_SHADER_USER_DATA_VS_12 0x00B160 6574 #define R_00B164_SPI_SHADER_USER_DATA_VS_13 0x00B164 6575 #define R_00B168_SPI_SHADER_USER_DATA_VS_14 0x00B168 6576 #define R_00B16C_SPI_SHADER_USER_DATA_VS_15 0x00B16C 6577 #define R_00B170_SPI_SHADER_USER_DATA_VS_16 0x00B170 /* >= gfx9 */ 6578 #define R_00B174_SPI_SHADER_USER_DATA_VS_17 0x00B174 /* >= gfx9 */ 6579 #define R_00B178_SPI_SHADER_USER_DATA_VS_18 0x00B178 /* >= gfx9 */ 6580 #define R_00B17C_SPI_SHADER_USER_DATA_VS_19 0x00B17C /* >= gfx9 */ 6581 #define R_00B180_SPI_SHADER_USER_DATA_VS_20 0x00B180 /* >= gfx9 */ 6582 #define R_00B184_SPI_SHADER_USER_DATA_VS_21 0x00B184 /* >= gfx9 */ 6583 #define R_00B188_SPI_SHADER_USER_DATA_VS_22 0x00B188 /* >= gfx9 */ 6584 #define R_00B18C_SPI_SHADER_USER_DATA_VS_23 0x00B18C /* >= gfx9 */ 6585 #define R_00B190_SPI_SHADER_USER_DATA_VS_24 0x00B190 /* >= gfx9 */ 6586 #define R_00B194_SPI_SHADER_USER_DATA_VS_25 0x00B194 /* >= gfx9 */ 6587 #define R_00B198_SPI_SHADER_USER_DATA_VS_26 0x00B198 /* >= gfx9 */ 6588 #define R_00B19C_SPI_SHADER_USER_DATA_VS_27 0x00B19C /* >= gfx9 */ 6589 #define R_00B1A0_SPI_SHADER_USER_DATA_VS_28 0x00B1A0 /* >= gfx9 */ 6590 #define R_00B1A4_SPI_SHADER_USER_DATA_VS_29 0x00B1A4 /* >= gfx9 */ 6591 #define R_00B1A8_SPI_SHADER_USER_DATA_VS_30 0x00B1A8 /* >= gfx9 */ 6592 #define R_00B1AC_SPI_SHADER_USER_DATA_VS_31 0x00B1AC /* >= gfx9 */ 6593 #define R_00B1C0_SPI_SHADER_REQ_CTRL_VS 0x00B1C0 /* >= gfx10 */ 6594 #define S_00B1C0_SOFT_GROUPING_EN(x) (((unsigned)(x) & 0x1) << 0) 6595 #define G_00B1C0_SOFT_GROUPING_EN(x) (((x) >> 0) & 0x1) 6596 #define C_00B1C0_SOFT_GROUPING_EN 0xFFFFFFFE 6597 #define S_00B1C0_NUMBER_OF_REQUESTS_PER_CU(x) (((unsigned)(x) & 0xF) << 1) 6598 #define G_00B1C0_NUMBER_OF_REQUESTS_PER_CU(x) (((x) >> 1) & 0xF) 6599 #define C_00B1C0_NUMBER_OF_REQUESTS_PER_CU 0xFFFFFFE1 6600 #define S_00B1C0_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((unsigned)(x) & 0xF) << 5) 6601 #define G_00B1C0_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((x) >> 5) & 0xF) 6602 #define C_00B1C0_SOFT_GROUPING_ALLOCATION_TIMEOUT 0xFFFFFE1F 6603 #define S_00B1C0_HARD_LOCK_HYSTERESIS(x) (((unsigned)(x) & 0x1) << 9) 6604 #define G_00B1C0_HARD_LOCK_HYSTERESIS(x) (((x) >> 9) & 0x1) 6605 #define C_00B1C0_HARD_LOCK_HYSTERESIS 0xFFFFFDFF 6606 #define S_00B1C0_HARD_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x1F) << 10) 6607 #define G_00B1C0_HARD_LOCK_LOW_THRESHOLD(x) (((x) >> 10) & 0x1F) 6608 #define C_00B1C0_HARD_LOCK_LOW_THRESHOLD 0xFFFF83FF 6609 #define S_00B1C0_PRODUCER_REQUEST_LOCKOUT(x) (((unsigned)(x) & 0x1) << 15) 6610 #define G_00B1C0_PRODUCER_REQUEST_LOCKOUT(x) (((x) >> 15) & 0x1) 6611 #define C_00B1C0_PRODUCER_REQUEST_LOCKOUT 0xFFFF7FFF 6612 #define S_00B1C0_GLOBAL_SCANNING_EN(x) (((unsigned)(x) & 0x1) << 16) 6613 #define G_00B1C0_GLOBAL_SCANNING_EN(x) (((x) >> 16) & 0x1) 6614 #define C_00B1C0_GLOBAL_SCANNING_EN 0xFFFEFFFF 6615 #define S_00B1C0_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((unsigned)(x) & 0x7) << 17) 6616 #define G_00B1C0_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((x) >> 17) & 0x7) 6617 #define C_00B1C0_ALLOCATION_RATE_THROTTLING_THRESHOLD 0xFFF1FFFF 6618 #define R_00B1C4_SPI_SHADER_PREF_PRI_CNTR_CTRL_VS 0x00B1C4 /* gfx10 */ 6619 #define S_00B1C4_TOTAL_WAVE_COUNT_HIER_SELECT(x) (((unsigned)(x) & 0x7) << 0) 6620 #define G_00B1C4_TOTAL_WAVE_COUNT_HIER_SELECT(x) (((x) >> 0) & 0x7) 6621 #define C_00B1C4_TOTAL_WAVE_COUNT_HIER_SELECT 0xFFFFFFF8 6622 #define S_00B1C4_PER_TYPE_WAVE_COUNT_HIER_SELECT(x) (((unsigned)(x) & 0x7) << 3) 6623 #define G_00B1C4_PER_TYPE_WAVE_COUNT_HIER_SELECT(x) (((x) >> 3) & 0x7) 6624 #define C_00B1C4_PER_TYPE_WAVE_COUNT_HIER_SELECT 0xFFFFFFC7 6625 #define S_00B1C4_GROUP_UPDATE_EN(x) (((unsigned)(x) & 0x1) << 6) 6626 #define G_00B1C4_GROUP_UPDATE_EN(x) (((x) >> 6) & 0x1) 6627 #define C_00B1C4_GROUP_UPDATE_EN 0xFFFFFFBF 6628 #define S_00B1C4_TOTAL_WAVE_COUNT_COEFFICIENT(x) (((unsigned)(x) & 0xFF) << 8) 6629 #define G_00B1C4_TOTAL_WAVE_COUNT_COEFFICIENT(x) (((x) >> 8) & 0xFF) 6630 #define C_00B1C4_TOTAL_WAVE_COUNT_COEFFICIENT 0xFFFF00FF 6631 #define S_00B1C4_PER_TYPE_WAVE_COUNT_COEFFICIENT(x) (((unsigned)(x) & 0xFF) << 16) 6632 #define G_00B1C4_PER_TYPE_WAVE_COUNT_COEFFICIENT(x) (((x) >> 16) & 0xFF) 6633 #define C_00B1C4_PER_TYPE_WAVE_COUNT_COEFFICIENT 0xFF00FFFF 6634 #define R_00B1C8_SPI_SHADER_USER_ACCUM_VS_0 0x00B1C8 /* >= gfx10 */ 6635 #define S_00B1C8_CONTRIBUTION(x) (((unsigned)(x) & 0x7F) << 0) 6636 #define G_00B1C8_CONTRIBUTION(x) (((x) >> 0) & 0x7F) 6637 #define C_00B1C8_CONTRIBUTION 0xFFFFFF80 6638 #define R_00B1CC_SPI_SHADER_USER_ACCUM_VS_1 0x00B1CC /* >= gfx10 */ 6639 #define R_00B1D0_SPI_SHADER_USER_ACCUM_VS_2 0x00B1D0 /* >= gfx10 */ 6640 #define R_00B1D4_SPI_SHADER_USER_ACCUM_VS_3 0x00B1D4 /* >= gfx10 */ 6641 #define R_00B1EC_SPI_SHADER_PGM_RSRC2_GS_VS 0x00B1EC /* >= gfx10 */ 6642 #define S_00B1EC_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 6643 #define G_00B1EC_SCRATCH_EN(x) (((x) >> 0) & 0x1) 6644 #define C_00B1EC_SCRATCH_EN 0xFFFFFFFE 6645 #define S_00B1EC_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 6646 #define G_00B1EC_USER_SGPR(x) (((x) >> 1) & 0x1F) 6647 #define C_00B1EC_USER_SGPR 0xFFFFFFC1 6648 #define S_00B1EC_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 6649 #define G_00B1EC_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 6650 #define C_00B1EC_TRAP_PRESENT 0xFFFFFFBF 6651 #define S_00B1EC_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 7) 6652 #define G_00B1EC_EXCP_EN(x) (((x) >> 7) & 0x1FF) 6653 #define C_00B1EC_EXCP_EN 0xFFFF007F 6654 #define V_00B1EC_INVALID 1 6655 #define V_00B1EC_INPUT_DENORMAL 2 6656 #define V_00B1EC_DIVIDE_BY_ZERO 4 6657 #define V_00B1EC_OVERFLOW 8 6658 #define V_00B1EC_UNDERFLOW 16 6659 #define V_00B1EC_INEXACT 32 6660 #define V_00B1EC_INT_DIVIDE_BY_ZERO 64 6661 #define V_00B1EC_ADDRESS_WATCH 128 6662 #define V_00B1EC_MEMORY_VIOLATION 256 6663 #define S_00B1EC_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x3) << 16) 6664 #define G_00B1EC_VGPR_COMP_CNT(x) (((x) >> 16) & 0x3) 6665 #define C_00B1EC_VGPR_COMP_CNT 0xFFFCFFFF 6666 #define S_00B1EC_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 18) 6667 #define G_00B1EC_OC_LDS_EN(x) (((x) >> 18) & 0x1) 6668 #define C_00B1EC_OC_LDS_EN 0xFFFBFFFF 6669 #define S_00B1EC_LDS_SIZE(x) (((unsigned)(x) & 0xFF) << 19) 6670 #define G_00B1EC_LDS_SIZE(x) (((x) >> 19) & 0xFF) 6671 #define C_00B1EC_LDS_SIZE 0xF807FFFF 6672 #define S_00B1EC_SKIP_USGPR0(x) (((unsigned)(x) & 0x1) << 27) 6673 #define G_00B1EC_SKIP_USGPR0(x) (((x) >> 27) & 0x1) 6674 #define C_00B1EC_SKIP_USGPR0 0xF7FFFFFF 6675 #define S_00B1EC_USER_SGPR_MSB(x) (((unsigned)(x) & 0x1) << 28) 6676 #define G_00B1EC_USER_SGPR_MSB(x) (((x) >> 28) & 0x1) 6677 #define C_00B1EC_USER_SGPR_MSB 0xEFFFFFFF 6678 #define R_00B1F0_SPI_SHADER_PGM_RSRC2_ES_VS 0x00B1F0 /* gfx7, gfx8, gfx81, gfx10 */ 6679 #define S_00B1F0_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 6680 #define G_00B1F0_SCRATCH_EN(x) (((x) >> 0) & 0x1) 6681 #define C_00B1F0_SCRATCH_EN 0xFFFFFFFE 6682 #define S_00B1F0_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 6683 #define G_00B1F0_USER_SGPR(x) (((x) >> 1) & 0x1F) 6684 #define C_00B1F0_USER_SGPR 0xFFFFFFC1 6685 #define S_00B1F0_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 6686 #define G_00B1F0_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 6687 #define C_00B1F0_TRAP_PRESENT 0xFFFFFFBF 6688 #define S_00B1F0_OC_LDS_EN_GFX7(x) (((unsigned)(x) & 0x1) << 7) 6689 #define G_00B1F0_OC_LDS_EN_GFX7(x) (((x) >> 7) & 0x1) 6690 #define C_00B1F0_OC_LDS_EN_GFX7 0xFFFFFF7F 6691 #define S_00B1F0_EXCP_EN_GFX7(x) (((unsigned)(x) & 0x1FF) << 8) 6692 #define G_00B1F0_EXCP_EN_GFX7(x) (((x) >> 8) & 0x1FF) 6693 #define C_00B1F0_EXCP_EN_GFX7 0xFFFE00FF 6694 #define V_00B1F0_INVALID 1 6695 #define V_00B1F0_INPUT_DENORMAL 2 6696 #define V_00B1F0_DIVIDE_BY_ZERO 4 6697 #define V_00B1F0_OVERFLOW 8 6698 #define V_00B1F0_UNDERFLOW 16 6699 #define V_00B1F0_INEXACT 32 6700 #define V_00B1F0_INT_DIVIDE_BY_ZERO 64 6701 #define V_00B1F0_ADDRESS_WATCH 128 6702 #define V_00B1F0_MEMORY_VIOLATION 256 6703 #define S_00B1F0_LDS_SIZE_GFX7(x) (((unsigned)(x) & 0x1FF) << 20) 6704 #define G_00B1F0_LDS_SIZE_GFX7(x) (((x) >> 20) & 0x1FF) 6705 #define C_00B1F0_LDS_SIZE_GFX7 0xE00FFFFF 6706 #define R_00B1F0_SPI_SHADER_PGM_RSRC2_GS_VS 0x00B1F0 /* gfx9 */ 6707 #define S_00B1F0_EXCP_EN_GFX9(x) (((unsigned)(x) & 0x1FF) << 7) 6708 #define G_00B1F0_EXCP_EN_GFX9(x) (((x) >> 7) & 0x1FF) 6709 #define C_00B1F0_EXCP_EN_GFX9 0xFFFF007F 6710 #define S_00B1F0_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x3) << 16) 6711 #define G_00B1F0_VGPR_COMP_CNT(x) (((x) >> 16) & 0x3) 6712 #define C_00B1F0_VGPR_COMP_CNT 0xFFFCFFFF 6713 #define S_00B1F0_OC_LDS_EN_GFX9(x) (((unsigned)(x) & 0x1) << 18) 6714 #define G_00B1F0_OC_LDS_EN_GFX9(x) (((x) >> 18) & 0x1) 6715 #define C_00B1F0_OC_LDS_EN_GFX9 0xFFFBFFFF 6716 #define S_00B1F0_LDS_SIZE_GFX9(x) (((unsigned)(x) & 0xFF) << 19) 6717 #define G_00B1F0_LDS_SIZE_GFX9(x) (((x) >> 19) & 0xFF) 6718 #define C_00B1F0_LDS_SIZE_GFX9 0xF807FFFF 6719 #define S_00B1F0_SKIP_USGPR0(x) (((unsigned)(x) & 0x1) << 27) 6720 #define G_00B1F0_SKIP_USGPR0(x) (((x) >> 27) & 0x1) 6721 #define C_00B1F0_SKIP_USGPR0 0xF7FFFFFF 6722 #define S_00B1F0_USER_SGPR_MSB(x) (((unsigned)(x) & 0x1) << 28) 6723 #define G_00B1F0_USER_SGPR_MSB(x) (((x) >> 28) & 0x1) 6724 #define C_00B1F0_USER_SGPR_MSB 0xEFFFFFFF 6725 #define R_00B1F4_SPI_SHADER_PGM_RSRC2_LS_VS 0x00B1F4 /* gfx7, gfx8, gfx81, gfx10 */ 6726 #define S_00B1F4_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 6727 #define G_00B1F4_SCRATCH_EN(x) (((x) >> 0) & 0x1) 6728 #define C_00B1F4_SCRATCH_EN 0xFFFFFFFE 6729 #define S_00B1F4_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 6730 #define G_00B1F4_USER_SGPR(x) (((x) >> 1) & 0x1F) 6731 #define C_00B1F4_USER_SGPR 0xFFFFFFC1 6732 #define S_00B1F4_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 6733 #define G_00B1F4_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 6734 #define C_00B1F4_TRAP_PRESENT 0xFFFFFFBF 6735 #define S_00B1F4_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 7) 6736 #define G_00B1F4_LDS_SIZE(x) (((x) >> 7) & 0x1FF) 6737 #define C_00B1F4_LDS_SIZE 0xFFFF007F 6738 #define S_00B1F4_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 16) 6739 #define G_00B1F4_EXCP_EN(x) (((x) >> 16) & 0x1FF) 6740 #define C_00B1F4_EXCP_EN 0xFE00FFFF 6741 #define V_00B1F4_INVALID 1 6742 #define V_00B1F4_INPUT_DENORMAL 2 6743 #define V_00B1F4_DIVIDE_BY_ZERO 4 6744 #define V_00B1F4_OVERFLOW 8 6745 #define V_00B1F4_UNDERFLOW 16 6746 #define V_00B1F4_INEXACT 32 6747 #define V_00B1F4_INT_DIVIDE_BY_ZERO 64 6748 #define V_00B1F4_ADDRESS_WATCH 128 6749 #define V_00B1F4_MEMORY_VIOLATION 256 6750 #define R_00B200_SPI_SHADER_PGM_CHKSUM_GS 0x00B200 /* >= gfx10 */ 6751 #define R_00B200_SPI_SHADER_TBA_LO_GS 0x00B200 /* <= gfx81 */ 6752 #define R_00B204_SPI_SHADER_PGM_RSRC4_GS 0x00B204 /* >= gfx9 */ 6753 #define S_00B204_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) /* >= gfx10 */ 6754 #define G_00B204_CU_EN(x) (((x) >> 0) & 0xFFFF) 6755 #define C_00B204_CU_EN 0xFFFF0000 6756 #define S_00B204_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x7F) << 0) /* gfx9 */ 6757 #define G_00B204_GROUP_FIFO_DEPTH(x) (((x) >> 0) & 0x7F) 6758 #define C_00B204_GROUP_FIFO_DEPTH 0xFFFFFF80 6759 #define S_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX9(x) (((unsigned)(x) & 0x7F) << 7) /* gfx9 */ 6760 #define G_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX9(x) (((x) >> 7) & 0x7F) 6761 #define C_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX9 0xFFFFC07F 6762 #define S_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX10(x) (((unsigned)(x) & 0x7F) << 16) /* >= gfx10 */ 6763 #define G_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX10(x) (((x) >> 16) & 0x7F) 6764 #define C_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX10 0xFF80FFFF 6765 #define R_00B204_SPI_SHADER_TBA_HI_GS 0x00B204 /* <= gfx81 */ 6766 #define S_00B204_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6767 #define G_00B204_MEM_BASE(x) (((x) >> 0) & 0xFF) 6768 #define C_00B204_MEM_BASE 0xFFFFFF00 6769 #define R_00B208_SPI_SHADER_TMA_LO_GS 0x00B208 /* <= gfx81 */ 6770 #define R_00B208_SPI_SHADER_USER_DATA_ADDR_LO_GS 0x00B208 /* >= gfx9 */ 6771 #define R_00B20C_SPI_SHADER_TMA_HI_GS 0x00B20C /* <= gfx81 */ 6772 #define S_00B20C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6773 #define G_00B20C_MEM_BASE(x) (((x) >> 0) & 0xFF) 6774 #define C_00B20C_MEM_BASE 0xFFFFFF00 6775 #define R_00B20C_SPI_SHADER_USER_DATA_ADDR_HI_GS 0x00B20C /* >= gfx9 */ 6776 #define R_00B210_SPI_SHADER_PGM_LO_ES 0x00B210 /* gfx9 */ 6777 #define R_00B210_SPI_SHADER_PGM_LO_ES_GS 0x00B210 /* >= gfx10 */ 6778 #define R_00B214_SPI_SHADER_PGM_HI_ES 0x00B214 /* gfx9 */ 6779 #define S_00B214_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6780 #define G_00B214_MEM_BASE(x) (((x) >> 0) & 0xFF) 6781 #define C_00B214_MEM_BASE 0xFFFFFF00 6782 #define R_00B214_SPI_SHADER_PGM_HI_ES_GS 0x00B214 /* >= gfx10 */ 6783 #define R_00B21C_SPI_SHADER_PGM_RSRC3_GS 0x00B21C /* >= gfx7 */ 6784 #define S_00B21C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 6785 #define G_00B21C_CU_EN(x) (((x) >> 0) & 0xFFFF) 6786 #define C_00B21C_CU_EN 0xFFFF0000 6787 #define S_00B21C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 6788 #define G_00B21C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 6789 #define C_00B21C_WAVE_LIMIT 0xFFC0FFFF 6790 #define S_00B21C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0xF) << 22) 6791 #define G_00B21C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0xF) 6792 #define C_00B21C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 6793 #define S_00B21C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) /* gfx8, gfx81, >= gfx10 */ 6794 #define G_00B21C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) 6795 #define C_00B21C_GROUP_FIFO_DEPTH 0x03FFFFFF 6796 #define S_00B21C_SIMD_DISABLE(x) (((unsigned)(x) & 0xF) << 26) /* gfx9 */ 6797 #define G_00B21C_SIMD_DISABLE(x) (((x) >> 26) & 0xF) 6798 #define C_00B21C_SIMD_DISABLE 0xC3FFFFFF 6799 #define R_00B220_SPI_SHADER_PGM_LO_GS 0x00B220 6800 #define R_00B224_SPI_SHADER_PGM_HI_GS 0x00B224 6801 #define S_00B224_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 6802 #define G_00B224_MEM_BASE(x) (((x) >> 0) & 0xFF) 6803 #define C_00B224_MEM_BASE 0xFFFFFF00 6804 #define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228 6805 #define S_00B228_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 6806 #define G_00B228_VGPRS(x) (((x) >> 0) & 0x3F) 6807 #define C_00B228_VGPRS 0xFFFFFFC0 6808 #define S_00B228_SGPRS(x) (((unsigned)(x) & 0xF) << 6) 6809 #define G_00B228_SGPRS(x) (((x) >> 6) & 0xF) 6810 #define C_00B228_SGPRS 0xFFFFFC3F 6811 #define S_00B228_PRIORITY(x) (((unsigned)(x) & 0x3) << 10) 6812 #define G_00B228_PRIORITY(x) (((x) >> 10) & 0x3) 6813 #define C_00B228_PRIORITY 0xFFFFF3FF 6814 #define S_00B228_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 6815 #define G_00B228_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 6816 #define C_00B228_FLOAT_MODE 0xFFF00FFF 6817 #define V_00B228_FP_32_DENORMS 48 6818 #define V_00B228_FP_64_DENORMS 192 6819 #define V_00B228_FP_ALL_DENORMS 240 6820 #define S_00B228_PRIV(x) (((unsigned)(x) & 0x1) << 20) 6821 #define G_00B228_PRIV(x) (((x) >> 20) & 0x1) 6822 #define C_00B228_PRIV 0xFFEFFFFF 6823 #define S_00B228_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 6824 #define G_00B228_DX10_CLAMP(x) (((x) >> 21) & 0x1) 6825 #define C_00B228_DX10_CLAMP 0xFFDFFFFF 6826 #define S_00B228_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) /* <= gfx9 */ 6827 #define G_00B228_DEBUG_MODE(x) (((x) >> 22) & 0x1) 6828 #define C_00B228_DEBUG_MODE 0xFFBFFFFF 6829 #define S_00B228_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 6830 #define G_00B228_IEEE_MODE(x) (((x) >> 23) & 0x1) 6831 #define C_00B228_IEEE_MODE 0xFF7FFFFF 6832 #define S_00B228_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 24) 6833 #define G_00B228_CU_GROUP_ENABLE(x) (((x) >> 24) & 0x1) 6834 #define C_00B228_CU_GROUP_ENABLE 0xFEFFFFFF 6835 #define S_00B228_CACHE_CTL(x) (((unsigned)(x) & 0x7) << 25) /* <= gfx81 */ 6836 #define G_00B228_CACHE_CTL(x) (((x) >> 25) & 0x7) 6837 #define C_00B228_CACHE_CTL 0xF1FFFFFF 6838 #define S_00B228_MEM_ORDERED(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx10 */ 6839 #define G_00B228_MEM_ORDERED(x) (((x) >> 25) & 0x1) 6840 #define C_00B228_MEM_ORDERED 0xFDFFFFFF 6841 #define S_00B228_FWD_PROGRESS(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx10 */ 6842 #define G_00B228_FWD_PROGRESS(x) (((x) >> 26) & 0x1) 6843 #define C_00B228_FWD_PROGRESS 0xFBFFFFFF 6844 #define S_00B228_WGP_MODE(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 6845 #define G_00B228_WGP_MODE(x) (((x) >> 27) & 0x1) 6846 #define C_00B228_WGP_MODE 0xF7FFFFFF 6847 #define S_00B228_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) /* <= gfx9 */ 6848 #define G_00B228_CDBG_USER(x) (((x) >> 28) & 0x1) 6849 #define C_00B228_CDBG_USER 0xEFFFFFFF 6850 #define S_00B228_GS_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x3) << 29) /* >= gfx9 */ 6851 #define G_00B228_GS_VGPR_COMP_CNT(x) (((x) >> 29) & 0x3) 6852 #define C_00B228_GS_VGPR_COMP_CNT 0x9FFFFFFF 6853 #define S_00B228_FP16_OVFL(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx9 */ 6854 #define G_00B228_FP16_OVFL(x) (((x) >> 31) & 0x1) 6855 #define C_00B228_FP16_OVFL 0x7FFFFFFF 6856 #define R_00B22C_SPI_SHADER_PGM_RSRC2_GS 0x00B22C 6857 #define S_00B22C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 6858 #define G_00B22C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 6859 #define C_00B22C_SCRATCH_EN 0xFFFFFFFE 6860 #define S_00B22C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 6861 #define G_00B22C_USER_SGPR(x) (((x) >> 1) & 0x1F) 6862 #define C_00B22C_USER_SGPR 0xFFFFFFC1 6863 #define S_00B22C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 6864 #define G_00B22C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 6865 #define C_00B22C_TRAP_PRESENT 0xFFFFFFBF 6866 #define S_00B22C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 7) 6867 #define G_00B22C_EXCP_EN(x) (((x) >> 7) & 0x1FF) 6868 #define C_00B22C_EXCP_EN 0xFFFF007F 6869 #define V_00B22C_INVALID 1 6870 #define V_00B22C_INPUT_DENORMAL 2 6871 #define V_00B22C_DIVIDE_BY_ZERO 4 6872 #define V_00B22C_OVERFLOW 8 6873 #define V_00B22C_UNDERFLOW 16 6874 #define V_00B22C_INEXACT 32 6875 #define V_00B22C_INT_DIVIDE_BY_ZERO 64 6876 #define V_00B22C_ADDRESS_WATCH 128 6877 #define V_00B22C_MEMORY_VIOLATION 256 6878 #define S_00B22C_ES_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x3) << 16) /* >= gfx9 */ 6879 #define G_00B22C_ES_VGPR_COMP_CNT(x) (((x) >> 16) & 0x3) 6880 #define C_00B22C_ES_VGPR_COMP_CNT 0xFFFCFFFF 6881 #define S_00B22C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx9 */ 6882 #define G_00B22C_OC_LDS_EN(x) (((x) >> 18) & 0x1) 6883 #define C_00B22C_OC_LDS_EN 0xFFFBFFFF 6884 #define S_00B22C_LDS_SIZE(x) (((unsigned)(x) & 0xFF) << 19) /* >= gfx9 */ 6885 #define G_00B22C_LDS_SIZE(x) (((x) >> 19) & 0xFF) 6886 #define C_00B22C_LDS_SIZE 0xF807FFFF 6887 #define S_00B22C_SKIP_USGPR0(x) (((unsigned)(x) & 0x1) << 27) /* gfx9 */ 6888 #define G_00B22C_SKIP_USGPR0(x) (((x) >> 27) & 0x1) 6889 #define C_00B22C_SKIP_USGPR0 0xF7FFFFFF 6890 #define S_00B22C_USER_SGPR_MSB_GFX10(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 6891 #define G_00B22C_USER_SGPR_MSB_GFX10(x) (((x) >> 27) & 0x1) 6892 #define C_00B22C_USER_SGPR_MSB_GFX10 0xF7FFFFFF 6893 #define S_00B22C_SHARED_VGPR_CNT(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx10 */ 6894 #define G_00B22C_SHARED_VGPR_CNT(x) (((x) >> 28) & 0xF) 6895 #define C_00B22C_SHARED_VGPR_CNT 0x0FFFFFFF 6896 #define S_00B22C_USER_SGPR_MSB_GFX9(x) (((unsigned)(x) & 0x1) << 28) /* gfx9 */ 6897 #define G_00B22C_USER_SGPR_MSB_GFX9(x) (((x) >> 28) & 0x1) 6898 #define C_00B22C_USER_SGPR_MSB_GFX9 0xEFFFFFFF 6899 #define R_00B230_SPI_SHADER_USER_DATA_GS_0 0x00B230 /* <= gfx81, >= gfx10 */ 6900 #define R_00B234_SPI_SHADER_USER_DATA_GS_1 0x00B234 /* <= gfx81, >= gfx10 */ 6901 #define R_00B238_SPI_SHADER_USER_DATA_GS_2 0x00B238 /* <= gfx81, >= gfx10 */ 6902 #define R_00B23C_SPI_SHADER_USER_DATA_GS_3 0x00B23C /* <= gfx81, >= gfx10 */ 6903 #define R_00B240_SPI_SHADER_USER_DATA_GS_4 0x00B240 /* <= gfx81, >= gfx10 */ 6904 #define R_00B244_SPI_SHADER_USER_DATA_GS_5 0x00B244 /* <= gfx81, >= gfx10 */ 6905 #define R_00B248_SPI_SHADER_USER_DATA_GS_6 0x00B248 /* <= gfx81, >= gfx10 */ 6906 #define R_00B24C_SPI_SHADER_USER_DATA_GS_7 0x00B24C /* <= gfx81, >= gfx10 */ 6907 #define R_00B250_SPI_SHADER_USER_DATA_GS_8 0x00B250 /* <= gfx81, >= gfx10 */ 6908 #define R_00B254_SPI_SHADER_USER_DATA_GS_9 0x00B254 /* <= gfx81, >= gfx10 */ 6909 #define R_00B258_SPI_SHADER_USER_DATA_GS_10 0x00B258 /* <= gfx81, >= gfx10 */ 6910 #define R_00B25C_SPI_SHADER_USER_DATA_GS_11 0x00B25C /* <= gfx81, >= gfx10 */ 6911 #define R_00B260_SPI_SHADER_USER_DATA_GS_12 0x00B260 /* <= gfx81, >= gfx10 */ 6912 #define R_00B264_SPI_SHADER_USER_DATA_GS_13 0x00B264 /* <= gfx81, >= gfx10 */ 6913 #define R_00B268_SPI_SHADER_USER_DATA_GS_14 0x00B268 /* <= gfx81, >= gfx10 */ 6914 #define R_00B26C_SPI_SHADER_USER_DATA_GS_15 0x00B26C /* <= gfx81, >= gfx10 */ 6915 #define R_00B270_SPI_SHADER_USER_DATA_GS_16 0x00B270 /* >= gfx10 */ 6916 #define R_00B274_SPI_SHADER_USER_DATA_GS_17 0x00B274 /* >= gfx10 */ 6917 #define R_00B278_SPI_SHADER_USER_DATA_GS_18 0x00B278 /* >= gfx10 */ 6918 #define R_00B27C_SPI_SHADER_USER_DATA_GS_19 0x00B27C /* >= gfx10 */ 6919 #define R_00B280_SPI_SHADER_USER_DATA_GS_20 0x00B280 /* >= gfx10 */ 6920 #define R_00B284_SPI_SHADER_USER_DATA_GS_21 0x00B284 /* >= gfx10 */ 6921 #define R_00B288_SPI_SHADER_USER_DATA_GS_22 0x00B288 /* >= gfx10 */ 6922 #define R_00B28C_SPI_SHADER_USER_DATA_GS_23 0x00B28C /* >= gfx10 */ 6923 #define R_00B290_SPI_SHADER_USER_DATA_GS_24 0x00B290 /* >= gfx10 */ 6924 #define R_00B294_SPI_SHADER_USER_DATA_GS_25 0x00B294 /* >= gfx10 */ 6925 #define R_00B298_SPI_SHADER_USER_DATA_GS_26 0x00B298 /* >= gfx10 */ 6926 #define R_00B29C_SPI_SHADER_USER_DATA_GS_27 0x00B29C /* >= gfx10 */ 6927 #define R_00B2A0_SPI_SHADER_USER_DATA_GS_28 0x00B2A0 /* >= gfx10 */ 6928 #define R_00B2A4_SPI_SHADER_USER_DATA_GS_29 0x00B2A4 /* >= gfx10 */ 6929 #define R_00B2A8_SPI_SHADER_USER_DATA_GS_30 0x00B2A8 /* >= gfx10 */ 6930 #define R_00B2AC_SPI_SHADER_USER_DATA_GS_31 0x00B2AC /* >= gfx10 */ 6931 #define R_00B2C0_SPI_SHADER_REQ_CTRL_ESGS 0x00B2C0 /* >= gfx10 */ 6932 #define S_00B2C0_SOFT_GROUPING_EN(x) (((unsigned)(x) & 0x1) << 0) 6933 #define G_00B2C0_SOFT_GROUPING_EN(x) (((x) >> 0) & 0x1) 6934 #define C_00B2C0_SOFT_GROUPING_EN 0xFFFFFFFE 6935 #define S_00B2C0_NUMBER_OF_REQUESTS_PER_CU(x) (((unsigned)(x) & 0xF) << 1) 6936 #define G_00B2C0_NUMBER_OF_REQUESTS_PER_CU(x) (((x) >> 1) & 0xF) 6937 #define C_00B2C0_NUMBER_OF_REQUESTS_PER_CU 0xFFFFFFE1 6938 #define S_00B2C0_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((unsigned)(x) & 0xF) << 5) 6939 #define G_00B2C0_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((x) >> 5) & 0xF) 6940 #define C_00B2C0_SOFT_GROUPING_ALLOCATION_TIMEOUT 0xFFFFFE1F 6941 #define S_00B2C0_HARD_LOCK_HYSTERESIS(x) (((unsigned)(x) & 0x1) << 9) 6942 #define G_00B2C0_HARD_LOCK_HYSTERESIS(x) (((x) >> 9) & 0x1) 6943 #define C_00B2C0_HARD_LOCK_HYSTERESIS 0xFFFFFDFF 6944 #define S_00B2C0_HARD_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x1F) << 10) 6945 #define G_00B2C0_HARD_LOCK_LOW_THRESHOLD(x) (((x) >> 10) & 0x1F) 6946 #define C_00B2C0_HARD_LOCK_LOW_THRESHOLD 0xFFFF83FF 6947 #define S_00B2C0_PRODUCER_REQUEST_LOCKOUT(x) (((unsigned)(x) & 0x1) << 15) 6948 #define G_00B2C0_PRODUCER_REQUEST_LOCKOUT(x) (((x) >> 15) & 0x1) 6949 #define C_00B2C0_PRODUCER_REQUEST_LOCKOUT 0xFFFF7FFF 6950 #define S_00B2C0_GLOBAL_SCANNING_EN(x) (((unsigned)(x) & 0x1) << 16) 6951 #define G_00B2C0_GLOBAL_SCANNING_EN(x) (((x) >> 16) & 0x1) 6952 #define C_00B2C0_GLOBAL_SCANNING_EN 0xFFFEFFFF 6953 #define S_00B2C0_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((unsigned)(x) & 0x7) << 17) 6954 #define G_00B2C0_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((x) >> 17) & 0x7) 6955 #define C_00B2C0_ALLOCATION_RATE_THROTTLING_THRESHOLD 0xFFF1FFFF 6956 #define R_00B2C4_SPI_SHADER_PREF_PRI_CNTR_CTRL_ESGS 0x00B2C4 /* gfx10 */ 6957 #define S_00B2C4_TOTAL_WAVE_COUNT_HIER_SELECT(x) (((unsigned)(x) & 0x7) << 0) 6958 #define G_00B2C4_TOTAL_WAVE_COUNT_HIER_SELECT(x) (((x) >> 0) & 0x7) 6959 #define C_00B2C4_TOTAL_WAVE_COUNT_HIER_SELECT 0xFFFFFFF8 6960 #define S_00B2C4_PER_TYPE_WAVE_COUNT_HIER_SELECT(x) (((unsigned)(x) & 0x7) << 3) 6961 #define G_00B2C4_PER_TYPE_WAVE_COUNT_HIER_SELECT(x) (((x) >> 3) & 0x7) 6962 #define C_00B2C4_PER_TYPE_WAVE_COUNT_HIER_SELECT 0xFFFFFFC7 6963 #define S_00B2C4_GROUP_UPDATE_EN(x) (((unsigned)(x) & 0x1) << 6) 6964 #define G_00B2C4_GROUP_UPDATE_EN(x) (((x) >> 6) & 0x1) 6965 #define C_00B2C4_GROUP_UPDATE_EN 0xFFFFFFBF 6966 #define S_00B2C4_TOTAL_WAVE_COUNT_COEFFICIENT(x) (((unsigned)(x) & 0xFF) << 8) 6967 #define G_00B2C4_TOTAL_WAVE_COUNT_COEFFICIENT(x) (((x) >> 8) & 0xFF) 6968 #define C_00B2C4_TOTAL_WAVE_COUNT_COEFFICIENT 0xFFFF00FF 6969 #define S_00B2C4_PER_TYPE_WAVE_COUNT_COEFFICIENT(x) (((unsigned)(x) & 0xFF) << 16) 6970 #define G_00B2C4_PER_TYPE_WAVE_COUNT_COEFFICIENT(x) (((x) >> 16) & 0xFF) 6971 #define C_00B2C4_PER_TYPE_WAVE_COUNT_COEFFICIENT 0xFF00FFFF 6972 #define R_00B2C8_SPI_SHADER_USER_ACCUM_ESGS_0 0x00B2C8 /* >= gfx10 */ 6973 #define S_00B2C8_CONTRIBUTION(x) (((unsigned)(x) & 0x7F) << 0) 6974 #define G_00B2C8_CONTRIBUTION(x) (((x) >> 0) & 0x7F) 6975 #define C_00B2C8_CONTRIBUTION 0xFFFFFF80 6976 #define R_00B2CC_SPI_SHADER_USER_ACCUM_ESGS_1 0x00B2CC /* >= gfx10 */ 6977 #define R_00B2D0_SPI_SHADER_USER_ACCUM_ESGS_2 0x00B2D0 /* >= gfx10 */ 6978 #define R_00B2D4_SPI_SHADER_USER_ACCUM_ESGS_3 0x00B2D4 /* >= gfx10 */ 6979 #define R_00B2F0_SPI_SHADER_PGM_RSRC2_ES_GS 0x00B2F0 /* gfx7, gfx8, gfx81, gfx10 */ 6980 #define S_00B2F0_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 6981 #define G_00B2F0_SCRATCH_EN(x) (((x) >> 0) & 0x1) 6982 #define C_00B2F0_SCRATCH_EN 0xFFFFFFFE 6983 #define S_00B2F0_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 6984 #define G_00B2F0_USER_SGPR(x) (((x) >> 1) & 0x1F) 6985 #define C_00B2F0_USER_SGPR 0xFFFFFFC1 6986 #define S_00B2F0_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 6987 #define G_00B2F0_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 6988 #define C_00B2F0_TRAP_PRESENT 0xFFFFFFBF 6989 #define S_00B2F0_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) 6990 #define G_00B2F0_OC_LDS_EN(x) (((x) >> 7) & 0x1) 6991 #define C_00B2F0_OC_LDS_EN 0xFFFFFF7F 6992 #define S_00B2F0_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 8) 6993 #define G_00B2F0_EXCP_EN(x) (((x) >> 8) & 0x1FF) 6994 #define C_00B2F0_EXCP_EN 0xFFFE00FF 6995 #define V_00B2F0_INVALID 1 6996 #define V_00B2F0_INPUT_DENORMAL 2 6997 #define V_00B2F0_DIVIDE_BY_ZERO 4 6998 #define V_00B2F0_OVERFLOW 8 6999 #define V_00B2F0_UNDERFLOW 16 7000 #define V_00B2F0_INEXACT 32 7001 #define V_00B2F0_INT_DIVIDE_BY_ZERO 64 7002 #define V_00B2F0_ADDRESS_WATCH 128 7003 #define V_00B2F0_MEMORY_VIOLATION 256 7004 #define S_00B2F0_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 20) 7005 #define G_00B2F0_LDS_SIZE(x) (((x) >> 20) & 0x1FF) 7006 #define C_00B2F0_LDS_SIZE 0xE00FFFFF 7007 #define R_00B300_SPI_SHADER_TBA_LO_ES 0x00B300 /* <= gfx81 */ 7008 #define R_00B304_SPI_SHADER_TBA_HI_ES 0x00B304 /* <= gfx81 */ 7009 #define S_00B304_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7010 #define G_00B304_MEM_BASE(x) (((x) >> 0) & 0xFF) 7011 #define C_00B304_MEM_BASE 0xFFFFFF00 7012 #define R_00B308_SPI_SHADER_TMA_LO_ES 0x00B308 /* <= gfx81 */ 7013 #define R_00B30C_SPI_SHADER_TMA_HI_ES 0x00B30C /* <= gfx81 */ 7014 #define S_00B30C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7015 #define G_00B30C_MEM_BASE(x) (((x) >> 0) & 0xFF) 7016 #define C_00B30C_MEM_BASE 0xFFFFFF00 7017 #define R_00B31C_SPI_SHADER_PGM_RSRC3_ES 0x00B31C /* gfx7, gfx8, gfx81, gfx10 */ 7018 #define S_00B31C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 7019 #define G_00B31C_CU_EN(x) (((x) >> 0) & 0xFFFF) 7020 #define C_00B31C_CU_EN 0xFFFF0000 7021 #define S_00B31C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 7022 #define G_00B31C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 7023 #define C_00B31C_WAVE_LIMIT 0xFFC0FFFF 7024 #define S_00B31C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0xF) << 22) 7025 #define G_00B31C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0xF) 7026 #define C_00B31C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 7027 #define S_00B31C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) /* gfx8, gfx81, gfx10 */ 7028 #define G_00B31C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) 7029 #define C_00B31C_GROUP_FIFO_DEPTH 0x03FFFFFF 7030 #define R_00B320_SPI_SHADER_PGM_LO_ES 0x00B320 /* <= gfx81, >= gfx10 */ 7031 #define R_00B324_SPI_SHADER_PGM_HI_ES 0x00B324 /* <= gfx81, >= gfx10 */ 7032 #define S_00B324_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7033 #define G_00B324_MEM_BASE(x) (((x) >> 0) & 0xFF) 7034 #define C_00B324_MEM_BASE 0xFFFFFF00 7035 #define R_00B328_SPI_SHADER_PGM_RSRC1_ES 0x00B328 /* <= gfx81, gfx10 */ 7036 #define S_00B328_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 7037 #define G_00B328_VGPRS(x) (((x) >> 0) & 0x3F) 7038 #define C_00B328_VGPRS 0xFFFFFFC0 7039 #define S_00B328_SGPRS(x) (((unsigned)(x) & 0xF) << 6) 7040 #define G_00B328_SGPRS(x) (((x) >> 6) & 0xF) 7041 #define C_00B328_SGPRS 0xFFFFFC3F 7042 #define S_00B328_PRIORITY(x) (((unsigned)(x) & 0x3) << 10) 7043 #define G_00B328_PRIORITY(x) (((x) >> 10) & 0x3) 7044 #define C_00B328_PRIORITY 0xFFFFF3FF 7045 #define S_00B328_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 7046 #define G_00B328_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 7047 #define C_00B328_FLOAT_MODE 0xFFF00FFF 7048 #define V_00B328_FP_32_DENORMS 48 7049 #define V_00B328_FP_64_DENORMS 192 7050 #define V_00B328_FP_ALL_DENORMS 240 7051 #define S_00B328_PRIV(x) (((unsigned)(x) & 0x1) << 20) 7052 #define G_00B328_PRIV(x) (((x) >> 20) & 0x1) 7053 #define C_00B328_PRIV 0xFFEFFFFF 7054 #define S_00B328_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 7055 #define G_00B328_DX10_CLAMP(x) (((x) >> 21) & 0x1) 7056 #define C_00B328_DX10_CLAMP 0xFFDFFFFF 7057 #define S_00B328_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) /* <= gfx81 */ 7058 #define G_00B328_DEBUG_MODE(x) (((x) >> 22) & 0x1) 7059 #define C_00B328_DEBUG_MODE 0xFFBFFFFF 7060 #define S_00B328_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 7061 #define G_00B328_IEEE_MODE(x) (((x) >> 23) & 0x1) 7062 #define C_00B328_IEEE_MODE 0xFF7FFFFF 7063 #define S_00B328_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x3) << 24) 7064 #define G_00B328_VGPR_COMP_CNT(x) (((x) >> 24) & 0x3) 7065 #define C_00B328_VGPR_COMP_CNT 0xFCFFFFFF 7066 #define S_00B328_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 7067 #define G_00B328_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) 7068 #define C_00B328_CU_GROUP_ENABLE 0xFBFFFFFF 7069 #define S_00B328_CACHE_CTL(x) (((unsigned)(x) & 0x7) << 27) /* <= gfx81 */ 7070 #define G_00B328_CACHE_CTL(x) (((x) >> 27) & 0x7) 7071 #define C_00B328_CACHE_CTL 0xC7FFFFFF 7072 #define S_00B328_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) /* <= gfx81 */ 7073 #define G_00B328_CDBG_USER(x) (((x) >> 30) & 0x1) 7074 #define C_00B328_CDBG_USER 0xBFFFFFFF 7075 #define S_00B328_FP16_OVFL(x) (((unsigned)(x) & 0x1) << 31) /* gfx10 */ 7076 #define G_00B328_FP16_OVFL(x) (((x) >> 31) & 0x1) 7077 #define C_00B328_FP16_OVFL 0x7FFFFFFF 7078 #define R_00B32C_SPI_SHADER_PGM_RSRC2_ES 0x00B32C /* <= gfx81, gfx10 */ 7079 #define S_00B32C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 7080 #define G_00B32C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 7081 #define C_00B32C_SCRATCH_EN 0xFFFFFFFE 7082 #define S_00B32C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 7083 #define G_00B32C_USER_SGPR(x) (((x) >> 1) & 0x1F) 7084 #define C_00B32C_USER_SGPR 0xFFFFFFC1 7085 #define S_00B32C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 7086 #define G_00B32C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 7087 #define C_00B32C_TRAP_PRESENT 0xFFFFFFBF 7088 #define S_00B32C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) 7089 #define G_00B32C_OC_LDS_EN(x) (((x) >> 7) & 0x1) 7090 #define C_00B32C_OC_LDS_EN 0xFFFFFF7F 7091 #define S_00B32C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 8) 7092 #define G_00B32C_EXCP_EN(x) (((x) >> 8) & 0x1FF) 7093 #define C_00B32C_EXCP_EN 0xFFFE00FF 7094 #define V_00B32C_INVALID 1 7095 #define V_00B32C_INPUT_DENORMAL 2 7096 #define V_00B32C_DIVIDE_BY_ZERO 4 7097 #define V_00B32C_OVERFLOW 8 7098 #define V_00B32C_UNDERFLOW 16 7099 #define V_00B32C_INEXACT 32 7100 #define V_00B32C_INT_DIVIDE_BY_ZERO 64 7101 #define V_00B32C_ADDRESS_WATCH 128 7102 #define V_00B32C_MEMORY_VIOLATION 256 7103 #define S_00B32C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 20) 7104 #define G_00B32C_LDS_SIZE(x) (((x) >> 20) & 0x1FF) 7105 #define C_00B32C_LDS_SIZE 0xE00FFFFF 7106 #define R_00B330_SPI_SHADER_USER_DATA_ES_0 0x00B330 /* <= gfx10 */ 7107 #define R_00B334_SPI_SHADER_USER_DATA_ES_1 0x00B334 /* <= gfx10 */ 7108 #define R_00B338_SPI_SHADER_USER_DATA_ES_2 0x00B338 /* <= gfx10 */ 7109 #define R_00B33C_SPI_SHADER_USER_DATA_ES_3 0x00B33C /* <= gfx10 */ 7110 #define R_00B340_SPI_SHADER_USER_DATA_ES_4 0x00B340 /* <= gfx10 */ 7111 #define R_00B344_SPI_SHADER_USER_DATA_ES_5 0x00B344 /* <= gfx10 */ 7112 #define R_00B348_SPI_SHADER_USER_DATA_ES_6 0x00B348 /* <= gfx10 */ 7113 #define R_00B34C_SPI_SHADER_USER_DATA_ES_7 0x00B34C /* <= gfx10 */ 7114 #define R_00B350_SPI_SHADER_USER_DATA_ES_8 0x00B350 /* <= gfx10 */ 7115 #define R_00B354_SPI_SHADER_USER_DATA_ES_9 0x00B354 /* <= gfx10 */ 7116 #define R_00B358_SPI_SHADER_USER_DATA_ES_10 0x00B358 /* <= gfx10 */ 7117 #define R_00B35C_SPI_SHADER_USER_DATA_ES_11 0x00B35C /* <= gfx10 */ 7118 #define R_00B360_SPI_SHADER_USER_DATA_ES_12 0x00B360 /* <= gfx10 */ 7119 #define R_00B364_SPI_SHADER_USER_DATA_ES_13 0x00B364 /* <= gfx10 */ 7120 #define R_00B368_SPI_SHADER_USER_DATA_ES_14 0x00B368 /* <= gfx10 */ 7121 #define R_00B36C_SPI_SHADER_USER_DATA_ES_15 0x00B36C /* <= gfx10 */ 7122 #define R_00B370_SPI_SHADER_USER_DATA_ES_16 0x00B370 /* gfx9 */ 7123 #define R_00B374_SPI_SHADER_USER_DATA_ES_17 0x00B374 /* gfx9 */ 7124 #define R_00B378_SPI_SHADER_USER_DATA_ES_18 0x00B378 /* gfx9 */ 7125 #define R_00B37C_SPI_SHADER_USER_DATA_ES_19 0x00B37C /* gfx9 */ 7126 #define R_00B380_SPI_SHADER_USER_DATA_ES_20 0x00B380 /* gfx9 */ 7127 #define R_00B384_SPI_SHADER_USER_DATA_ES_21 0x00B384 /* gfx9 */ 7128 #define R_00B388_SPI_SHADER_USER_DATA_ES_22 0x00B388 /* gfx9 */ 7129 #define R_00B38C_SPI_SHADER_USER_DATA_ES_23 0x00B38C /* gfx9 */ 7130 #define R_00B390_SPI_SHADER_USER_DATA_ES_24 0x00B390 /* gfx9 */ 7131 #define R_00B394_SPI_SHADER_USER_DATA_ES_25 0x00B394 /* gfx9 */ 7132 #define R_00B398_SPI_SHADER_USER_DATA_ES_26 0x00B398 /* gfx9 */ 7133 #define R_00B39C_SPI_SHADER_USER_DATA_ES_27 0x00B39C /* gfx9 */ 7134 #define R_00B3A0_SPI_SHADER_USER_DATA_ES_28 0x00B3A0 /* gfx9 */ 7135 #define R_00B3A4_SPI_SHADER_USER_DATA_ES_29 0x00B3A4 /* gfx9 */ 7136 #define R_00B3A8_SPI_SHADER_USER_DATA_ES_30 0x00B3A8 /* gfx9 */ 7137 #define R_00B3AC_SPI_SHADER_USER_DATA_ES_31 0x00B3AC /* gfx9 */ 7138 #define R_00B3F4_SPI_SHADER_PGM_RSRC2_LS_ES 0x00B3F4 /* gfx7, gfx8, gfx81, gfx10 */ 7139 #define S_00B3F4_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 7140 #define G_00B3F4_SCRATCH_EN(x) (((x) >> 0) & 0x1) 7141 #define C_00B3F4_SCRATCH_EN 0xFFFFFFFE 7142 #define S_00B3F4_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 7143 #define G_00B3F4_USER_SGPR(x) (((x) >> 1) & 0x1F) 7144 #define C_00B3F4_USER_SGPR 0xFFFFFFC1 7145 #define S_00B3F4_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 7146 #define G_00B3F4_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 7147 #define C_00B3F4_TRAP_PRESENT 0xFFFFFFBF 7148 #define S_00B3F4_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 7) 7149 #define G_00B3F4_LDS_SIZE(x) (((x) >> 7) & 0x1FF) 7150 #define C_00B3F4_LDS_SIZE 0xFFFF007F 7151 #define S_00B3F4_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 16) 7152 #define G_00B3F4_EXCP_EN(x) (((x) >> 16) & 0x1FF) 7153 #define C_00B3F4_EXCP_EN 0xFE00FFFF 7154 #define V_00B3F4_INVALID 1 7155 #define V_00B3F4_INPUT_DENORMAL 2 7156 #define V_00B3F4_DIVIDE_BY_ZERO 4 7157 #define V_00B3F4_OVERFLOW 8 7158 #define V_00B3F4_UNDERFLOW 16 7159 #define V_00B3F4_INEXACT 32 7160 #define V_00B3F4_INT_DIVIDE_BY_ZERO 64 7161 #define V_00B3F4_ADDRESS_WATCH 128 7162 #define V_00B3F4_MEMORY_VIOLATION 256 7163 #define R_00B400_SPI_SHADER_PGM_CHKSUM_HS 0x00B400 /* >= gfx10 */ 7164 #define R_00B400_SPI_SHADER_TBA_LO_HS 0x00B400 /* <= gfx81 */ 7165 #define R_00B404_SPI_SHADER_PGM_RSRC4_HS 0x00B404 /* >= gfx9 */ 7166 #define S_00B404_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) /* >= gfx10 */ 7167 #define G_00B404_CU_EN(x) (((x) >> 0) & 0xFFFF) 7168 #define C_00B404_CU_EN 0xFFFF0000 7169 #define S_00B404_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x7F) << 0) /* gfx9 */ 7170 #define G_00B404_GROUP_FIFO_DEPTH(x) (((x) >> 0) & 0x7F) 7171 #define C_00B404_GROUP_FIFO_DEPTH 0xFFFFFF80 7172 #define R_00B404_SPI_SHADER_TBA_HI_HS 0x00B404 /* <= gfx81 */ 7173 #define S_00B404_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7174 #define G_00B404_MEM_BASE(x) (((x) >> 0) & 0xFF) 7175 #define C_00B404_MEM_BASE 0xFFFFFF00 7176 #define R_00B408_SPI_SHADER_TMA_LO_HS 0x00B408 /* <= gfx81 */ 7177 #define R_00B408_SPI_SHADER_USER_DATA_ADDR_LO_HS 0x00B408 /* >= gfx9 */ 7178 #define R_00B40C_SPI_SHADER_TMA_HI_HS 0x00B40C /* <= gfx81 */ 7179 #define S_00B40C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7180 #define G_00B40C_MEM_BASE(x) (((x) >> 0) & 0xFF) 7181 #define C_00B40C_MEM_BASE 0xFFFFFF00 7182 #define R_00B40C_SPI_SHADER_USER_DATA_ADDR_HI_HS 0x00B40C /* >= gfx9 */ 7183 #define R_00B410_SPI_SHADER_PGM_LO_LS 0x00B410 /* gfx9 */ 7184 #define R_00B410_SPI_SHADER_PGM_LO_LS_HS 0x00B410 /* >= gfx10 */ 7185 #define R_00B414_SPI_SHADER_PGM_HI_LS 0x00B414 /* gfx9 */ 7186 #define S_00B414_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7187 #define G_00B414_MEM_BASE(x) (((x) >> 0) & 0xFF) 7188 #define C_00B414_MEM_BASE 0xFFFFFF00 7189 #define R_00B414_SPI_SHADER_PGM_HI_LS_HS 0x00B414 /* >= gfx10 */ 7190 #define R_00B41C_SPI_SHADER_PGM_RSRC3_HS 0x00B41C /* >= gfx7 */ 7191 #define S_00B41C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) 7192 #define G_00B41C_WAVE_LIMIT(x) (((x) >> 0) & 0x3F) 7193 #define C_00B41C_WAVE_LIMIT 0xFFFFFFC0 7194 #define S_00B41C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0xF) << 6) 7195 #define G_00B41C_LOCK_LOW_THRESHOLD(x) (((x) >> 6) & 0xF) 7196 #define C_00B41C_LOCK_LOW_THRESHOLD 0xFFFFFC3F 7197 #define S_00B41C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 10) /* gfx8, gfx81, >= gfx10 */ 7198 #define G_00B41C_GROUP_FIFO_DEPTH(x) (((x) >> 10) & 0x3F) 7199 #define C_00B41C_GROUP_FIFO_DEPTH 0xFFFF03FF 7200 #define S_00B41C_SIMD_DISABLE(x) (((unsigned)(x) & 0xF) << 10) /* gfx9 */ 7201 #define G_00B41C_SIMD_DISABLE(x) (((x) >> 10) & 0xF) 7202 #define C_00B41C_SIMD_DISABLE 0xFFFFC3FF 7203 #define S_00B41C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) /* >= gfx9 */ 7204 #define G_00B41C_CU_EN(x) (((x) >> 16) & 0xFFFF) 7205 #define C_00B41C_CU_EN 0x0000FFFF 7206 #define R_00B420_SPI_SHADER_PGM_LO_HS 0x00B420 7207 #define R_00B424_SPI_SHADER_PGM_HI_HS 0x00B424 7208 #define S_00B424_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7209 #define G_00B424_MEM_BASE(x) (((x) >> 0) & 0xFF) 7210 #define C_00B424_MEM_BASE 0xFFFFFF00 7211 #define R_00B428_SPI_SHADER_PGM_RSRC1_HS 0x00B428 7212 #define S_00B428_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 7213 #define G_00B428_VGPRS(x) (((x) >> 0) & 0x3F) 7214 #define C_00B428_VGPRS 0xFFFFFFC0 7215 #define S_00B428_SGPRS(x) (((unsigned)(x) & 0xF) << 6) 7216 #define G_00B428_SGPRS(x) (((x) >> 6) & 0xF) 7217 #define C_00B428_SGPRS 0xFFFFFC3F 7218 #define S_00B428_PRIORITY(x) (((unsigned)(x) & 0x3) << 10) 7219 #define G_00B428_PRIORITY(x) (((x) >> 10) & 0x3) 7220 #define C_00B428_PRIORITY 0xFFFFF3FF 7221 #define S_00B428_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 7222 #define G_00B428_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 7223 #define C_00B428_FLOAT_MODE 0xFFF00FFF 7224 #define V_00B428_FP_32_DENORMS 48 7225 #define V_00B428_FP_64_DENORMS 192 7226 #define V_00B428_FP_ALL_DENORMS 240 7227 #define S_00B428_PRIV(x) (((unsigned)(x) & 0x1) << 20) 7228 #define G_00B428_PRIV(x) (((x) >> 20) & 0x1) 7229 #define C_00B428_PRIV 0xFFEFFFFF 7230 #define S_00B428_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 7231 #define G_00B428_DX10_CLAMP(x) (((x) >> 21) & 0x1) 7232 #define C_00B428_DX10_CLAMP 0xFFDFFFFF 7233 #define S_00B428_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) /* <= gfx9 */ 7234 #define G_00B428_DEBUG_MODE(x) (((x) >> 22) & 0x1) 7235 #define C_00B428_DEBUG_MODE 0xFFBFFFFF 7236 #define S_00B428_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 7237 #define G_00B428_IEEE_MODE(x) (((x) >> 23) & 0x1) 7238 #define C_00B428_IEEE_MODE 0xFF7FFFFF 7239 #define S_00B428_CACHE_CTL(x) (((unsigned)(x) & 0x7) << 24) /* <= gfx81 */ 7240 #define G_00B428_CACHE_CTL(x) (((x) >> 24) & 0x7) 7241 #define C_00B428_CACHE_CTL 0xF8FFFFFF 7242 #define S_00B428_MEM_ORDERED(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx10 */ 7243 #define G_00B428_MEM_ORDERED(x) (((x) >> 24) & 0x1) 7244 #define C_00B428_MEM_ORDERED 0xFEFFFFFF 7245 #define S_00B428_FWD_PROGRESS(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx10 */ 7246 #define G_00B428_FWD_PROGRESS(x) (((x) >> 25) & 0x1) 7247 #define C_00B428_FWD_PROGRESS 0xFDFFFFFF 7248 #define S_00B428_WGP_MODE(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx10 */ 7249 #define G_00B428_WGP_MODE(x) (((x) >> 26) & 0x1) 7250 #define C_00B428_WGP_MODE 0xFBFFFFFF 7251 #define S_00B428_CDBG_USER(x) (((unsigned)(x) & 0x1) << 27) /* <= gfx9 */ 7252 #define G_00B428_CDBG_USER(x) (((x) >> 27) & 0x1) 7253 #define C_00B428_CDBG_USER 0xF7FFFFFF 7254 #define S_00B428_LS_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x3) << 28) /* >= gfx9 */ 7255 #define G_00B428_LS_VGPR_COMP_CNT(x) (((x) >> 28) & 0x3) 7256 #define C_00B428_LS_VGPR_COMP_CNT 0xCFFFFFFF 7257 #define S_00B428_FP16_OVFL(x) (((unsigned)(x) & 0x1) << 30) /* >= gfx9 */ 7258 #define G_00B428_FP16_OVFL(x) (((x) >> 30) & 0x1) 7259 #define C_00B428_FP16_OVFL 0xBFFFFFFF 7260 #define R_00B42C_SPI_SHADER_PGM_RSRC2_HS 0x00B42C 7261 #define S_00B42C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 7262 #define G_00B42C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 7263 #define C_00B42C_SCRATCH_EN 0xFFFFFFFE 7264 #define S_00B42C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 7265 #define G_00B42C_USER_SGPR(x) (((x) >> 1) & 0x1F) 7266 #define C_00B42C_USER_SGPR 0xFFFFFFC1 7267 #define S_00B42C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 7268 #define G_00B42C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 7269 #define C_00B42C_TRAP_PRESENT 0xFFFFFFBF 7270 #define S_00B42C_EXCP_EN_GFX9(x) (((unsigned)(x) & 0x1FF) << 7) /* gfx9 */ 7271 #define G_00B42C_EXCP_EN_GFX9(x) (((x) >> 7) & 0x1FF) 7272 #define C_00B42C_EXCP_EN_GFX9 0xFFFF007F 7273 #define V_00B42C_INVALID 1 7274 #define V_00B42C_INPUT_DENORMAL 2 7275 #define V_00B42C_DIVIDE_BY_ZERO 4 7276 #define V_00B42C_OVERFLOW 8 7277 #define V_00B42C_UNDERFLOW 16 7278 #define V_00B42C_INEXACT 32 7279 #define V_00B42C_INT_DIVIDE_BY_ZERO 64 7280 #define V_00B42C_ADDRESS_WATCH 128 7281 #define V_00B42C_MEMORY_VIOLATION 256 7282 #define S_00B42C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) /* <= gfx81, >= gfx10 */ 7283 #define G_00B42C_OC_LDS_EN(x) (((x) >> 7) & 0x1) 7284 #define C_00B42C_OC_LDS_EN 0xFFFFFF7F 7285 #define S_00B42C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 8) /* <= gfx81, >= gfx10 */ 7286 #define G_00B42C_TG_SIZE_EN(x) (((x) >> 8) & 0x1) 7287 #define C_00B42C_TG_SIZE_EN 0xFFFFFEFF 7288 #define S_00B42C_EXCP_EN_GFX6(x) (((unsigned)(x) & 0x1FF) << 9) /* <= gfx81, >= gfx10 */ 7289 #define G_00B42C_EXCP_EN_GFX6(x) (((x) >> 9) & 0x1FF) 7290 #define C_00B42C_EXCP_EN_GFX6 0xFFFC01FF 7291 #define S_00B42C_LDS_SIZE_GFX9(x) (((unsigned)(x) & 0x1FF) << 16) /* gfx9 */ 7292 #define G_00B42C_LDS_SIZE_GFX9(x) (((x) >> 16) & 0x1FF) 7293 #define C_00B42C_LDS_SIZE_GFX9 0xFE00FFFF 7294 #define S_00B42C_LDS_SIZE_GFX10(x) (((unsigned)(x) & 0x1FF) << 18) /* >= gfx10 */ 7295 #define G_00B42C_LDS_SIZE_GFX10(x) (((x) >> 18) & 0x1FF) 7296 #define C_00B42C_LDS_SIZE_GFX10 0xF803FFFF 7297 #define S_00B42C_SKIP_USGPR0(x) (((unsigned)(x) & 0x1) << 27) /* gfx9 */ 7298 #define G_00B42C_SKIP_USGPR0(x) (((x) >> 27) & 0x1) 7299 #define C_00B42C_SKIP_USGPR0 0xF7FFFFFF 7300 #define S_00B42C_USER_SGPR_MSB_GFX10(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 7301 #define G_00B42C_USER_SGPR_MSB_GFX10(x) (((x) >> 27) & 0x1) 7302 #define C_00B42C_USER_SGPR_MSB_GFX10 0xF7FFFFFF 7303 #define S_00B42C_SHARED_VGPR_CNT(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx10 */ 7304 #define G_00B42C_SHARED_VGPR_CNT(x) (((x) >> 28) & 0xF) 7305 #define C_00B42C_SHARED_VGPR_CNT 0x0FFFFFFF 7306 #define S_00B42C_USER_SGPR_MSB_GFX9(x) (((unsigned)(x) & 0x1) << 28) /* gfx9 */ 7307 #define G_00B42C_USER_SGPR_MSB_GFX9(x) (((x) >> 28) & 0x1) 7308 #define C_00B42C_USER_SGPR_MSB_GFX9 0xEFFFFFFF 7309 #define R_00B430_SPI_SHADER_USER_DATA_HS_0 0x00B430 /* <= gfx81, >= gfx10 */ 7310 #define R_00B430_SPI_SHADER_USER_DATA_LS_0 0x00B430 /* gfx9 */ 7311 #define R_00B434_SPI_SHADER_USER_DATA_HS_1 0x00B434 /* <= gfx81, >= gfx10 */ 7312 #define R_00B434_SPI_SHADER_USER_DATA_LS_1 0x00B434 /* gfx9 */ 7313 #define R_00B438_SPI_SHADER_USER_DATA_HS_2 0x00B438 /* <= gfx81, >= gfx10 */ 7314 #define R_00B438_SPI_SHADER_USER_DATA_LS_2 0x00B438 /* gfx9 */ 7315 #define R_00B43C_SPI_SHADER_USER_DATA_HS_3 0x00B43C /* <= gfx81, >= gfx10 */ 7316 #define R_00B43C_SPI_SHADER_USER_DATA_LS_3 0x00B43C /* gfx9 */ 7317 #define R_00B440_SPI_SHADER_USER_DATA_HS_4 0x00B440 /* <= gfx81, >= gfx10 */ 7318 #define R_00B440_SPI_SHADER_USER_DATA_LS_4 0x00B440 /* gfx9 */ 7319 #define R_00B444_SPI_SHADER_USER_DATA_HS_5 0x00B444 /* <= gfx81, >= gfx10 */ 7320 #define R_00B444_SPI_SHADER_USER_DATA_LS_5 0x00B444 /* gfx9 */ 7321 #define R_00B448_SPI_SHADER_USER_DATA_HS_6 0x00B448 /* <= gfx81, >= gfx10 */ 7322 #define R_00B448_SPI_SHADER_USER_DATA_LS_6 0x00B448 /* gfx9 */ 7323 #define R_00B44C_SPI_SHADER_USER_DATA_HS_7 0x00B44C /* <= gfx81, >= gfx10 */ 7324 #define R_00B44C_SPI_SHADER_USER_DATA_LS_7 0x00B44C /* gfx9 */ 7325 #define R_00B450_SPI_SHADER_USER_DATA_HS_8 0x00B450 /* <= gfx81, >= gfx10 */ 7326 #define R_00B450_SPI_SHADER_USER_DATA_LS_8 0x00B450 /* gfx9 */ 7327 #define R_00B454_SPI_SHADER_USER_DATA_HS_9 0x00B454 /* <= gfx81, >= gfx10 */ 7328 #define R_00B454_SPI_SHADER_USER_DATA_LS_9 0x00B454 /* gfx9 */ 7329 #define R_00B458_SPI_SHADER_USER_DATA_HS_10 0x00B458 /* <= gfx81, >= gfx10 */ 7330 #define R_00B458_SPI_SHADER_USER_DATA_LS_10 0x00B458 /* gfx9 */ 7331 #define R_00B45C_SPI_SHADER_USER_DATA_HS_11 0x00B45C /* <= gfx81, >= gfx10 */ 7332 #define R_00B45C_SPI_SHADER_USER_DATA_LS_11 0x00B45C /* gfx9 */ 7333 #define R_00B460_SPI_SHADER_USER_DATA_HS_12 0x00B460 /* <= gfx81, >= gfx10 */ 7334 #define R_00B460_SPI_SHADER_USER_DATA_LS_12 0x00B460 /* gfx9 */ 7335 #define R_00B464_SPI_SHADER_USER_DATA_HS_13 0x00B464 /* <= gfx81, >= gfx10 */ 7336 #define R_00B464_SPI_SHADER_USER_DATA_LS_13 0x00B464 /* gfx9 */ 7337 #define R_00B468_SPI_SHADER_USER_DATA_HS_14 0x00B468 /* <= gfx81, >= gfx10 */ 7338 #define R_00B468_SPI_SHADER_USER_DATA_LS_14 0x00B468 /* gfx9 */ 7339 #define R_00B46C_SPI_SHADER_USER_DATA_HS_15 0x00B46C /* <= gfx81, >= gfx10 */ 7340 #define R_00B46C_SPI_SHADER_USER_DATA_LS_15 0x00B46C /* gfx9 */ 7341 #define R_00B470_SPI_SHADER_USER_DATA_HS_16 0x00B470 /* >= gfx10 */ 7342 #define R_00B470_SPI_SHADER_USER_DATA_LS_16 0x00B470 /* gfx9 */ 7343 #define R_00B474_SPI_SHADER_USER_DATA_HS_17 0x00B474 /* >= gfx10 */ 7344 #define R_00B474_SPI_SHADER_USER_DATA_LS_17 0x00B474 /* gfx9 */ 7345 #define R_00B478_SPI_SHADER_USER_DATA_HS_18 0x00B478 /* >= gfx10 */ 7346 #define R_00B478_SPI_SHADER_USER_DATA_LS_18 0x00B478 /* gfx9 */ 7347 #define R_00B47C_SPI_SHADER_USER_DATA_HS_19 0x00B47C /* >= gfx10 */ 7348 #define R_00B47C_SPI_SHADER_USER_DATA_LS_19 0x00B47C /* gfx9 */ 7349 #define R_00B480_SPI_SHADER_USER_DATA_HS_20 0x00B480 /* >= gfx10 */ 7350 #define R_00B480_SPI_SHADER_USER_DATA_LS_20 0x00B480 /* gfx9 */ 7351 #define R_00B484_SPI_SHADER_USER_DATA_HS_21 0x00B484 /* >= gfx10 */ 7352 #define R_00B484_SPI_SHADER_USER_DATA_LS_21 0x00B484 /* gfx9 */ 7353 #define R_00B488_SPI_SHADER_USER_DATA_HS_22 0x00B488 /* >= gfx10 */ 7354 #define R_00B488_SPI_SHADER_USER_DATA_LS_22 0x00B488 /* gfx9 */ 7355 #define R_00B48C_SPI_SHADER_USER_DATA_HS_23 0x00B48C /* >= gfx10 */ 7356 #define R_00B48C_SPI_SHADER_USER_DATA_LS_23 0x00B48C /* gfx9 */ 7357 #define R_00B490_SPI_SHADER_USER_DATA_HS_24 0x00B490 /* >= gfx10 */ 7358 #define R_00B490_SPI_SHADER_USER_DATA_LS_24 0x00B490 /* gfx9 */ 7359 #define R_00B494_SPI_SHADER_USER_DATA_HS_25 0x00B494 /* >= gfx10 */ 7360 #define R_00B494_SPI_SHADER_USER_DATA_LS_25 0x00B494 /* gfx9 */ 7361 #define R_00B498_SPI_SHADER_USER_DATA_HS_26 0x00B498 /* >= gfx10 */ 7362 #define R_00B498_SPI_SHADER_USER_DATA_LS_26 0x00B498 /* gfx9 */ 7363 #define R_00B49C_SPI_SHADER_USER_DATA_HS_27 0x00B49C /* >= gfx10 */ 7364 #define R_00B49C_SPI_SHADER_USER_DATA_LS_27 0x00B49C /* gfx9 */ 7365 #define R_00B4A0_SPI_SHADER_USER_DATA_HS_28 0x00B4A0 /* >= gfx10 */ 7366 #define R_00B4A0_SPI_SHADER_USER_DATA_LS_28 0x00B4A0 /* gfx9 */ 7367 #define R_00B4A4_SPI_SHADER_USER_DATA_HS_29 0x00B4A4 /* >= gfx10 */ 7368 #define R_00B4A4_SPI_SHADER_USER_DATA_LS_29 0x00B4A4 /* gfx9 */ 7369 #define R_00B4A8_SPI_SHADER_USER_DATA_HS_30 0x00B4A8 /* >= gfx10 */ 7370 #define R_00B4A8_SPI_SHADER_USER_DATA_LS_30 0x00B4A8 /* gfx9 */ 7371 #define R_00B4AC_SPI_SHADER_USER_DATA_HS_31 0x00B4AC /* >= gfx10 */ 7372 #define R_00B4AC_SPI_SHADER_USER_DATA_LS_31 0x00B4AC /* gfx9 */ 7373 #define R_00B4C0_SPI_SHADER_REQ_CTRL_LSHS 0x00B4C0 /* >= gfx10 */ 7374 #define S_00B4C0_SOFT_GROUPING_EN(x) (((unsigned)(x) & 0x1) << 0) 7375 #define G_00B4C0_SOFT_GROUPING_EN(x) (((x) >> 0) & 0x1) 7376 #define C_00B4C0_SOFT_GROUPING_EN 0xFFFFFFFE 7377 #define S_00B4C0_NUMBER_OF_REQUESTS_PER_CU(x) (((unsigned)(x) & 0xF) << 1) 7378 #define G_00B4C0_NUMBER_OF_REQUESTS_PER_CU(x) (((x) >> 1) & 0xF) 7379 #define C_00B4C0_NUMBER_OF_REQUESTS_PER_CU 0xFFFFFFE1 7380 #define S_00B4C0_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((unsigned)(x) & 0xF) << 5) 7381 #define G_00B4C0_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((x) >> 5) & 0xF) 7382 #define C_00B4C0_SOFT_GROUPING_ALLOCATION_TIMEOUT 0xFFFFFE1F 7383 #define S_00B4C0_HARD_LOCK_HYSTERESIS(x) (((unsigned)(x) & 0x1) << 9) 7384 #define G_00B4C0_HARD_LOCK_HYSTERESIS(x) (((x) >> 9) & 0x1) 7385 #define C_00B4C0_HARD_LOCK_HYSTERESIS 0xFFFFFDFF 7386 #define S_00B4C0_HARD_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x1F) << 10) 7387 #define G_00B4C0_HARD_LOCK_LOW_THRESHOLD(x) (((x) >> 10) & 0x1F) 7388 #define C_00B4C0_HARD_LOCK_LOW_THRESHOLD 0xFFFF83FF 7389 #define S_00B4C0_PRODUCER_REQUEST_LOCKOUT(x) (((unsigned)(x) & 0x1) << 15) 7390 #define G_00B4C0_PRODUCER_REQUEST_LOCKOUT(x) (((x) >> 15) & 0x1) 7391 #define C_00B4C0_PRODUCER_REQUEST_LOCKOUT 0xFFFF7FFF 7392 #define S_00B4C0_GLOBAL_SCANNING_EN(x) (((unsigned)(x) & 0x1) << 16) 7393 #define G_00B4C0_GLOBAL_SCANNING_EN(x) (((x) >> 16) & 0x1) 7394 #define C_00B4C0_GLOBAL_SCANNING_EN 0xFFFEFFFF 7395 #define S_00B4C0_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((unsigned)(x) & 0x7) << 17) 7396 #define G_00B4C0_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((x) >> 17) & 0x7) 7397 #define C_00B4C0_ALLOCATION_RATE_THROTTLING_THRESHOLD 0xFFF1FFFF 7398 #define R_00B4C4_SPI_SHADER_PREF_PRI_CNTR_CTRL_LSHS 0x00B4C4 /* gfx10 */ 7399 #define S_00B4C4_TOTAL_WAVE_COUNT_HIER_SELECT(x) (((unsigned)(x) & 0x7) << 0) 7400 #define G_00B4C4_TOTAL_WAVE_COUNT_HIER_SELECT(x) (((x) >> 0) & 0x7) 7401 #define C_00B4C4_TOTAL_WAVE_COUNT_HIER_SELECT 0xFFFFFFF8 7402 #define S_00B4C4_PER_TYPE_WAVE_COUNT_HIER_SELECT(x) (((unsigned)(x) & 0x7) << 3) 7403 #define G_00B4C4_PER_TYPE_WAVE_COUNT_HIER_SELECT(x) (((x) >> 3) & 0x7) 7404 #define C_00B4C4_PER_TYPE_WAVE_COUNT_HIER_SELECT 0xFFFFFFC7 7405 #define S_00B4C4_GROUP_UPDATE_EN(x) (((unsigned)(x) & 0x1) << 6) 7406 #define G_00B4C4_GROUP_UPDATE_EN(x) (((x) >> 6) & 0x1) 7407 #define C_00B4C4_GROUP_UPDATE_EN 0xFFFFFFBF 7408 #define S_00B4C4_TOTAL_WAVE_COUNT_COEFFICIENT(x) (((unsigned)(x) & 0xFF) << 8) 7409 #define G_00B4C4_TOTAL_WAVE_COUNT_COEFFICIENT(x) (((x) >> 8) & 0xFF) 7410 #define C_00B4C4_TOTAL_WAVE_COUNT_COEFFICIENT 0xFFFF00FF 7411 #define S_00B4C4_PER_TYPE_WAVE_COUNT_COEFFICIENT(x) (((unsigned)(x) & 0xFF) << 16) 7412 #define G_00B4C4_PER_TYPE_WAVE_COUNT_COEFFICIENT(x) (((x) >> 16) & 0xFF) 7413 #define C_00B4C4_PER_TYPE_WAVE_COUNT_COEFFICIENT 0xFF00FFFF 7414 #define R_00B4C8_SPI_SHADER_USER_ACCUM_LSHS_0 0x00B4C8 /* >= gfx10 */ 7415 #define S_00B4C8_CONTRIBUTION(x) (((unsigned)(x) & 0x7F) << 0) 7416 #define G_00B4C8_CONTRIBUTION(x) (((x) >> 0) & 0x7F) 7417 #define C_00B4C8_CONTRIBUTION 0xFFFFFF80 7418 #define R_00B4CC_SPI_SHADER_USER_ACCUM_LSHS_1 0x00B4CC /* >= gfx10 */ 7419 #define R_00B4D0_SPI_SHADER_USER_ACCUM_LSHS_2 0x00B4D0 /* >= gfx10 */ 7420 #define R_00B4D4_SPI_SHADER_USER_ACCUM_LSHS_3 0x00B4D4 /* >= gfx10 */ 7421 #define R_00B4F4_SPI_SHADER_PGM_RSRC2_LS_HS 0x00B4F4 /* gfx7, gfx8, gfx81, gfx10 */ 7422 #define S_00B4F4_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 7423 #define G_00B4F4_SCRATCH_EN(x) (((x) >> 0) & 0x1) 7424 #define C_00B4F4_SCRATCH_EN 0xFFFFFFFE 7425 #define S_00B4F4_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 7426 #define G_00B4F4_USER_SGPR(x) (((x) >> 1) & 0x1F) 7427 #define C_00B4F4_USER_SGPR 0xFFFFFFC1 7428 #define S_00B4F4_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 7429 #define G_00B4F4_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 7430 #define C_00B4F4_TRAP_PRESENT 0xFFFFFFBF 7431 #define S_00B4F4_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 7) 7432 #define G_00B4F4_LDS_SIZE(x) (((x) >> 7) & 0x1FF) 7433 #define C_00B4F4_LDS_SIZE 0xFFFF007F 7434 #define S_00B4F4_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 16) 7435 #define G_00B4F4_EXCP_EN(x) (((x) >> 16) & 0x1FF) 7436 #define C_00B4F4_EXCP_EN 0xFE00FFFF 7437 #define V_00B4F4_INVALID 1 7438 #define V_00B4F4_INPUT_DENORMAL 2 7439 #define V_00B4F4_DIVIDE_BY_ZERO 4 7440 #define V_00B4F4_OVERFLOW 8 7441 #define V_00B4F4_UNDERFLOW 16 7442 #define V_00B4F4_INEXACT 32 7443 #define V_00B4F4_INT_DIVIDE_BY_ZERO 64 7444 #define V_00B4F4_ADDRESS_WATCH 128 7445 #define V_00B4F4_MEMORY_VIOLATION 256 7446 #define R_00B500_SPI_SHADER_TBA_LO_LS 0x00B500 /* <= gfx81 */ 7447 #define R_00B504_SPI_SHADER_TBA_HI_LS 0x00B504 /* <= gfx81 */ 7448 #define S_00B504_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7449 #define G_00B504_MEM_BASE(x) (((x) >> 0) & 0xFF) 7450 #define C_00B504_MEM_BASE 0xFFFFFF00 7451 #define R_00B508_SPI_SHADER_TMA_LO_LS 0x00B508 /* <= gfx81 */ 7452 #define R_00B50C_SPI_SHADER_TMA_HI_LS 0x00B50C /* <= gfx81 */ 7453 #define S_00B50C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7454 #define G_00B50C_MEM_BASE(x) (((x) >> 0) & 0xFF) 7455 #define C_00B50C_MEM_BASE 0xFFFFFF00 7456 #define R_00B51C_SPI_SHADER_PGM_RSRC3_LS 0x00B51C /* gfx7, gfx8, gfx81, gfx10 */ 7457 #define S_00B51C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 7458 #define G_00B51C_CU_EN(x) (((x) >> 0) & 0xFFFF) 7459 #define C_00B51C_CU_EN 0xFFFF0000 7460 #define S_00B51C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 7461 #define G_00B51C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 7462 #define C_00B51C_WAVE_LIMIT 0xFFC0FFFF 7463 #define S_00B51C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0xF) << 22) 7464 #define G_00B51C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0xF) 7465 #define C_00B51C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 7466 #define S_00B51C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) /* gfx8, gfx81, gfx10 */ 7467 #define G_00B51C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) 7468 #define C_00B51C_GROUP_FIFO_DEPTH 0x03FFFFFF 7469 #define R_00B520_SPI_SHADER_PGM_LO_LS 0x00B520 /* <= gfx81, >= gfx10 */ 7470 #define R_00B524_SPI_SHADER_PGM_HI_LS 0x00B524 /* <= gfx81, >= gfx10 */ 7471 #define S_00B524_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 7472 #define G_00B524_MEM_BASE(x) (((x) >> 0) & 0xFF) 7473 #define C_00B524_MEM_BASE 0xFFFFFF00 7474 #define R_00B528_SPI_SHADER_PGM_RSRC1_LS 0x00B528 /* <= gfx81, gfx10 */ 7475 #define S_00B528_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 7476 #define G_00B528_VGPRS(x) (((x) >> 0) & 0x3F) 7477 #define C_00B528_VGPRS 0xFFFFFFC0 7478 #define S_00B528_SGPRS(x) (((unsigned)(x) & 0xF) << 6) 7479 #define G_00B528_SGPRS(x) (((x) >> 6) & 0xF) 7480 #define C_00B528_SGPRS 0xFFFFFC3F 7481 #define S_00B528_PRIORITY(x) (((unsigned)(x) & 0x3) << 10) 7482 #define G_00B528_PRIORITY(x) (((x) >> 10) & 0x3) 7483 #define C_00B528_PRIORITY 0xFFFFF3FF 7484 #define S_00B528_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 7485 #define G_00B528_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 7486 #define C_00B528_FLOAT_MODE 0xFFF00FFF 7487 #define V_00B528_FP_32_DENORMS 48 7488 #define V_00B528_FP_64_DENORMS 192 7489 #define V_00B528_FP_ALL_DENORMS 240 7490 #define S_00B528_PRIV(x) (((unsigned)(x) & 0x1) << 20) 7491 #define G_00B528_PRIV(x) (((x) >> 20) & 0x1) 7492 #define C_00B528_PRIV 0xFFEFFFFF 7493 #define S_00B528_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 7494 #define G_00B528_DX10_CLAMP(x) (((x) >> 21) & 0x1) 7495 #define C_00B528_DX10_CLAMP 0xFFDFFFFF 7496 #define S_00B528_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) /* <= gfx81 */ 7497 #define G_00B528_DEBUG_MODE(x) (((x) >> 22) & 0x1) 7498 #define C_00B528_DEBUG_MODE 0xFFBFFFFF 7499 #define S_00B528_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 7500 #define G_00B528_IEEE_MODE(x) (((x) >> 23) & 0x1) 7501 #define C_00B528_IEEE_MODE 0xFF7FFFFF 7502 #define S_00B528_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x3) << 24) 7503 #define G_00B528_VGPR_COMP_CNT(x) (((x) >> 24) & 0x3) 7504 #define C_00B528_VGPR_COMP_CNT 0xFCFFFFFF 7505 #define S_00B528_CACHE_CTL(x) (((unsigned)(x) & 0x7) << 26) /* <= gfx81 */ 7506 #define G_00B528_CACHE_CTL(x) (((x) >> 26) & 0x7) 7507 #define C_00B528_CACHE_CTL 0xE3FFFFFF 7508 #define S_00B528_CDBG_USER(x) (((unsigned)(x) & 0x1) << 29) /* <= gfx81 */ 7509 #define G_00B528_CDBG_USER(x) (((x) >> 29) & 0x1) 7510 #define C_00B528_CDBG_USER 0xDFFFFFFF 7511 #define S_00B528_FP16_OVFL(x) (((unsigned)(x) & 0x1) << 30) /* gfx10 */ 7512 #define G_00B528_FP16_OVFL(x) (((x) >> 30) & 0x1) 7513 #define C_00B528_FP16_OVFL 0xBFFFFFFF 7514 #define R_00B52C_SPI_SHADER_PGM_RSRC2_LS 0x00B52C /* <= gfx81, gfx10 */ 7515 #define S_00B52C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 7516 #define G_00B52C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 7517 #define C_00B52C_SCRATCH_EN 0xFFFFFFFE 7518 #define S_00B52C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 7519 #define G_00B52C_USER_SGPR(x) (((x) >> 1) & 0x1F) 7520 #define C_00B52C_USER_SGPR 0xFFFFFFC1 7521 #define S_00B52C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 7522 #define G_00B52C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 7523 #define C_00B52C_TRAP_PRESENT 0xFFFFFFBF 7524 #define S_00B52C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 7) 7525 #define G_00B52C_LDS_SIZE(x) (((x) >> 7) & 0x1FF) 7526 #define C_00B52C_LDS_SIZE 0xFFFF007F 7527 #define S_00B52C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 16) 7528 #define G_00B52C_EXCP_EN(x) (((x) >> 16) & 0x1FF) 7529 #define C_00B52C_EXCP_EN 0xFE00FFFF 7530 #define V_00B52C_INVALID 1 7531 #define V_00B52C_INPUT_DENORMAL 2 7532 #define V_00B52C_DIVIDE_BY_ZERO 4 7533 #define V_00B52C_OVERFLOW 8 7534 #define V_00B52C_UNDERFLOW 16 7535 #define V_00B52C_INEXACT 32 7536 #define V_00B52C_INT_DIVIDE_BY_ZERO 64 7537 #define V_00B52C_ADDRESS_WATCH 128 7538 #define V_00B52C_MEMORY_VIOLATION 256 7539 #define R_00B530_SPI_SHADER_USER_DATA_COMMON_0 0x00B530 /* gfx9 */ 7540 #define R_00B530_SPI_SHADER_USER_DATA_LS_0 0x00B530 /* <= gfx81, gfx10 */ 7541 #define R_00B534_SPI_SHADER_USER_DATA_COMMON_1 0x00B534 /* gfx9 */ 7542 #define R_00B534_SPI_SHADER_USER_DATA_LS_1 0x00B534 /* <= gfx81, gfx10 */ 7543 #define R_00B538_SPI_SHADER_USER_DATA_COMMON_2 0x00B538 /* gfx9 */ 7544 #define R_00B538_SPI_SHADER_USER_DATA_LS_2 0x00B538 /* <= gfx81, gfx10 */ 7545 #define R_00B53C_SPI_SHADER_USER_DATA_COMMON_3 0x00B53C /* gfx9 */ 7546 #define R_00B53C_SPI_SHADER_USER_DATA_LS_3 0x00B53C /* <= gfx81, gfx10 */ 7547 #define R_00B540_SPI_SHADER_USER_DATA_COMMON_4 0x00B540 /* gfx9 */ 7548 #define R_00B540_SPI_SHADER_USER_DATA_LS_4 0x00B540 /* <= gfx81, gfx10 */ 7549 #define R_00B544_SPI_SHADER_USER_DATA_COMMON_5 0x00B544 /* gfx9 */ 7550 #define R_00B544_SPI_SHADER_USER_DATA_LS_5 0x00B544 /* <= gfx81, gfx10 */ 7551 #define R_00B548_SPI_SHADER_USER_DATA_COMMON_6 0x00B548 /* gfx9 */ 7552 #define R_00B548_SPI_SHADER_USER_DATA_LS_6 0x00B548 /* <= gfx81, gfx10 */ 7553 #define R_00B54C_SPI_SHADER_USER_DATA_COMMON_7 0x00B54C /* gfx9 */ 7554 #define R_00B54C_SPI_SHADER_USER_DATA_LS_7 0x00B54C /* <= gfx81, gfx10 */ 7555 #define R_00B550_SPI_SHADER_USER_DATA_COMMON_8 0x00B550 /* gfx9 */ 7556 #define R_00B550_SPI_SHADER_USER_DATA_LS_8 0x00B550 /* <= gfx81, gfx10 */ 7557 #define R_00B554_SPI_SHADER_USER_DATA_COMMON_9 0x00B554 /* gfx9 */ 7558 #define R_00B554_SPI_SHADER_USER_DATA_LS_9 0x00B554 /* <= gfx81, gfx10 */ 7559 #define R_00B558_SPI_SHADER_USER_DATA_COMMON_10 0x00B558 /* gfx9 */ 7560 #define R_00B558_SPI_SHADER_USER_DATA_LS_10 0x00B558 /* <= gfx81, gfx10 */ 7561 #define R_00B55C_SPI_SHADER_USER_DATA_COMMON_11 0x00B55C /* gfx9 */ 7562 #define R_00B55C_SPI_SHADER_USER_DATA_LS_11 0x00B55C /* <= gfx81, gfx10 */ 7563 #define R_00B560_SPI_SHADER_USER_DATA_COMMON_12 0x00B560 /* gfx9 */ 7564 #define R_00B560_SPI_SHADER_USER_DATA_LS_12 0x00B560 /* <= gfx81, gfx10 */ 7565 #define R_00B564_SPI_SHADER_USER_DATA_COMMON_13 0x00B564 /* gfx9 */ 7566 #define R_00B564_SPI_SHADER_USER_DATA_LS_13 0x00B564 /* <= gfx81, gfx10 */ 7567 #define R_00B568_SPI_SHADER_USER_DATA_COMMON_14 0x00B568 /* gfx9 */ 7568 #define R_00B568_SPI_SHADER_USER_DATA_LS_14 0x00B568 /* <= gfx81, gfx10 */ 7569 #define R_00B56C_SPI_SHADER_USER_DATA_COMMON_15 0x00B56C /* gfx9 */ 7570 #define R_00B56C_SPI_SHADER_USER_DATA_LS_15 0x00B56C /* <= gfx81, gfx10 */ 7571 #define R_00B570_SPI_SHADER_USER_DATA_COMMON_16 0x00B570 /* gfx9 */ 7572 #define R_00B574_SPI_SHADER_USER_DATA_COMMON_17 0x00B574 /* gfx9 */ 7573 #define R_00B578_SPI_SHADER_USER_DATA_COMMON_18 0x00B578 /* gfx9 */ 7574 #define R_00B57C_SPI_SHADER_USER_DATA_COMMON_19 0x00B57C /* gfx9 */ 7575 #define R_00B580_SPI_SHADER_USER_DATA_COMMON_20 0x00B580 /* gfx9 */ 7576 #define R_00B584_SPI_SHADER_USER_DATA_COMMON_21 0x00B584 /* gfx9 */ 7577 #define R_00B588_SPI_SHADER_USER_DATA_COMMON_22 0x00B588 /* gfx9 */ 7578 #define R_00B58C_SPI_SHADER_USER_DATA_COMMON_23 0x00B58C /* gfx9 */ 7579 #define R_00B590_SPI_SHADER_USER_DATA_COMMON_24 0x00B590 /* gfx9 */ 7580 #define R_00B594_SPI_SHADER_USER_DATA_COMMON_25 0x00B594 /* gfx9 */ 7581 #define R_00B598_SPI_SHADER_USER_DATA_COMMON_26 0x00B598 /* gfx9 */ 7582 #define R_00B59C_SPI_SHADER_USER_DATA_COMMON_27 0x00B59C /* gfx9 */ 7583 #define R_00B5A0_SPI_SHADER_USER_DATA_COMMON_28 0x00B5A0 /* gfx9 */ 7584 #define R_00B5A4_SPI_SHADER_USER_DATA_COMMON_29 0x00B5A4 /* gfx9 */ 7585 #define R_00B5A8_SPI_SHADER_USER_DATA_COMMON_30 0x00B5A8 /* gfx9 */ 7586 #define R_00B5AC_SPI_SHADER_USER_DATA_COMMON_31 0x00B5AC /* gfx9 */ 7587 #define R_00B800_COMPUTE_DISPATCH_INITIATOR 0x00B800 7588 #define S_00B800_COMPUTE_SHADER_EN(x) (((unsigned)(x) & 0x1) << 0) 7589 #define G_00B800_COMPUTE_SHADER_EN(x) (((x) >> 0) & 0x1) 7590 #define C_00B800_COMPUTE_SHADER_EN 0xFFFFFFFE 7591 #define S_00B800_PARTIAL_TG_EN(x) (((unsigned)(x) & 0x1) << 1) 7592 #define G_00B800_PARTIAL_TG_EN(x) (((x) >> 1) & 0x1) 7593 #define C_00B800_PARTIAL_TG_EN 0xFFFFFFFD 7594 #define S_00B800_FORCE_START_AT_000(x) (((unsigned)(x) & 0x1) << 2) 7595 #define G_00B800_FORCE_START_AT_000(x) (((x) >> 2) & 0x1) 7596 #define C_00B800_FORCE_START_AT_000 0xFFFFFFFB 7597 #define S_00B800_ORDERED_APPEND_ENBL(x) (((unsigned)(x) & 0x1) << 3) 7598 #define G_00B800_ORDERED_APPEND_ENBL(x) (((x) >> 3) & 0x1) 7599 #define C_00B800_ORDERED_APPEND_ENBL 0xFFFFFFF7 7600 #define S_00B800_ORDERED_APPEND_MODE(x) (((unsigned)(x) & 0x1) << 4) 7601 #define G_00B800_ORDERED_APPEND_MODE(x) (((x) >> 4) & 0x1) 7602 #define C_00B800_ORDERED_APPEND_MODE 0xFFFFFFEF 7603 #define S_00B800_USE_THREAD_DIMENSIONS(x) (((unsigned)(x) & 0x1) << 5) 7604 #define G_00B800_USE_THREAD_DIMENSIONS(x) (((x) >> 5) & 0x1) 7605 #define C_00B800_USE_THREAD_DIMENSIONS 0xFFFFFFDF 7606 #define S_00B800_ORDER_MODE(x) (((unsigned)(x) & 0x1) << 6) 7607 #define G_00B800_ORDER_MODE(x) (((x) >> 6) & 0x1) 7608 #define C_00B800_ORDER_MODE 0xFFFFFFBF 7609 #define S_00B800_DISPATCH_CACHE_CNTL(x) (((unsigned)(x) & 0x7) << 7) /* <= gfx81 */ 7610 #define G_00B800_DISPATCH_CACHE_CNTL(x) (((x) >> 7) & 0x7) 7611 #define C_00B800_DISPATCH_CACHE_CNTL 0xFFFFFC7F 7612 #define S_00B800_SCALAR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 10) 7613 #define G_00B800_SCALAR_L1_INV_VOL(x) (((x) >> 10) & 0x1) 7614 #define C_00B800_SCALAR_L1_INV_VOL 0xFFFFFBFF 7615 #define S_00B800_VECTOR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 11) 7616 #define G_00B800_VECTOR_L1_INV_VOL(x) (((x) >> 11) & 0x1) 7617 #define C_00B800_VECTOR_L1_INV_VOL 0xFFFFF7FF 7618 #define S_00B800_DATA_ATC(x) (((unsigned)(x) & 0x1) << 12) /* <= gfx81 */ 7619 #define G_00B800_DATA_ATC(x) (((x) >> 12) & 0x1) 7620 #define C_00B800_DATA_ATC 0xFFFFEFFF 7621 #define S_00B800_TUNNEL_ENABLE(x) (((unsigned)(x) & 0x1) << 13) /* >= gfx10 */ 7622 #define G_00B800_TUNNEL_ENABLE(x) (((x) >> 13) & 0x1) 7623 #define C_00B800_TUNNEL_ENABLE 0xFFFFDFFF 7624 #define S_00B800_RESTORE(x) (((unsigned)(x) & 0x1) << 14) 7625 #define G_00B800_RESTORE(x) (((x) >> 14) & 0x1) 7626 #define C_00B800_RESTORE 0xFFFFBFFF 7627 #define S_00B800_CS_W32_EN(x) (((unsigned)(x) & 0x1) << 15) /* >= gfx10 */ 7628 #define G_00B800_CS_W32_EN(x) (((x) >> 15) & 0x1) 7629 #define C_00B800_CS_W32_EN 0xFFFF7FFF 7630 #define R_00B804_COMPUTE_DIM_X 0x00B804 7631 #define R_00B808_COMPUTE_DIM_Y 0x00B808 7632 #define R_00B80C_COMPUTE_DIM_Z 0x00B80C 7633 #define R_00B810_COMPUTE_START_X 0x00B810 7634 #define R_00B814_COMPUTE_START_Y 0x00B814 7635 #define R_00B818_COMPUTE_START_Z 0x00B818 7636 #define R_00B81C_COMPUTE_NUM_THREAD_X 0x00B81C 7637 #define S_00B81C_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) 7638 #define G_00B81C_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) 7639 #define C_00B81C_NUM_THREAD_FULL 0xFFFF0000 7640 #define S_00B81C_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) 7641 #define G_00B81C_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) 7642 #define C_00B81C_NUM_THREAD_PARTIAL 0x0000FFFF 7643 #define R_00B820_COMPUTE_NUM_THREAD_Y 0x00B820 7644 #define S_00B820_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) 7645 #define G_00B820_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) 7646 #define C_00B820_NUM_THREAD_FULL 0xFFFF0000 7647 #define S_00B820_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) 7648 #define G_00B820_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) 7649 #define C_00B820_NUM_THREAD_PARTIAL 0x0000FFFF 7650 #define R_00B824_COMPUTE_NUM_THREAD_Z 0x00B824 7651 #define S_00B824_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) 7652 #define G_00B824_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) 7653 #define C_00B824_NUM_THREAD_FULL 0xFFFF0000 7654 #define S_00B824_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) 7655 #define G_00B824_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) 7656 #define C_00B824_NUM_THREAD_PARTIAL 0x0000FFFF 7657 #define R_00B828_COMPUTE_PIPELINESTAT_ENABLE 0x00B828 /* >= gfx7 */ 7658 #define S_00B828_PIPELINESTAT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 7659 #define G_00B828_PIPELINESTAT_ENABLE(x) (((x) >> 0) & 0x1) 7660 #define C_00B828_PIPELINESTAT_ENABLE 0xFFFFFFFE 7661 #define R_00B82C_COMPUTE_MAX_WAVE_ID 0x00B82C /* <= gfx6 */ 7662 #define S_00B82C_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) 7663 #define G_00B82C_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) 7664 #define C_00B82C_MAX_WAVE_ID 0xFFFFF000 7665 #define R_00B82C_COMPUTE_PERFCOUNT_ENABLE 0x00B82C /* >= gfx7 */ 7666 #define S_00B82C_PERFCOUNT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 7667 #define G_00B82C_PERFCOUNT_ENABLE(x) (((x) >> 0) & 0x1) 7668 #define C_00B82C_PERFCOUNT_ENABLE 0xFFFFFFFE 7669 #define R_00B830_COMPUTE_PGM_LO 0x00B830 7670 #define R_00B834_COMPUTE_PGM_HI 0x00B834 7671 #define S_00B834_DATA(x) (((unsigned)(x) & 0xFF) << 0) 7672 #define G_00B834_DATA(x) (((x) >> 0) & 0xFF) 7673 #define C_00B834_DATA 0xFFFFFF00 7674 #define S_00B834_INST_ATC(x) (((unsigned)(x) & 0x1) << 8) /* <= gfx81 */ 7675 #define G_00B834_INST_ATC(x) (((x) >> 8) & 0x1) 7676 #define C_00B834_INST_ATC 0xFFFFFEFF 7677 #define R_00B838_COMPUTE_DISPATCH_PKT_ADDR_LO 0x00B838 /* >= gfx9 */ 7678 #define R_00B838_COMPUTE_TBA_LO 0x00B838 /* <= gfx81 */ 7679 #define R_00B83C_COMPUTE_DISPATCH_PKT_ADDR_HI 0x00B83C /* >= gfx9 */ 7680 #define S_00B83C_DATA(x) (((unsigned)(x) & 0xFF) << 0) 7681 #define G_00B83C_DATA(x) (((x) >> 0) & 0xFF) 7682 #define C_00B83C_DATA 0xFFFFFF00 7683 #define R_00B83C_COMPUTE_TBA_HI 0x00B83C /* <= gfx81 */ 7684 #define R_00B840_COMPUTE_DISPATCH_SCRATCH_BASE_LO 0x00B840 /* >= gfx9 */ 7685 #define R_00B840_COMPUTE_TMA_LO 0x00B840 /* <= gfx81 */ 7686 #define R_00B844_COMPUTE_DISPATCH_SCRATCH_BASE_HI 0x00B844 /* >= gfx9 */ 7687 #define S_00B844_DATA(x) (((unsigned)(x) & 0xFF) << 0) 7688 #define G_00B844_DATA(x) (((x) >> 0) & 0xFF) 7689 #define C_00B844_DATA 0xFFFFFF00 7690 #define R_00B844_COMPUTE_TMA_HI 0x00B844 /* <= gfx81 */ 7691 #define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 7692 #define S_00B848_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 7693 #define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F) 7694 #define C_00B848_VGPRS 0xFFFFFFC0 7695 #define S_00B848_SGPRS(x) (((unsigned)(x) & 0xF) << 6) 7696 #define G_00B848_SGPRS(x) (((x) >> 6) & 0xF) 7697 #define C_00B848_SGPRS 0xFFFFFC3F 7698 #define S_00B848_PRIORITY(x) (((unsigned)(x) & 0x3) << 10) 7699 #define G_00B848_PRIORITY(x) (((x) >> 10) & 0x3) 7700 #define C_00B848_PRIORITY 0xFFFFF3FF 7701 #define S_00B848_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 7702 #define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 7703 #define C_00B848_FLOAT_MODE 0xFFF00FFF 7704 #define V_00B848_FP_32_DENORMS 48 7705 #define V_00B848_FP_64_DENORMS 192 7706 #define V_00B848_FP_ALL_DENORMS 240 7707 #define S_00B848_PRIV(x) (((unsigned)(x) & 0x1) << 20) 7708 #define G_00B848_PRIV(x) (((x) >> 20) & 0x1) 7709 #define C_00B848_PRIV 0xFFEFFFFF 7710 #define S_00B848_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 7711 #define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1) 7712 #define C_00B848_DX10_CLAMP 0xFFDFFFFF 7713 #define S_00B848_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) /* <= gfx9 */ 7714 #define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1) 7715 #define C_00B848_DEBUG_MODE 0xFFBFFFFF 7716 #define S_00B848_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 7717 #define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1) 7718 #define C_00B848_IEEE_MODE 0xFF7FFFFF 7719 #define S_00B848_BULKY(x) (((unsigned)(x) & 0x1) << 24) 7720 #define G_00B848_BULKY(x) (((x) >> 24) & 0x1) 7721 #define C_00B848_BULKY 0xFEFFFFFF 7722 #define S_00B848_CDBG_USER(x) (((unsigned)(x) & 0x1) << 25) /* <= gfx9 */ 7723 #define G_00B848_CDBG_USER(x) (((x) >> 25) & 0x1) 7724 #define C_00B848_CDBG_USER 0xFDFFFFFF 7725 #define S_00B848_FP16_OVFL(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx9 */ 7726 #define G_00B848_FP16_OVFL(x) (((x) >> 26) & 0x1) 7727 #define C_00B848_FP16_OVFL 0xFBFFFFFF 7728 #define S_00B848_WGP_MODE(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx10 */ 7729 #define G_00B848_WGP_MODE(x) (((x) >> 29) & 0x1) 7730 #define C_00B848_WGP_MODE 0xDFFFFFFF 7731 #define S_00B848_MEM_ORDERED(x) (((unsigned)(x) & 0x1) << 30) /* >= gfx10 */ 7732 #define G_00B848_MEM_ORDERED(x) (((x) >> 30) & 0x1) 7733 #define C_00B848_MEM_ORDERED 0xBFFFFFFF 7734 #define S_00B848_FWD_PROGRESS(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx10 */ 7735 #define G_00B848_FWD_PROGRESS(x) (((x) >> 31) & 0x1) 7736 #define C_00B848_FWD_PROGRESS 0x7FFFFFFF 7737 #define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C 7738 #define S_00B84C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 7739 #define G_00B84C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 7740 #define C_00B84C_SCRATCH_EN 0xFFFFFFFE 7741 #define S_00B84C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 7742 #define G_00B84C_USER_SGPR(x) (((x) >> 1) & 0x1F) 7743 #define C_00B84C_USER_SGPR 0xFFFFFFC1 7744 #define S_00B84C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 7745 #define G_00B84C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 7746 #define C_00B84C_TRAP_PRESENT 0xFFFFFFBF 7747 #define S_00B84C_TGID_X_EN(x) (((unsigned)(x) & 0x1) << 7) 7748 #define G_00B84C_TGID_X_EN(x) (((x) >> 7) & 0x1) 7749 #define C_00B84C_TGID_X_EN 0xFFFFFF7F 7750 #define S_00B84C_TGID_Y_EN(x) (((unsigned)(x) & 0x1) << 8) 7751 #define G_00B84C_TGID_Y_EN(x) (((x) >> 8) & 0x1) 7752 #define C_00B84C_TGID_Y_EN 0xFFFFFEFF 7753 #define S_00B84C_TGID_Z_EN(x) (((unsigned)(x) & 0x1) << 9) 7754 #define G_00B84C_TGID_Z_EN(x) (((x) >> 9) & 0x1) 7755 #define C_00B84C_TGID_Z_EN 0xFFFFFDFF 7756 #define S_00B84C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 10) 7757 #define G_00B84C_TG_SIZE_EN(x) (((x) >> 10) & 0x1) 7758 #define C_00B84C_TG_SIZE_EN 0xFFFFFBFF 7759 #define S_00B84C_TIDIG_COMP_CNT(x) (((unsigned)(x) & 0x3) << 11) 7760 #define G_00B84C_TIDIG_COMP_CNT(x) (((x) >> 11) & 0x3) 7761 #define C_00B84C_TIDIG_COMP_CNT 0xFFFFE7FF 7762 #define S_00B84C_EXCP_EN_MSB(x) (((unsigned)(x) & 0x3) << 13) 7763 #define G_00B84C_EXCP_EN_MSB(x) (((x) >> 13) & 0x3) 7764 #define C_00B84C_EXCP_EN_MSB 0xFFFF9FFF 7765 #define S_00B84C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 15) 7766 #define G_00B84C_LDS_SIZE(x) (((x) >> 15) & 0x1FF) 7767 #define C_00B84C_LDS_SIZE 0xFF007FFF 7768 #define S_00B84C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 24) 7769 #define G_00B84C_EXCP_EN(x) (((x) >> 24) & 0x7F) 7770 #define C_00B84C_EXCP_EN 0x80FFFFFF 7771 #define V_00B84C_INVALID 1 7772 #define V_00B84C_INPUT_DENORMAL 2 7773 #define V_00B84C_DIVIDE_BY_ZERO 4 7774 #define V_00B84C_OVERFLOW 8 7775 #define V_00B84C_UNDERFLOW 16 7776 #define V_00B84C_INEXACT 32 7777 #define V_00B84C_INT_DIVIDE_BY_ZERO 64 7778 #define V_00B84C_ADDRESS_WATCH 128 7779 #define V_00B84C_MEMORY_VIOLATION 256 7780 #define S_00B84C_SKIP_USGPR0(x) (((unsigned)(x) & 0x1) << 31) /* gfx9 */ 7781 #define G_00B84C_SKIP_USGPR0(x) (((x) >> 31) & 0x1) 7782 #define C_00B84C_SKIP_USGPR0 0x7FFFFFFF 7783 #define R_00B850_COMPUTE_VMID 0x00B850 7784 #define S_00B850_DATA(x) (((unsigned)(x) & 0xF) << 0) 7785 #define G_00B850_DATA(x) (((x) >> 0) & 0xF) 7786 #define C_00B850_DATA 0xFFFFFFF0 7787 #define R_00B854_COMPUTE_RESOURCE_LIMITS 0x00B854 7788 #define S_00B854_WAVES_PER_SH(x) (((unsigned)(x) & 0x3FF) << 0) 7789 #define G_00B854_WAVES_PER_SH(x) (((x) >> 0) & 0x3FF) 7790 #define C_00B854_WAVES_PER_SH 0xFFFFFC00 7791 #define S_00B854_WAVES_PER_SH_GFX6(x) (((unsigned)(x) & 0x3F) << 0) /* <= gfx6 */ 7792 #define G_00B854_WAVES_PER_SH_GFX6(x) (((x) >> 0) & 0x3F) 7793 #define C_00B854_WAVES_PER_SH_GFX6 0xFFFFFFC0 7794 #define S_00B854_TG_PER_CU(x) (((unsigned)(x) & 0xF) << 12) 7795 #define G_00B854_TG_PER_CU(x) (((x) >> 12) & 0xF) 7796 #define C_00B854_TG_PER_CU 0xFFFF0FFF 7797 #define S_00B854_LOCK_THRESHOLD(x) (((unsigned)(x) & 0x3F) << 16) 7798 #define G_00B854_LOCK_THRESHOLD(x) (((x) >> 16) & 0x3F) 7799 #define C_00B854_LOCK_THRESHOLD 0xFFC0FFFF 7800 #define S_00B854_SIMD_DEST_CNTL(x) (((unsigned)(x) & 0x1) << 22) 7801 #define G_00B854_SIMD_DEST_CNTL(x) (((x) >> 22) & 0x1) 7802 #define C_00B854_SIMD_DEST_CNTL 0xFFBFFFFF 7803 #define S_00B854_FORCE_SIMD_DIST(x) (((unsigned)(x) & 0x1) << 23) 7804 #define G_00B854_FORCE_SIMD_DIST(x) (((x) >> 23) & 0x1) 7805 #define C_00B854_FORCE_SIMD_DIST 0xFF7FFFFF 7806 #define S_00B854_CU_GROUP_COUNT(x) (((unsigned)(x) & 0x7) << 24) 7807 #define G_00B854_CU_GROUP_COUNT(x) (((x) >> 24) & 0x7) 7808 #define C_00B854_CU_GROUP_COUNT 0xF8FFFFFF 7809 #define S_00B854_SIMD_DISABLE(x) (((unsigned)(x) & 0xF) << 27) /* gfx9 */ 7810 #define G_00B854_SIMD_DISABLE(x) (((x) >> 27) & 0xF) 7811 #define C_00B854_SIMD_DISABLE 0x87FFFFFF 7812 #define R_00B858_COMPUTE_DESTINATION_EN_SE0 0x00B858 /* >= gfx10 */ 7813 #define R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 0x00B858 /* <= gfx9 */ 7814 #define S_00B858_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 7815 #define G_00B858_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) 7816 #define C_00B858_SH0_CU_EN 0xFFFF0000 7817 #define S_00B858_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 7818 #define G_00B858_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) 7819 #define C_00B858_SH1_CU_EN 0x0000FFFF 7820 #define R_00B85C_COMPUTE_DESTINATION_EN_SE1 0x00B85C /* >= gfx10 */ 7821 #define R_00B85C_COMPUTE_STATIC_THREAD_MGMT_SE1 0x00B85C /* <= gfx9 */ 7822 #define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860 7823 #define S_00B860_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) 7824 #define G_00B860_WAVES(x) (((x) >> 0) & 0xFFF) 7825 #define C_00B860_WAVES 0xFFFFF000 7826 #define S_00B860_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) 7827 #define G_00B860_WAVESIZE(x) (((x) >> 12) & 0x1FFF) 7828 #define C_00B860_WAVESIZE 0xFE000FFF 7829 #define R_00B864_COMPUTE_DESTINATION_EN_SE2 0x00B864 /* >= gfx10 */ 7830 #define R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2 0x00B864 /* gfx7, gfx8, gfx81, gfx9 */ 7831 #define R_00B868_COMPUTE_DESTINATION_EN_SE3 0x00B868 /* >= gfx10 */ 7832 #define R_00B868_COMPUTE_STATIC_THREAD_MGMT_SE3 0x00B868 /* gfx7, gfx8, gfx81, gfx9 */ 7833 #define R_00B86C_COMPUTE_RESTART_X 0x00B86C /* >= gfx7 */ 7834 #define R_00B870_COMPUTE_RESTART_Y 0x00B870 /* >= gfx7 */ 7835 #define R_00B874_COMPUTE_RESTART_Z 0x00B874 /* >= gfx7 */ 7836 #define R_00B878_COMPUTE_THREAD_TRACE_ENABLE 0x00B878 /* >= gfx7 */ 7837 #define S_00B878_THREAD_TRACE_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 7838 #define G_00B878_THREAD_TRACE_ENABLE(x) (((x) >> 0) & 0x1) 7839 #define C_00B878_THREAD_TRACE_ENABLE 0xFFFFFFFE 7840 #define R_00B87C_COMPUTE_MISC_RESERVED 0x00B87C /* >= gfx7 */ 7841 #define S_00B87C_SEND_SEID(x) (((unsigned)(x) & 0x3) << 0) 7842 #define G_00B87C_SEND_SEID(x) (((x) >> 0) & 0x3) 7843 #define C_00B87C_SEND_SEID 0xFFFFFFFC 7844 #define S_00B87C_RESERVED2(x) (((unsigned)(x) & 0x1) << 2) 7845 #define G_00B87C_RESERVED2(x) (((x) >> 2) & 0x1) 7846 #define C_00B87C_RESERVED2 0xFFFFFFFB 7847 #define S_00B87C_RESERVED3(x) (((unsigned)(x) & 0x1) << 3) 7848 #define G_00B87C_RESERVED3(x) (((x) >> 3) & 0x1) 7849 #define C_00B87C_RESERVED3 0xFFFFFFF7 7850 #define S_00B87C_RESERVED4(x) (((unsigned)(x) & 0x1) << 4) 7851 #define G_00B87C_RESERVED4(x) (((x) >> 4) & 0x1) 7852 #define C_00B87C_RESERVED4 0xFFFFFFEF 7853 #define S_00B87C_WAVE_ID_BASE(x) (((unsigned)(x) & 0xFFF) << 5) /* >= gfx8 */ 7854 #define G_00B87C_WAVE_ID_BASE(x) (((x) >> 5) & 0xFFF) 7855 #define C_00B87C_WAVE_ID_BASE 0xFFFE001F 7856 #define R_00B880_COMPUTE_DISPATCH_ID 0x00B880 /* >= gfx8 */ 7857 #define R_00B884_COMPUTE_THREADGROUP_ID 0x00B884 /* >= gfx8 */ 7858 #define R_00B888_COMPUTE_RELAUNCH 0x00B888 /* gfx8, gfx81, gfx9 */ 7859 #define S_00B888_PAYLOAD(x) (((unsigned)(x) & 0x3FFFFFFF) << 0) 7860 #define G_00B888_PAYLOAD(x) (((x) >> 0) & 0x3FFFFFFF) 7861 #define C_00B888_PAYLOAD 0xC0000000 7862 #define S_00B888_IS_EVENT(x) (((unsigned)(x) & 0x1) << 30) 7863 #define G_00B888_IS_EVENT(x) (((x) >> 30) & 0x1) 7864 #define C_00B888_IS_EVENT 0xBFFFFFFF 7865 #define S_00B888_IS_STATE(x) (((unsigned)(x) & 0x1) << 31) 7866 #define G_00B888_IS_STATE(x) (((x) >> 31) & 0x1) 7867 #define C_00B888_IS_STATE 0x7FFFFFFF 7868 #define R_00B888_COMPUTE_REQ_CTRL 0x00B888 /* >= gfx10 */ 7869 #define S_00B888_SOFT_GROUPING_EN(x) (((unsigned)(x) & 0x1) << 0) 7870 #define G_00B888_SOFT_GROUPING_EN(x) (((x) >> 0) & 0x1) 7871 #define C_00B888_SOFT_GROUPING_EN 0xFFFFFFFE 7872 #define S_00B888_NUMBER_OF_REQUESTS_PER_CU(x) (((unsigned)(x) & 0xF) << 1) 7873 #define G_00B888_NUMBER_OF_REQUESTS_PER_CU(x) (((x) >> 1) & 0xF) 7874 #define C_00B888_NUMBER_OF_REQUESTS_PER_CU 0xFFFFFFE1 7875 #define S_00B888_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((unsigned)(x) & 0xF) << 5) 7876 #define G_00B888_SOFT_GROUPING_ALLOCATION_TIMEOUT(x) (((x) >> 5) & 0xF) 7877 #define C_00B888_SOFT_GROUPING_ALLOCATION_TIMEOUT 0xFFFFFE1F 7878 #define S_00B888_HARD_LOCK_HYSTERESIS(x) (((unsigned)(x) & 0x1) << 9) 7879 #define G_00B888_HARD_LOCK_HYSTERESIS(x) (((x) >> 9) & 0x1) 7880 #define C_00B888_HARD_LOCK_HYSTERESIS 0xFFFFFDFF 7881 #define S_00B888_HARD_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x1F) << 10) 7882 #define G_00B888_HARD_LOCK_LOW_THRESHOLD(x) (((x) >> 10) & 0x1F) 7883 #define C_00B888_HARD_LOCK_LOW_THRESHOLD 0xFFFF83FF 7884 #define S_00B888_PRODUCER_REQUEST_LOCKOUT(x) (((unsigned)(x) & 0x1) << 15) 7885 #define G_00B888_PRODUCER_REQUEST_LOCKOUT(x) (((x) >> 15) & 0x1) 7886 #define C_00B888_PRODUCER_REQUEST_LOCKOUT 0xFFFF7FFF 7887 #define S_00B888_GLOBAL_SCANNING_EN(x) (((unsigned)(x) & 0x1) << 16) 7888 #define G_00B888_GLOBAL_SCANNING_EN(x) (((x) >> 16) & 0x1) 7889 #define C_00B888_GLOBAL_SCANNING_EN 0xFFFEFFFF 7890 #define S_00B888_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((unsigned)(x) & 0x7) << 17) 7891 #define G_00B888_ALLOCATION_RATE_THROTTLING_THRESHOLD(x) (((x) >> 17) & 0x7) 7892 #define C_00B888_ALLOCATION_RATE_THROTTLING_THRESHOLD 0xFFF1FFFF 7893 #define S_00B888_DEDICATED_PREALLOCATION_BUFFER_LIMIT(x) (((unsigned)(x) & 0x7F) << 20) 7894 #define G_00B888_DEDICATED_PREALLOCATION_BUFFER_LIMIT(x) (((x) >> 20) & 0x7F) 7895 #define C_00B888_DEDICATED_PREALLOCATION_BUFFER_LIMIT 0xF80FFFFF 7896 #define R_00B88C_COMPUTE_WAVE_RESTORE_ADDR_LO 0x00B88C /* gfx8, gfx81, gfx9 */ 7897 #define R_00B890_COMPUTE_USER_ACCUM_0 0x00B890 /* >= gfx10 */ 7898 #define S_00B890_CONTRIBUTION(x) (((unsigned)(x) & 0x7F) << 0) 7899 #define G_00B890_CONTRIBUTION(x) (((x) >> 0) & 0x7F) 7900 #define C_00B890_CONTRIBUTION 0xFFFFFF80 7901 #define R_00B890_COMPUTE_WAVE_RESTORE_ADDR_HI 0x00B890 /* gfx8, gfx81, gfx9 */ 7902 #define S_00B890_ADDR(x) (((unsigned)(x) & 0xFFFF) << 0) 7903 #define G_00B890_ADDR(x) (((x) >> 0) & 0xFFFF) 7904 #define C_00B890_ADDR 0xFFFF0000 7905 #define R_00B894_COMPUTE_SHADER_CHKSUM 0x00B894 /* gfx9 */ 7906 #define R_00B894_COMPUTE_USER_ACCUM_1 0x00B894 /* >= gfx10 */ 7907 #define R_00B894_COMPUTE_WAVE_RESTORE_CONTROL 0x00B894 /* gfx8, gfx81 */ 7908 #define S_00B894_ATC(x) (((unsigned)(x) & 0x1) << 0) 7909 #define G_00B894_ATC(x) (((x) >> 0) & 0x1) 7910 #define C_00B894_ATC 0xFFFFFFFE 7911 #define S_00B894_MTYPE(x) (((unsigned)(x) & 0x3) << 1) 7912 #define G_00B894_MTYPE(x) (((x) >> 1) & 0x3) 7913 #define C_00B894_MTYPE 0xFFFFFFF9 7914 #define R_00B898_COMPUTE_USER_ACCUM_2 0x00B898 /* >= gfx10 */ 7915 #define R_00B89C_COMPUTE_USER_ACCUM_3 0x00B89C /* >= gfx10 */ 7916 #define R_00B8A0_COMPUTE_PGM_RSRC3 0x00B8A0 /* >= gfx10 */ 7917 #define S_00B8A0_SHARED_VGPR_CNT(x) (((unsigned)(x) & 0xF) << 0) 7918 #define G_00B8A0_SHARED_VGPR_CNT(x) (((x) >> 0) & 0xF) 7919 #define C_00B8A0_SHARED_VGPR_CNT 0xFFFFFFF0 7920 #define R_00B8A4_COMPUTE_DDID_INDEX 0x00B8A4 /* >= gfx10 */ 7921 #define S_00B8A4_INDEX(x) (((unsigned)(x) & 0x7FF) << 0) 7922 #define G_00B8A4_INDEX(x) (((x) >> 0) & 0x7FF) 7923 #define C_00B8A4_INDEX 0xFFFFF800 7924 #define R_00B8A8_COMPUTE_SHADER_CHKSUM 0x00B8A8 /* >= gfx10 */ 7925 #define R_00B8AC_COMPUTE_RELAUNCH 0x00B8AC /* >= gfx10 */ 7926 #define S_00B8AC_PAYLOAD(x) (((unsigned)(x) & 0x3FFFFFFF) << 0) 7927 #define G_00B8AC_PAYLOAD(x) (((x) >> 0) & 0x3FFFFFFF) 7928 #define C_00B8AC_PAYLOAD 0xC0000000 7929 #define S_00B8AC_IS_EVENT(x) (((unsigned)(x) & 0x1) << 30) 7930 #define G_00B8AC_IS_EVENT(x) (((x) >> 30) & 0x1) 7931 #define C_00B8AC_IS_EVENT 0xBFFFFFFF 7932 #define S_00B8AC_IS_STATE(x) (((unsigned)(x) & 0x1) << 31) 7933 #define G_00B8AC_IS_STATE(x) (((x) >> 31) & 0x1) 7934 #define C_00B8AC_IS_STATE 0x7FFFFFFF 7935 #define R_00B8B0_COMPUTE_WAVE_RESTORE_ADDR_LO 0x00B8B0 /* >= gfx10 */ 7936 #define R_00B8B4_COMPUTE_WAVE_RESTORE_ADDR_HI 0x00B8B4 /* >= gfx10 */ 7937 #define S_00B8B4_ADDR(x) (((unsigned)(x) & 0xFFFF) << 0) 7938 #define G_00B8B4_ADDR(x) (((x) >> 0) & 0xFFFF) 7939 #define C_00B8B4_ADDR 0xFFFF0000 7940 #define R_00B8B8_COMPUTE_RELAUNCH2 0x00B8B8 /* >= gfx10 */ 7941 #define R_00B900_COMPUTE_USER_DATA_0 0x00B900 7942 #define R_00B904_COMPUTE_USER_DATA_1 0x00B904 7943 #define R_00B908_COMPUTE_USER_DATA_2 0x00B908 7944 #define R_00B90C_COMPUTE_USER_DATA_3 0x00B90C 7945 #define R_00B910_COMPUTE_USER_DATA_4 0x00B910 7946 #define R_00B914_COMPUTE_USER_DATA_5 0x00B914 7947 #define R_00B918_COMPUTE_USER_DATA_6 0x00B918 7948 #define R_00B91C_COMPUTE_USER_DATA_7 0x00B91C 7949 #define R_00B920_COMPUTE_USER_DATA_8 0x00B920 7950 #define R_00B924_COMPUTE_USER_DATA_9 0x00B924 7951 #define R_00B928_COMPUTE_USER_DATA_10 0x00B928 7952 #define R_00B92C_COMPUTE_USER_DATA_11 0x00B92C 7953 #define R_00B930_COMPUTE_USER_DATA_12 0x00B930 7954 #define R_00B934_COMPUTE_USER_DATA_13 0x00B934 7955 #define R_00B938_COMPUTE_USER_DATA_14 0x00B938 7956 #define R_00B93C_COMPUTE_USER_DATA_15 0x00B93C 7957 #define R_00B9F4_COMPUTE_DISPATCH_TUNNEL 0x00B9F4 /* >= gfx10 */ 7958 #define S_00B9F4_OFF_DELAY(x) (((unsigned)(x) & 0x3FF) << 0) 7959 #define G_00B9F4_OFF_DELAY(x) (((x) >> 0) & 0x3FF) 7960 #define C_00B9F4_OFF_DELAY 0xFFFFFC00 7961 #define S_00B9F4_IMMEDIATE(x) (((unsigned)(x) & 0x1) << 10) 7962 #define G_00B9F4_IMMEDIATE(x) (((x) >> 10) & 0x1) 7963 #define C_00B9F4_IMMEDIATE 0xFFFFFBFF 7964 #define R_00B9F8_COMPUTE_DISPATCH_END 0x00B9F8 /* >= gfx9 */ 7965 #define R_00B9FC_COMPUTE_NOWHERE 0x00B9FC /* >= gfx8 */ 7966 #define R_00BA00_SH_RESERVED_REG0 0x00BA00 /* >= gfx103 */ 7967 #define R_00BA04_SH_RESERVED_REG1 0x00BA04 /* >= gfx103 */ 7968 #define R_00D034_SDMA0_STATUS_REG 0x00D034 /* <= gfx81 */ 7969 #define S_00D034_IDLE(x) (((unsigned)(x) & 0x1) << 0) 7970 #define G_00D034_IDLE(x) (((x) >> 0) & 0x1) 7971 #define C_00D034_IDLE 0xFFFFFFFE 7972 #define S_00D034_REG_IDLE(x) (((unsigned)(x) & 0x1) << 1) 7973 #define G_00D034_REG_IDLE(x) (((x) >> 1) & 0x1) 7974 #define C_00D034_REG_IDLE 0xFFFFFFFD 7975 #define S_00D034_RB_EMPTY(x) (((unsigned)(x) & 0x1) << 2) 7976 #define G_00D034_RB_EMPTY(x) (((x) >> 2) & 0x1) 7977 #define C_00D034_RB_EMPTY 0xFFFFFFFB 7978 #define S_00D034_RB_FULL(x) (((unsigned)(x) & 0x1) << 3) 7979 #define G_00D034_RB_FULL(x) (((x) >> 3) & 0x1) 7980 #define C_00D034_RB_FULL 0xFFFFFFF7 7981 #define S_00D034_RB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 4) 7982 #define G_00D034_RB_CMD_IDLE(x) (((x) >> 4) & 0x1) 7983 #define C_00D034_RB_CMD_IDLE 0xFFFFFFEF 7984 #define S_00D034_RB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 5) 7985 #define G_00D034_RB_CMD_FULL(x) (((x) >> 5) & 0x1) 7986 #define C_00D034_RB_CMD_FULL 0xFFFFFFDF 7987 #define S_00D034_IB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 6) 7988 #define G_00D034_IB_CMD_IDLE(x) (((x) >> 6) & 0x1) 7989 #define C_00D034_IB_CMD_IDLE 0xFFFFFFBF 7990 #define S_00D034_IB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 7) 7991 #define G_00D034_IB_CMD_FULL(x) (((x) >> 7) & 0x1) 7992 #define C_00D034_IB_CMD_FULL 0xFFFFFF7F 7993 #define S_00D034_BLOCK_IDLE(x) (((unsigned)(x) & 0x1) << 8) 7994 #define G_00D034_BLOCK_IDLE(x) (((x) >> 8) & 0x1) 7995 #define C_00D034_BLOCK_IDLE 0xFFFFFEFF 7996 #define S_00D034_INSIDE_IB(x) (((unsigned)(x) & 0x1) << 9) 7997 #define G_00D034_INSIDE_IB(x) (((x) >> 9) & 0x1) 7998 #define C_00D034_INSIDE_IB 0xFFFFFDFF 7999 #define S_00D034_EX_IDLE(x) (((unsigned)(x) & 0x1) << 10) 8000 #define G_00D034_EX_IDLE(x) (((x) >> 10) & 0x1) 8001 #define C_00D034_EX_IDLE 0xFFFFFBFF 8002 #define S_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((unsigned)(x) & 0x1) << 11) 8003 #define G_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((x) >> 11) & 0x1) 8004 #define C_00D034_EX_IDLE_POLL_TIMER_EXPIRE 0xFFFFF7FF 8005 #define S_00D034_PACKET_READY(x) (((unsigned)(x) & 0x1) << 12) 8006 #define G_00D034_PACKET_READY(x) (((x) >> 12) & 0x1) 8007 #define C_00D034_PACKET_READY 0xFFFFEFFF 8008 #define S_00D034_MC_WR_IDLE(x) (((unsigned)(x) & 0x1) << 13) 8009 #define G_00D034_MC_WR_IDLE(x) (((x) >> 13) & 0x1) 8010 #define C_00D034_MC_WR_IDLE 0xFFFFDFFF 8011 #define S_00D034_SRBM_IDLE(x) (((unsigned)(x) & 0x1) << 14) 8012 #define G_00D034_SRBM_IDLE(x) (((x) >> 14) & 0x1) 8013 #define C_00D034_SRBM_IDLE 0xFFFFBFFF 8014 #define S_00D034_CONTEXT_EMPTY(x) (((unsigned)(x) & 0x1) << 15) 8015 #define G_00D034_CONTEXT_EMPTY(x) (((x) >> 15) & 0x1) 8016 #define C_00D034_CONTEXT_EMPTY 0xFFFF7FFF 8017 #define S_00D034_DELTA_RPTR_FULL(x) (((unsigned)(x) & 0x1) << 16) 8018 #define G_00D034_DELTA_RPTR_FULL(x) (((x) >> 16) & 0x1) 8019 #define C_00D034_DELTA_RPTR_FULL 0xFFFEFFFF 8020 #define S_00D034_RB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 17) 8021 #define G_00D034_RB_MC_RREQ_IDLE(x) (((x) >> 17) & 0x1) 8022 #define C_00D034_RB_MC_RREQ_IDLE 0xFFFDFFFF 8023 #define S_00D034_IB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 18) 8024 #define G_00D034_IB_MC_RREQ_IDLE(x) (((x) >> 18) & 0x1) 8025 #define C_00D034_IB_MC_RREQ_IDLE 0xFFFBFFFF 8026 #define S_00D034_MC_RD_IDLE(x) (((unsigned)(x) & 0x1) << 19) 8027 #define G_00D034_MC_RD_IDLE(x) (((x) >> 19) & 0x1) 8028 #define C_00D034_MC_RD_IDLE 0xFFF7FFFF 8029 #define S_00D034_DELTA_RPTR_EMPTY(x) (((unsigned)(x) & 0x1) << 20) 8030 #define G_00D034_DELTA_RPTR_EMPTY(x) (((x) >> 20) & 0x1) 8031 #define C_00D034_DELTA_RPTR_EMPTY 0xFFEFFFFF 8032 #define S_00D034_MC_RD_RET_STALL(x) (((unsigned)(x) & 0x1) << 21) 8033 #define G_00D034_MC_RD_RET_STALL(x) (((x) >> 21) & 0x1) 8034 #define C_00D034_MC_RD_RET_STALL 0xFFDFFFFF 8035 #define S_00D034_MC_RD_NO_POLL_IDLE(x) (((unsigned)(x) & 0x1) << 22) 8036 #define G_00D034_MC_RD_NO_POLL_IDLE(x) (((x) >> 22) & 0x1) 8037 #define C_00D034_MC_RD_NO_POLL_IDLE 0xFFBFFFFF 8038 #define S_00D034_PREV_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 25) 8039 #define G_00D034_PREV_CMD_IDLE(x) (((x) >> 25) & 0x1) 8040 #define C_00D034_PREV_CMD_IDLE 0xFDFFFFFF 8041 #define S_00D034_SEM_IDLE(x) (((unsigned)(x) & 0x1) << 26) 8042 #define G_00D034_SEM_IDLE(x) (((x) >> 26) & 0x1) 8043 #define C_00D034_SEM_IDLE 0xFBFFFFFF 8044 #define S_00D034_SEM_REQ_STALL(x) (((unsigned)(x) & 0x1) << 27) 8045 #define G_00D034_SEM_REQ_STALL(x) (((x) >> 27) & 0x1) 8046 #define C_00D034_SEM_REQ_STALL 0xF7FFFFFF 8047 #define S_00D034_SEM_RESP_STATE(x) (((unsigned)(x) & 0x3) << 28) 8048 #define G_00D034_SEM_RESP_STATE(x) (((x) >> 28) & 0x3) 8049 #define C_00D034_SEM_RESP_STATE 0xCFFFFFFF 8050 #define S_00D034_INT_IDLE(x) (((unsigned)(x) & 0x1) << 30) 8051 #define G_00D034_INT_IDLE(x) (((x) >> 30) & 0x1) 8052 #define C_00D034_INT_IDLE 0xBFFFFFFF 8053 #define S_00D034_INT_REQ_STALL(x) (((unsigned)(x) & 0x1) << 31) 8054 #define G_00D034_INT_REQ_STALL(x) (((x) >> 31) & 0x1) 8055 #define C_00D034_INT_REQ_STALL 0x7FFFFFFF 8056 #define R_00D834_SDMA1_STATUS_REG 0x00D834 /* <= gfx81 */ 8057 #define R_028000_DB_RENDER_CONTROL 0x028000 8058 #define S_028000_DEPTH_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 8059 #define G_028000_DEPTH_CLEAR_ENABLE(x) (((x) >> 0) & 0x1) 8060 #define C_028000_DEPTH_CLEAR_ENABLE 0xFFFFFFFE 8061 #define S_028000_STENCIL_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 8062 #define G_028000_STENCIL_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) 8063 #define C_028000_STENCIL_CLEAR_ENABLE 0xFFFFFFFD 8064 #define S_028000_DEPTH_COPY(x) (((unsigned)(x) & 0x1) << 2) 8065 #define G_028000_DEPTH_COPY(x) (((x) >> 2) & 0x1) 8066 #define C_028000_DEPTH_COPY 0xFFFFFFFB 8067 #define S_028000_STENCIL_COPY(x) (((unsigned)(x) & 0x1) << 3) 8068 #define G_028000_STENCIL_COPY(x) (((x) >> 3) & 0x1) 8069 #define C_028000_STENCIL_COPY 0xFFFFFFF7 8070 #define S_028000_RESUMMARIZE_ENABLE(x) (((unsigned)(x) & 0x1) << 4) 8071 #define G_028000_RESUMMARIZE_ENABLE(x) (((x) >> 4) & 0x1) 8072 #define C_028000_RESUMMARIZE_ENABLE 0xFFFFFFEF 8073 #define S_028000_STENCIL_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 5) 8074 #define G_028000_STENCIL_COMPRESS_DISABLE(x) (((x) >> 5) & 0x1) 8075 #define C_028000_STENCIL_COMPRESS_DISABLE 0xFFFFFFDF 8076 #define S_028000_DEPTH_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 6) 8077 #define G_028000_DEPTH_COMPRESS_DISABLE(x) (((x) >> 6) & 0x1) 8078 #define C_028000_DEPTH_COMPRESS_DISABLE 0xFFFFFFBF 8079 #define S_028000_COPY_CENTROID(x) (((unsigned)(x) & 0x1) << 7) 8080 #define G_028000_COPY_CENTROID(x) (((x) >> 7) & 0x1) 8081 #define C_028000_COPY_CENTROID 0xFFFFFF7F 8082 #define S_028000_COPY_SAMPLE(x) (((unsigned)(x) & 0xF) << 8) 8083 #define G_028000_COPY_SAMPLE(x) (((x) >> 8) & 0xF) 8084 #define C_028000_COPY_SAMPLE 0xFFFFF0FF 8085 #define S_028000_DECOMPRESS_ENABLE(x) (((unsigned)(x) & 0x1) << 12) /* >= gfx8 */ 8086 #define G_028000_DECOMPRESS_ENABLE(x) (((x) >> 12) & 0x1) 8087 #define C_028000_DECOMPRESS_ENABLE 0xFFFFEFFF 8088 #define S_028000_PS_INVOKE_DISABLE(x) (((unsigned)(x) & 0x1) << 13) /* >= gfx103 */ 8089 #define G_028000_PS_INVOKE_DISABLE(x) (((x) >> 13) & 0x1) 8090 #define C_028000_PS_INVOKE_DISABLE 0xFFFFDFFF 8091 #define R_028004_DB_COUNT_CONTROL 0x028004 8092 #define S_028004_ZPASS_INCREMENT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 8093 #define G_028004_ZPASS_INCREMENT_DISABLE(x) (((x) >> 0) & 0x1) 8094 #define C_028004_ZPASS_INCREMENT_DISABLE 0xFFFFFFFE 8095 #define S_028004_PERFECT_ZPASS_COUNTS(x) (((unsigned)(x) & 0x1) << 1) 8096 #define G_028004_PERFECT_ZPASS_COUNTS(x) (((x) >> 1) & 0x1) 8097 #define C_028004_PERFECT_ZPASS_COUNTS 0xFFFFFFFD 8098 #define S_028004_DISABLE_CONSERVATIVE_ZPASS_COUNTS(x) (((unsigned)(x) & 0x1) << 2) /* >= gfx10 */ 8099 #define G_028004_DISABLE_CONSERVATIVE_ZPASS_COUNTS(x) (((x) >> 2) & 0x1) 8100 #define C_028004_DISABLE_CONSERVATIVE_ZPASS_COUNTS 0xFFFFFFFB 8101 #define S_028004_ENHANCED_CONSERVATIVE_ZPASS_COUNTS(x) (((unsigned)(x) & 0x1) << 3) /* >= gfx10 */ 8102 #define G_028004_ENHANCED_CONSERVATIVE_ZPASS_COUNTS(x) (((x) >> 3) & 0x1) 8103 #define C_028004_ENHANCED_CONSERVATIVE_ZPASS_COUNTS 0xFFFFFFF7 8104 #define S_028004_SAMPLE_RATE(x) (((unsigned)(x) & 0x7) << 4) 8105 #define G_028004_SAMPLE_RATE(x) (((x) >> 4) & 0x7) 8106 #define C_028004_SAMPLE_RATE 0xFFFFFF8F 8107 #define S_028004_ZPASS_ENABLE(x) (((unsigned)(x) & 0xF) << 8) 8108 #define G_028004_ZPASS_ENABLE(x) (((x) >> 8) & 0xF) 8109 #define C_028004_ZPASS_ENABLE 0xFFFFF0FF 8110 #define S_028004_ZFAIL_ENABLE(x) (((unsigned)(x) & 0xF) << 12) 8111 #define G_028004_ZFAIL_ENABLE(x) (((x) >> 12) & 0xF) 8112 #define C_028004_ZFAIL_ENABLE 0xFFFF0FFF 8113 #define S_028004_SFAIL_ENABLE(x) (((unsigned)(x) & 0xF) << 16) 8114 #define G_028004_SFAIL_ENABLE(x) (((x) >> 16) & 0xF) 8115 #define C_028004_SFAIL_ENABLE 0xFFF0FFFF 8116 #define S_028004_DBFAIL_ENABLE(x) (((unsigned)(x) & 0xF) << 20) 8117 #define G_028004_DBFAIL_ENABLE(x) (((x) >> 20) & 0xF) 8118 #define C_028004_DBFAIL_ENABLE 0xFF0FFFFF 8119 #define S_028004_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0xF) << 24) 8120 #define G_028004_SLICE_EVEN_ENABLE(x) (((x) >> 24) & 0xF) 8121 #define C_028004_SLICE_EVEN_ENABLE 0xF0FFFFFF 8122 #define S_028004_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0xF) << 28) 8123 #define G_028004_SLICE_ODD_ENABLE(x) (((x) >> 28) & 0xF) 8124 #define C_028004_SLICE_ODD_ENABLE 0x0FFFFFFF 8125 #define R_028008_DB_DEPTH_VIEW 0x028008 8126 #define S_028008_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) 8127 #define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF) 8128 #define C_028008_SLICE_START 0xFFFFF800 8129 #define S_028008_SLICE_START_HI(x) (((unsigned)(x) & 0x3) << 11) /* >= gfx10 */ 8130 #define G_028008_SLICE_START_HI(x) (((x) >> 11) & 0x3) 8131 #define C_028008_SLICE_START_HI 0xFFFFE7FF 8132 #define S_028008_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) 8133 #define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF) 8134 #define C_028008_SLICE_MAX 0xFF001FFF 8135 #define S_028008_Z_READ_ONLY(x) (((unsigned)(x) & 0x1) << 24) 8136 #define G_028008_Z_READ_ONLY(x) (((x) >> 24) & 0x1) 8137 #define C_028008_Z_READ_ONLY 0xFEFFFFFF 8138 #define S_028008_STENCIL_READ_ONLY(x) (((unsigned)(x) & 0x1) << 25) 8139 #define G_028008_STENCIL_READ_ONLY(x) (((x) >> 25) & 0x1) 8140 #define C_028008_STENCIL_READ_ONLY 0xFDFFFFFF 8141 #define S_028008_MIPID(x) (((unsigned)(x) & 0xF) << 26) /* >= gfx9 */ 8142 #define G_028008_MIPID(x) (((x) >> 26) & 0xF) 8143 #define C_028008_MIPID 0xC3FFFFFF 8144 #define S_028008_SLICE_MAX_HI(x) (((unsigned)(x) & 0x3) << 30) /* >= gfx10 */ 8145 #define G_028008_SLICE_MAX_HI(x) (((x) >> 30) & 0x3) 8146 #define C_028008_SLICE_MAX_HI 0x3FFFFFFF 8147 #define R_02800C_DB_RENDER_OVERRIDE 0x02800C 8148 #define S_02800C_FORCE_HIZ_ENABLE(x) (((unsigned)(x) & 0x3) << 0) 8149 #define G_02800C_FORCE_HIZ_ENABLE(x) (((x) >> 0) & 0x3) 8150 #define C_02800C_FORCE_HIZ_ENABLE 0xFFFFFFFC 8151 #define V_02800C_FORCE_OFF 0 8152 #define V_02800C_FORCE_ENABLE 1 8153 #define V_02800C_FORCE_DISABLE 2 8154 #define V_02800C_FORCE_RESERVED 3 8155 #define S_02800C_FORCE_HIS_ENABLE0(x) (((unsigned)(x) & 0x3) << 2) 8156 #define G_02800C_FORCE_HIS_ENABLE0(x) (((x) >> 2) & 0x3) 8157 #define C_02800C_FORCE_HIS_ENABLE0 0xFFFFFFF3 8158 #define S_02800C_FORCE_HIS_ENABLE1(x) (((unsigned)(x) & 0x3) << 4) 8159 #define G_02800C_FORCE_HIS_ENABLE1(x) (((x) >> 4) & 0x3) 8160 #define C_02800C_FORCE_HIS_ENABLE1 0xFFFFFFCF 8161 #define S_02800C_FORCE_SHADER_Z_ORDER(x) (((unsigned)(x) & 0x1) << 6) 8162 #define G_02800C_FORCE_SHADER_Z_ORDER(x) (((x) >> 6) & 0x1) 8163 #define C_02800C_FORCE_SHADER_Z_ORDER 0xFFFFFFBF 8164 #define S_02800C_FAST_Z_DISABLE(x) (((unsigned)(x) & 0x1) << 7) 8165 #define G_02800C_FAST_Z_DISABLE(x) (((x) >> 7) & 0x1) 8166 #define C_02800C_FAST_Z_DISABLE 0xFFFFFF7F 8167 #define S_02800C_FAST_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 8) 8168 #define G_02800C_FAST_STENCIL_DISABLE(x) (((x) >> 8) & 0x1) 8169 #define C_02800C_FAST_STENCIL_DISABLE 0xFFFFFEFF 8170 #define S_02800C_NOOP_CULL_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 8171 #define G_02800C_NOOP_CULL_DISABLE(x) (((x) >> 9) & 0x1) 8172 #define C_02800C_NOOP_CULL_DISABLE 0xFFFFFDFF 8173 #define S_02800C_FORCE_COLOR_KILL(x) (((unsigned)(x) & 0x1) << 10) 8174 #define G_02800C_FORCE_COLOR_KILL(x) (((x) >> 10) & 0x1) 8175 #define C_02800C_FORCE_COLOR_KILL 0xFFFFFBFF 8176 #define S_02800C_FORCE_Z_READ(x) (((unsigned)(x) & 0x1) << 11) 8177 #define G_02800C_FORCE_Z_READ(x) (((x) >> 11) & 0x1) 8178 #define C_02800C_FORCE_Z_READ 0xFFFFF7FF 8179 #define S_02800C_FORCE_STENCIL_READ(x) (((unsigned)(x) & 0x1) << 12) 8180 #define G_02800C_FORCE_STENCIL_READ(x) (((x) >> 12) & 0x1) 8181 #define C_02800C_FORCE_STENCIL_READ 0xFFFFEFFF 8182 #define S_02800C_FORCE_FULL_Z_RANGE(x) (((unsigned)(x) & 0x3) << 13) 8183 #define G_02800C_FORCE_FULL_Z_RANGE(x) (((x) >> 13) & 0x3) 8184 #define C_02800C_FORCE_FULL_Z_RANGE 0xFFFF9FFF 8185 #define S_02800C_FORCE_QC_SMASK_CONFLICT(x) (((unsigned)(x) & 0x1) << 15) 8186 #define G_02800C_FORCE_QC_SMASK_CONFLICT(x) (((x) >> 15) & 0x1) 8187 #define C_02800C_FORCE_QC_SMASK_CONFLICT 0xFFFF7FFF 8188 #define S_02800C_DISABLE_VIEWPORT_CLAMP(x) (((unsigned)(x) & 0x1) << 16) 8189 #define G_02800C_DISABLE_VIEWPORT_CLAMP(x) (((x) >> 16) & 0x1) 8190 #define C_02800C_DISABLE_VIEWPORT_CLAMP 0xFFFEFFFF 8191 #define S_02800C_IGNORE_SC_ZRANGE(x) (((unsigned)(x) & 0x1) << 17) 8192 #define G_02800C_IGNORE_SC_ZRANGE(x) (((x) >> 17) & 0x1) 8193 #define C_02800C_IGNORE_SC_ZRANGE 0xFFFDFFFF 8194 #define S_02800C_DISABLE_FULLY_COVERED(x) (((unsigned)(x) & 0x1) << 18) 8195 #define G_02800C_DISABLE_FULLY_COVERED(x) (((x) >> 18) & 0x1) 8196 #define C_02800C_DISABLE_FULLY_COVERED 0xFFFBFFFF 8197 #define S_02800C_FORCE_Z_LIMIT_SUMM(x) (((unsigned)(x) & 0x3) << 19) 8198 #define G_02800C_FORCE_Z_LIMIT_SUMM(x) (((x) >> 19) & 0x3) 8199 #define C_02800C_FORCE_Z_LIMIT_SUMM 0xFFE7FFFF 8200 #define V_02800C_FORCE_SUMM_OFF 0 8201 #define V_02800C_FORCE_SUMM_MINZ 1 8202 #define V_02800C_FORCE_SUMM_MAXZ 2 8203 #define V_02800C_FORCE_SUMM_BOTH 3 8204 #define S_02800C_MAX_TILES_IN_DTT(x) (((unsigned)(x) & 0x1F) << 21) 8205 #define G_02800C_MAX_TILES_IN_DTT(x) (((x) >> 21) & 0x1F) 8206 #define C_02800C_MAX_TILES_IN_DTT 0xFC1FFFFF 8207 #define S_02800C_DISABLE_TILE_RATE_TILES(x) (((unsigned)(x) & 0x1) << 26) 8208 #define G_02800C_DISABLE_TILE_RATE_TILES(x) (((x) >> 26) & 0x1) 8209 #define C_02800C_DISABLE_TILE_RATE_TILES 0xFBFFFFFF 8210 #define S_02800C_FORCE_Z_DIRTY(x) (((unsigned)(x) & 0x1) << 27) 8211 #define G_02800C_FORCE_Z_DIRTY(x) (((x) >> 27) & 0x1) 8212 #define C_02800C_FORCE_Z_DIRTY 0xF7FFFFFF 8213 #define S_02800C_FORCE_STENCIL_DIRTY(x) (((unsigned)(x) & 0x1) << 28) 8214 #define G_02800C_FORCE_STENCIL_DIRTY(x) (((x) >> 28) & 0x1) 8215 #define C_02800C_FORCE_STENCIL_DIRTY 0xEFFFFFFF 8216 #define S_02800C_FORCE_Z_VALID(x) (((unsigned)(x) & 0x1) << 29) 8217 #define G_02800C_FORCE_Z_VALID(x) (((x) >> 29) & 0x1) 8218 #define C_02800C_FORCE_Z_VALID 0xDFFFFFFF 8219 #define S_02800C_FORCE_STENCIL_VALID(x) (((unsigned)(x) & 0x1) << 30) 8220 #define G_02800C_FORCE_STENCIL_VALID(x) (((x) >> 30) & 0x1) 8221 #define C_02800C_FORCE_STENCIL_VALID 0xBFFFFFFF 8222 #define S_02800C_PRESERVE_COMPRESSION(x) (((unsigned)(x) & 0x1) << 31) 8223 #define G_02800C_PRESERVE_COMPRESSION(x) (((x) >> 31) & 0x1) 8224 #define C_02800C_PRESERVE_COMPRESSION 0x7FFFFFFF 8225 #define R_028010_DB_RENDER_OVERRIDE2 0x028010 8226 #define S_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((unsigned)(x) & 0x3) << 0) 8227 #define G_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((x) >> 0) & 0x3) 8228 #define C_028010_PARTIAL_SQUAD_LAUNCH_CONTROL 0xFFFFFFFC 8229 #define V_028010_PSLC_AUTO 0 8230 #define V_028010_PSLC_ON_HANG_ONLY 1 8231 #define V_028010_PSLC_ASAP 2 8232 #define V_028010_PSLC_COUNTDOWN 3 8233 #define S_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((unsigned)(x) & 0x7) << 2) 8234 #define G_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((x) >> 2) & 0x7) 8235 #define C_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN 0xFFFFFFE3 8236 #define S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 5) 8237 #define G_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((x) >> 5) & 0x1) 8238 #define C_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION 0xFFFFFFDF 8239 #define S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 6) 8240 #define G_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((x) >> 6) & 0x1) 8241 #define C_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION 0xFFFFFFBF 8242 #define S_028010_DISABLE_COLOR_ON_VALIDATION(x) (((unsigned)(x) & 0x1) << 7) 8243 #define G_028010_DISABLE_COLOR_ON_VALIDATION(x) (((x) >> 7) & 0x1) 8244 #define C_028010_DISABLE_COLOR_ON_VALIDATION 0xFFFFFF7F 8245 #define S_028010_DECOMPRESS_Z_ON_FLUSH(x) (((unsigned)(x) & 0x1) << 8) 8246 #define G_028010_DECOMPRESS_Z_ON_FLUSH(x) (((x) >> 8) & 0x1) 8247 #define C_028010_DECOMPRESS_Z_ON_FLUSH 0xFFFFFEFF 8248 #define S_028010_DISABLE_REG_SNOOP(x) (((unsigned)(x) & 0x1) << 9) 8249 #define G_028010_DISABLE_REG_SNOOP(x) (((x) >> 9) & 0x1) 8250 #define C_028010_DISABLE_REG_SNOOP 0xFFFFFDFF 8251 #define S_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((unsigned)(x) & 0x1) << 10) 8252 #define G_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((x) >> 10) & 0x1) 8253 #define C_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE 0xFFFFFBFF 8254 #define S_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((unsigned)(x) & 0x1) << 11) 8255 #define G_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((x) >> 11) & 0x1) 8256 #define C_028010_SEPARATE_HIZS_FUNC_ENABLE 0xFFFFF7FF 8257 #define S_028010_HIZ_ZFUNC(x) (((unsigned)(x) & 0x7) << 12) 8258 #define G_028010_HIZ_ZFUNC(x) (((x) >> 12) & 0x7) 8259 #define C_028010_HIZ_ZFUNC 0xFFFF8FFF 8260 #define V_028010_FRAG_NEVER 0 8261 #define V_028010_FRAG_LESS 1 8262 #define V_028010_FRAG_EQUAL 2 8263 #define V_028010_FRAG_LEQUAL 3 8264 #define V_028010_FRAG_GREATER 4 8265 #define V_028010_FRAG_NOTEQUAL 5 8266 #define V_028010_FRAG_GEQUAL 6 8267 #define V_028010_FRAG_ALWAYS 7 8268 #define S_028010_HIS_SFUNC_FF(x) (((unsigned)(x) & 0x7) << 15) 8269 #define G_028010_HIS_SFUNC_FF(x) (((x) >> 15) & 0x7) 8270 #define C_028010_HIS_SFUNC_FF 0xFFFC7FFF 8271 #define S_028010_HIS_SFUNC_BF(x) (((unsigned)(x) & 0x7) << 18) 8272 #define G_028010_HIS_SFUNC_BF(x) (((x) >> 18) & 0x7) 8273 #define C_028010_HIS_SFUNC_BF 0xFFE3FFFF 8274 #define S_028010_PRESERVE_ZRANGE(x) (((unsigned)(x) & 0x1) << 21) 8275 #define G_028010_PRESERVE_ZRANGE(x) (((x) >> 21) & 0x1) 8276 #define C_028010_PRESERVE_ZRANGE 0xFFDFFFFF 8277 #define S_028010_PRESERVE_SRESULTS(x) (((unsigned)(x) & 0x1) << 22) 8278 #define G_028010_PRESERVE_SRESULTS(x) (((x) >> 22) & 0x1) 8279 #define C_028010_PRESERVE_SRESULTS 0xFFBFFFFF 8280 #define S_028010_DISABLE_FAST_PASS(x) (((unsigned)(x) & 0x1) << 23) 8281 #define G_028010_DISABLE_FAST_PASS(x) (((x) >> 23) & 0x1) 8282 #define C_028010_DISABLE_FAST_PASS 0xFF7FFFFF 8283 #define S_028010_ALLOW_PARTIAL_RES_HIER_KILL(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx9 */ 8284 #define G_028010_ALLOW_PARTIAL_RES_HIER_KILL(x) (((x) >> 25) & 0x1) 8285 #define C_028010_ALLOW_PARTIAL_RES_HIER_KILL 0xFDFFFFFF 8286 #define S_028010_FORCE_VRS_RATE_FINE(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx103 */ 8287 #define G_028010_FORCE_VRS_RATE_FINE(x) (((x) >> 26) & 0x1) 8288 #define C_028010_FORCE_VRS_RATE_FINE 0xFBFFFFFF 8289 #define S_028010_CENTROID_COMPUTATION_MODE(x) (((unsigned)(x) & 0x3) << 27) /* >= gfx103 */ 8290 #define G_028010_CENTROID_COMPUTATION_MODE(x) (((x) >> 27) & 0x3) 8291 #define C_028010_CENTROID_COMPUTATION_MODE 0xE7FFFFFF 8292 #define R_028014_DB_HTILE_DATA_BASE 0x028014 8293 #define R_028018_DB_HTILE_DATA_BASE_HI 0x028018 /* gfx9 */ 8294 #define S_028018_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8295 #define G_028018_BASE_HI(x) (((x) >> 0) & 0xFF) 8296 #define C_028018_BASE_HI 0xFFFFFF00 8297 #define R_02801C_DB_DEPTH_SIZE 0x02801C /* gfx9 */ 8298 #define S_02801C_X_MAX(x) (((unsigned)(x) & 0x3FFF) << 0) 8299 #define G_02801C_X_MAX(x) (((x) >> 0) & 0x3FFF) 8300 #define C_02801C_X_MAX 0xFFFFC000 8301 #define S_02801C_Y_MAX(x) (((unsigned)(x) & 0x3FFF) << 16) 8302 #define G_02801C_Y_MAX(x) (((x) >> 16) & 0x3FFF) 8303 #define C_02801C_Y_MAX 0xC000FFFF 8304 #define R_02801C_DB_DEPTH_SIZE_XY 0x02801C /* >= gfx10 */ 8305 #define R_028020_DB_DEPTH_BOUNDS_MIN 0x028020 8306 #define R_028024_DB_DEPTH_BOUNDS_MAX 0x028024 8307 #define R_028028_DB_STENCIL_CLEAR 0x028028 8308 #define S_028028_CLEAR(x) (((unsigned)(x) & 0xFF) << 0) 8309 #define G_028028_CLEAR(x) (((x) >> 0) & 0xFF) 8310 #define C_028028_CLEAR 0xFFFFFF00 8311 #define R_02802C_DB_DEPTH_CLEAR 0x02802C 8312 #define R_028030_PA_SC_SCREEN_SCISSOR_TL 0x028030 8313 #define S_028030_TL_X(x) (((unsigned)(x) & 0xFFFF) << 0) 8314 #define G_028030_TL_X(x) (((x) >> 0) & 0xFFFF) 8315 #define C_028030_TL_X 0xFFFF0000 8316 #define S_028030_TL_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 8317 #define G_028030_TL_Y(x) (((x) >> 16) & 0xFFFF) 8318 #define C_028030_TL_Y 0x0000FFFF 8319 #define R_028034_PA_SC_SCREEN_SCISSOR_BR 0x028034 8320 #define S_028034_BR_X(x) (((unsigned)(x) & 0xFFFF) << 0) 8321 #define G_028034_BR_X(x) (((x) >> 0) & 0xFFFF) 8322 #define C_028034_BR_X 0xFFFF0000 8323 #define S_028034_BR_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 8324 #define G_028034_BR_Y(x) (((x) >> 16) & 0xFFFF) 8325 #define C_028034_BR_Y 0x0000FFFF 8326 #define R_028038_DB_DFSM_CONTROL 0x028038 /* >= gfx10 */ 8327 #define S_028038_PUNCHOUT_MODE(x) (((unsigned)(x) & 0x3) << 0) 8328 #define G_028038_PUNCHOUT_MODE(x) (((x) >> 0) & 0x3) 8329 #define C_028038_PUNCHOUT_MODE 0xFFFFFFFC 8330 #define V_028038_AUTO 0 8331 #define V_028038_FORCE_ON 1 8332 #define V_028038_FORCE_OFF 2 8333 #define V_028038_RESERVED 3 8334 #define S_028038_POPS_DRAIN_PS_ON_OVERLAP(x) (((unsigned)(x) & 0x1) << 2) 8335 #define G_028038_POPS_DRAIN_PS_ON_OVERLAP(x) (((x) >> 2) & 0x1) 8336 #define C_028038_POPS_DRAIN_PS_ON_OVERLAP 0xFFFFFFFB 8337 #define S_028038_DISALLOW_OVERFLOW(x) (((unsigned)(x) & 0x1) << 3) 8338 #define G_028038_DISALLOW_OVERFLOW(x) (((x) >> 3) & 0x1) 8339 #define C_028038_DISALLOW_OVERFLOW 0xFFFFFFF7 8340 #define R_028038_DB_Z_INFO 0x028038 /* gfx9 */ 8341 #define S_028038_FORMAT(x) (((unsigned)(x) & 0x3) << 0) 8342 #define G_028038_FORMAT(x) (((x) >> 0) & 0x3) 8343 #define C_028038_FORMAT 0xFFFFFFFC 8344 #define V_028038_Z_INVALID 0 8345 #define V_028038_Z_16 1 8346 #define V_028038_Z_24 2 8347 #define V_028038_Z_32_FLOAT 3 8348 #define S_028038_NUM_SAMPLES(x) (((unsigned)(x) & 0x3) << 2) 8349 #define G_028038_NUM_SAMPLES(x) (((x) >> 2) & 0x3) 8350 #define C_028038_NUM_SAMPLES 0xFFFFFFF3 8351 #define S_028038_SW_MODE(x) (((unsigned)(x) & 0x1F) << 4) 8352 #define G_028038_SW_MODE(x) (((x) >> 4) & 0x1F) 8353 #define C_028038_SW_MODE 0xFFFFFE0F 8354 #define S_028038_PARTIALLY_RESIDENT(x) (((unsigned)(x) & 0x1) << 12) 8355 #define G_028038_PARTIALLY_RESIDENT(x) (((x) >> 12) & 0x1) 8356 #define C_028038_PARTIALLY_RESIDENT 0xFFFFEFFF 8357 #define S_028038_FAULT_BEHAVIOR(x) (((unsigned)(x) & 0x3) << 13) 8358 #define G_028038_FAULT_BEHAVIOR(x) (((x) >> 13) & 0x3) 8359 #define C_028038_FAULT_BEHAVIOR 0xFFFF9FFF 8360 #define V_028038_FAULT_ZERO 0 8361 #define V_028038_FAULT_ONE 1 8362 #define V_028038_FAULT_FAIL 2 8363 #define V_028038_FAULT_PASS 3 8364 #define S_028038_ITERATE_FLUSH(x) (((unsigned)(x) & 0x1) << 15) 8365 #define G_028038_ITERATE_FLUSH(x) (((x) >> 15) & 0x1) 8366 #define C_028038_ITERATE_FLUSH 0xFFFF7FFF 8367 #define S_028038_MAXMIP(x) (((unsigned)(x) & 0xF) << 16) 8368 #define G_028038_MAXMIP(x) (((x) >> 16) & 0xF) 8369 #define C_028038_MAXMIP 0xFFF0FFFF 8370 #define S_028038_DECOMPRESS_ON_N_ZPLANES(x) (((unsigned)(x) & 0xF) << 23) 8371 #define G_028038_DECOMPRESS_ON_N_ZPLANES(x) (((x) >> 23) & 0xF) 8372 #define C_028038_DECOMPRESS_ON_N_ZPLANES 0xF87FFFFF 8373 #define S_028038_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) 8374 #define G_028038_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) 8375 #define C_028038_ALLOW_EXPCLEAR 0xF7FFFFFF 8376 #define S_028038_READ_SIZE(x) (((unsigned)(x) & 0x1) << 28) 8377 #define G_028038_READ_SIZE(x) (((x) >> 28) & 0x1) 8378 #define C_028038_READ_SIZE 0xEFFFFFFF 8379 #define S_028038_TILE_SURFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 29) 8380 #define G_028038_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1) 8381 #define C_028038_TILE_SURFACE_ENABLE 0xDFFFFFFF 8382 #define S_028038_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) 8383 #define G_028038_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) 8384 #define C_028038_CLEAR_DISALLOWED 0xBFFFFFFF 8385 #define S_028038_ZRANGE_PRECISION(x) (((unsigned)(x) & 0x1) << 31) 8386 #define G_028038_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) 8387 #define C_028038_ZRANGE_PRECISION 0x7FFFFFFF 8388 #define R_02803C_DB_DEPTH_INFO 0x02803C /* <= gfx81 */ 8389 #define S_02803C_ADDR5_SWIZZLE_MASK(x) (((unsigned)(x) & 0xF) << 0) 8390 #define G_02803C_ADDR5_SWIZZLE_MASK(x) (((x) >> 0) & 0xF) 8391 #define C_02803C_ADDR5_SWIZZLE_MASK 0xFFFFFFF0 8392 #define S_02803C_ARRAY_MODE(x) (((unsigned)(x) & 0xF) << 4) 8393 #define G_02803C_ARRAY_MODE(x) (((x) >> 4) & 0xF) 8394 #define C_02803C_ARRAY_MODE 0xFFFFFF0F 8395 #define V_02803C_ARRAY_LINEAR_GENERAL 0 8396 #define V_02803C_ARRAY_LINEAR_ALIGNED 1 8397 #define V_02803C_ARRAY_1D_TILED_THIN1 2 8398 #define V_02803C_ARRAY_1D_TILED_THICK 3 8399 #define V_02803C_ARRAY_2D_TILED_THIN1 4 8400 #define V_02803C_ARRAY_PRT_TILED_THIN1 5 8401 #define V_02803C_ARRAY_PRT_2D_TILED_THIN1 6 8402 #define V_02803C_ARRAY_2D_TILED_THICK 7 8403 #define V_02803C_ARRAY_2D_TILED_XTHICK 8 8404 #define V_02803C_ARRAY_PRT_TILED_THICK 9 8405 #define V_02803C_ARRAY_PRT_2D_TILED_THICK 10 8406 #define V_02803C_ARRAY_PRT_3D_TILED_THIN1 11 8407 #define V_02803C_ARRAY_3D_TILED_THIN1 12 8408 #define V_02803C_ARRAY_3D_TILED_THICK 13 8409 #define V_02803C_ARRAY_3D_TILED_XTHICK 14 8410 #define V_02803C_ARRAY_PRT_3D_TILED_THICK 15 8411 #define S_02803C_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 8) 8412 #define G_02803C_PIPE_CONFIG(x) (((x) >> 8) & 0x1F) 8413 #define C_02803C_PIPE_CONFIG 0xFFFFE0FF 8414 #define V_02803C_ADDR_SURF_P2 0 8415 #define V_02803C_ADDR_SURF_P2_RESERVED0 1 8416 #define V_02803C_ADDR_SURF_P2_RESERVED1 2 8417 #define V_02803C_ADDR_SURF_P2_RESERVED2 3 8418 #define V_02803C_ADDR_SURF_P4_8x16 4 8419 #define V_02803C_ADDR_SURF_P4_16x16 5 8420 #define V_02803C_ADDR_SURF_P4_16x32 6 8421 #define V_02803C_ADDR_SURF_P4_32x32 7 8422 #define V_02803C_ADDR_SURF_P8_16x16_8x16 8 8423 #define V_02803C_ADDR_SURF_P8_16x32_8x16 9 8424 #define V_02803C_ADDR_SURF_P8_32x32_8x16 10 8425 #define V_02803C_ADDR_SURF_P8_16x32_16x16 11 8426 #define V_02803C_ADDR_SURF_P8_32x32_16x16 12 8427 #define V_02803C_ADDR_SURF_P8_32x32_16x32 13 8428 #define V_02803C_ADDR_SURF_P8_32x64_32x32 14 8429 #define V_02803C_ADDR_SURF_P8_RESERVED0 15 8430 #define V_02803C_ADDR_SURF_P16_32x32_8x16 16 8431 #define V_02803C_ADDR_SURF_P16_32x32_16x16 17 8432 #define S_02803C_BANK_WIDTH(x) (((unsigned)(x) & 0x3) << 13) 8433 #define G_02803C_BANK_WIDTH(x) (((x) >> 13) & 0x3) 8434 #define C_02803C_BANK_WIDTH 0xFFFF9FFF 8435 #define V_02803C_ADDR_SURF_BANK_WIDTH_1 0 8436 #define V_02803C_ADDR_SURF_BANK_WIDTH_2 1 8437 #define V_02803C_ADDR_SURF_BANK_WIDTH_4 2 8438 #define V_02803C_ADDR_SURF_BANK_WIDTH_8 3 8439 #define S_02803C_BANK_HEIGHT(x) (((unsigned)(x) & 0x3) << 15) 8440 #define G_02803C_BANK_HEIGHT(x) (((x) >> 15) & 0x3) 8441 #define C_02803C_BANK_HEIGHT 0xFFFE7FFF 8442 #define V_02803C_ADDR_SURF_BANK_HEIGHT_1 0 8443 #define V_02803C_ADDR_SURF_BANK_HEIGHT_2 1 8444 #define V_02803C_ADDR_SURF_BANK_HEIGHT_4 2 8445 #define V_02803C_ADDR_SURF_BANK_HEIGHT_8 3 8446 #define S_02803C_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x3) << 17) 8447 #define G_02803C_MACRO_TILE_ASPECT(x) (((x) >> 17) & 0x3) 8448 #define C_02803C_MACRO_TILE_ASPECT 0xFFF9FFFF 8449 #define V_02803C_ADDR_SURF_MACRO_ASPECT_1 0 8450 #define V_02803C_ADDR_SURF_MACRO_ASPECT_2 1 8451 #define V_02803C_ADDR_SURF_MACRO_ASPECT_4 2 8452 #define V_02803C_ADDR_SURF_MACRO_ASPECT_8 3 8453 #define S_02803C_NUM_BANKS(x) (((unsigned)(x) & 0x3) << 19) 8454 #define G_02803C_NUM_BANKS(x) (((x) >> 19) & 0x3) 8455 #define C_02803C_NUM_BANKS 0xFFE7FFFF 8456 #define V_02803C_ADDR_SURF_2_BANK 0 8457 #define V_02803C_ADDR_SURF_4_BANK 1 8458 #define V_02803C_ADDR_SURF_8_BANK 2 8459 #define V_02803C_ADDR_SURF_16_BANK 3 8460 #define R_02803C_DB_RESERVED_REG_2 0x02803C /* >= gfx10 */ 8461 #define S_02803C_FIELD_1(x) (((unsigned)(x) & 0xF) << 0) 8462 #define G_02803C_FIELD_1(x) (((x) >> 0) & 0xF) 8463 #define C_02803C_FIELD_1 0xFFFFFFF0 8464 #define S_02803C_FIELD_2(x) (((unsigned)(x) & 0xF) << 4) 8465 #define G_02803C_FIELD_2(x) (((x) >> 4) & 0xF) 8466 #define C_02803C_FIELD_2 0xFFFFFF0F 8467 #define S_02803C_FIELD_3(x) (((unsigned)(x) & 0x1F) << 8) 8468 #define G_02803C_FIELD_3(x) (((x) >> 8) & 0x1F) 8469 #define C_02803C_FIELD_3 0xFFFFE0FF 8470 #define S_02803C_FIELD_4(x) (((unsigned)(x) & 0x3) << 13) 8471 #define G_02803C_FIELD_4(x) (((x) >> 13) & 0x3) 8472 #define C_02803C_FIELD_4 0xFFFF9FFF 8473 #define S_02803C_FIELD_5(x) (((unsigned)(x) & 0x3) << 15) 8474 #define G_02803C_FIELD_5(x) (((x) >> 15) & 0x3) 8475 #define C_02803C_FIELD_5 0xFFFE7FFF 8476 #define S_02803C_FIELD_6(x) (((unsigned)(x) & 0x3) << 17) 8477 #define G_02803C_FIELD_6(x) (((x) >> 17) & 0x3) 8478 #define C_02803C_FIELD_6 0xFFF9FFFF 8479 #define S_02803C_FIELD_7(x) (((unsigned)(x) & 0x3) << 19) 8480 #define G_02803C_FIELD_7(x) (((x) >> 19) & 0x3) 8481 #define C_02803C_FIELD_7 0xFFE7FFFF 8482 #define S_02803C_RESOURCE_LEVEL(x) (((unsigned)(x) & 0xF) << 28) 8483 #define G_02803C_RESOURCE_LEVEL(x) (((x) >> 28) & 0xF) 8484 #define C_02803C_RESOURCE_LEVEL 0x0FFFFFFF 8485 #define R_02803C_DB_STENCIL_INFO 0x02803C /* gfx9 */ 8486 #define S_02803C_FORMAT(x) (((unsigned)(x) & 0x1) << 0) 8487 #define G_02803C_FORMAT(x) (((x) >> 0) & 0x1) 8488 #define C_02803C_FORMAT 0xFFFFFFFE 8489 #define V_02803C_STENCIL_INVALID 0 8490 #define V_02803C_STENCIL_8 1 8491 #define S_02803C_SW_MODE(x) (((unsigned)(x) & 0x1F) << 4) 8492 #define G_02803C_SW_MODE(x) (((x) >> 4) & 0x1F) 8493 #define C_02803C_SW_MODE 0xFFFFFE0F 8494 #define S_02803C_PARTIALLY_RESIDENT(x) (((unsigned)(x) & 0x1) << 12) 8495 #define G_02803C_PARTIALLY_RESIDENT(x) (((x) >> 12) & 0x1) 8496 #define C_02803C_PARTIALLY_RESIDENT 0xFFFFEFFF 8497 #define S_02803C_FAULT_BEHAVIOR(x) (((unsigned)(x) & 0x3) << 13) 8498 #define G_02803C_FAULT_BEHAVIOR(x) (((x) >> 13) & 0x3) 8499 #define C_02803C_FAULT_BEHAVIOR 0xFFFF9FFF 8500 #define V_02803C_FAULT_ZERO 0 8501 #define V_02803C_FAULT_ONE 1 8502 #define V_02803C_FAULT_FAIL 2 8503 #define V_02803C_FAULT_PASS 3 8504 #define S_02803C_ITERATE_FLUSH(x) (((unsigned)(x) & 0x1) << 15) 8505 #define G_02803C_ITERATE_FLUSH(x) (((x) >> 15) & 0x1) 8506 #define C_02803C_ITERATE_FLUSH 0xFFFF7FFF 8507 #define S_02803C_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) 8508 #define G_02803C_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) 8509 #define C_02803C_ALLOW_EXPCLEAR 0xF7FFFFFF 8510 #define S_02803C_TILE_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 29) 8511 #define G_02803C_TILE_STENCIL_DISABLE(x) (((x) >> 29) & 0x1) 8512 #define C_02803C_TILE_STENCIL_DISABLE 0xDFFFFFFF 8513 #define S_02803C_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) 8514 #define G_02803C_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) 8515 #define C_02803C_CLEAR_DISALLOWED 0xBFFFFFFF 8516 #define R_028040_DB_Z_INFO 0x028040 /* <= gfx81, >= gfx10 */ 8517 #define S_028040_FORMAT(x) (((unsigned)(x) & 0x3) << 0) 8518 #define G_028040_FORMAT(x) (((x) >> 0) & 0x3) 8519 #define C_028040_FORMAT 0xFFFFFFFC 8520 #define V_028040_Z_INVALID 0 8521 #define V_028040_Z_16 1 8522 #define V_028040_Z_24 2 8523 #define V_028040_Z_32_FLOAT 3 8524 #define S_028040_NUM_SAMPLES(x) (((unsigned)(x) & 0x3) << 2) 8525 #define G_028040_NUM_SAMPLES(x) (((x) >> 2) & 0x3) 8526 #define C_028040_NUM_SAMPLES 0xFFFFFFF3 8527 #define S_028040_SW_MODE(x) (((unsigned)(x) & 0x1F) << 4) /* >= gfx10 */ 8528 #define G_028040_SW_MODE(x) (((x) >> 4) & 0x1F) 8529 #define C_028040_SW_MODE 0xFFFFFE0F 8530 #define S_028040_FAULT_BEHAVIOR(x) (((unsigned)(x) & 0x3) << 9) /* >= gfx10 */ 8531 #define G_028040_FAULT_BEHAVIOR(x) (((x) >> 9) & 0x3) 8532 #define C_028040_FAULT_BEHAVIOR 0xFFFFF9FF 8533 #define V_028040_FAULT_ZERO 0 8534 #define V_028040_FAULT_ONE 1 8535 #define V_028040_FAULT_FAIL 2 8536 #define V_028040_FAULT_PASS 3 8537 #define S_028040_ITERATE_FLUSH(x) (((unsigned)(x) & 0x1) << 11) /* >= gfx10 */ 8538 #define G_028040_ITERATE_FLUSH(x) (((x) >> 11) & 0x1) 8539 #define C_028040_ITERATE_FLUSH 0xFFFFF7FF 8540 #define S_028040_PARTIALLY_RESIDENT(x) (((unsigned)(x) & 0x1) << 12) /* >= gfx10 */ 8541 #define G_028040_PARTIALLY_RESIDENT(x) (((x) >> 12) & 0x1) 8542 #define C_028040_PARTIALLY_RESIDENT 0xFFFFEFFF 8543 #define S_028040_RESERVED_FIELD_1(x) (((unsigned)(x) & 0x7) << 13) /* >= gfx10 */ 8544 #define G_028040_RESERVED_FIELD_1(x) (((x) >> 13) & 0x7) 8545 #define C_028040_RESERVED_FIELD_1 0xFFFF1FFF 8546 #define S_028040_TILE_SPLIT(x) (((unsigned)(x) & 0x7) << 13) /* <= gfx81 */ 8547 #define G_028040_TILE_SPLIT(x) (((x) >> 13) & 0x7) 8548 #define C_028040_TILE_SPLIT 0xFFFF1FFF 8549 #define V_028040_ADDR_SURF_TILE_SPLIT_64B 0 8550 #define V_028040_ADDR_SURF_TILE_SPLIT_128B 1 8551 #define V_028040_ADDR_SURF_TILE_SPLIT_256B 2 8552 #define V_028040_ADDR_SURF_TILE_SPLIT_512B 3 8553 #define V_028040_ADDR_SURF_TILE_SPLIT_1KB 4 8554 #define V_028040_ADDR_SURF_TILE_SPLIT_2KB 5 8555 #define V_028040_ADDR_SURF_TILE_SPLIT_4KB 6 8556 #define S_028040_MAXMIP(x) (((unsigned)(x) & 0xF) << 16) /* >= gfx10 */ 8557 #define G_028040_MAXMIP(x) (((x) >> 16) & 0xF) 8558 #define C_028040_MAXMIP 0xFFF0FFFF 8559 #define S_028040_ITERATE_256(x) (((unsigned)(x) & 0x1) << 20) /* >= gfx10 */ 8560 #define G_028040_ITERATE_256(x) (((x) >> 20) & 0x1) 8561 #define C_028040_ITERATE_256 0xFFEFFFFF 8562 #define S_028040_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x7) << 20) /* <= gfx81 */ 8563 #define G_028040_TILE_MODE_INDEX(x) (((x) >> 20) & 0x7) 8564 #define C_028040_TILE_MODE_INDEX 0xFF8FFFFF 8565 #define S_028040_DECOMPRESS_ON_N_ZPLANES(x) (((unsigned)(x) & 0xF) << 23) /* gfx8, gfx81, >= gfx10 */ 8566 #define G_028040_DECOMPRESS_ON_N_ZPLANES(x) (((x) >> 23) & 0xF) 8567 #define C_028040_DECOMPRESS_ON_N_ZPLANES 0xF87FFFFF 8568 #define S_028040_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) 8569 #define G_028040_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) 8570 #define C_028040_ALLOW_EXPCLEAR 0xF7FFFFFF 8571 #define S_028040_READ_SIZE(x) (((unsigned)(x) & 0x1) << 28) 8572 #define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1) 8573 #define C_028040_READ_SIZE 0xEFFFFFFF 8574 #define S_028040_TILE_SURFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 29) 8575 #define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1) 8576 #define C_028040_TILE_SURFACE_ENABLE 0xDFFFFFFF 8577 #define S_028040_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) /* gfx8, gfx81 */ 8578 #define G_028040_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) 8579 #define C_028040_CLEAR_DISALLOWED 0xBFFFFFFF 8580 #define S_028040_ZRANGE_PRECISION(x) (((unsigned)(x) & 0x1) << 31) 8581 #define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) 8582 #define C_028040_ZRANGE_PRECISION 0x7FFFFFFF 8583 #define R_028040_DB_Z_READ_BASE 0x028040 /* gfx9 */ 8584 #define R_028044_DB_STENCIL_INFO 0x028044 /* <= gfx81, >= gfx10 */ 8585 #define S_028044_FORMAT(x) (((unsigned)(x) & 0x1) << 0) 8586 #define G_028044_FORMAT(x) (((x) >> 0) & 0x1) 8587 #define C_028044_FORMAT 0xFFFFFFFE 8588 #define V_028044_STENCIL_INVALID 0 8589 #define V_028044_STENCIL_8 1 8590 #define S_028044_SW_MODE(x) (((unsigned)(x) & 0x1F) << 4) /* >= gfx10 */ 8591 #define G_028044_SW_MODE(x) (((x) >> 4) & 0x1F) 8592 #define C_028044_SW_MODE 0xFFFFFE0F 8593 #define S_028044_FAULT_BEHAVIOR(x) (((unsigned)(x) & 0x3) << 9) /* >= gfx10 */ 8594 #define G_028044_FAULT_BEHAVIOR(x) (((x) >> 9) & 0x3) 8595 #define C_028044_FAULT_BEHAVIOR 0xFFFFF9FF 8596 #define V_028044_FAULT_ZERO 0 8597 #define V_028044_FAULT_ONE 1 8598 #define V_028044_FAULT_FAIL 2 8599 #define V_028044_FAULT_PASS 3 8600 #define S_028044_ITERATE_FLUSH(x) (((unsigned)(x) & 0x1) << 11) /* >= gfx10 */ 8601 #define G_028044_ITERATE_FLUSH(x) (((x) >> 11) & 0x1) 8602 #define C_028044_ITERATE_FLUSH 0xFFFFF7FF 8603 #define S_028044_PARTIALLY_RESIDENT(x) (((unsigned)(x) & 0x1) << 12) /* >= gfx10 */ 8604 #define G_028044_PARTIALLY_RESIDENT(x) (((x) >> 12) & 0x1) 8605 #define C_028044_PARTIALLY_RESIDENT 0xFFFFEFFF 8606 #define S_028044_RESERVED_FIELD_1(x) (((unsigned)(x) & 0x7) << 13) /* >= gfx10 */ 8607 #define G_028044_RESERVED_FIELD_1(x) (((x) >> 13) & 0x7) 8608 #define C_028044_RESERVED_FIELD_1 0xFFFF1FFF 8609 #define S_028044_TILE_SPLIT(x) (((unsigned)(x) & 0x7) << 13) /* <= gfx81 */ 8610 #define G_028044_TILE_SPLIT(x) (((x) >> 13) & 0x7) 8611 #define C_028044_TILE_SPLIT 0xFFFF1FFF 8612 #define V_028044_ADDR_SURF_TILE_SPLIT_64B 0 8613 #define V_028044_ADDR_SURF_TILE_SPLIT_128B 1 8614 #define V_028044_ADDR_SURF_TILE_SPLIT_256B 2 8615 #define V_028044_ADDR_SURF_TILE_SPLIT_512B 3 8616 #define V_028044_ADDR_SURF_TILE_SPLIT_1KB 4 8617 #define V_028044_ADDR_SURF_TILE_SPLIT_2KB 5 8618 #define V_028044_ADDR_SURF_TILE_SPLIT_4KB 6 8619 #define S_028044_ITERATE_256(x) (((unsigned)(x) & 0x1) << 20) /* >= gfx10 */ 8620 #define G_028044_ITERATE_256(x) (((x) >> 20) & 0x1) 8621 #define C_028044_ITERATE_256 0xFFEFFFFF 8622 #define S_028044_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x7) << 20) /* <= gfx81 */ 8623 #define G_028044_TILE_MODE_INDEX(x) (((x) >> 20) & 0x7) 8624 #define C_028044_TILE_MODE_INDEX 0xFF8FFFFF 8625 #define S_028044_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) 8626 #define G_028044_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) 8627 #define C_028044_ALLOW_EXPCLEAR 0xF7FFFFFF 8628 #define S_028044_TILE_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 29) 8629 #define G_028044_TILE_STENCIL_DISABLE(x) (((x) >> 29) & 0x1) 8630 #define C_028044_TILE_STENCIL_DISABLE 0xDFFFFFFF 8631 #define S_028044_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) /* gfx8, gfx81 */ 8632 #define G_028044_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) 8633 #define C_028044_CLEAR_DISALLOWED 0xBFFFFFFF 8634 #define R_028044_DB_Z_READ_BASE_HI 0x028044 /* gfx9 */ 8635 #define S_028044_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8636 #define G_028044_BASE_HI(x) (((x) >> 0) & 0xFF) 8637 #define C_028044_BASE_HI 0xFFFFFF00 8638 #define R_028048_DB_STENCIL_READ_BASE 0x028048 /* gfx9 */ 8639 #define R_028048_DB_Z_READ_BASE 0x028048 /* <= gfx81, >= gfx10 */ 8640 #define R_02804C_DB_STENCIL_READ_BASE 0x02804C /* <= gfx81, >= gfx10 */ 8641 #define R_02804C_DB_STENCIL_READ_BASE_HI 0x02804C /* gfx9 */ 8642 #define S_02804C_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8643 #define G_02804C_BASE_HI(x) (((x) >> 0) & 0xFF) 8644 #define C_02804C_BASE_HI 0xFFFFFF00 8645 #define R_028050_DB_Z_WRITE_BASE 0x028050 8646 #define R_028054_DB_STENCIL_WRITE_BASE 0x028054 /* <= gfx81, >= gfx10 */ 8647 #define R_028054_DB_Z_WRITE_BASE_HI 0x028054 /* gfx9 */ 8648 #define S_028054_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8649 #define G_028054_BASE_HI(x) (((x) >> 0) & 0xFF) 8650 #define C_028054_BASE_HI 0xFFFFFF00 8651 #define R_028058_DB_DEPTH_SIZE 0x028058 /* <= gfx81 */ 8652 #define S_028058_PITCH_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) 8653 #define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF) 8654 #define C_028058_PITCH_TILE_MAX 0xFFFFF800 8655 #define S_028058_HEIGHT_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 11) 8656 #define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF) 8657 #define C_028058_HEIGHT_TILE_MAX 0xFFC007FF 8658 #define R_028058_DB_RESERVED_REG_1 0x028058 /* >= gfx10 */ 8659 #define S_028058_FIELD_1(x) (((unsigned)(x) & 0x7FF) << 0) 8660 #define G_028058_FIELD_1(x) (((x) >> 0) & 0x7FF) 8661 #define C_028058_FIELD_1 0xFFFFF800 8662 #define S_028058_FIELD_2(x) (((unsigned)(x) & 0x7FF) << 11) 8663 #define G_028058_FIELD_2(x) (((x) >> 11) & 0x7FF) 8664 #define C_028058_FIELD_2 0xFFC007FF 8665 #define R_028058_DB_STENCIL_WRITE_BASE 0x028058 /* gfx9 */ 8666 #define R_02805C_DB_DEPTH_SLICE 0x02805C /* <= gfx81 */ 8667 #define S_02805C_SLICE_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 8668 #define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 8669 #define C_02805C_SLICE_TILE_MAX 0xFFC00000 8670 #define R_02805C_DB_RESERVED_REG_3 0x02805C /* >= gfx10 */ 8671 #define S_02805C_FIELD_1(x) (((unsigned)(x) & 0x3FFFFF) << 0) 8672 #define G_02805C_FIELD_1(x) (((x) >> 0) & 0x3FFFFF) 8673 #define C_02805C_FIELD_1 0xFFC00000 8674 #define R_02805C_DB_STENCIL_WRITE_BASE_HI 0x02805C /* gfx9 */ 8675 #define S_02805C_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8676 #define G_02805C_BASE_HI(x) (((x) >> 0) & 0xFF) 8677 #define C_02805C_BASE_HI 0xFFFFFF00 8678 #define R_028060_DB_DFSM_CONTROL 0x028060 /* gfx9 */ 8679 #define S_028060_PUNCHOUT_MODE(x) (((unsigned)(x) & 0x3) << 0) 8680 #define G_028060_PUNCHOUT_MODE(x) (((x) >> 0) & 0x3) 8681 #define C_028060_PUNCHOUT_MODE 0xFFFFFFFC 8682 #define V_028060_AUTO 0 8683 #define V_028060_FORCE_ON 1 8684 #define V_028060_FORCE_OFF 2 8685 #define V_028060_RESERVED 3 8686 #define S_028060_POPS_DRAIN_PS_ON_OVERLAP(x) (((unsigned)(x) & 0x1) << 2) 8687 #define G_028060_POPS_DRAIN_PS_ON_OVERLAP(x) (((x) >> 2) & 0x1) 8688 #define C_028060_POPS_DRAIN_PS_ON_OVERLAP 0xFFFFFFFB 8689 #define S_028060_DISALLOW_OVERFLOW(x) (((unsigned)(x) & 0x1) << 3) 8690 #define G_028060_DISALLOW_OVERFLOW(x) (((x) >> 3) & 0x1) 8691 #define C_028060_DISALLOW_OVERFLOW 0xFFFFFFF7 8692 #define R_028064_DB_VRS_OVERRIDE_CNTL 0x028064 /* >= gfx103 */ 8693 #define S_028064_VRS_OVERRIDE_RATE_COMBINER_MODE(x) (((unsigned)(x) & 0x7) << 0) 8694 #define G_028064_VRS_OVERRIDE_RATE_COMBINER_MODE(x) (((x) >> 0) & 0x7) 8695 #define C_028064_VRS_OVERRIDE_RATE_COMBINER_MODE 0xFFFFFFF8 8696 #define V_028064_VRS_COMB_MODE_PASSTHRU 0 8697 #define V_028064_VRS_COMB_MODE_OVERRIDE 1 8698 #define V_028064_VRS_COMB_MODE_MIN 2 8699 #define V_028064_VRS_COMB_MODE_MAX 3 8700 #define V_028064_VRS_COMB_MODE_SATURATE 4 8701 #define S_028064_VRS_OVERRIDE_RATE_X(x) (((unsigned)(x) & 0x3) << 4) 8702 #define G_028064_VRS_OVERRIDE_RATE_X(x) (((x) >> 4) & 0x3) 8703 #define C_028064_VRS_OVERRIDE_RATE_X 0xFFFFFFCF 8704 #define S_028064_VRS_OVERRIDE_RATE_Y(x) (((unsigned)(x) & 0x3) << 6) 8705 #define G_028064_VRS_OVERRIDE_RATE_Y(x) (((x) >> 6) & 0x3) 8706 #define C_028064_VRS_OVERRIDE_RATE_Y 0xFFFFFF3F 8707 #define R_028068_DB_Z_INFO2 0x028068 /* gfx9 */ 8708 #define S_028068_EPITCH(x) (((unsigned)(x) & 0xFFFF) << 0) 8709 #define G_028068_EPITCH(x) (((x) >> 0) & 0xFFFF) 8710 #define C_028068_EPITCH 0xFFFF0000 8711 #define R_028068_DB_Z_READ_BASE_HI 0x028068 /* >= gfx10 */ 8712 #define S_028068_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8713 #define G_028068_BASE_HI(x) (((x) >> 0) & 0xFF) 8714 #define C_028068_BASE_HI 0xFFFFFF00 8715 #define R_02806C_DB_STENCIL_INFO2 0x02806C /* gfx9 */ 8716 #define S_02806C_EPITCH(x) (((unsigned)(x) & 0xFFFF) << 0) 8717 #define G_02806C_EPITCH(x) (((x) >> 0) & 0xFFFF) 8718 #define C_02806C_EPITCH 0xFFFF0000 8719 #define R_02806C_DB_STENCIL_READ_BASE_HI 0x02806C /* >= gfx10 */ 8720 #define S_02806C_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8721 #define G_02806C_BASE_HI(x) (((x) >> 0) & 0xFF) 8722 #define C_02806C_BASE_HI 0xFFFFFF00 8723 #define R_028070_DB_Z_WRITE_BASE_HI 0x028070 /* >= gfx10 */ 8724 #define S_028070_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8725 #define G_028070_BASE_HI(x) (((x) >> 0) & 0xFF) 8726 #define C_028070_BASE_HI 0xFFFFFF00 8727 #define R_028074_DB_STENCIL_WRITE_BASE_HI 0x028074 /* >= gfx10 */ 8728 #define S_028074_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8729 #define G_028074_BASE_HI(x) (((x) >> 0) & 0xFF) 8730 #define C_028074_BASE_HI 0xFFFFFF00 8731 #define R_028078_DB_HTILE_DATA_BASE_HI 0x028078 /* >= gfx10 */ 8732 #define S_028078_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 8733 #define G_028078_BASE_HI(x) (((x) >> 0) & 0xFF) 8734 #define C_028078_BASE_HI 0xFFFFFF00 8735 #define R_02807C_DB_RMI_L2_CACHE_CONTROL 0x02807C /* >= gfx10 */ 8736 #define S_02807C_Z_WR_POLICY(x) (((unsigned)(x) & 0x3) << 0) 8737 #define G_02807C_Z_WR_POLICY(x) (((x) >> 0) & 0x3) 8738 #define C_02807C_Z_WR_POLICY 0xFFFFFFFC 8739 #define V_02807C_CACHE_LRU_WR 0 8740 #define V_02807C_CACHE_STREAM 1 8741 #define V_02807C_CACHE_BYPASS 2 8742 #define V_02807C_UNCACHED_WR 3 8743 #define S_02807C_S_WR_POLICY(x) (((unsigned)(x) & 0x3) << 2) 8744 #define G_02807C_S_WR_POLICY(x) (((x) >> 2) & 0x3) 8745 #define C_02807C_S_WR_POLICY 0xFFFFFFF3 8746 #define S_02807C_HTILE_WR_POLICY(x) (((unsigned)(x) & 0x3) << 4) 8747 #define G_02807C_HTILE_WR_POLICY(x) (((x) >> 4) & 0x3) 8748 #define C_02807C_HTILE_WR_POLICY 0xFFFFFFCF 8749 #define S_02807C_ZPCPSD_WR_POLICY(x) (((unsigned)(x) & 0x3) << 6) 8750 #define G_02807C_ZPCPSD_WR_POLICY(x) (((x) >> 6) & 0x3) 8751 #define C_02807C_ZPCPSD_WR_POLICY 0xFFFFFF3F 8752 #define S_02807C_Z_RD_POLICY(x) (((unsigned)(x) & 0x3) << 16) 8753 #define G_02807C_Z_RD_POLICY(x) (((x) >> 16) & 0x3) 8754 #define C_02807C_Z_RD_POLICY 0xFFFCFFFF 8755 #define V_02807C_CACHE_LRU_RD 0 8756 #define V_02807C_CACHE_NOA 1 8757 #define V_02807C_UNCACHED_RD 2 8758 #define V_02807C_RESERVED_RDPOLICY 3 8759 #define S_02807C_S_RD_POLICY(x) (((unsigned)(x) & 0x3) << 18) 8760 #define G_02807C_S_RD_POLICY(x) (((x) >> 18) & 0x3) 8761 #define C_02807C_S_RD_POLICY 0xFFF3FFFF 8762 #define S_02807C_HTILE_RD_POLICY(x) (((unsigned)(x) & 0x3) << 20) 8763 #define G_02807C_HTILE_RD_POLICY(x) (((x) >> 20) & 0x3) 8764 #define C_02807C_HTILE_RD_POLICY 0xFFCFFFFF 8765 #define S_02807C_Z_BIG_PAGE(x) (((unsigned)(x) & 0x1) << 24) 8766 #define G_02807C_Z_BIG_PAGE(x) (((x) >> 24) & 0x1) 8767 #define C_02807C_Z_BIG_PAGE 0xFEFFFFFF 8768 #define S_02807C_S_BIG_PAGE(x) (((unsigned)(x) & 0x1) << 25) 8769 #define G_02807C_S_BIG_PAGE(x) (((x) >> 25) & 0x1) 8770 #define C_02807C_S_BIG_PAGE 0xFDFFFFFF 8771 #define S_02807C_Z_NOALLOC(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx103 */ 8772 #define G_02807C_Z_NOALLOC(x) (((x) >> 26) & 0x1) 8773 #define C_02807C_Z_NOALLOC 0xFBFFFFFF 8774 #define S_02807C_S_NOALLOC(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx103 */ 8775 #define G_02807C_S_NOALLOC(x) (((x) >> 27) & 0x1) 8776 #define C_02807C_S_NOALLOC 0xF7FFFFFF 8777 #define S_02807C_HTILE_NOALLOC(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx103 */ 8778 #define G_02807C_HTILE_NOALLOC(x) (((x) >> 28) & 0x1) 8779 #define C_02807C_HTILE_NOALLOC 0xEFFFFFFF 8780 #define S_02807C_ZPCPSD_NOALLOC(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx103 */ 8781 #define G_02807C_ZPCPSD_NOALLOC(x) (((x) >> 29) & 0x1) 8782 #define C_02807C_ZPCPSD_NOALLOC 0xDFFFFFFF 8783 #define R_028080_TA_BC_BASE_ADDR 0x028080 8784 #define R_028084_TA_BC_BASE_ADDR_HI 0x028084 /* >= gfx7 */ 8785 #define S_028084_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) 8786 #define G_028084_ADDRESS(x) (((x) >> 0) & 0xFF) 8787 #define C_028084_ADDRESS 0xFFFFFF00 8788 #define R_0281E8_COHER_DEST_BASE_HI_0 0x0281E8 /* >= gfx7 */ 8789 #define S_0281E8_DEST_BASE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) 8790 #define G_0281E8_DEST_BASE_HI_256B(x) (((x) >> 0) & 0xFF) 8791 #define C_0281E8_DEST_BASE_HI_256B 0xFFFFFF00 8792 #define R_0281EC_COHER_DEST_BASE_HI_1 0x0281EC /* >= gfx7 */ 8793 #define R_0281F0_COHER_DEST_BASE_HI_2 0x0281F0 /* >= gfx7 */ 8794 #define R_0281F4_COHER_DEST_BASE_HI_3 0x0281F4 /* >= gfx7 */ 8795 #define R_0281F8_COHER_DEST_BASE_2 0x0281F8 8796 #define R_0281FC_COHER_DEST_BASE_3 0x0281FC 8797 #define R_028200_PA_SC_WINDOW_OFFSET 0x028200 8798 #define S_028200_WINDOW_X_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 0) 8799 #define G_028200_WINDOW_X_OFFSET(x) (((x) >> 0) & 0xFFFF) 8800 #define C_028200_WINDOW_X_OFFSET 0xFFFF0000 8801 #define S_028200_WINDOW_Y_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 16) 8802 #define G_028200_WINDOW_Y_OFFSET(x) (((x) >> 16) & 0xFFFF) 8803 #define C_028200_WINDOW_Y_OFFSET 0x0000FFFF 8804 #define R_028204_PA_SC_WINDOW_SCISSOR_TL 0x028204 8805 #define S_028204_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 8806 #define G_028204_TL_X(x) (((x) >> 0) & 0x7FFF) 8807 #define C_028204_TL_X 0xFFFF8000 8808 #define S_028204_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 8809 #define G_028204_TL_Y(x) (((x) >> 16) & 0x7FFF) 8810 #define C_028204_TL_Y 0x8000FFFF 8811 #define S_028204_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 8812 #define G_028204_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 8813 #define C_028204_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 8814 #define R_028208_PA_SC_WINDOW_SCISSOR_BR 0x028208 8815 #define S_028208_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 8816 #define G_028208_BR_X(x) (((x) >> 0) & 0x7FFF) 8817 #define C_028208_BR_X 0xFFFF8000 8818 #define S_028208_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 8819 #define G_028208_BR_Y(x) (((x) >> 16) & 0x7FFF) 8820 #define C_028208_BR_Y 0x8000FFFF 8821 #define R_02820C_PA_SC_CLIPRECT_RULE 0x02820C 8822 #define S_02820C_CLIP_RULE(x) (((unsigned)(x) & 0xFFFF) << 0) 8823 #define G_02820C_CLIP_RULE(x) (((x) >> 0) & 0xFFFF) 8824 #define C_02820C_CLIP_RULE 0xFFFF0000 8825 #define V_02820C_OUT 1 8826 #define V_02820C_IN_0 2 8827 #define V_02820C_IN_1 4 8828 #define V_02820C_IN_10 8 8829 #define V_02820C_IN_2 16 8830 #define V_02820C_IN_20 32 8831 #define V_02820C_IN_21 64 8832 #define V_02820C_IN_210 128 8833 #define V_02820C_IN_3 256 8834 #define V_02820C_IN_30 512 8835 #define V_02820C_IN_31 1024 8836 #define V_02820C_IN_310 2048 8837 #define V_02820C_IN_32 4096 8838 #define V_02820C_IN_320 8192 8839 #define V_02820C_IN_321 16384 8840 #define V_02820C_IN_3210 32768 8841 #define R_028210_PA_SC_CLIPRECT_0_TL 0x028210 8842 #define S_028210_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 8843 #define G_028210_TL_X(x) (((x) >> 0) & 0x7FFF) 8844 #define C_028210_TL_X 0xFFFF8000 8845 #define S_028210_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 8846 #define G_028210_TL_Y(x) (((x) >> 16) & 0x7FFF) 8847 #define C_028210_TL_Y 0x8000FFFF 8848 #define R_028214_PA_SC_CLIPRECT_0_BR 0x028214 8849 #define S_028214_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 8850 #define G_028214_BR_X(x) (((x) >> 0) & 0x7FFF) 8851 #define C_028214_BR_X 0xFFFF8000 8852 #define S_028214_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 8853 #define G_028214_BR_Y(x) (((x) >> 16) & 0x7FFF) 8854 #define C_028214_BR_Y 0x8000FFFF 8855 #define R_028218_PA_SC_CLIPRECT_1_TL 0x028218 8856 #define R_02821C_PA_SC_CLIPRECT_1_BR 0x02821C 8857 #define R_028220_PA_SC_CLIPRECT_2_TL 0x028220 8858 #define R_028224_PA_SC_CLIPRECT_2_BR 0x028224 8859 #define R_028228_PA_SC_CLIPRECT_3_TL 0x028228 8860 #define R_02822C_PA_SC_CLIPRECT_3_BR 0x02822C 8861 #define R_028230_PA_SC_EDGERULE 0x028230 8862 #define S_028230_ER_TRI(x) (((unsigned)(x) & 0xF) << 0) 8863 #define G_028230_ER_TRI(x) (((x) >> 0) & 0xF) 8864 #define C_028230_ER_TRI 0xFFFFFFF0 8865 #define S_028230_ER_POINT(x) (((unsigned)(x) & 0xF) << 4) 8866 #define G_028230_ER_POINT(x) (((x) >> 4) & 0xF) 8867 #define C_028230_ER_POINT 0xFFFFFF0F 8868 #define S_028230_ER_RECT(x) (((unsigned)(x) & 0xF) << 8) 8869 #define G_028230_ER_RECT(x) (((x) >> 8) & 0xF) 8870 #define C_028230_ER_RECT 0xFFFFF0FF 8871 #define S_028230_ER_LINE_LR(x) (((unsigned)(x) & 0x3F) << 12) 8872 #define G_028230_ER_LINE_LR(x) (((x) >> 12) & 0x3F) 8873 #define C_028230_ER_LINE_LR 0xFFFC0FFF 8874 #define S_028230_ER_LINE_RL(x) (((unsigned)(x) & 0x3F) << 18) 8875 #define G_028230_ER_LINE_RL(x) (((x) >> 18) & 0x3F) 8876 #define C_028230_ER_LINE_RL 0xFF03FFFF 8877 #define S_028230_ER_LINE_TB(x) (((unsigned)(x) & 0xF) << 24) 8878 #define G_028230_ER_LINE_TB(x) (((x) >> 24) & 0xF) 8879 #define C_028230_ER_LINE_TB 0xF0FFFFFF 8880 #define S_028230_ER_LINE_BT(x) (((unsigned)(x) & 0xF) << 28) 8881 #define G_028230_ER_LINE_BT(x) (((x) >> 28) & 0xF) 8882 #define C_028230_ER_LINE_BT 0x0FFFFFFF 8883 #define R_028234_PA_SU_HARDWARE_SCREEN_OFFSET 0x028234 8884 #define S_028234_HW_SCREEN_OFFSET_X(x) (((unsigned)(x) & 0x1FF) << 0) 8885 #define G_028234_HW_SCREEN_OFFSET_X(x) (((x) >> 0) & 0x1FF) 8886 #define C_028234_HW_SCREEN_OFFSET_X 0xFFFFFE00 8887 #define S_028234_HW_SCREEN_OFFSET_Y(x) (((unsigned)(x) & 0x1FF) << 16) 8888 #define G_028234_HW_SCREEN_OFFSET_Y(x) (((x) >> 16) & 0x1FF) 8889 #define C_028234_HW_SCREEN_OFFSET_Y 0xFE00FFFF 8890 #define R_028238_CB_TARGET_MASK 0x028238 8891 #define S_028238_TARGET0_ENABLE(x) (((unsigned)(x) & 0xF) << 0) 8892 #define G_028238_TARGET0_ENABLE(x) (((x) >> 0) & 0xF) 8893 #define C_028238_TARGET0_ENABLE 0xFFFFFFF0 8894 #define S_028238_TARGET1_ENABLE(x) (((unsigned)(x) & 0xF) << 4) 8895 #define G_028238_TARGET1_ENABLE(x) (((x) >> 4) & 0xF) 8896 #define C_028238_TARGET1_ENABLE 0xFFFFFF0F 8897 #define S_028238_TARGET2_ENABLE(x) (((unsigned)(x) & 0xF) << 8) 8898 #define G_028238_TARGET2_ENABLE(x) (((x) >> 8) & 0xF) 8899 #define C_028238_TARGET2_ENABLE 0xFFFFF0FF 8900 #define S_028238_TARGET3_ENABLE(x) (((unsigned)(x) & 0xF) << 12) 8901 #define G_028238_TARGET3_ENABLE(x) (((x) >> 12) & 0xF) 8902 #define C_028238_TARGET3_ENABLE 0xFFFF0FFF 8903 #define S_028238_TARGET4_ENABLE(x) (((unsigned)(x) & 0xF) << 16) 8904 #define G_028238_TARGET4_ENABLE(x) (((x) >> 16) & 0xF) 8905 #define C_028238_TARGET4_ENABLE 0xFFF0FFFF 8906 #define S_028238_TARGET5_ENABLE(x) (((unsigned)(x) & 0xF) << 20) 8907 #define G_028238_TARGET5_ENABLE(x) (((x) >> 20) & 0xF) 8908 #define C_028238_TARGET5_ENABLE 0xFF0FFFFF 8909 #define S_028238_TARGET6_ENABLE(x) (((unsigned)(x) & 0xF) << 24) 8910 #define G_028238_TARGET6_ENABLE(x) (((x) >> 24) & 0xF) 8911 #define C_028238_TARGET6_ENABLE 0xF0FFFFFF 8912 #define S_028238_TARGET7_ENABLE(x) (((unsigned)(x) & 0xF) << 28) 8913 #define G_028238_TARGET7_ENABLE(x) (((x) >> 28) & 0xF) 8914 #define C_028238_TARGET7_ENABLE 0x0FFFFFFF 8915 #define R_02823C_CB_SHADER_MASK 0x02823C 8916 #define S_02823C_OUTPUT0_ENABLE(x) (((unsigned)(x) & 0xF) << 0) 8917 #define G_02823C_OUTPUT0_ENABLE(x) (((x) >> 0) & 0xF) 8918 #define C_02823C_OUTPUT0_ENABLE 0xFFFFFFF0 8919 #define S_02823C_OUTPUT1_ENABLE(x) (((unsigned)(x) & 0xF) << 4) 8920 #define G_02823C_OUTPUT1_ENABLE(x) (((x) >> 4) & 0xF) 8921 #define C_02823C_OUTPUT1_ENABLE 0xFFFFFF0F 8922 #define S_02823C_OUTPUT2_ENABLE(x) (((unsigned)(x) & 0xF) << 8) 8923 #define G_02823C_OUTPUT2_ENABLE(x) (((x) >> 8) & 0xF) 8924 #define C_02823C_OUTPUT2_ENABLE 0xFFFFF0FF 8925 #define S_02823C_OUTPUT3_ENABLE(x) (((unsigned)(x) & 0xF) << 12) 8926 #define G_02823C_OUTPUT3_ENABLE(x) (((x) >> 12) & 0xF) 8927 #define C_02823C_OUTPUT3_ENABLE 0xFFFF0FFF 8928 #define S_02823C_OUTPUT4_ENABLE(x) (((unsigned)(x) & 0xF) << 16) 8929 #define G_02823C_OUTPUT4_ENABLE(x) (((x) >> 16) & 0xF) 8930 #define C_02823C_OUTPUT4_ENABLE 0xFFF0FFFF 8931 #define S_02823C_OUTPUT5_ENABLE(x) (((unsigned)(x) & 0xF) << 20) 8932 #define G_02823C_OUTPUT5_ENABLE(x) (((x) >> 20) & 0xF) 8933 #define C_02823C_OUTPUT5_ENABLE 0xFF0FFFFF 8934 #define S_02823C_OUTPUT6_ENABLE(x) (((unsigned)(x) & 0xF) << 24) 8935 #define G_02823C_OUTPUT6_ENABLE(x) (((x) >> 24) & 0xF) 8936 #define C_02823C_OUTPUT6_ENABLE 0xF0FFFFFF 8937 #define S_02823C_OUTPUT7_ENABLE(x) (((unsigned)(x) & 0xF) << 28) 8938 #define G_02823C_OUTPUT7_ENABLE(x) (((x) >> 28) & 0xF) 8939 #define C_02823C_OUTPUT7_ENABLE 0x0FFFFFFF 8940 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 8941 #define S_028240_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 8942 #define G_028240_TL_X(x) (((x) >> 0) & 0x7FFF) 8943 #define C_028240_TL_X 0xFFFF8000 8944 #define S_028240_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 8945 #define G_028240_TL_Y(x) (((x) >> 16) & 0x7FFF) 8946 #define C_028240_TL_Y 0x8000FFFF 8947 #define S_028240_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 8948 #define G_028240_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 8949 #define C_028240_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 8950 #define R_028244_PA_SC_GENERIC_SCISSOR_BR 0x028244 8951 #define S_028244_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 8952 #define G_028244_BR_X(x) (((x) >> 0) & 0x7FFF) 8953 #define C_028244_BR_X 0xFFFF8000 8954 #define S_028244_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 8955 #define G_028244_BR_Y(x) (((x) >> 16) & 0x7FFF) 8956 #define C_028244_BR_Y 0x8000FFFF 8957 #define R_028248_COHER_DEST_BASE_0 0x028248 8958 #define R_02824C_COHER_DEST_BASE_1 0x02824C 8959 #define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250 8960 #define S_028250_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 8961 #define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF) 8962 #define C_028250_TL_X 0xFFFF8000 8963 #define S_028250_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 8964 #define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF) 8965 #define C_028250_TL_Y 0x8000FFFF 8966 #define S_028250_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 8967 #define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 8968 #define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 8969 #define R_028254_PA_SC_VPORT_SCISSOR_0_BR 0x028254 8970 #define S_028254_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 8971 #define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF) 8972 #define C_028254_BR_X 0xFFFF8000 8973 #define S_028254_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 8974 #define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF) 8975 #define C_028254_BR_Y 0x8000FFFF 8976 #define R_028258_PA_SC_VPORT_SCISSOR_1_TL 0x028258 8977 #define R_02825C_PA_SC_VPORT_SCISSOR_1_BR 0x02825C 8978 #define R_028260_PA_SC_VPORT_SCISSOR_2_TL 0x028260 8979 #define R_028264_PA_SC_VPORT_SCISSOR_2_BR 0x028264 8980 #define R_028268_PA_SC_VPORT_SCISSOR_3_TL 0x028268 8981 #define R_02826C_PA_SC_VPORT_SCISSOR_3_BR 0x02826C 8982 #define R_028270_PA_SC_VPORT_SCISSOR_4_TL 0x028270 8983 #define R_028274_PA_SC_VPORT_SCISSOR_4_BR 0x028274 8984 #define R_028278_PA_SC_VPORT_SCISSOR_5_TL 0x028278 8985 #define R_02827C_PA_SC_VPORT_SCISSOR_5_BR 0x02827C 8986 #define R_028280_PA_SC_VPORT_SCISSOR_6_TL 0x028280 8987 #define R_028284_PA_SC_VPORT_SCISSOR_6_BR 0x028284 8988 #define R_028288_PA_SC_VPORT_SCISSOR_7_TL 0x028288 8989 #define R_02828C_PA_SC_VPORT_SCISSOR_7_BR 0x02828C 8990 #define R_028290_PA_SC_VPORT_SCISSOR_8_TL 0x028290 8991 #define R_028294_PA_SC_VPORT_SCISSOR_8_BR 0x028294 8992 #define R_028298_PA_SC_VPORT_SCISSOR_9_TL 0x028298 8993 #define R_02829C_PA_SC_VPORT_SCISSOR_9_BR 0x02829C 8994 #define R_0282A0_PA_SC_VPORT_SCISSOR_10_TL 0x0282A0 8995 #define R_0282A4_PA_SC_VPORT_SCISSOR_10_BR 0x0282A4 8996 #define R_0282A8_PA_SC_VPORT_SCISSOR_11_TL 0x0282A8 8997 #define R_0282AC_PA_SC_VPORT_SCISSOR_11_BR 0x0282AC 8998 #define R_0282B0_PA_SC_VPORT_SCISSOR_12_TL 0x0282B0 8999 #define R_0282B4_PA_SC_VPORT_SCISSOR_12_BR 0x0282B4 9000 #define R_0282B8_PA_SC_VPORT_SCISSOR_13_TL 0x0282B8 9001 #define R_0282BC_PA_SC_VPORT_SCISSOR_13_BR 0x0282BC 9002 #define R_0282C0_PA_SC_VPORT_SCISSOR_14_TL 0x0282C0 9003 #define R_0282C4_PA_SC_VPORT_SCISSOR_14_BR 0x0282C4 9004 #define R_0282C8_PA_SC_VPORT_SCISSOR_15_TL 0x0282C8 9005 #define R_0282CC_PA_SC_VPORT_SCISSOR_15_BR 0x0282CC 9006 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 9007 #define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 9008 #define R_0282D8_PA_SC_VPORT_ZMIN_1 0x0282D8 9009 #define R_0282DC_PA_SC_VPORT_ZMAX_1 0x0282DC 9010 #define R_0282E0_PA_SC_VPORT_ZMIN_2 0x0282E0 9011 #define R_0282E4_PA_SC_VPORT_ZMAX_2 0x0282E4 9012 #define R_0282E8_PA_SC_VPORT_ZMIN_3 0x0282E8 9013 #define R_0282EC_PA_SC_VPORT_ZMAX_3 0x0282EC 9014 #define R_0282F0_PA_SC_VPORT_ZMIN_4 0x0282F0 9015 #define R_0282F4_PA_SC_VPORT_ZMAX_4 0x0282F4 9016 #define R_0282F8_PA_SC_VPORT_ZMIN_5 0x0282F8 9017 #define R_0282FC_PA_SC_VPORT_ZMAX_5 0x0282FC 9018 #define R_028300_PA_SC_VPORT_ZMIN_6 0x028300 9019 #define R_028304_PA_SC_VPORT_ZMAX_6 0x028304 9020 #define R_028308_PA_SC_VPORT_ZMIN_7 0x028308 9021 #define R_02830C_PA_SC_VPORT_ZMAX_7 0x02830C 9022 #define R_028310_PA_SC_VPORT_ZMIN_8 0x028310 9023 #define R_028314_PA_SC_VPORT_ZMAX_8 0x028314 9024 #define R_028318_PA_SC_VPORT_ZMIN_9 0x028318 9025 #define R_02831C_PA_SC_VPORT_ZMAX_9 0x02831C 9026 #define R_028320_PA_SC_VPORT_ZMIN_10 0x028320 9027 #define R_028324_PA_SC_VPORT_ZMAX_10 0x028324 9028 #define R_028328_PA_SC_VPORT_ZMIN_11 0x028328 9029 #define R_02832C_PA_SC_VPORT_ZMAX_11 0x02832C 9030 #define R_028330_PA_SC_VPORT_ZMIN_12 0x028330 9031 #define R_028334_PA_SC_VPORT_ZMAX_12 0x028334 9032 #define R_028338_PA_SC_VPORT_ZMIN_13 0x028338 9033 #define R_02833C_PA_SC_VPORT_ZMAX_13 0x02833C 9034 #define R_028340_PA_SC_VPORT_ZMIN_14 0x028340 9035 #define R_028344_PA_SC_VPORT_ZMAX_14 0x028344 9036 #define R_028348_PA_SC_VPORT_ZMIN_15 0x028348 9037 #define R_02834C_PA_SC_VPORT_ZMAX_15 0x02834C 9038 #define R_028350_PA_SC_RASTER_CONFIG 0x028350 9039 #define S_028350_RB_MAP_PKR0(x) (((unsigned)(x) & 0x3) << 0) 9040 #define G_028350_RB_MAP_PKR0(x) (((x) >> 0) & 0x3) 9041 #define C_028350_RB_MAP_PKR0 0xFFFFFFFC 9042 #define V_028350_RASTER_CONFIG_RB_MAP_0 0 9043 #define V_028350_RASTER_CONFIG_RB_MAP_1 1 9044 #define V_028350_RASTER_CONFIG_RB_MAP_2 2 9045 #define V_028350_RASTER_CONFIG_RB_MAP_3 3 9046 #define S_028350_RB_MAP_PKR1(x) (((unsigned)(x) & 0x3) << 2) 9047 #define G_028350_RB_MAP_PKR1(x) (((x) >> 2) & 0x3) 9048 #define C_028350_RB_MAP_PKR1 0xFFFFFFF3 9049 #define S_028350_RB_XSEL2(x) (((unsigned)(x) & 0x3) << 4) 9050 #define G_028350_RB_XSEL2(x) (((x) >> 4) & 0x3) 9051 #define C_028350_RB_XSEL2 0xFFFFFFCF 9052 #define V_028350_RASTER_CONFIG_RB_XSEL2_0 0 9053 #define V_028350_RASTER_CONFIG_RB_XSEL2_1 1 9054 #define V_028350_RASTER_CONFIG_RB_XSEL2_2 2 9055 #define V_028350_RASTER_CONFIG_RB_XSEL2_3 3 9056 #define S_028350_RB_XSEL(x) (((unsigned)(x) & 0x1) << 6) 9057 #define G_028350_RB_XSEL(x) (((x) >> 6) & 0x1) 9058 #define C_028350_RB_XSEL 0xFFFFFFBF 9059 #define V_028350_RASTER_CONFIG_RB_XSEL_0 0 9060 #define V_028350_RASTER_CONFIG_RB_XSEL_1 1 9061 #define S_028350_RB_YSEL(x) (((unsigned)(x) & 0x1) << 7) 9062 #define G_028350_RB_YSEL(x) (((x) >> 7) & 0x1) 9063 #define C_028350_RB_YSEL 0xFFFFFF7F 9064 #define V_028350_RASTER_CONFIG_RB_YSEL_0 0 9065 #define V_028350_RASTER_CONFIG_RB_YSEL_1 1 9066 #define S_028350_PKR_MAP(x) (((unsigned)(x) & 0x3) << 8) 9067 #define G_028350_PKR_MAP(x) (((x) >> 8) & 0x3) 9068 #define C_028350_PKR_MAP 0xFFFFFCFF 9069 #define V_028350_RASTER_CONFIG_PKR_MAP_0 0 9070 #define V_028350_RASTER_CONFIG_PKR_MAP_1 1 9071 #define V_028350_RASTER_CONFIG_PKR_MAP_2 2 9072 #define V_028350_RASTER_CONFIG_PKR_MAP_3 3 9073 #define S_028350_PKR_XSEL(x) (((unsigned)(x) & 0x3) << 10) 9074 #define G_028350_PKR_XSEL(x) (((x) >> 10) & 0x3) 9075 #define C_028350_PKR_XSEL 0xFFFFF3FF 9076 #define V_028350_RASTER_CONFIG_PKR_XSEL_0 0 9077 #define V_028350_RASTER_CONFIG_PKR_XSEL_1 1 9078 #define V_028350_RASTER_CONFIG_PKR_XSEL_2 2 9079 #define V_028350_RASTER_CONFIG_PKR_XSEL_3 3 9080 #define S_028350_PKR_YSEL(x) (((unsigned)(x) & 0x3) << 12) 9081 #define G_028350_PKR_YSEL(x) (((x) >> 12) & 0x3) 9082 #define C_028350_PKR_YSEL 0xFFFFCFFF 9083 #define V_028350_RASTER_CONFIG_PKR_YSEL_0 0 9084 #define V_028350_RASTER_CONFIG_PKR_YSEL_1 1 9085 #define V_028350_RASTER_CONFIG_PKR_YSEL_2 2 9086 #define V_028350_RASTER_CONFIG_PKR_YSEL_3 3 9087 #define S_028350_PKR_XSEL2(x) (((unsigned)(x) & 0x3) << 14) 9088 #define G_028350_PKR_XSEL2(x) (((x) >> 14) & 0x3) 9089 #define C_028350_PKR_XSEL2 0xFFFF3FFF 9090 #define V_028350_RASTER_CONFIG_PKR_XSEL2_0 0 9091 #define V_028350_RASTER_CONFIG_PKR_XSEL2_1 1 9092 #define V_028350_RASTER_CONFIG_PKR_XSEL2_2 2 9093 #define V_028350_RASTER_CONFIG_PKR_XSEL2_3 3 9094 #define S_028350_SC_MAP(x) (((unsigned)(x) & 0x3) << 16) 9095 #define G_028350_SC_MAP(x) (((x) >> 16) & 0x3) 9096 #define C_028350_SC_MAP 0xFFFCFFFF 9097 #define V_028350_RASTER_CONFIG_SC_MAP_0 0 9098 #define V_028350_RASTER_CONFIG_SC_MAP_1 1 9099 #define V_028350_RASTER_CONFIG_SC_MAP_2 2 9100 #define V_028350_RASTER_CONFIG_SC_MAP_3 3 9101 #define S_028350_SC_XSEL(x) (((unsigned)(x) & 0x3) << 18) 9102 #define G_028350_SC_XSEL(x) (((x) >> 18) & 0x3) 9103 #define C_028350_SC_XSEL 0xFFF3FFFF 9104 #define V_028350_RASTER_CONFIG_SC_XSEL_8_WIDE_TILE 0 9105 #define V_028350_RASTER_CONFIG_SC_XSEL_16_WIDE_TILE 1 9106 #define V_028350_RASTER_CONFIG_SC_XSEL_32_WIDE_TILE 2 9107 #define V_028350_RASTER_CONFIG_SC_XSEL_64_WIDE_TILE 3 9108 #define S_028350_SC_YSEL(x) (((unsigned)(x) & 0x3) << 20) 9109 #define G_028350_SC_YSEL(x) (((x) >> 20) & 0x3) 9110 #define C_028350_SC_YSEL 0xFFCFFFFF 9111 #define V_028350_RASTER_CONFIG_SC_YSEL_8_WIDE_TILE 0 9112 #define V_028350_RASTER_CONFIG_SC_YSEL_16_WIDE_TILE 1 9113 #define V_028350_RASTER_CONFIG_SC_YSEL_32_WIDE_TILE 2 9114 #define V_028350_RASTER_CONFIG_SC_YSEL_64_WIDE_TILE 3 9115 #define S_028350_SE_MAP(x) (((unsigned)(x) & 0x3) << 24) 9116 #define G_028350_SE_MAP(x) (((x) >> 24) & 0x3) 9117 #define C_028350_SE_MAP 0xFCFFFFFF 9118 #define V_028350_RASTER_CONFIG_SE_MAP_0 0 9119 #define V_028350_RASTER_CONFIG_SE_MAP_1 1 9120 #define V_028350_RASTER_CONFIG_SE_MAP_2 2 9121 #define V_028350_RASTER_CONFIG_SE_MAP_3 3 9122 #define S_028350_SE_XSEL_GFX6(x) (((unsigned)(x) & 0x3) << 26) /* <= gfx81, >= gfx10 */ 9123 #define G_028350_SE_XSEL_GFX6(x) (((x) >> 26) & 0x3) 9124 #define C_028350_SE_XSEL_GFX6 0xF3FFFFFF 9125 #define V_028350_RASTER_CONFIG_SE_XSEL_8_WIDE_TILE 0 9126 #define V_028350_RASTER_CONFIG_SE_XSEL_16_WIDE_TILE 1 9127 #define V_028350_RASTER_CONFIG_SE_XSEL_32_WIDE_TILE 2 9128 #define V_028350_RASTER_CONFIG_SE_XSEL_64_WIDE_TILE 3 9129 #define S_028350_SE_XSEL_GFX9(x) (((unsigned)(x) & 0x7) << 26) /* gfx9 */ 9130 #define G_028350_SE_XSEL_GFX9(x) (((x) >> 26) & 0x7) 9131 #define C_028350_SE_XSEL_GFX9 0xE3FFFFFF 9132 #define V_028350_RASTER_CONFIG_SE_XSEL_128_WIDE_TILE 4 9133 #define S_028350_SE_YSEL_GFX6(x) (((unsigned)(x) & 0x3) << 28) /* <= gfx81, >= gfx10 */ 9134 #define G_028350_SE_YSEL_GFX6(x) (((x) >> 28) & 0x3) 9135 #define C_028350_SE_YSEL_GFX6 0xCFFFFFFF 9136 #define V_028350_RASTER_CONFIG_SE_YSEL_8_WIDE_TILE 0 9137 #define V_028350_RASTER_CONFIG_SE_YSEL_16_WIDE_TILE 1 9138 #define V_028350_RASTER_CONFIG_SE_YSEL_32_WIDE_TILE 2 9139 #define V_028350_RASTER_CONFIG_SE_YSEL_64_WIDE_TILE 3 9140 #define S_028350_SE_YSEL_GFX9(x) (((unsigned)(x) & 0x7) << 29) /* gfx9 */ 9141 #define G_028350_SE_YSEL_GFX9(x) (((x) >> 29) & 0x7) 9142 #define C_028350_SE_YSEL_GFX9 0x1FFFFFFF 9143 #define V_028350_RASTER_CONFIG_SE_YSEL_128_WIDE_TILE 4 9144 #define R_028354_PA_SC_RASTER_CONFIG_1 0x028354 /* >= gfx7 */ 9145 #define S_028354_SE_PAIR_MAP(x) (((unsigned)(x) & 0x3) << 0) 9146 #define G_028354_SE_PAIR_MAP(x) (((x) >> 0) & 0x3) 9147 #define C_028354_SE_PAIR_MAP 0xFFFFFFFC 9148 #define V_028354_RASTER_CONFIG_SE_PAIR_MAP_0 0 9149 #define V_028354_RASTER_CONFIG_SE_PAIR_MAP_1 1 9150 #define V_028354_RASTER_CONFIG_SE_PAIR_MAP_2 2 9151 #define V_028354_RASTER_CONFIG_SE_PAIR_MAP_3 3 9152 #define S_028354_SE_PAIR_XSEL_GFX7(x) (((unsigned)(x) & 0x3) << 2) /* gfx7, gfx8, gfx81, >= gfx10 */ 9153 #define G_028354_SE_PAIR_XSEL_GFX7(x) (((x) >> 2) & 0x3) 9154 #define C_028354_SE_PAIR_XSEL_GFX7 0xFFFFFFF3 9155 #define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE 0 9156 #define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE 1 9157 #define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE 2 9158 #define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE 3 9159 #define S_028354_SE_PAIR_XSEL_GFX9(x) (((unsigned)(x) & 0x7) << 2) /* gfx9 */ 9160 #define G_028354_SE_PAIR_XSEL_GFX9(x) (((x) >> 2) & 0x7) 9161 #define C_028354_SE_PAIR_XSEL_GFX9 0xFFFFFFE3 9162 #define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_128_WIDE_TILE 4 9163 #define S_028354_SE_PAIR_YSEL_GFX7(x) (((unsigned)(x) & 0x3) << 4) /* gfx7, gfx8, gfx81, >= gfx10 */ 9164 #define G_028354_SE_PAIR_YSEL_GFX7(x) (((x) >> 4) & 0x3) 9165 #define C_028354_SE_PAIR_YSEL_GFX7 0xFFFFFFCF 9166 #define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE 0 9167 #define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE 1 9168 #define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE 2 9169 #define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE 3 9170 #define S_028354_SE_PAIR_YSEL_GFX9(x) (((unsigned)(x) & 0x7) << 5) /* gfx9 */ 9171 #define G_028354_SE_PAIR_YSEL_GFX9(x) (((x) >> 5) & 0x7) 9172 #define C_028354_SE_PAIR_YSEL_GFX9 0xFFFFFF1F 9173 #define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_128_WIDE_TILE 4 9174 #define R_028358_PA_SC_SCREEN_EXTENT_CONTROL 0x028358 /* >= gfx7 */ 9175 #define S_028358_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0x3) << 0) 9176 #define G_028358_SLICE_EVEN_ENABLE(x) (((x) >> 0) & 0x3) 9177 #define C_028358_SLICE_EVEN_ENABLE 0xFFFFFFFC 9178 #define S_028358_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0x3) << 2) 9179 #define G_028358_SLICE_ODD_ENABLE(x) (((x) >> 2) & 0x3) 9180 #define C_028358_SLICE_ODD_ENABLE 0xFFFFFFF3 9181 #define R_02835C_PA_SC_TILE_STEERING_OVERRIDE 0x02835C /* >= gfx9 */ 9182 #define S_02835C_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 9183 #define G_02835C_ENABLE(x) (((x) >> 0) & 0x1) 9184 #define C_02835C_ENABLE 0xFFFFFFFE 9185 #define S_02835C_NUM_SE(x) (((unsigned)(x) & 0x3) << 1) 9186 #define G_02835C_NUM_SE(x) (((x) >> 1) & 0x3) 9187 #define C_02835C_NUM_SE 0xFFFFFFF9 9188 #define S_02835C_NUM_RB_PER_SE(x) (((unsigned)(x) & 0x3) << 5) 9189 #define G_02835C_NUM_RB_PER_SE(x) (((x) >> 5) & 0x3) 9190 #define C_02835C_NUM_RB_PER_SE 0xFFFFFF9F 9191 #define S_02835C_DISABLE_SRBSL_DB_OPTIMIZED_PACKING(x) (((unsigned)(x) & 0x1) << 8) /* gfx10 */ 9192 #define G_02835C_DISABLE_SRBSL_DB_OPTIMIZED_PACKING(x) (((x) >> 8) & 0x1) 9193 #define C_02835C_DISABLE_SRBSL_DB_OPTIMIZED_PACKING 0xFFFFFEFF 9194 #define S_02835C_NUM_SC(x) (((unsigned)(x) & 0x3) << 12) /* >= gfx10 */ 9195 #define G_02835C_NUM_SC(x) (((x) >> 12) & 0x3) 9196 #define C_02835C_NUM_SC 0xFFFFCFFF 9197 #define S_02835C_NUM_RB_PER_SC(x) (((unsigned)(x) & 0x3) << 16) /* >= gfx10 */ 9198 #define G_02835C_NUM_RB_PER_SC(x) (((x) >> 16) & 0x3) 9199 #define C_02835C_NUM_RB_PER_SC 0xFFFCFFFF 9200 #define S_02835C_NUM_PACKER_PER_SC(x) (((unsigned)(x) & 0x3) << 20) /* >= gfx10 */ 9201 #define G_02835C_NUM_PACKER_PER_SC(x) (((x) >> 20) & 0x3) 9202 #define C_02835C_NUM_PACKER_PER_SC 0xFFCFFFFF 9203 #define R_028360_CP_PERFMON_CNTX_CNTL 0x028360 9204 #define S_028360_PERFMON_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 9205 #define G_028360_PERFMON_ENABLE(x) (((x) >> 31) & 0x1) 9206 #define C_028360_PERFMON_ENABLE 0x7FFFFFFF 9207 #define R_028364_CP_PIPEID 0x028364 /* >= gfx9 */ 9208 #define S_028364_PIPE_ID(x) (((unsigned)(x) & 0x3) << 0) 9209 #define G_028364_PIPE_ID(x) (((x) >> 0) & 0x3) 9210 #define C_028364_PIPE_ID 0xFFFFFFFC 9211 #define R_028364_CP_RINGID 0x028364 /* <= gfx81 */ 9212 #define S_028364_RINGID(x) (((unsigned)(x) & 0x3) << 0) 9213 #define G_028364_RINGID(x) (((x) >> 0) & 0x3) 9214 #define C_028364_RINGID 0xFFFFFFFC 9215 #define R_028368_CP_VMID 0x028368 9216 #define S_028368_VMID(x) (((unsigned)(x) & 0xF) << 0) 9217 #define G_028368_VMID(x) (((x) >> 0) & 0xF) 9218 #define C_028368_VMID 0xFFFFFFF0 9219 #define R_02836C_CONTEXT_RESERVED_REG0 0x02836C /* >= gfx103 */ 9220 #define R_028370_CONTEXT_RESERVED_REG1 0x028370 /* >= gfx103 */ 9221 #define R_0283A0_PA_SC_RIGHT_VERT_GRID 0x0283A0 /* gfx9, gfx10 */ 9222 #define S_0283A0_LEFT_QTR(x) (((unsigned)(x) & 0xFF) << 0) 9223 #define G_0283A0_LEFT_QTR(x) (((x) >> 0) & 0xFF) 9224 #define C_0283A0_LEFT_QTR 0xFFFFFF00 9225 #define S_0283A0_LEFT_HALF(x) (((unsigned)(x) & 0xFF) << 8) 9226 #define G_0283A0_LEFT_HALF(x) (((x) >> 8) & 0xFF) 9227 #define C_0283A0_LEFT_HALF 0xFFFF00FF 9228 #define S_0283A0_RIGHT_HALF(x) (((unsigned)(x) & 0xFF) << 16) 9229 #define G_0283A0_RIGHT_HALF(x) (((x) >> 16) & 0xFF) 9230 #define C_0283A0_RIGHT_HALF 0xFF00FFFF 9231 #define S_0283A0_RIGHT_QTR(x) (((unsigned)(x) & 0xFF) << 24) 9232 #define G_0283A0_RIGHT_QTR(x) (((x) >> 24) & 0xFF) 9233 #define C_0283A0_RIGHT_QTR 0x00FFFFFF 9234 #define R_0283A4_PA_SC_LEFT_VERT_GRID 0x0283A4 /* gfx9, gfx10 */ 9235 #define S_0283A4_LEFT_QTR(x) (((unsigned)(x) & 0xFF) << 0) 9236 #define G_0283A4_LEFT_QTR(x) (((x) >> 0) & 0xFF) 9237 #define C_0283A4_LEFT_QTR 0xFFFFFF00 9238 #define S_0283A4_LEFT_HALF(x) (((unsigned)(x) & 0xFF) << 8) 9239 #define G_0283A4_LEFT_HALF(x) (((x) >> 8) & 0xFF) 9240 #define C_0283A4_LEFT_HALF 0xFFFF00FF 9241 #define S_0283A4_RIGHT_HALF(x) (((unsigned)(x) & 0xFF) << 16) 9242 #define G_0283A4_RIGHT_HALF(x) (((x) >> 16) & 0xFF) 9243 #define C_0283A4_RIGHT_HALF 0xFF00FFFF 9244 #define S_0283A4_RIGHT_QTR(x) (((unsigned)(x) & 0xFF) << 24) 9245 #define G_0283A4_RIGHT_QTR(x) (((x) >> 24) & 0xFF) 9246 #define C_0283A4_RIGHT_QTR 0x00FFFFFF 9247 #define R_0283A8_PA_SC_HORIZ_GRID 0x0283A8 /* gfx9, gfx10 */ 9248 #define S_0283A8_TOP_QTR(x) (((unsigned)(x) & 0xFF) << 0) 9249 #define G_0283A8_TOP_QTR(x) (((x) >> 0) & 0xFF) 9250 #define C_0283A8_TOP_QTR 0xFFFFFF00 9251 #define S_0283A8_TOP_HALF(x) (((unsigned)(x) & 0xFF) << 8) 9252 #define G_0283A8_TOP_HALF(x) (((x) >> 8) & 0xFF) 9253 #define C_0283A8_TOP_HALF 0xFFFF00FF 9254 #define S_0283A8_BOT_HALF(x) (((unsigned)(x) & 0xFF) << 16) 9255 #define G_0283A8_BOT_HALF(x) (((x) >> 16) & 0xFF) 9256 #define C_0283A8_BOT_HALF 0xFF00FFFF 9257 #define S_0283A8_BOT_QTR(x) (((unsigned)(x) & 0xFF) << 24) 9258 #define G_0283A8_BOT_QTR(x) (((x) >> 24) & 0xFF) 9259 #define C_0283A8_BOT_QTR 0x00FFFFFF 9260 #define R_028400_VGT_MAX_VTX_INDX 0x028400 /* <= gfx81, >= gfx10 */ 9261 #define R_028404_VGT_MIN_VTX_INDX 0x028404 /* <= gfx81, >= gfx10 */ 9262 #define R_028408_VGT_INDX_OFFSET 0x028408 /* <= gfx81, >= gfx10 */ 9263 #define R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX 0x02840C 9264 #define R_028410_CB_RMI_GL2_CACHE_CONTROL 0x028410 /* >= gfx10 */ 9265 #define S_028410_CMASK_WR_POLICY(x) (((unsigned)(x) & 0x3) << 0) 9266 #define G_028410_CMASK_WR_POLICY(x) (((x) >> 0) & 0x3) 9267 #define C_028410_CMASK_WR_POLICY 0xFFFFFFFC 9268 #define V_028410_CACHE_LRU_WR 0 9269 #define V_028410_CACHE_STREAM 1 9270 #define V_028410_CACHE_BYPASS 2 9271 #define V_028410_UNCACHED_WR 3 9272 #define S_028410_FMASK_WR_POLICY(x) (((unsigned)(x) & 0x3) << 2) 9273 #define G_028410_FMASK_WR_POLICY(x) (((x) >> 2) & 0x3) 9274 #define C_028410_FMASK_WR_POLICY 0xFFFFFFF3 9275 #define S_028410_DCC_WR_POLICY(x) (((unsigned)(x) & 0x3) << 4) 9276 #define G_028410_DCC_WR_POLICY(x) (((x) >> 4) & 0x3) 9277 #define C_028410_DCC_WR_POLICY 0xFFFFFFCF 9278 #define S_028410_COLOR_WR_POLICY(x) (((unsigned)(x) & 0x3) << 6) 9279 #define G_028410_COLOR_WR_POLICY(x) (((x) >> 6) & 0x3) 9280 #define C_028410_COLOR_WR_POLICY 0xFFFFFF3F 9281 #define S_028410_CMASK_RD_POLICY(x) (((unsigned)(x) & 0x3) << 16) 9282 #define G_028410_CMASK_RD_POLICY(x) (((x) >> 16) & 0x3) 9283 #define C_028410_CMASK_RD_POLICY 0xFFFCFFFF 9284 #define V_028410_CACHE_LRU_RD 0 9285 #define V_028410_CACHE_NOA 1 9286 #define V_028410_UNCACHED_RD 2 9287 #define V_028410_RESERVED_RDPOLICY 3 9288 #define S_028410_FMASK_RD_POLICY(x) (((unsigned)(x) & 0x3) << 18) 9289 #define G_028410_FMASK_RD_POLICY(x) (((x) >> 18) & 0x3) 9290 #define C_028410_FMASK_RD_POLICY 0xFFF3FFFF 9291 #define S_028410_DCC_RD_POLICY(x) (((unsigned)(x) & 0x3) << 20) 9292 #define G_028410_DCC_RD_POLICY(x) (((x) >> 20) & 0x3) 9293 #define C_028410_DCC_RD_POLICY 0xFFCFFFFF 9294 #define S_028410_COLOR_RD_POLICY(x) (((unsigned)(x) & 0x3) << 22) 9295 #define G_028410_COLOR_RD_POLICY(x) (((x) >> 22) & 0x3) 9296 #define C_028410_COLOR_RD_POLICY 0xFF3FFFFF 9297 #define S_028410_CMASK_L3_BYPASS(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx103 */ 9298 #define G_028410_CMASK_L3_BYPASS(x) (((x) >> 24) & 0x1) 9299 #define C_028410_CMASK_L3_BYPASS 0xFEFFFFFF 9300 #define S_028410_FMASK_L3_BYPASS(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx103 */ 9301 #define G_028410_FMASK_L3_BYPASS(x) (((x) >> 25) & 0x1) 9302 #define C_028410_FMASK_L3_BYPASS 0xFDFFFFFF 9303 #define S_028410_DCC_L3_BYPASS(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx103 */ 9304 #define G_028410_DCC_L3_BYPASS(x) (((x) >> 26) & 0x1) 9305 #define C_028410_DCC_L3_BYPASS 0xFBFFFFFF 9306 #define S_028410_COLOR_L3_BYPASS(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx103 */ 9307 #define G_028410_COLOR_L3_BYPASS(x) (((x) >> 27) & 0x1) 9308 #define C_028410_COLOR_L3_BYPASS 0xF7FFFFFF 9309 #define S_028410_FMASK_BIG_PAGE(x) (((unsigned)(x) & 0x1) << 30) 9310 #define G_028410_FMASK_BIG_PAGE(x) (((x) >> 30) & 0x1) 9311 #define C_028410_FMASK_BIG_PAGE 0xBFFFFFFF 9312 #define S_028410_COLOR_BIG_PAGE(x) (((unsigned)(x) & 0x1) << 31) 9313 #define G_028410_COLOR_BIG_PAGE(x) (((x) >> 31) & 0x1) 9314 #define C_028410_COLOR_BIG_PAGE 0x7FFFFFFF 9315 #define R_028414_CB_BLEND_RED 0x028414 9316 #define R_028418_CB_BLEND_GREEN 0x028418 9317 #define R_02841C_CB_BLEND_BLUE 0x02841C 9318 #define R_028420_CB_BLEND_ALPHA 0x028420 9319 #define R_028424_CB_DCC_CONTROL 0x028424 /* >= gfx8 */ 9320 #define S_028424_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 9321 #define G_028424_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) 9322 #define C_028424_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE 9323 #define S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((unsigned)(x) & 0x1) << 1) /* gfx8, gfx81, gfx9 */ 9324 #define G_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((x) >> 1) & 0x1) 9325 #define C_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE 0xFFFFFFFD 9326 #define S_028424_OVERWRITE_COMBINER_WATERMARK(x) (((unsigned)(x) & 0x1F) << 2) 9327 #define G_028424_OVERWRITE_COMBINER_WATERMARK(x) (((x) >> 2) & 0x1F) 9328 #define C_028424_OVERWRITE_COMBINER_WATERMARK 0xFFFFFF83 9329 #define S_028424_DISABLE_CONSTANT_ENCODE_AC01(x) (((unsigned)(x) & 0x1) << 8) /* >= gfx9 */ 9330 #define G_028424_DISABLE_CONSTANT_ENCODE_AC01(x) (((x) >> 8) & 0x1) 9331 #define C_028424_DISABLE_CONSTANT_ENCODE_AC01 0xFFFFFEFF 9332 #define S_028424_DISABLE_CONSTANT_ENCODE_SINGLE(x) (((unsigned)(x) & 0x1) << 9) /* >= gfx9 */ 9333 #define G_028424_DISABLE_CONSTANT_ENCODE_SINGLE(x) (((x) >> 9) & 0x1) 9334 #define C_028424_DISABLE_CONSTANT_ENCODE_SINGLE 0xFFFFFDFF 9335 #define S_028424_DISABLE_CONSTANT_ENCODE_REG(x) (((unsigned)(x) & 0x1) << 10) /* >= gfx9 */ 9336 #define G_028424_DISABLE_CONSTANT_ENCODE_REG(x) (((x) >> 10) & 0x1) 9337 #define C_028424_DISABLE_CONSTANT_ENCODE_REG 0xFFFFFBFF 9338 #define S_028424_DISABLE_ELIMFC_SKIP_OF_AC01(x) (((unsigned)(x) & 0x1) << 12) /* >= gfx9 */ 9339 #define G_028424_DISABLE_ELIMFC_SKIP_OF_AC01(x) (((x) >> 12) & 0x1) 9340 #define C_028424_DISABLE_ELIMFC_SKIP_OF_AC01 0xFFFFEFFF 9341 #define S_028424_DISABLE_ELIMFC_SKIP_OF_SINGLE(x) (((unsigned)(x) & 0x1) << 13) /* >= gfx9 */ 9342 #define G_028424_DISABLE_ELIMFC_SKIP_OF_SINGLE(x) (((x) >> 13) & 0x1) 9343 #define C_028424_DISABLE_ELIMFC_SKIP_OF_SINGLE 0xFFFFDFFF 9344 #define S_028424_ENABLE_ELIMFC_SKIP_OF_REG(x) (((unsigned)(x) & 0x1) << 14) /* >= gfx9 */ 9345 #define G_028424_ENABLE_ELIMFC_SKIP_OF_REG(x) (((x) >> 14) & 0x1) 9346 #define C_028424_ENABLE_ELIMFC_SKIP_OF_REG 0xFFFFBFFF 9347 #define R_028428_CB_COVERAGE_OUT_CONTROL 0x028428 /* >= gfx10 */ 9348 #define S_028428_COVERAGE_OUT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 9349 #define G_028428_COVERAGE_OUT_ENABLE(x) (((x) >> 0) & 0x1) 9350 #define C_028428_COVERAGE_OUT_ENABLE 0xFFFFFFFE 9351 #define S_028428_COVERAGE_OUT_MRT(x) (((unsigned)(x) & 0x7) << 1) 9352 #define G_028428_COVERAGE_OUT_MRT(x) (((x) >> 1) & 0x7) 9353 #define C_028428_COVERAGE_OUT_MRT 0xFFFFFFF1 9354 #define S_028428_COVERAGE_OUT_CHANNEL(x) (((unsigned)(x) & 0x3) << 4) 9355 #define G_028428_COVERAGE_OUT_CHANNEL(x) (((x) >> 4) & 0x3) 9356 #define C_028428_COVERAGE_OUT_CHANNEL 0xFFFFFFCF 9357 #define S_028428_COVERAGE_OUT_SAMPLES(x) (((unsigned)(x) & 0xF) << 8) 9358 #define G_028428_COVERAGE_OUT_SAMPLES(x) (((x) >> 8) & 0xF) 9359 #define C_028428_COVERAGE_OUT_SAMPLES 0xFFFFF0FF 9360 #define R_02842C_DB_STENCIL_CONTROL 0x02842C 9361 #define S_02842C_STENCILFAIL(x) (((unsigned)(x) & 0xF) << 0) 9362 #define G_02842C_STENCILFAIL(x) (((x) >> 0) & 0xF) 9363 #define C_02842C_STENCILFAIL 0xFFFFFFF0 9364 #define V_02842C_STENCIL_KEEP 0 9365 #define V_02842C_STENCIL_ZERO 1 9366 #define V_02842C_STENCIL_ONES 2 9367 #define V_02842C_STENCIL_REPLACE_TEST 3 9368 #define V_02842C_STENCIL_REPLACE_OP 4 9369 #define V_02842C_STENCIL_ADD_CLAMP 5 9370 #define V_02842C_STENCIL_SUB_CLAMP 6 9371 #define V_02842C_STENCIL_INVERT 7 9372 #define V_02842C_STENCIL_ADD_WRAP 8 9373 #define V_02842C_STENCIL_SUB_WRAP 9 9374 #define V_02842C_STENCIL_AND 10 9375 #define V_02842C_STENCIL_OR 11 9376 #define V_02842C_STENCIL_XOR 12 9377 #define V_02842C_STENCIL_NAND 13 9378 #define V_02842C_STENCIL_NOR 14 9379 #define V_02842C_STENCIL_XNOR 15 9380 #define S_02842C_STENCILZPASS(x) (((unsigned)(x) & 0xF) << 4) 9381 #define G_02842C_STENCILZPASS(x) (((x) >> 4) & 0xF) 9382 #define C_02842C_STENCILZPASS 0xFFFFFF0F 9383 #define S_02842C_STENCILZFAIL(x) (((unsigned)(x) & 0xF) << 8) 9384 #define G_02842C_STENCILZFAIL(x) (((x) >> 8) & 0xF) 9385 #define C_02842C_STENCILZFAIL 0xFFFFF0FF 9386 #define S_02842C_STENCILFAIL_BF(x) (((unsigned)(x) & 0xF) << 12) 9387 #define G_02842C_STENCILFAIL_BF(x) (((x) >> 12) & 0xF) 9388 #define C_02842C_STENCILFAIL_BF 0xFFFF0FFF 9389 #define S_02842C_STENCILZPASS_BF(x) (((unsigned)(x) & 0xF) << 16) 9390 #define G_02842C_STENCILZPASS_BF(x) (((x) >> 16) & 0xF) 9391 #define C_02842C_STENCILZPASS_BF 0xFFF0FFFF 9392 #define S_02842C_STENCILZFAIL_BF(x) (((unsigned)(x) & 0xF) << 20) 9393 #define G_02842C_STENCILZFAIL_BF(x) (((x) >> 20) & 0xF) 9394 #define C_02842C_STENCILZFAIL_BF 0xFF0FFFFF 9395 #define R_028430_DB_STENCILREFMASK 0x028430 9396 #define S_028430_STENCILTESTVAL(x) (((unsigned)(x) & 0xFF) << 0) 9397 #define G_028430_STENCILTESTVAL(x) (((x) >> 0) & 0xFF) 9398 #define C_028430_STENCILTESTVAL 0xFFFFFF00 9399 #define S_028430_STENCILMASK(x) (((unsigned)(x) & 0xFF) << 8) 9400 #define G_028430_STENCILMASK(x) (((x) >> 8) & 0xFF) 9401 #define C_028430_STENCILMASK 0xFFFF00FF 9402 #define S_028430_STENCILWRITEMASK(x) (((unsigned)(x) & 0xFF) << 16) 9403 #define G_028430_STENCILWRITEMASK(x) (((x) >> 16) & 0xFF) 9404 #define C_028430_STENCILWRITEMASK 0xFF00FFFF 9405 #define S_028430_STENCILOPVAL(x) (((unsigned)(x) & 0xFF) << 24) 9406 #define G_028430_STENCILOPVAL(x) (((x) >> 24) & 0xFF) 9407 #define C_028430_STENCILOPVAL 0x00FFFFFF 9408 #define R_028434_DB_STENCILREFMASK_BF 0x028434 9409 #define S_028434_STENCILTESTVAL_BF(x) (((unsigned)(x) & 0xFF) << 0) 9410 #define G_028434_STENCILTESTVAL_BF(x) (((x) >> 0) & 0xFF) 9411 #define C_028434_STENCILTESTVAL_BF 0xFFFFFF00 9412 #define S_028434_STENCILMASK_BF(x) (((unsigned)(x) & 0xFF) << 8) 9413 #define G_028434_STENCILMASK_BF(x) (((x) >> 8) & 0xFF) 9414 #define C_028434_STENCILMASK_BF 0xFFFF00FF 9415 #define S_028434_STENCILWRITEMASK_BF(x) (((unsigned)(x) & 0xFF) << 16) 9416 #define G_028434_STENCILWRITEMASK_BF(x) (((x) >> 16) & 0xFF) 9417 #define C_028434_STENCILWRITEMASK_BF 0xFF00FFFF 9418 #define S_028434_STENCILOPVAL_BF(x) (((unsigned)(x) & 0xFF) << 24) 9419 #define G_028434_STENCILOPVAL_BF(x) (((x) >> 24) & 0xFF) 9420 #define C_028434_STENCILOPVAL_BF 0x00FFFFFF 9421 #define R_02843C_PA_CL_VPORT_XSCALE 0x02843C 9422 #define R_028440_PA_CL_VPORT_XOFFSET 0x028440 9423 #define R_028444_PA_CL_VPORT_YSCALE 0x028444 9424 #define R_028448_PA_CL_VPORT_YOFFSET 0x028448 9425 #define R_02844C_PA_CL_VPORT_ZSCALE 0x02844C 9426 #define R_028450_PA_CL_VPORT_ZOFFSET 0x028450 9427 #define R_028454_PA_CL_VPORT_XSCALE_1 0x028454 9428 #define R_028458_PA_CL_VPORT_XOFFSET_1 0x028458 9429 #define R_02845C_PA_CL_VPORT_YSCALE_1 0x02845C 9430 #define R_028460_PA_CL_VPORT_YOFFSET_1 0x028460 9431 #define R_028464_PA_CL_VPORT_ZSCALE_1 0x028464 9432 #define R_028468_PA_CL_VPORT_ZOFFSET_1 0x028468 9433 #define R_02846C_PA_CL_VPORT_XSCALE_2 0x02846C 9434 #define R_028470_PA_CL_VPORT_XOFFSET_2 0x028470 9435 #define R_028474_PA_CL_VPORT_YSCALE_2 0x028474 9436 #define R_028478_PA_CL_VPORT_YOFFSET_2 0x028478 9437 #define R_02847C_PA_CL_VPORT_ZSCALE_2 0x02847C 9438 #define R_028480_PA_CL_VPORT_ZOFFSET_2 0x028480 9439 #define R_028484_PA_CL_VPORT_XSCALE_3 0x028484 9440 #define R_028488_PA_CL_VPORT_XOFFSET_3 0x028488 9441 #define R_02848C_PA_CL_VPORT_YSCALE_3 0x02848C 9442 #define R_028490_PA_CL_VPORT_YOFFSET_3 0x028490 9443 #define R_028494_PA_CL_VPORT_ZSCALE_3 0x028494 9444 #define R_028498_PA_CL_VPORT_ZOFFSET_3 0x028498 9445 #define R_02849C_PA_CL_VPORT_XSCALE_4 0x02849C 9446 #define R_0284A0_PA_CL_VPORT_XOFFSET_4 0x0284A0 9447 #define R_0284A4_PA_CL_VPORT_YSCALE_4 0x0284A4 9448 #define R_0284A8_PA_CL_VPORT_YOFFSET_4 0x0284A8 9449 #define R_0284AC_PA_CL_VPORT_ZSCALE_4 0x0284AC 9450 #define R_0284B0_PA_CL_VPORT_ZOFFSET_4 0x0284B0 9451 #define R_0284B4_PA_CL_VPORT_XSCALE_5 0x0284B4 9452 #define R_0284B8_PA_CL_VPORT_XOFFSET_5 0x0284B8 9453 #define R_0284BC_PA_CL_VPORT_YSCALE_5 0x0284BC 9454 #define R_0284C0_PA_CL_VPORT_YOFFSET_5 0x0284C0 9455 #define R_0284C4_PA_CL_VPORT_ZSCALE_5 0x0284C4 9456 #define R_0284C8_PA_CL_VPORT_ZOFFSET_5 0x0284C8 9457 #define R_0284CC_PA_CL_VPORT_XSCALE_6 0x0284CC 9458 #define R_0284D0_PA_CL_VPORT_XOFFSET_6 0x0284D0 9459 #define R_0284D4_PA_CL_VPORT_YSCALE_6 0x0284D4 9460 #define R_0284D8_PA_CL_VPORT_YOFFSET_6 0x0284D8 9461 #define R_0284DC_PA_CL_VPORT_ZSCALE_6 0x0284DC 9462 #define R_0284E0_PA_CL_VPORT_ZOFFSET_6 0x0284E0 9463 #define R_0284E4_PA_CL_VPORT_XSCALE_7 0x0284E4 9464 #define R_0284E8_PA_CL_VPORT_XOFFSET_7 0x0284E8 9465 #define R_0284EC_PA_CL_VPORT_YSCALE_7 0x0284EC 9466 #define R_0284F0_PA_CL_VPORT_YOFFSET_7 0x0284F0 9467 #define R_0284F4_PA_CL_VPORT_ZSCALE_7 0x0284F4 9468 #define R_0284F8_PA_CL_VPORT_ZOFFSET_7 0x0284F8 9469 #define R_0284FC_PA_CL_VPORT_XSCALE_8 0x0284FC 9470 #define R_028500_PA_CL_VPORT_XOFFSET_8 0x028500 9471 #define R_028504_PA_CL_VPORT_YSCALE_8 0x028504 9472 #define R_028508_PA_CL_VPORT_YOFFSET_8 0x028508 9473 #define R_02850C_PA_CL_VPORT_ZSCALE_8 0x02850C 9474 #define R_028510_PA_CL_VPORT_ZOFFSET_8 0x028510 9475 #define R_028514_PA_CL_VPORT_XSCALE_9 0x028514 9476 #define R_028518_PA_CL_VPORT_XOFFSET_9 0x028518 9477 #define R_02851C_PA_CL_VPORT_YSCALE_9 0x02851C 9478 #define R_028520_PA_CL_VPORT_YOFFSET_9 0x028520 9479 #define R_028524_PA_CL_VPORT_ZSCALE_9 0x028524 9480 #define R_028528_PA_CL_VPORT_ZOFFSET_9 0x028528 9481 #define R_02852C_PA_CL_VPORT_XSCALE_10 0x02852C 9482 #define R_028530_PA_CL_VPORT_XOFFSET_10 0x028530 9483 #define R_028534_PA_CL_VPORT_YSCALE_10 0x028534 9484 #define R_028538_PA_CL_VPORT_YOFFSET_10 0x028538 9485 #define R_02853C_PA_CL_VPORT_ZSCALE_10 0x02853C 9486 #define R_028540_PA_CL_VPORT_ZOFFSET_10 0x028540 9487 #define R_028544_PA_CL_VPORT_XSCALE_11 0x028544 9488 #define R_028548_PA_CL_VPORT_XOFFSET_11 0x028548 9489 #define R_02854C_PA_CL_VPORT_YSCALE_11 0x02854C 9490 #define R_028550_PA_CL_VPORT_YOFFSET_11 0x028550 9491 #define R_028554_PA_CL_VPORT_ZSCALE_11 0x028554 9492 #define R_028558_PA_CL_VPORT_ZOFFSET_11 0x028558 9493 #define R_02855C_PA_CL_VPORT_XSCALE_12 0x02855C 9494 #define R_028560_PA_CL_VPORT_XOFFSET_12 0x028560 9495 #define R_028564_PA_CL_VPORT_YSCALE_12 0x028564 9496 #define R_028568_PA_CL_VPORT_YOFFSET_12 0x028568 9497 #define R_02856C_PA_CL_VPORT_ZSCALE_12 0x02856C 9498 #define R_028570_PA_CL_VPORT_ZOFFSET_12 0x028570 9499 #define R_028574_PA_CL_VPORT_XSCALE_13 0x028574 9500 #define R_028578_PA_CL_VPORT_XOFFSET_13 0x028578 9501 #define R_02857C_PA_CL_VPORT_YSCALE_13 0x02857C 9502 #define R_028580_PA_CL_VPORT_YOFFSET_13 0x028580 9503 #define R_028584_PA_CL_VPORT_ZSCALE_13 0x028584 9504 #define R_028588_PA_CL_VPORT_ZOFFSET_13 0x028588 9505 #define R_02858C_PA_CL_VPORT_XSCALE_14 0x02858C 9506 #define R_028590_PA_CL_VPORT_XOFFSET_14 0x028590 9507 #define R_028594_PA_CL_VPORT_YSCALE_14 0x028594 9508 #define R_028598_PA_CL_VPORT_YOFFSET_14 0x028598 9509 #define R_02859C_PA_CL_VPORT_ZSCALE_14 0x02859C 9510 #define R_0285A0_PA_CL_VPORT_ZOFFSET_14 0x0285A0 9511 #define R_0285A4_PA_CL_VPORT_XSCALE_15 0x0285A4 9512 #define R_0285A8_PA_CL_VPORT_XOFFSET_15 0x0285A8 9513 #define R_0285AC_PA_CL_VPORT_YSCALE_15 0x0285AC 9514 #define R_0285B0_PA_CL_VPORT_YOFFSET_15 0x0285B0 9515 #define R_0285B4_PA_CL_VPORT_ZSCALE_15 0x0285B4 9516 #define R_0285B8_PA_CL_VPORT_ZOFFSET_15 0x0285B8 9517 #define R_0285BC_PA_CL_UCP_0_X 0x0285BC 9518 #define R_0285C0_PA_CL_UCP_0_Y 0x0285C0 9519 #define R_0285C4_PA_CL_UCP_0_Z 0x0285C4 9520 #define R_0285C8_PA_CL_UCP_0_W 0x0285C8 9521 #define R_0285CC_PA_CL_UCP_1_X 0x0285CC 9522 #define R_0285D0_PA_CL_UCP_1_Y 0x0285D0 9523 #define R_0285D4_PA_CL_UCP_1_Z 0x0285D4 9524 #define R_0285D8_PA_CL_UCP_1_W 0x0285D8 9525 #define R_0285DC_PA_CL_UCP_2_X 0x0285DC 9526 #define R_0285E0_PA_CL_UCP_2_Y 0x0285E0 9527 #define R_0285E4_PA_CL_UCP_2_Z 0x0285E4 9528 #define R_0285E8_PA_CL_UCP_2_W 0x0285E8 9529 #define R_0285EC_PA_CL_UCP_3_X 0x0285EC 9530 #define R_0285F0_PA_CL_UCP_3_Y 0x0285F0 9531 #define R_0285F4_PA_CL_UCP_3_Z 0x0285F4 9532 #define R_0285F8_PA_CL_UCP_3_W 0x0285F8 9533 #define R_0285FC_PA_CL_UCP_4_X 0x0285FC 9534 #define R_028600_PA_CL_UCP_4_Y 0x028600 9535 #define R_028604_PA_CL_UCP_4_Z 0x028604 9536 #define R_028608_PA_CL_UCP_4_W 0x028608 9537 #define R_02860C_PA_CL_UCP_5_X 0x02860C 9538 #define R_028610_PA_CL_UCP_5_Y 0x028610 9539 #define R_028614_PA_CL_UCP_5_Z 0x028614 9540 #define R_028618_PA_CL_UCP_5_W 0x028618 9541 #define R_02861C_PA_CL_PROG_NEAR_CLIP_Z 0x02861C /* >= gfx9 */ 9542 #define R_028644_SPI_PS_INPUT_CNTL_0 0x028644 9543 #define S_028644_OFFSET(x) (((unsigned)(x) & 0x3F) << 0) 9544 #define G_028644_OFFSET(x) (((x) >> 0) & 0x3F) 9545 #define C_028644_OFFSET 0xFFFFFFC0 9546 #define S_028644_DEFAULT_VAL(x) (((unsigned)(x) & 0x3) << 8) 9547 #define G_028644_DEFAULT_VAL(x) (((x) >> 8) & 0x3) 9548 #define C_028644_DEFAULT_VAL 0xFFFFFCFF 9549 #define S_028644_FLAT_SHADE(x) (((unsigned)(x) & 0x1) << 10) 9550 #define G_028644_FLAT_SHADE(x) (((x) >> 10) & 0x1) 9551 #define C_028644_FLAT_SHADE 0xFFFFFBFF 9552 #define S_028644_ROTATE_PC_PTR(x) (((unsigned)(x) & 0x1) << 11) /* >= gfx103 */ 9553 #define G_028644_ROTATE_PC_PTR(x) (((x) >> 11) & 0x1) 9554 #define C_028644_ROTATE_PC_PTR 0xFFFFF7FF 9555 #define S_028644_CYL_WRAP(x) (((unsigned)(x) & 0xF) << 13) 9556 #define G_028644_CYL_WRAP(x) (((x) >> 13) & 0xF) 9557 #define C_028644_CYL_WRAP 0xFFFE1FFF 9558 #define S_028644_PT_SPRITE_TEX(x) (((unsigned)(x) & 0x1) << 17) 9559 #define G_028644_PT_SPRITE_TEX(x) (((x) >> 17) & 0x1) 9560 #define C_028644_PT_SPRITE_TEX 0xFFFDFFFF 9561 #define S_028644_DUP(x) (((unsigned)(x) & 0x1) << 18) 9562 #define G_028644_DUP(x) (((x) >> 18) & 0x1) 9563 #define C_028644_DUP 0xFFFBFFFF 9564 #define S_028644_FP16_INTERP_MODE(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx8 */ 9565 #define G_028644_FP16_INTERP_MODE(x) (((x) >> 19) & 0x1) 9566 #define C_028644_FP16_INTERP_MODE 0xFFF7FFFF 9567 #define S_028644_USE_DEFAULT_ATTR1(x) (((unsigned)(x) & 0x1) << 20) /* >= gfx8 */ 9568 #define G_028644_USE_DEFAULT_ATTR1(x) (((x) >> 20) & 0x1) 9569 #define C_028644_USE_DEFAULT_ATTR1 0xFFEFFFFF 9570 #define S_028644_DEFAULT_VAL_ATTR1(x) (((unsigned)(x) & 0x3) << 21) /* >= gfx8 */ 9571 #define G_028644_DEFAULT_VAL_ATTR1(x) (((x) >> 21) & 0x3) 9572 #define C_028644_DEFAULT_VAL_ATTR1 0xFF9FFFFF 9573 #define S_028644_PT_SPRITE_TEX_ATTR1(x) (((unsigned)(x) & 0x1) << 23) /* >= gfx8 */ 9574 #define G_028644_PT_SPRITE_TEX_ATTR1(x) (((x) >> 23) & 0x1) 9575 #define C_028644_PT_SPRITE_TEX_ATTR1 0xFF7FFFFF 9576 #define S_028644_ATTR0_VALID(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx8 */ 9577 #define G_028644_ATTR0_VALID(x) (((x) >> 24) & 0x1) 9578 #define C_028644_ATTR0_VALID 0xFEFFFFFF 9579 #define S_028644_ATTR1_VALID(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx8 */ 9580 #define G_028644_ATTR1_VALID(x) (((x) >> 25) & 0x1) 9581 #define C_028644_ATTR1_VALID 0xFDFFFFFF 9582 #define R_028648_SPI_PS_INPUT_CNTL_1 0x028648 9583 #define R_02864C_SPI_PS_INPUT_CNTL_2 0x02864C 9584 #define R_028650_SPI_PS_INPUT_CNTL_3 0x028650 9585 #define R_028654_SPI_PS_INPUT_CNTL_4 0x028654 9586 #define R_028658_SPI_PS_INPUT_CNTL_5 0x028658 9587 #define R_02865C_SPI_PS_INPUT_CNTL_6 0x02865C 9588 #define R_028660_SPI_PS_INPUT_CNTL_7 0x028660 9589 #define R_028664_SPI_PS_INPUT_CNTL_8 0x028664 9590 #define R_028668_SPI_PS_INPUT_CNTL_9 0x028668 9591 #define R_02866C_SPI_PS_INPUT_CNTL_10 0x02866C 9592 #define R_028670_SPI_PS_INPUT_CNTL_11 0x028670 9593 #define R_028674_SPI_PS_INPUT_CNTL_12 0x028674 9594 #define R_028678_SPI_PS_INPUT_CNTL_13 0x028678 9595 #define R_02867C_SPI_PS_INPUT_CNTL_14 0x02867C 9596 #define R_028680_SPI_PS_INPUT_CNTL_15 0x028680 9597 #define R_028684_SPI_PS_INPUT_CNTL_16 0x028684 9598 #define R_028688_SPI_PS_INPUT_CNTL_17 0x028688 9599 #define R_02868C_SPI_PS_INPUT_CNTL_18 0x02868C 9600 #define R_028690_SPI_PS_INPUT_CNTL_19 0x028690 9601 #define R_028694_SPI_PS_INPUT_CNTL_20 0x028694 9602 #define S_028694_OFFSET(x) (((unsigned)(x) & 0x3F) << 0) 9603 #define G_028694_OFFSET(x) (((x) >> 0) & 0x3F) 9604 #define C_028694_OFFSET 0xFFFFFFC0 9605 #define S_028694_DEFAULT_VAL(x) (((unsigned)(x) & 0x3) << 8) 9606 #define G_028694_DEFAULT_VAL(x) (((x) >> 8) & 0x3) 9607 #define C_028694_DEFAULT_VAL 0xFFFFFCFF 9608 #define S_028694_FLAT_SHADE(x) (((unsigned)(x) & 0x1) << 10) 9609 #define G_028694_FLAT_SHADE(x) (((x) >> 10) & 0x1) 9610 #define C_028694_FLAT_SHADE 0xFFFFFBFF 9611 #define S_028694_ROTATE_PC_PTR(x) (((unsigned)(x) & 0x1) << 11) /* >= gfx103 */ 9612 #define G_028694_ROTATE_PC_PTR(x) (((x) >> 11) & 0x1) 9613 #define C_028694_ROTATE_PC_PTR 0xFFFFF7FF 9614 #define S_028694_DUP(x) (((unsigned)(x) & 0x1) << 18) 9615 #define G_028694_DUP(x) (((x) >> 18) & 0x1) 9616 #define C_028694_DUP 0xFFFBFFFF 9617 #define S_028694_FP16_INTERP_MODE(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx8 */ 9618 #define G_028694_FP16_INTERP_MODE(x) (((x) >> 19) & 0x1) 9619 #define C_028694_FP16_INTERP_MODE 0xFFF7FFFF 9620 #define S_028694_USE_DEFAULT_ATTR1(x) (((unsigned)(x) & 0x1) << 20) /* >= gfx8 */ 9621 #define G_028694_USE_DEFAULT_ATTR1(x) (((x) >> 20) & 0x1) 9622 #define C_028694_USE_DEFAULT_ATTR1 0xFFEFFFFF 9623 #define S_028694_DEFAULT_VAL_ATTR1(x) (((unsigned)(x) & 0x3) << 21) /* >= gfx8 */ 9624 #define G_028694_DEFAULT_VAL_ATTR1(x) (((x) >> 21) & 0x3) 9625 #define C_028694_DEFAULT_VAL_ATTR1 0xFF9FFFFF 9626 #define S_028694_ATTR0_VALID(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx8 */ 9627 #define G_028694_ATTR0_VALID(x) (((x) >> 24) & 0x1) 9628 #define C_028694_ATTR0_VALID 0xFEFFFFFF 9629 #define S_028694_ATTR1_VALID(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx8 */ 9630 #define G_028694_ATTR1_VALID(x) (((x) >> 25) & 0x1) 9631 #define C_028694_ATTR1_VALID 0xFDFFFFFF 9632 #define R_028698_SPI_PS_INPUT_CNTL_21 0x028698 9633 #define R_02869C_SPI_PS_INPUT_CNTL_22 0x02869C 9634 #define R_0286A0_SPI_PS_INPUT_CNTL_23 0x0286A0 9635 #define R_0286A4_SPI_PS_INPUT_CNTL_24 0x0286A4 9636 #define R_0286A8_SPI_PS_INPUT_CNTL_25 0x0286A8 9637 #define R_0286AC_SPI_PS_INPUT_CNTL_26 0x0286AC 9638 #define R_0286B0_SPI_PS_INPUT_CNTL_27 0x0286B0 9639 #define R_0286B4_SPI_PS_INPUT_CNTL_28 0x0286B4 9640 #define R_0286B8_SPI_PS_INPUT_CNTL_29 0x0286B8 9641 #define R_0286BC_SPI_PS_INPUT_CNTL_30 0x0286BC 9642 #define R_0286C0_SPI_PS_INPUT_CNTL_31 0x0286C0 9643 #define R_0286C4_SPI_VS_OUT_CONFIG 0x0286C4 9644 #define S_0286C4_VS_EXPORT_COUNT(x) (((unsigned)(x) & 0x1F) << 1) 9645 #define G_0286C4_VS_EXPORT_COUNT(x) (((x) >> 1) & 0x1F) 9646 #define C_0286C4_VS_EXPORT_COUNT 0xFFFFFFC1 9647 #define S_0286C4_VS_HALF_PACK(x) (((unsigned)(x) & 0x1) << 6) 9648 #define G_0286C4_VS_HALF_PACK(x) (((x) >> 6) & 0x1) 9649 #define C_0286C4_VS_HALF_PACK 0xFFFFFFBF 9650 #define S_0286C4_NO_PC_EXPORT(x) (((unsigned)(x) & 0x1) << 7) /* >= gfx10 */ 9651 #define G_0286C4_NO_PC_EXPORT(x) (((x) >> 7) & 0x1) 9652 #define C_0286C4_NO_PC_EXPORT 0xFFFFFF7F 9653 #define S_0286C4_PRIM_EXPORT_COUNT(x) (((unsigned)(x) & 0x1F) << 8) /* >= gfx103 */ 9654 #define G_0286C4_PRIM_EXPORT_COUNT(x) (((x) >> 8) & 0x1F) 9655 #define C_0286C4_PRIM_EXPORT_COUNT 0xFFFFE0FF 9656 #define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC 9657 #define S_0286CC_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) 9658 #define G_0286CC_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) 9659 #define C_0286CC_PERSP_SAMPLE_ENA 0xFFFFFFFE 9660 #define S_0286CC_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) 9661 #define G_0286CC_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) 9662 #define C_0286CC_PERSP_CENTER_ENA 0xFFFFFFFD 9663 #define S_0286CC_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) 9664 #define G_0286CC_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) 9665 #define C_0286CC_PERSP_CENTROID_ENA 0xFFFFFFFB 9666 #define S_0286CC_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) 9667 #define G_0286CC_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) 9668 #define C_0286CC_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 9669 #define S_0286CC_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) 9670 #define G_0286CC_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) 9671 #define C_0286CC_LINEAR_SAMPLE_ENA 0xFFFFFFEF 9672 #define S_0286CC_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) 9673 #define G_0286CC_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) 9674 #define C_0286CC_LINEAR_CENTER_ENA 0xFFFFFFDF 9675 #define S_0286CC_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) 9676 #define G_0286CC_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) 9677 #define C_0286CC_LINEAR_CENTROID_ENA 0xFFFFFFBF 9678 #define S_0286CC_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) 9679 #define G_0286CC_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) 9680 #define C_0286CC_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F 9681 #define S_0286CC_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) 9682 #define G_0286CC_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) 9683 #define C_0286CC_POS_X_FLOAT_ENA 0xFFFFFEFF 9684 #define S_0286CC_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) 9685 #define G_0286CC_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) 9686 #define C_0286CC_POS_Y_FLOAT_ENA 0xFFFFFDFF 9687 #define S_0286CC_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) 9688 #define G_0286CC_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) 9689 #define C_0286CC_POS_Z_FLOAT_ENA 0xFFFFFBFF 9690 #define S_0286CC_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) 9691 #define G_0286CC_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) 9692 #define C_0286CC_POS_W_FLOAT_ENA 0xFFFFF7FF 9693 #define S_0286CC_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) 9694 #define G_0286CC_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) 9695 #define C_0286CC_FRONT_FACE_ENA 0xFFFFEFFF 9696 #define S_0286CC_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) 9697 #define G_0286CC_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) 9698 #define C_0286CC_ANCILLARY_ENA 0xFFFFDFFF 9699 #define S_0286CC_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) 9700 #define G_0286CC_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) 9701 #define C_0286CC_SAMPLE_COVERAGE_ENA 0xFFFFBFFF 9702 #define S_0286CC_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) 9703 #define G_0286CC_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) 9704 #define C_0286CC_POS_FIXED_PT_ENA 0xFFFF7FFF 9705 #define R_0286D0_SPI_PS_INPUT_ADDR 0x0286D0 9706 #define S_0286D0_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) 9707 #define G_0286D0_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) 9708 #define C_0286D0_PERSP_SAMPLE_ENA 0xFFFFFFFE 9709 #define S_0286D0_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) 9710 #define G_0286D0_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) 9711 #define C_0286D0_PERSP_CENTER_ENA 0xFFFFFFFD 9712 #define S_0286D0_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) 9713 #define G_0286D0_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) 9714 #define C_0286D0_PERSP_CENTROID_ENA 0xFFFFFFFB 9715 #define S_0286D0_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) 9716 #define G_0286D0_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) 9717 #define C_0286D0_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 9718 #define S_0286D0_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) 9719 #define G_0286D0_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) 9720 #define C_0286D0_LINEAR_SAMPLE_ENA 0xFFFFFFEF 9721 #define S_0286D0_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) 9722 #define G_0286D0_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) 9723 #define C_0286D0_LINEAR_CENTER_ENA 0xFFFFFFDF 9724 #define S_0286D0_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) 9725 #define G_0286D0_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) 9726 #define C_0286D0_LINEAR_CENTROID_ENA 0xFFFFFFBF 9727 #define S_0286D0_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) 9728 #define G_0286D0_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) 9729 #define C_0286D0_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F 9730 #define S_0286D0_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) 9731 #define G_0286D0_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) 9732 #define C_0286D0_POS_X_FLOAT_ENA 0xFFFFFEFF 9733 #define S_0286D0_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) 9734 #define G_0286D0_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) 9735 #define C_0286D0_POS_Y_FLOAT_ENA 0xFFFFFDFF 9736 #define S_0286D0_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) 9737 #define G_0286D0_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) 9738 #define C_0286D0_POS_Z_FLOAT_ENA 0xFFFFFBFF 9739 #define S_0286D0_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) 9740 #define G_0286D0_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) 9741 #define C_0286D0_POS_W_FLOAT_ENA 0xFFFFF7FF 9742 #define S_0286D0_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) 9743 #define G_0286D0_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) 9744 #define C_0286D0_FRONT_FACE_ENA 0xFFFFEFFF 9745 #define S_0286D0_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) 9746 #define G_0286D0_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) 9747 #define C_0286D0_ANCILLARY_ENA 0xFFFFDFFF 9748 #define S_0286D0_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) 9749 #define G_0286D0_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) 9750 #define C_0286D0_SAMPLE_COVERAGE_ENA 0xFFFFBFFF 9751 #define S_0286D0_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) 9752 #define G_0286D0_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) 9753 #define C_0286D0_POS_FIXED_PT_ENA 0xFFFF7FFF 9754 #define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 9755 #define S_0286D4_FLAT_SHADE_ENA(x) (((unsigned)(x) & 0x1) << 0) 9756 #define G_0286D4_FLAT_SHADE_ENA(x) (((x) >> 0) & 0x1) 9757 #define C_0286D4_FLAT_SHADE_ENA 0xFFFFFFFE 9758 #define S_0286D4_PNT_SPRITE_ENA(x) (((unsigned)(x) & 0x1) << 1) 9759 #define G_0286D4_PNT_SPRITE_ENA(x) (((x) >> 1) & 0x1) 9760 #define C_0286D4_PNT_SPRITE_ENA 0xFFFFFFFD 9761 #define S_0286D4_PNT_SPRITE_OVRD_X(x) (((unsigned)(x) & 0x7) << 2) 9762 #define G_0286D4_PNT_SPRITE_OVRD_X(x) (((x) >> 2) & 0x7) 9763 #define C_0286D4_PNT_SPRITE_OVRD_X 0xFFFFFFE3 9764 #define V_0286D4_SPI_PNT_SPRITE_SEL_0 0 9765 #define V_0286D4_SPI_PNT_SPRITE_SEL_1 1 9766 #define V_0286D4_SPI_PNT_SPRITE_SEL_S 2 9767 #define V_0286D4_SPI_PNT_SPRITE_SEL_T 3 9768 #define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 4 9769 #define S_0286D4_PNT_SPRITE_OVRD_Y(x) (((unsigned)(x) & 0x7) << 5) 9770 #define G_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) >> 5) & 0x7) 9771 #define C_0286D4_PNT_SPRITE_OVRD_Y 0xFFFFFF1F 9772 #define S_0286D4_PNT_SPRITE_OVRD_Z(x) (((unsigned)(x) & 0x7) << 8) 9773 #define G_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) >> 8) & 0x7) 9774 #define C_0286D4_PNT_SPRITE_OVRD_Z 0xFFFFF8FF 9775 #define S_0286D4_PNT_SPRITE_OVRD_W(x) (((unsigned)(x) & 0x7) << 11) 9776 #define G_0286D4_PNT_SPRITE_OVRD_W(x) (((x) >> 11) & 0x7) 9777 #define C_0286D4_PNT_SPRITE_OVRD_W 0xFFFFC7FF 9778 #define S_0286D4_PNT_SPRITE_TOP_1(x) (((unsigned)(x) & 0x1) << 14) 9779 #define G_0286D4_PNT_SPRITE_TOP_1(x) (((x) >> 14) & 0x1) 9780 #define C_0286D4_PNT_SPRITE_TOP_1 0xFFFFBFFF 9781 #define R_0286D8_SPI_PS_IN_CONTROL 0x0286D8 9782 #define S_0286D8_NUM_INTERP(x) (((unsigned)(x) & 0x3F) << 0) 9783 #define G_0286D8_NUM_INTERP(x) (((x) >> 0) & 0x3F) 9784 #define C_0286D8_NUM_INTERP 0xFFFFFFC0 9785 #define S_0286D8_PARAM_GEN(x) (((unsigned)(x) & 0x1) << 6) /* <= gfx10 */ 9786 #define G_0286D8_PARAM_GEN(x) (((x) >> 6) & 0x1) 9787 #define C_0286D8_PARAM_GEN 0xFFFFFFBF 9788 #define S_0286D8_OFFCHIP_PARAM_EN(x) (((unsigned)(x) & 0x1) << 7) /* >= gfx9 */ 9789 #define G_0286D8_OFFCHIP_PARAM_EN(x) (((x) >> 7) & 0x1) 9790 #define C_0286D8_OFFCHIP_PARAM_EN 0xFFFFFF7F 9791 #define S_0286D8_LATE_PC_DEALLOC(x) (((unsigned)(x) & 0x1) << 8) /* >= gfx9 */ 9792 #define G_0286D8_LATE_PC_DEALLOC(x) (((x) >> 8) & 0x1) 9793 #define C_0286D8_LATE_PC_DEALLOC 0xFFFFFEFF 9794 #define S_0286D8_NUM_PRIM_INTERP(x) (((unsigned)(x) & 0x1F) << 9) /* >= gfx103 */ 9795 #define G_0286D8_NUM_PRIM_INTERP(x) (((x) >> 9) & 0x1F) 9796 #define C_0286D8_NUM_PRIM_INTERP 0xFFFFC1FF 9797 #define S_0286D8_BC_OPTIMIZE_DISABLE(x) (((unsigned)(x) & 0x1) << 14) 9798 #define G_0286D8_BC_OPTIMIZE_DISABLE(x) (((x) >> 14) & 0x1) 9799 #define C_0286D8_BC_OPTIMIZE_DISABLE 0xFFFFBFFF 9800 #define S_0286D8_PS_W32_EN(x) (((unsigned)(x) & 0x1) << 15) /* >= gfx10 */ 9801 #define G_0286D8_PS_W32_EN(x) (((x) >> 15) & 0x1) 9802 #define C_0286D8_PS_W32_EN 0xFFFF7FFF 9803 #define R_0286E0_SPI_BARYC_CNTL 0x0286E0 9804 #define S_0286E0_PERSP_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 0) 9805 #define G_0286E0_PERSP_CENTER_CNTL(x) (((x) >> 0) & 0x1) 9806 #define C_0286E0_PERSP_CENTER_CNTL 0xFFFFFFFE 9807 #define S_0286E0_PERSP_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 4) 9808 #define G_0286E0_PERSP_CENTROID_CNTL(x) (((x) >> 4) & 0x1) 9809 #define C_0286E0_PERSP_CENTROID_CNTL 0xFFFFFFEF 9810 #define S_0286E0_LINEAR_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 8) 9811 #define G_0286E0_LINEAR_CENTER_CNTL(x) (((x) >> 8) & 0x1) 9812 #define C_0286E0_LINEAR_CENTER_CNTL 0xFFFFFEFF 9813 #define S_0286E0_LINEAR_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 12) 9814 #define G_0286E0_LINEAR_CENTROID_CNTL(x) (((x) >> 12) & 0x1) 9815 #define C_0286E0_LINEAR_CENTROID_CNTL 0xFFFFEFFF 9816 #define S_0286E0_POS_FLOAT_LOCATION(x) (((unsigned)(x) & 0x3) << 16) 9817 #define G_0286E0_POS_FLOAT_LOCATION(x) (((x) >> 16) & 0x3) 9818 #define C_0286E0_POS_FLOAT_LOCATION 0xFFFCFFFF 9819 #define S_0286E0_POS_FLOAT_ULC(x) (((unsigned)(x) & 0x1) << 20) 9820 #define G_0286E0_POS_FLOAT_ULC(x) (((x) >> 20) & 0x1) 9821 #define C_0286E0_POS_FLOAT_ULC 0xFFEFFFFF 9822 #define S_0286E0_FRONT_FACE_ALL_BITS(x) (((unsigned)(x) & 0x1) << 24) 9823 #define G_0286E0_FRONT_FACE_ALL_BITS(x) (((x) >> 24) & 0x1) 9824 #define C_0286E0_FRONT_FACE_ALL_BITS 0xFEFFFFFF 9825 #define R_0286E8_SPI_TMPRING_SIZE 0x0286E8 9826 #define S_0286E8_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) 9827 #define G_0286E8_WAVES(x) (((x) >> 0) & 0xFFF) 9828 #define C_0286E8_WAVES 0xFFFFF000 9829 #define S_0286E8_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) 9830 #define G_0286E8_WAVESIZE(x) (((x) >> 12) & 0x1FFF) 9831 #define C_0286E8_WAVESIZE 0xFE000FFF 9832 #define R_028708_SPI_SHADER_IDX_FORMAT 0x028708 /* >= gfx10 */ 9833 #define S_028708_IDX0_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 0) 9834 #define G_028708_IDX0_EXPORT_FORMAT(x) (((x) >> 0) & 0xF) 9835 #define C_028708_IDX0_EXPORT_FORMAT 0xFFFFFFF0 9836 #define V_028708_SPI_SHADER_NONE 0 9837 #define V_028708_SPI_SHADER_1COMP 1 9838 #define V_028708_SPI_SHADER_2COMP 2 9839 #define V_028708_SPI_SHADER_4COMPRESS 3 9840 #define V_028708_SPI_SHADER_4COMP 4 9841 #define R_02870C_SPI_SHADER_POS_FORMAT 0x02870C 9842 #define S_02870C_POS0_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 0) 9843 #define G_02870C_POS0_EXPORT_FORMAT(x) (((x) >> 0) & 0xF) 9844 #define C_02870C_POS0_EXPORT_FORMAT 0xFFFFFFF0 9845 #define V_02870C_SPI_SHADER_NONE 0 9846 #define V_02870C_SPI_SHADER_1COMP 1 9847 #define V_02870C_SPI_SHADER_2COMP 2 9848 #define V_02870C_SPI_SHADER_4COMPRESS 3 9849 #define V_02870C_SPI_SHADER_4COMP 4 9850 #define S_02870C_POS1_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 4) 9851 #define G_02870C_POS1_EXPORT_FORMAT(x) (((x) >> 4) & 0xF) 9852 #define C_02870C_POS1_EXPORT_FORMAT 0xFFFFFF0F 9853 #define S_02870C_POS2_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 8) 9854 #define G_02870C_POS2_EXPORT_FORMAT(x) (((x) >> 8) & 0xF) 9855 #define C_02870C_POS2_EXPORT_FORMAT 0xFFFFF0FF 9856 #define S_02870C_POS3_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 12) 9857 #define G_02870C_POS3_EXPORT_FORMAT(x) (((x) >> 12) & 0xF) 9858 #define C_02870C_POS3_EXPORT_FORMAT 0xFFFF0FFF 9859 #define S_02870C_POS4_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 16) /* >= gfx10 */ 9860 #define G_02870C_POS4_EXPORT_FORMAT(x) (((x) >> 16) & 0xF) 9861 #define C_02870C_POS4_EXPORT_FORMAT 0xFFF0FFFF 9862 #define R_028710_SPI_SHADER_Z_FORMAT 0x028710 9863 #define S_028710_Z_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 0) 9864 #define G_028710_Z_EXPORT_FORMAT(x) (((x) >> 0) & 0xF) 9865 #define C_028710_Z_EXPORT_FORMAT 0xFFFFFFF0 9866 #define V_028710_SPI_SHADER_ZERO 0 9867 #define V_028710_SPI_SHADER_32_R 1 9868 #define V_028710_SPI_SHADER_32_GR 2 9869 #define V_028710_SPI_SHADER_32_AR 3 9870 #define V_028710_SPI_SHADER_FP16_ABGR 4 9871 #define V_028710_SPI_SHADER_UNORM16_ABGR 5 9872 #define V_028710_SPI_SHADER_SNORM16_ABGR 6 9873 #define V_028710_SPI_SHADER_UINT16_ABGR 7 9874 #define V_028710_SPI_SHADER_SINT16_ABGR 8 9875 #define V_028710_SPI_SHADER_32_ABGR 9 9876 #define R_028714_SPI_SHADER_COL_FORMAT 0x028714 9877 #define S_028714_COL0_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 0) 9878 #define G_028714_COL0_EXPORT_FORMAT(x) (((x) >> 0) & 0xF) 9879 #define C_028714_COL0_EXPORT_FORMAT 0xFFFFFFF0 9880 #define V_028714_SPI_SHADER_ZERO 0 9881 #define V_028714_SPI_SHADER_32_R 1 9882 #define V_028714_SPI_SHADER_32_GR 2 9883 #define V_028714_SPI_SHADER_32_AR 3 9884 #define V_028714_SPI_SHADER_FP16_ABGR 4 9885 #define V_028714_SPI_SHADER_UNORM16_ABGR 5 9886 #define V_028714_SPI_SHADER_SNORM16_ABGR 6 9887 #define V_028714_SPI_SHADER_UINT16_ABGR 7 9888 #define V_028714_SPI_SHADER_SINT16_ABGR 8 9889 #define V_028714_SPI_SHADER_32_ABGR 9 9890 #define S_028714_COL1_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 4) 9891 #define G_028714_COL1_EXPORT_FORMAT(x) (((x) >> 4) & 0xF) 9892 #define C_028714_COL1_EXPORT_FORMAT 0xFFFFFF0F 9893 #define S_028714_COL2_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 8) 9894 #define G_028714_COL2_EXPORT_FORMAT(x) (((x) >> 8) & 0xF) 9895 #define C_028714_COL2_EXPORT_FORMAT 0xFFFFF0FF 9896 #define S_028714_COL3_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 12) 9897 #define G_028714_COL3_EXPORT_FORMAT(x) (((x) >> 12) & 0xF) 9898 #define C_028714_COL3_EXPORT_FORMAT 0xFFFF0FFF 9899 #define S_028714_COL4_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 16) 9900 #define G_028714_COL4_EXPORT_FORMAT(x) (((x) >> 16) & 0xF) 9901 #define C_028714_COL4_EXPORT_FORMAT 0xFFF0FFFF 9902 #define S_028714_COL5_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 20) 9903 #define G_028714_COL5_EXPORT_FORMAT(x) (((x) >> 20) & 0xF) 9904 #define C_028714_COL5_EXPORT_FORMAT 0xFF0FFFFF 9905 #define S_028714_COL6_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 24) 9906 #define G_028714_COL6_EXPORT_FORMAT(x) (((x) >> 24) & 0xF) 9907 #define C_028714_COL6_EXPORT_FORMAT 0xF0FFFFFF 9908 #define S_028714_COL7_EXPORT_FORMAT(x) (((unsigned)(x) & 0xF) << 28) 9909 #define G_028714_COL7_EXPORT_FORMAT(x) (((x) >> 28) & 0xF) 9910 #define C_028714_COL7_EXPORT_FORMAT 0x0FFFFFFF 9911 #define R_028750_SX_PS_DOWNCONVERT_CONTROL 0x028750 /* >= gfx103 */ 9912 #define S_028750_MRT0_FMT_MAPPING_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 9913 #define G_028750_MRT0_FMT_MAPPING_DISABLE(x) (((x) >> 0) & 0x1) 9914 #define C_028750_MRT0_FMT_MAPPING_DISABLE 0xFFFFFFFE 9915 #define S_028750_MRT1_FMT_MAPPING_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 9916 #define G_028750_MRT1_FMT_MAPPING_DISABLE(x) (((x) >> 1) & 0x1) 9917 #define C_028750_MRT1_FMT_MAPPING_DISABLE 0xFFFFFFFD 9918 #define S_028750_MRT2_FMT_MAPPING_DISABLE(x) (((unsigned)(x) & 0x1) << 2) 9919 #define G_028750_MRT2_FMT_MAPPING_DISABLE(x) (((x) >> 2) & 0x1) 9920 #define C_028750_MRT2_FMT_MAPPING_DISABLE 0xFFFFFFFB 9921 #define S_028750_MRT3_FMT_MAPPING_DISABLE(x) (((unsigned)(x) & 0x1) << 3) 9922 #define G_028750_MRT3_FMT_MAPPING_DISABLE(x) (((x) >> 3) & 0x1) 9923 #define C_028750_MRT3_FMT_MAPPING_DISABLE 0xFFFFFFF7 9924 #define S_028750_MRT4_FMT_MAPPING_DISABLE(x) (((unsigned)(x) & 0x1) << 4) 9925 #define G_028750_MRT4_FMT_MAPPING_DISABLE(x) (((x) >> 4) & 0x1) 9926 #define C_028750_MRT4_FMT_MAPPING_DISABLE 0xFFFFFFEF 9927 #define S_028750_MRT5_FMT_MAPPING_DISABLE(x) (((unsigned)(x) & 0x1) << 5) 9928 #define G_028750_MRT5_FMT_MAPPING_DISABLE(x) (((x) >> 5) & 0x1) 9929 #define C_028750_MRT5_FMT_MAPPING_DISABLE 0xFFFFFFDF 9930 #define S_028750_MRT6_FMT_MAPPING_DISABLE(x) (((unsigned)(x) & 0x1) << 6) 9931 #define G_028750_MRT6_FMT_MAPPING_DISABLE(x) (((x) >> 6) & 0x1) 9932 #define C_028750_MRT6_FMT_MAPPING_DISABLE 0xFFFFFFBF 9933 #define S_028750_MRT7_FMT_MAPPING_DISABLE(x) (((unsigned)(x) & 0x1) << 7) 9934 #define G_028750_MRT7_FMT_MAPPING_DISABLE(x) (((x) >> 7) & 0x1) 9935 #define C_028750_MRT7_FMT_MAPPING_DISABLE 0xFFFFFF7F 9936 #define R_028754_SX_PS_DOWNCONVERT 0x028754 /* >= gfx81 */ 9937 #define S_028754_MRT0(x) (((unsigned)(x) & 0xF) << 0) 9938 #define G_028754_MRT0(x) (((x) >> 0) & 0xF) 9939 #define C_028754_MRT0 0xFFFFFFF0 9940 #define V_028754_SX_RT_EXPORT_NO_CONVERSION 0 9941 #define V_028754_SX_RT_EXPORT_32_R 1 9942 #define V_028754_SX_RT_EXPORT_32_A 2 9943 #define V_028754_SX_RT_EXPORT_10_11_11 3 9944 #define V_028754_SX_RT_EXPORT_2_10_10_10 4 9945 #define V_028754_SX_RT_EXPORT_8_8_8_8 5 9946 #define V_028754_SX_RT_EXPORT_5_6_5 6 9947 #define V_028754_SX_RT_EXPORT_1_5_5_5 7 9948 #define V_028754_SX_RT_EXPORT_4_4_4_4 8 9949 #define V_028754_SX_RT_EXPORT_16_16_GR 9 9950 #define V_028754_SX_RT_EXPORT_16_16_AR 10 9951 #define V_028754_SX_RT_EXPORT_9_9_9_E5 11 /* >= gfx103 */ 9952 #define S_028754_MRT1(x) (((unsigned)(x) & 0xF) << 4) 9953 #define G_028754_MRT1(x) (((x) >> 4) & 0xF) 9954 #define C_028754_MRT1 0xFFFFFF0F 9955 #define S_028754_MRT2(x) (((unsigned)(x) & 0xF) << 8) 9956 #define G_028754_MRT2(x) (((x) >> 8) & 0xF) 9957 #define C_028754_MRT2 0xFFFFF0FF 9958 #define S_028754_MRT3(x) (((unsigned)(x) & 0xF) << 12) 9959 #define G_028754_MRT3(x) (((x) >> 12) & 0xF) 9960 #define C_028754_MRT3 0xFFFF0FFF 9961 #define S_028754_MRT4(x) (((unsigned)(x) & 0xF) << 16) 9962 #define G_028754_MRT4(x) (((x) >> 16) & 0xF) 9963 #define C_028754_MRT4 0xFFF0FFFF 9964 #define S_028754_MRT5(x) (((unsigned)(x) & 0xF) << 20) 9965 #define G_028754_MRT5(x) (((x) >> 20) & 0xF) 9966 #define C_028754_MRT5 0xFF0FFFFF 9967 #define S_028754_MRT6(x) (((unsigned)(x) & 0xF) << 24) 9968 #define G_028754_MRT6(x) (((x) >> 24) & 0xF) 9969 #define C_028754_MRT6 0xF0FFFFFF 9970 #define S_028754_MRT7(x) (((unsigned)(x) & 0xF) << 28) 9971 #define G_028754_MRT7(x) (((x) >> 28) & 0xF) 9972 #define C_028754_MRT7 0x0FFFFFFF 9973 #define R_028758_SX_BLEND_OPT_EPSILON 0x028758 /* >= gfx81 */ 9974 #define S_028758_MRT0_EPSILON(x) (((unsigned)(x) & 0xF) << 0) 9975 #define G_028758_MRT0_EPSILON(x) (((x) >> 0) & 0xF) 9976 #define C_028758_MRT0_EPSILON 0xFFFFFFF0 9977 #define V_028758_EXACT 0 9978 #define V_028758_11BIT_FORMAT 1 9979 #define V_028758_10BIT_FORMAT 3 9980 #define V_028758_8BIT_FORMAT 6 9981 #define V_028758_6BIT_FORMAT 11 9982 #define V_028758_5BIT_FORMAT 13 9983 #define V_028758_4BIT_FORMAT 15 9984 #define S_028758_MRT1_EPSILON(x) (((unsigned)(x) & 0xF) << 4) 9985 #define G_028758_MRT1_EPSILON(x) (((x) >> 4) & 0xF) 9986 #define C_028758_MRT1_EPSILON 0xFFFFFF0F 9987 #define S_028758_MRT2_EPSILON(x) (((unsigned)(x) & 0xF) << 8) 9988 #define G_028758_MRT2_EPSILON(x) (((x) >> 8) & 0xF) 9989 #define C_028758_MRT2_EPSILON 0xFFFFF0FF 9990 #define S_028758_MRT3_EPSILON(x) (((unsigned)(x) & 0xF) << 12) 9991 #define G_028758_MRT3_EPSILON(x) (((x) >> 12) & 0xF) 9992 #define C_028758_MRT3_EPSILON 0xFFFF0FFF 9993 #define S_028758_MRT4_EPSILON(x) (((unsigned)(x) & 0xF) << 16) 9994 #define G_028758_MRT4_EPSILON(x) (((x) >> 16) & 0xF) 9995 #define C_028758_MRT4_EPSILON 0xFFF0FFFF 9996 #define S_028758_MRT5_EPSILON(x) (((unsigned)(x) & 0xF) << 20) 9997 #define G_028758_MRT5_EPSILON(x) (((x) >> 20) & 0xF) 9998 #define C_028758_MRT5_EPSILON 0xFF0FFFFF 9999 #define S_028758_MRT6_EPSILON(x) (((unsigned)(x) & 0xF) << 24) 10000 #define G_028758_MRT6_EPSILON(x) (((x) >> 24) & 0xF) 10001 #define C_028758_MRT6_EPSILON 0xF0FFFFFF 10002 #define S_028758_MRT7_EPSILON(x) (((unsigned)(x) & 0xF) << 28) 10003 #define G_028758_MRT7_EPSILON(x) (((x) >> 28) & 0xF) 10004 #define C_028758_MRT7_EPSILON 0x0FFFFFFF 10005 #define R_02875C_SX_BLEND_OPT_CONTROL 0x02875C /* >= gfx81 */ 10006 #define S_02875C_MRT0_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 10007 #define G_02875C_MRT0_COLOR_OPT_DISABLE(x) (((x) >> 0) & 0x1) 10008 #define C_02875C_MRT0_COLOR_OPT_DISABLE 0xFFFFFFFE 10009 #define S_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 10010 #define G_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((x) >> 1) & 0x1) 10011 #define C_02875C_MRT0_ALPHA_OPT_DISABLE 0xFFFFFFFD 10012 #define S_02875C_MRT1_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 4) 10013 #define G_02875C_MRT1_COLOR_OPT_DISABLE(x) (((x) >> 4) & 0x1) 10014 #define C_02875C_MRT1_COLOR_OPT_DISABLE 0xFFFFFFEF 10015 #define S_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 5) 10016 #define G_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((x) >> 5) & 0x1) 10017 #define C_02875C_MRT1_ALPHA_OPT_DISABLE 0xFFFFFFDF 10018 #define S_02875C_MRT2_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 8) 10019 #define G_02875C_MRT2_COLOR_OPT_DISABLE(x) (((x) >> 8) & 0x1) 10020 #define C_02875C_MRT2_COLOR_OPT_DISABLE 0xFFFFFEFF 10021 #define S_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 10022 #define G_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((x) >> 9) & 0x1) 10023 #define C_02875C_MRT2_ALPHA_OPT_DISABLE 0xFFFFFDFF 10024 #define S_02875C_MRT3_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 12) 10025 #define G_02875C_MRT3_COLOR_OPT_DISABLE(x) (((x) >> 12) & 0x1) 10026 #define C_02875C_MRT3_COLOR_OPT_DISABLE 0xFFFFEFFF 10027 #define S_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 13) 10028 #define G_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((x) >> 13) & 0x1) 10029 #define C_02875C_MRT3_ALPHA_OPT_DISABLE 0xFFFFDFFF 10030 #define S_02875C_MRT4_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 16) 10031 #define G_02875C_MRT4_COLOR_OPT_DISABLE(x) (((x) >> 16) & 0x1) 10032 #define C_02875C_MRT4_COLOR_OPT_DISABLE 0xFFFEFFFF 10033 #define S_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 17) 10034 #define G_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((x) >> 17) & 0x1) 10035 #define C_02875C_MRT4_ALPHA_OPT_DISABLE 0xFFFDFFFF 10036 #define S_02875C_MRT5_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 20) 10037 #define G_02875C_MRT5_COLOR_OPT_DISABLE(x) (((x) >> 20) & 0x1) 10038 #define C_02875C_MRT5_COLOR_OPT_DISABLE 0xFFEFFFFF 10039 #define S_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 21) 10040 #define G_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((x) >> 21) & 0x1) 10041 #define C_02875C_MRT5_ALPHA_OPT_DISABLE 0xFFDFFFFF 10042 #define S_02875C_MRT6_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 24) 10043 #define G_02875C_MRT6_COLOR_OPT_DISABLE(x) (((x) >> 24) & 0x1) 10044 #define C_02875C_MRT6_COLOR_OPT_DISABLE 0xFEFFFFFF 10045 #define S_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 25) 10046 #define G_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((x) >> 25) & 0x1) 10047 #define C_02875C_MRT6_ALPHA_OPT_DISABLE 0xFDFFFFFF 10048 #define S_02875C_MRT7_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 28) 10049 #define G_02875C_MRT7_COLOR_OPT_DISABLE(x) (((x) >> 28) & 0x1) 10050 #define C_02875C_MRT7_COLOR_OPT_DISABLE 0xEFFFFFFF 10051 #define S_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 29) 10052 #define G_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((x) >> 29) & 0x1) 10053 #define C_02875C_MRT7_ALPHA_OPT_DISABLE 0xDFFFFFFF 10054 #define S_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 10055 #define G_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((x) >> 31) & 0x1) 10056 #define C_02875C_PIXEN_ZERO_OPT_DISABLE 0x7FFFFFFF 10057 #define R_028760_SX_MRT0_BLEND_OPT 0x028760 /* >= gfx81 */ 10058 #define S_028760_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x7) << 0) 10059 #define G_028760_COLOR_SRC_OPT(x) (((x) >> 0) & 0x7) 10060 #define C_028760_COLOR_SRC_OPT 0xFFFFFFF8 10061 #define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_ALL 0 10062 #define V_028760_BLEND_OPT_PRESERVE_ALL_IGNORE_NONE 1 10063 #define V_028760_BLEND_OPT_PRESERVE_C1_IGNORE_C0 2 10064 #define V_028760_BLEND_OPT_PRESERVE_C0_IGNORE_C1 3 10065 #define V_028760_BLEND_OPT_PRESERVE_A1_IGNORE_A0 4 10066 #define V_028760_BLEND_OPT_PRESERVE_A0_IGNORE_A1 5 10067 #define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_A0 6 10068 #define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_NONE 7 10069 #define S_028760_COLOR_DST_OPT(x) (((unsigned)(x) & 0x7) << 4) 10070 #define G_028760_COLOR_DST_OPT(x) (((x) >> 4) & 0x7) 10071 #define C_028760_COLOR_DST_OPT 0xFFFFFF8F 10072 #define S_028760_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x7) << 8) 10073 #define G_028760_COLOR_COMB_FCN(x) (((x) >> 8) & 0x7) 10074 #define C_028760_COLOR_COMB_FCN 0xFFFFF8FF 10075 #define V_028760_OPT_COMB_NONE 0 10076 #define V_028760_OPT_COMB_ADD 1 10077 #define V_028760_OPT_COMB_SUBTRACT 2 10078 #define V_028760_OPT_COMB_MIN 3 10079 #define V_028760_OPT_COMB_MAX 4 10080 #define V_028760_OPT_COMB_REVSUBTRACT 5 10081 #define V_028760_OPT_COMB_BLEND_DISABLED 6 10082 #define V_028760_OPT_COMB_SAFE_ADD 7 10083 #define S_028760_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x7) << 16) 10084 #define G_028760_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x7) 10085 #define C_028760_ALPHA_SRC_OPT 0xFFF8FFFF 10086 #define S_028760_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x7) << 20) 10087 #define G_028760_ALPHA_DST_OPT(x) (((x) >> 20) & 0x7) 10088 #define C_028760_ALPHA_DST_OPT 0xFF8FFFFF 10089 #define S_028760_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x7) << 24) 10090 #define G_028760_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x7) 10091 #define C_028760_ALPHA_COMB_FCN 0xF8FFFFFF 10092 #define R_028764_SX_MRT1_BLEND_OPT 0x028764 /* >= gfx81 */ 10093 #define R_028768_SX_MRT2_BLEND_OPT 0x028768 /* >= gfx81 */ 10094 #define R_02876C_SX_MRT3_BLEND_OPT 0x02876C /* >= gfx81 */ 10095 #define R_028770_SX_MRT4_BLEND_OPT 0x028770 /* >= gfx81 */ 10096 #define R_028774_SX_MRT5_BLEND_OPT 0x028774 /* >= gfx81 */ 10097 #define R_028778_SX_MRT6_BLEND_OPT 0x028778 /* >= gfx81 */ 10098 #define R_02877C_SX_MRT7_BLEND_OPT 0x02877C /* >= gfx81 */ 10099 #define R_028780_CB_BLEND0_CONTROL 0x028780 10100 #define S_028780_COLOR_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 0) 10101 #define G_028780_COLOR_SRCBLEND(x) (((x) >> 0) & 0x1F) 10102 #define C_028780_COLOR_SRCBLEND 0xFFFFFFE0 10103 #define V_028780_BLEND_ZERO 0 10104 #define V_028780_BLEND_ONE 1 10105 #define V_028780_BLEND_SRC_COLOR 2 10106 #define V_028780_BLEND_ONE_MINUS_SRC_COLOR 3 10107 #define V_028780_BLEND_SRC_ALPHA 4 10108 #define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 5 10109 #define V_028780_BLEND_DST_ALPHA 6 10110 #define V_028780_BLEND_ONE_MINUS_DST_ALPHA 7 10111 #define V_028780_BLEND_DST_COLOR 8 10112 #define V_028780_BLEND_ONE_MINUS_DST_COLOR 9 10113 #define V_028780_BLEND_SRC_ALPHA_SATURATE 10 10114 #define V_028780_BLEND_BOTH_SRC_ALPHA 11 10115 #define V_028780_BLEND_BOTH_INV_SRC_ALPHA 12 10116 #define V_028780_BLEND_CONSTANT_COLOR 13 10117 #define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 14 10118 #define V_028780_BLEND_SRC1_COLOR 15 10119 #define V_028780_BLEND_INV_SRC1_COLOR 16 10120 #define V_028780_BLEND_SRC1_ALPHA 17 10121 #define V_028780_BLEND_INV_SRC1_ALPHA 18 10122 #define V_028780_BLEND_CONSTANT_ALPHA 19 10123 #define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 20 10124 #define S_028780_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x7) << 5) 10125 #define G_028780_COLOR_COMB_FCN(x) (((x) >> 5) & 0x7) 10126 #define C_028780_COLOR_COMB_FCN 0xFFFFFF1F 10127 #define V_028780_COMB_DST_PLUS_SRC 0 10128 #define V_028780_COMB_SRC_MINUS_DST 1 10129 #define V_028780_COMB_MIN_DST_SRC 2 10130 #define V_028780_COMB_MAX_DST_SRC 3 10131 #define V_028780_COMB_DST_MINUS_SRC 4 10132 #define S_028780_COLOR_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 8) 10133 #define G_028780_COLOR_DESTBLEND(x) (((x) >> 8) & 0x1F) 10134 #define C_028780_COLOR_DESTBLEND 0xFFFFE0FF 10135 #define S_028780_ALPHA_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 16) 10136 #define G_028780_ALPHA_SRCBLEND(x) (((x) >> 16) & 0x1F) 10137 #define C_028780_ALPHA_SRCBLEND 0xFFE0FFFF 10138 #define S_028780_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x7) << 21) 10139 #define G_028780_ALPHA_COMB_FCN(x) (((x) >> 21) & 0x7) 10140 #define C_028780_ALPHA_COMB_FCN 0xFF1FFFFF 10141 #define S_028780_ALPHA_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 24) 10142 #define G_028780_ALPHA_DESTBLEND(x) (((x) >> 24) & 0x1F) 10143 #define C_028780_ALPHA_DESTBLEND 0xE0FFFFFF 10144 #define S_028780_SEPARATE_ALPHA_BLEND(x) (((unsigned)(x) & 0x1) << 29) 10145 #define G_028780_SEPARATE_ALPHA_BLEND(x) (((x) >> 29) & 0x1) 10146 #define C_028780_SEPARATE_ALPHA_BLEND 0xDFFFFFFF 10147 #define S_028780_ENABLE(x) (((unsigned)(x) & 0x1) << 30) 10148 #define G_028780_ENABLE(x) (((x) >> 30) & 0x1) 10149 #define C_028780_ENABLE 0xBFFFFFFF 10150 #define S_028780_DISABLE_ROP3(x) (((unsigned)(x) & 0x1) << 31) 10151 #define G_028780_DISABLE_ROP3(x) (((x) >> 31) & 0x1) 10152 #define C_028780_DISABLE_ROP3 0x7FFFFFFF 10153 #define R_028784_CB_BLEND1_CONTROL 0x028784 10154 #define R_028788_CB_BLEND2_CONTROL 0x028788 10155 #define R_02878C_CB_BLEND3_CONTROL 0x02878C 10156 #define R_028790_CB_BLEND4_CONTROL 0x028790 10157 #define R_028794_CB_BLEND5_CONTROL 0x028794 10158 #define R_028798_CB_BLEND6_CONTROL 0x028798 10159 #define R_02879C_CB_BLEND7_CONTROL 0x02879C 10160 #define R_0287A0_CB_MRT0_EPITCH 0x0287A0 /* gfx9 */ 10161 #define S_0287A0_EPITCH(x) (((unsigned)(x) & 0xFFFF) << 0) 10162 #define G_0287A0_EPITCH(x) (((x) >> 0) & 0xFFFF) 10163 #define C_0287A0_EPITCH 0xFFFF0000 10164 #define R_0287A4_CB_MRT1_EPITCH 0x0287A4 /* gfx9 */ 10165 #define R_0287A8_CB_MRT2_EPITCH 0x0287A8 /* gfx9 */ 10166 #define R_0287AC_CB_MRT3_EPITCH 0x0287AC /* gfx9 */ 10167 #define R_0287B0_CB_MRT4_EPITCH 0x0287B0 /* gfx9 */ 10168 #define R_0287B4_CB_MRT5_EPITCH 0x0287B4 /* gfx9 */ 10169 #define R_0287B8_CB_MRT6_EPITCH 0x0287B8 /* gfx9 */ 10170 #define R_0287BC_CB_MRT7_EPITCH 0x0287BC /* gfx9 */ 10171 #define R_0287CC_CS_COPY_STATE 0x0287CC 10172 #define S_0287CC_SRC_STATE_ID(x) (((unsigned)(x) & 0x7) << 0) 10173 #define G_0287CC_SRC_STATE_ID(x) (((x) >> 0) & 0x7) 10174 #define C_0287CC_SRC_STATE_ID 0xFFFFFFF8 10175 #define R_0287D0_GFX_COPY_STATE 0x0287D0 10176 #define S_0287D0_SRC_STATE_ID(x) (((unsigned)(x) & 0x7) << 0) 10177 #define G_0287D0_SRC_STATE_ID(x) (((x) >> 0) & 0x7) 10178 #define C_0287D0_SRC_STATE_ID 0xFFFFFFF8 10179 #define R_0287D4_PA_CL_POINT_X_RAD 0x0287D4 10180 #define R_0287D8_PA_CL_POINT_Y_RAD 0x0287D8 10181 #define R_0287DC_PA_CL_POINT_SIZE 0x0287DC 10182 #define R_0287E0_PA_CL_POINT_CULL_RAD 0x0287E0 10183 #define R_0287E4_VGT_DMA_BASE_HI 0x0287E4 10184 #define S_0287E4_BASE_ADDR(x) (((unsigned)(x) & 0xFFFF) << 0) 10185 #define G_0287E4_BASE_ADDR(x) (((x) >> 0) & 0xFFFF) 10186 #define C_0287E4_BASE_ADDR 0xFFFF0000 10187 #define R_0287E8_VGT_DMA_BASE 0x0287E8 10188 #define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0 10189 #define S_0287F0_SOURCE_SELECT(x) (((unsigned)(x) & 0x3) << 0) 10190 #define G_0287F0_SOURCE_SELECT(x) (((x) >> 0) & 0x3) 10191 #define C_0287F0_SOURCE_SELECT 0xFFFFFFFC 10192 #define V_0287F0_DI_SRC_SEL_DMA 0 10193 #define V_0287F0_DI_SRC_SEL_IMMEDIATE 1 10194 #define V_0287F0_DI_SRC_SEL_AUTO_INDEX 2 10195 #define V_0287F0_DI_SRC_SEL_RESERVED 3 10196 #define S_0287F0_MAJOR_MODE(x) (((unsigned)(x) & 0x3) << 2) 10197 #define G_0287F0_MAJOR_MODE(x) (((x) >> 2) & 0x3) 10198 #define C_0287F0_MAJOR_MODE 0xFFFFFFF3 10199 #define V_0287F0_DI_MAJOR_MODE_0 0 10200 #define V_0287F0_DI_MAJOR_MODE_1 1 10201 #define S_0287F0_SPRITE_EN_R6XX(x) (((unsigned)(x) & 0x1) << 4) 10202 #define G_0287F0_SPRITE_EN_R6XX(x) (((x) >> 4) & 0x1) 10203 #define C_0287F0_SPRITE_EN_R6XX 0xFFFFFFEF 10204 #define S_0287F0_NOT_EOP(x) (((unsigned)(x) & 0x1) << 5) 10205 #define G_0287F0_NOT_EOP(x) (((x) >> 5) & 0x1) 10206 #define C_0287F0_NOT_EOP 0xFFFFFFDF 10207 #define S_0287F0_USE_OPAQUE(x) (((unsigned)(x) & 0x1) << 6) 10208 #define G_0287F0_USE_OPAQUE(x) (((x) >> 6) & 0x1) 10209 #define C_0287F0_USE_OPAQUE 0xFFFFFFBF 10210 #define S_0287F0_UNROLLED_INST(x) (((unsigned)(x) & 0x1) << 7) /* gfx9, gfx10 */ 10211 #define G_0287F0_UNROLLED_INST(x) (((x) >> 7) & 0x1) 10212 #define C_0287F0_UNROLLED_INST 0xFFFFFF7F 10213 #define S_0287F0_GRBM_SKEW_NO_DEC(x) (((unsigned)(x) & 0x1) << 8) /* gfx9, gfx10 */ 10214 #define G_0287F0_GRBM_SKEW_NO_DEC(x) (((x) >> 8) & 0x1) 10215 #define C_0287F0_GRBM_SKEW_NO_DEC 0xFFFFFEFF 10216 #define S_0287F0_REG_RT_INDEX(x) (((unsigned)(x) & 0x7) << 29) /* >= gfx9 */ 10217 #define G_0287F0_REG_RT_INDEX(x) (((x) >> 29) & 0x7) 10218 #define C_0287F0_REG_RT_INDEX 0x1FFFFFFF 10219 #define R_0287F4_VGT_IMMED_DATA 0x0287F4 10220 #define R_0287F8_VGT_EVENT_ADDRESS_REG 0x0287F8 10221 #define S_0287F8_ADDRESS_LOW(x) (((unsigned)(x) & 0xFFFFFFF) << 0) 10222 #define G_0287F8_ADDRESS_LOW(x) (((x) >> 0) & 0xFFFFFFF) 10223 #define C_0287F8_ADDRESS_LOW 0xF0000000 10224 #define R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP 0x0287FC /* >= gfx10 */ 10225 #define S_0287FC_MAX_VERTS_PER_SUBGROUP(x) (((unsigned)(x) & 0x3FF) << 0) 10226 #define G_0287FC_MAX_VERTS_PER_SUBGROUP(x) (((x) >> 0) & 0x3FF) 10227 #define C_0287FC_MAX_VERTS_PER_SUBGROUP 0xFFFFFC00 10228 #define R_028800_DB_DEPTH_CONTROL 0x028800 10229 #define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 10230 #define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) 10231 #define C_028800_STENCIL_ENABLE 0xFFFFFFFE 10232 #define S_028800_Z_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 10233 #define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) 10234 #define C_028800_Z_ENABLE 0xFFFFFFFD 10235 #define S_028800_Z_WRITE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 10236 #define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) 10237 #define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB 10238 #define S_028800_DEPTH_BOUNDS_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 10239 #define G_028800_DEPTH_BOUNDS_ENABLE(x) (((x) >> 3) & 0x1) 10240 #define C_028800_DEPTH_BOUNDS_ENABLE 0xFFFFFFF7 10241 #define S_028800_ZFUNC(x) (((unsigned)(x) & 0x7) << 4) 10242 #define G_028800_ZFUNC(x) (((x) >> 4) & 0x7) 10243 #define C_028800_ZFUNC 0xFFFFFF8F 10244 #define V_028800_FRAG_NEVER 0 10245 #define V_028800_FRAG_LESS 1 10246 #define V_028800_FRAG_EQUAL 2 10247 #define V_028800_FRAG_LEQUAL 3 10248 #define V_028800_FRAG_GREATER 4 10249 #define V_028800_FRAG_NOTEQUAL 5 10250 #define V_028800_FRAG_GEQUAL 6 10251 #define V_028800_FRAG_ALWAYS 7 10252 #define S_028800_BACKFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 10253 #define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) 10254 #define C_028800_BACKFACE_ENABLE 0xFFFFFF7F 10255 #define S_028800_STENCILFUNC(x) (((unsigned)(x) & 0x7) << 8) 10256 #define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x7) 10257 #define C_028800_STENCILFUNC 0xFFFFF8FF 10258 #define S_028800_STENCILFUNC_BF(x) (((unsigned)(x) & 0x7) << 20) 10259 #define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x7) 10260 #define C_028800_STENCILFUNC_BF 0xFF8FFFFF 10261 #define S_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((unsigned)(x) & 0x1) << 30) 10262 #define G_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((x) >> 30) & 0x1) 10263 #define C_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL 0xBFFFFFFF 10264 #define S_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((unsigned)(x) & 0x1) << 31) 10265 #define G_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((x) >> 31) & 0x1) 10266 #define C_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS 0x7FFFFFFF 10267 #define R_028804_DB_EQAA 0x028804 10268 #define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) 10269 #define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x7) 10270 #define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8 10271 #define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x7) << 4) 10272 #define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x7) 10273 #define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F 10274 #define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 8) 10275 #define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x7) 10276 #define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF 10277 #define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 12) 10278 #define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x7) 10279 #define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF 10280 #define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) 10281 #define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1) 10282 #define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF 10283 #define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) 10284 #define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1) 10285 #define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF 10286 #define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) 10287 #define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1) 10288 #define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF 10289 #define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) 10290 #define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1) 10291 #define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF 10292 #define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) 10293 #define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1) 10294 #define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF 10295 #define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) 10296 #define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1) 10297 #define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF 10298 #define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x7) << 24) 10299 #define G_028804_OVERRASTERIZATION_AMOUNT(x) (((x) >> 24) & 0x7) 10300 #define C_028804_OVERRASTERIZATION_AMOUNT 0xF8FFFFFF 10301 #define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) 10302 #define G_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) >> 27) & 0x1) 10303 #define C_028804_ENABLE_POSTZ_OVERRASTERIZATION 0xF7FFFFFF 10304 #define R_028808_CB_COLOR_CONTROL 0x028808 10305 #define S_028808_DISABLE_DUAL_QUAD(x) (((unsigned)(x) & 0x1) << 0) /* >= gfx81 */ 10306 #define G_028808_DISABLE_DUAL_QUAD(x) (((x) >> 0) & 0x1) 10307 #define C_028808_DISABLE_DUAL_QUAD 0xFFFFFFFE 10308 #define S_028808_ENABLE_1FRAG_PS_INVOKE(x) (((unsigned)(x) & 0x1) << 1) /* >= gfx103 */ 10309 #define G_028808_ENABLE_1FRAG_PS_INVOKE(x) (((x) >> 1) & 0x1) 10310 #define C_028808_ENABLE_1FRAG_PS_INVOKE 0xFFFFFFFD 10311 #define S_028808_DEGAMMA_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 10312 #define G_028808_DEGAMMA_ENABLE(x) (((x) >> 3) & 0x1) 10313 #define C_028808_DEGAMMA_ENABLE 0xFFFFFFF7 10314 #define S_028808_MODE(x) (((unsigned)(x) & 0x7) << 4) 10315 #define G_028808_MODE(x) (((x) >> 4) & 0x7) 10316 #define C_028808_MODE 0xFFFFFF8F 10317 #define V_028808_CB_DISABLE 0 10318 #define V_028808_CB_NORMAL 1 10319 #define V_028808_CB_ELIMINATE_FAST_CLEAR 2 10320 #define V_028808_CB_RESOLVE 3 10321 #define V_028808_CB_DECOMPRESS 4 10322 #define V_028808_CB_FMASK_DECOMPRESS 5 10323 #define V_028808_CB_DCC_DECOMPRESS 6 /* >= gfx8 */ 10324 #define V_028808_CB_RESERVED 7 /* >= gfx10 */ 10325 #define S_028808_ROP3(x) (((unsigned)(x) & 0xFF) << 16) 10326 #define G_028808_ROP3(x) (((x) >> 16) & 0xFF) 10327 #define C_028808_ROP3 0xFF00FFFF 10328 #define V_028808_ROP3_CLEAR 0 10329 #define V_028808_X_0X05 5 10330 #define V_028808_X_0X0A 10 10331 #define V_028808_X_0X0F 15 10332 #define V_028808_ROP3_NOR 17 10333 #define V_028808_ROP3_AND_INVERTED 34 10334 #define V_028808_ROP3_COPY_INVERTED 51 10335 #define V_028808_ROP3_AND_REVERSE 68 10336 #define V_028808_X_0X50 80 10337 #define V_028808_ROP3_INVERT 85 10338 #define V_028808_X_0X5A 90 10339 #define V_028808_X_0X5F 95 10340 #define V_028808_ROP3_XOR 102 10341 #define V_028808_ROP3_NAND 119 10342 #define V_028808_ROP3_AND 136 10343 #define V_028808_ROP3_EQUIVALENT 153 10344 #define V_028808_X_0XA0 160 10345 #define V_028808_X_0XA5 165 10346 #define V_028808_ROP3_NO_OP 170 10347 #define V_028808_X_0XAF 175 10348 #define V_028808_ROP3_OR_INVERTED 187 10349 #define V_028808_ROP3_COPY 204 10350 #define V_028808_ROP3_OR_REVERSE 221 10351 #define V_028808_ROP3_OR 238 10352 #define V_028808_X_0XF0 240 10353 #define V_028808_X_0XF5 245 10354 #define V_028808_X_0XFA 250 10355 #define V_028808_ROP3_SET 255 10356 #define R_02880C_DB_SHADER_CONTROL 0x02880C 10357 #define S_02880C_Z_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 10358 #define G_02880C_Z_EXPORT_ENABLE(x) (((x) >> 0) & 0x1) 10359 #define C_02880C_Z_EXPORT_ENABLE 0xFFFFFFFE 10360 #define S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 10361 #define G_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((x) >> 1) & 0x1) 10362 #define C_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE 0xFFFFFFFD 10363 #define S_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 10364 #define G_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((x) >> 2) & 0x1) 10365 #define C_02880C_STENCIL_OP_VAL_EXPORT_ENABLE 0xFFFFFFFB 10366 #define S_02880C_Z_ORDER(x) (((unsigned)(x) & 0x3) << 4) 10367 #define G_02880C_Z_ORDER(x) (((x) >> 4) & 0x3) 10368 #define C_02880C_Z_ORDER 0xFFFFFFCF 10369 #define V_02880C_LATE_Z 0 10370 #define V_02880C_EARLY_Z_THEN_LATE_Z 1 10371 #define V_02880C_RE_Z 2 10372 #define V_02880C_EARLY_Z_THEN_RE_Z 3 10373 #define S_02880C_KILL_ENABLE(x) (((unsigned)(x) & 0x1) << 6) 10374 #define G_02880C_KILL_ENABLE(x) (((x) >> 6) & 0x1) 10375 #define C_02880C_KILL_ENABLE 0xFFFFFFBF 10376 #define S_02880C_COVERAGE_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 10377 #define G_02880C_COVERAGE_TO_MASK_ENABLE(x) (((x) >> 7) & 0x1) 10378 #define C_02880C_COVERAGE_TO_MASK_ENABLE 0xFFFFFF7F 10379 #define S_02880C_MASK_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 8) 10380 #define G_02880C_MASK_EXPORT_ENABLE(x) (((x) >> 8) & 0x1) 10381 #define C_02880C_MASK_EXPORT_ENABLE 0xFFFFFEFF 10382 #define S_02880C_EXEC_ON_HIER_FAIL(x) (((unsigned)(x) & 0x1) << 9) 10383 #define G_02880C_EXEC_ON_HIER_FAIL(x) (((x) >> 9) & 0x1) 10384 #define C_02880C_EXEC_ON_HIER_FAIL 0xFFFFFDFF 10385 #define S_02880C_EXEC_ON_NOOP(x) (((unsigned)(x) & 0x1) << 10) 10386 #define G_02880C_EXEC_ON_NOOP(x) (((x) >> 10) & 0x1) 10387 #define C_02880C_EXEC_ON_NOOP 0xFFFFFBFF 10388 #define S_02880C_ALPHA_TO_MASK_DISABLE(x) (((unsigned)(x) & 0x1) << 11) 10389 #define G_02880C_ALPHA_TO_MASK_DISABLE(x) (((x) >> 11) & 0x1) 10390 #define C_02880C_ALPHA_TO_MASK_DISABLE 0xFFFFF7FF 10391 #define S_02880C_DEPTH_BEFORE_SHADER(x) (((unsigned)(x) & 0x1) << 12) 10392 #define G_02880C_DEPTH_BEFORE_SHADER(x) (((x) >> 12) & 0x1) 10393 #define C_02880C_DEPTH_BEFORE_SHADER 0xFFFFEFFF 10394 #define S_02880C_CONSERVATIVE_Z_EXPORT(x) (((unsigned)(x) & 0x3) << 13) 10395 #define G_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) >> 13) & 0x3) 10396 #define C_02880C_CONSERVATIVE_Z_EXPORT 0xFFFF9FFF 10397 #define V_02880C_EXPORT_ANY_Z 0 10398 #define V_02880C_EXPORT_LESS_THAN_Z 1 10399 #define V_02880C_EXPORT_GREATER_THAN_Z 2 10400 #define V_02880C_EXPORT_RESERVED 3 10401 #define S_02880C_DUAL_QUAD_DISABLE(x) (((unsigned)(x) & 0x1) << 15) /* >= gfx81 */ 10402 #define G_02880C_DUAL_QUAD_DISABLE(x) (((x) >> 15) & 0x1) 10403 #define C_02880C_DUAL_QUAD_DISABLE 0xFFFF7FFF 10404 #define S_02880C_PRIMITIVE_ORDERED_PIXEL_SHADER(x) (((unsigned)(x) & 0x1) << 16) /* >= gfx9 */ 10405 #define G_02880C_PRIMITIVE_ORDERED_PIXEL_SHADER(x) (((x) >> 16) & 0x1) 10406 #define C_02880C_PRIMITIVE_ORDERED_PIXEL_SHADER 0xFFFEFFFF 10407 #define S_02880C_EXEC_IF_OVERLAPPED(x) (((unsigned)(x) & 0x1) << 17) /* >= gfx9 */ 10408 #define G_02880C_EXEC_IF_OVERLAPPED(x) (((x) >> 17) & 0x1) 10409 #define C_02880C_EXEC_IF_OVERLAPPED 0xFFFDFFFF 10410 #define S_02880C_POPS_OVERLAP_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 20) /* >= gfx9 */ 10411 #define G_02880C_POPS_OVERLAP_NUM_SAMPLES(x) (((x) >> 20) & 0x7) 10412 #define C_02880C_POPS_OVERLAP_NUM_SAMPLES 0xFF8FFFFF 10413 #define S_02880C_PRE_SHADER_DEPTH_COVERAGE_ENABLE(x) (((unsigned)(x) & 0x1) << 23) /* >= gfx10 */ 10414 #define G_02880C_PRE_SHADER_DEPTH_COVERAGE_ENABLE(x) (((x) >> 23) & 0x1) 10415 #define C_02880C_PRE_SHADER_DEPTH_COVERAGE_ENABLE 0xFF7FFFFF 10416 #define R_028810_PA_CL_CLIP_CNTL 0x028810 10417 #define S_028810_UCP_ENA_0(x) (((unsigned)(x) & 0x1) << 0) 10418 #define G_028810_UCP_ENA_0(x) (((x) >> 0) & 0x1) 10419 #define C_028810_UCP_ENA_0 0xFFFFFFFE 10420 #define S_028810_UCP_ENA_1(x) (((unsigned)(x) & 0x1) << 1) 10421 #define G_028810_UCP_ENA_1(x) (((x) >> 1) & 0x1) 10422 #define C_028810_UCP_ENA_1 0xFFFFFFFD 10423 #define S_028810_UCP_ENA_2(x) (((unsigned)(x) & 0x1) << 2) 10424 #define G_028810_UCP_ENA_2(x) (((x) >> 2) & 0x1) 10425 #define C_028810_UCP_ENA_2 0xFFFFFFFB 10426 #define S_028810_UCP_ENA_3(x) (((unsigned)(x) & 0x1) << 3) 10427 #define G_028810_UCP_ENA_3(x) (((x) >> 3) & 0x1) 10428 #define C_028810_UCP_ENA_3 0xFFFFFFF7 10429 #define S_028810_UCP_ENA_4(x) (((unsigned)(x) & 0x1) << 4) 10430 #define G_028810_UCP_ENA_4(x) (((x) >> 4) & 0x1) 10431 #define C_028810_UCP_ENA_4 0xFFFFFFEF 10432 #define S_028810_UCP_ENA_5(x) (((unsigned)(x) & 0x1) << 5) 10433 #define G_028810_UCP_ENA_5(x) (((x) >> 5) & 0x1) 10434 #define C_028810_UCP_ENA_5 0xFFFFFFDF 10435 #define S_028810_PS_UCP_Y_SCALE_NEG(x) (((unsigned)(x) & 0x1) << 13) 10436 #define G_028810_PS_UCP_Y_SCALE_NEG(x) (((x) >> 13) & 0x1) 10437 #define C_028810_PS_UCP_Y_SCALE_NEG 0xFFFFDFFF 10438 #define S_028810_PS_UCP_MODE(x) (((unsigned)(x) & 0x3) << 14) 10439 #define G_028810_PS_UCP_MODE(x) (((x) >> 14) & 0x3) 10440 #define C_028810_PS_UCP_MODE 0xFFFF3FFF 10441 #define S_028810_CLIP_DISABLE(x) (((unsigned)(x) & 0x1) << 16) 10442 #define G_028810_CLIP_DISABLE(x) (((x) >> 16) & 0x1) 10443 #define C_028810_CLIP_DISABLE 0xFFFEFFFF 10444 #define S_028810_UCP_CULL_ONLY_ENA(x) (((unsigned)(x) & 0x1) << 17) 10445 #define G_028810_UCP_CULL_ONLY_ENA(x) (((x) >> 17) & 0x1) 10446 #define C_028810_UCP_CULL_ONLY_ENA 0xFFFDFFFF 10447 #define S_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((unsigned)(x) & 0x1) << 18) 10448 #define G_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((x) >> 18) & 0x1) 10449 #define C_028810_BOUNDARY_EDGE_FLAG_ENA 0xFFFBFFFF 10450 #define S_028810_DX_CLIP_SPACE_DEF(x) (((unsigned)(x) & 0x1) << 19) 10451 #define G_028810_DX_CLIP_SPACE_DEF(x) (((x) >> 19) & 0x1) 10452 #define C_028810_DX_CLIP_SPACE_DEF 0xFFF7FFFF 10453 #define S_028810_DIS_CLIP_ERR_DETECT(x) (((unsigned)(x) & 0x1) << 20) 10454 #define G_028810_DIS_CLIP_ERR_DETECT(x) (((x) >> 20) & 0x1) 10455 #define C_028810_DIS_CLIP_ERR_DETECT 0xFFEFFFFF 10456 #define S_028810_VTX_KILL_OR(x) (((unsigned)(x) & 0x1) << 21) 10457 #define G_028810_VTX_KILL_OR(x) (((x) >> 21) & 0x1) 10458 #define C_028810_VTX_KILL_OR 0xFFDFFFFF 10459 #define S_028810_DX_RASTERIZATION_KILL(x) (((unsigned)(x) & 0x1) << 22) 10460 #define G_028810_DX_RASTERIZATION_KILL(x) (((x) >> 22) & 0x1) 10461 #define C_028810_DX_RASTERIZATION_KILL 0xFFBFFFFF 10462 #define S_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((unsigned)(x) & 0x1) << 24) 10463 #define G_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) >> 24) & 0x1) 10464 #define C_028810_DX_LINEAR_ATTR_CLIP_ENA 0xFEFFFFFF 10465 #define S_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((unsigned)(x) & 0x1) << 25) 10466 #define G_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((x) >> 25) & 0x1) 10467 #define C_028810_VTE_VPORT_PROVOKE_DISABLE 0xFDFFFFFF 10468 #define S_028810_ZCLIP_NEAR_DISABLE(x) (((unsigned)(x) & 0x1) << 26) 10469 #define G_028810_ZCLIP_NEAR_DISABLE(x) (((x) >> 26) & 0x1) 10470 #define C_028810_ZCLIP_NEAR_DISABLE 0xFBFFFFFF 10471 #define S_028810_ZCLIP_FAR_DISABLE(x) (((unsigned)(x) & 0x1) << 27) 10472 #define G_028810_ZCLIP_FAR_DISABLE(x) (((x) >> 27) & 0x1) 10473 #define C_028810_ZCLIP_FAR_DISABLE 0xF7FFFFFF 10474 #define S_028810_ZCLIP_PROG_NEAR_ENA(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx9 */ 10475 #define G_028810_ZCLIP_PROG_NEAR_ENA(x) (((x) >> 28) & 0x1) 10476 #define C_028810_ZCLIP_PROG_NEAR_ENA 0xEFFFFFFF 10477 #define R_028814_PA_SU_SC_MODE_CNTL 0x028814 10478 #define S_028814_CULL_FRONT(x) (((unsigned)(x) & 0x1) << 0) 10479 #define G_028814_CULL_FRONT(x) (((x) >> 0) & 0x1) 10480 #define C_028814_CULL_FRONT 0xFFFFFFFE 10481 #define S_028814_CULL_BACK(x) (((unsigned)(x) & 0x1) << 1) 10482 #define G_028814_CULL_BACK(x) (((x) >> 1) & 0x1) 10483 #define C_028814_CULL_BACK 0xFFFFFFFD 10484 #define S_028814_FACE(x) (((unsigned)(x) & 0x1) << 2) 10485 #define G_028814_FACE(x) (((x) >> 2) & 0x1) 10486 #define C_028814_FACE 0xFFFFFFFB 10487 #define S_028814_POLY_MODE(x) (((unsigned)(x) & 0x3) << 3) 10488 #define G_028814_POLY_MODE(x) (((x) >> 3) & 0x3) 10489 #define C_028814_POLY_MODE 0xFFFFFFE7 10490 #define V_028814_X_DISABLE_POLY_MODE 0 10491 #define V_028814_X_DUAL_MODE 1 10492 #define S_028814_POLYMODE_FRONT_PTYPE(x) (((unsigned)(x) & 0x7) << 5) 10493 #define G_028814_POLYMODE_FRONT_PTYPE(x) (((x) >> 5) & 0x7) 10494 #define C_028814_POLYMODE_FRONT_PTYPE 0xFFFFFF1F 10495 #define V_028814_X_DRAW_POINTS 0 10496 #define V_028814_X_DRAW_LINES 1 10497 #define V_028814_X_DRAW_TRIANGLES 2 10498 #define S_028814_POLYMODE_BACK_PTYPE(x) (((unsigned)(x) & 0x7) << 8) 10499 #define G_028814_POLYMODE_BACK_PTYPE(x) (((x) >> 8) & 0x7) 10500 #define C_028814_POLYMODE_BACK_PTYPE 0xFFFFF8FF 10501 #define S_028814_POLY_OFFSET_FRONT_ENABLE(x) (((unsigned)(x) & 0x1) << 11) 10502 #define G_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) >> 11) & 0x1) 10503 #define C_028814_POLY_OFFSET_FRONT_ENABLE 0xFFFFF7FF 10504 #define S_028814_POLY_OFFSET_BACK_ENABLE(x) (((unsigned)(x) & 0x1) << 12) 10505 #define G_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) >> 12) & 0x1) 10506 #define C_028814_POLY_OFFSET_BACK_ENABLE 0xFFFFEFFF 10507 #define S_028814_POLY_OFFSET_PARA_ENABLE(x) (((unsigned)(x) & 0x1) << 13) 10508 #define G_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) >> 13) & 0x1) 10509 #define C_028814_POLY_OFFSET_PARA_ENABLE 0xFFFFDFFF 10510 #define S_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((unsigned)(x) & 0x1) << 16) 10511 #define G_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) >> 16) & 0x1) 10512 #define C_028814_VTX_WINDOW_OFFSET_ENABLE 0xFFFEFFFF 10513 #define S_028814_PROVOKING_VTX_LAST(x) (((unsigned)(x) & 0x1) << 19) 10514 #define G_028814_PROVOKING_VTX_LAST(x) (((x) >> 19) & 0x1) 10515 #define C_028814_PROVOKING_VTX_LAST 0xFFF7FFFF 10516 #define S_028814_PERSP_CORR_DIS(x) (((unsigned)(x) & 0x1) << 20) 10517 #define G_028814_PERSP_CORR_DIS(x) (((x) >> 20) & 0x1) 10518 #define C_028814_PERSP_CORR_DIS 0xFFEFFFFF 10519 #define S_028814_MULTI_PRIM_IB_ENA(x) (((unsigned)(x) & 0x1) << 21) 10520 #define G_028814_MULTI_PRIM_IB_ENA(x) (((x) >> 21) & 0x1) 10521 #define C_028814_MULTI_PRIM_IB_ENA 0xFFDFFFFF 10522 #define S_028814_RIGHT_TRIANGLE_ALTERNATE_GRADIENT_REF(x) (((unsigned)(x) & 0x1) << 22) /* >= gfx9 */ 10523 #define G_028814_RIGHT_TRIANGLE_ALTERNATE_GRADIENT_REF(x) (((x) >> 22) & 0x1) 10524 #define C_028814_RIGHT_TRIANGLE_ALTERNATE_GRADIENT_REF 0xFFBFFFFF 10525 #define S_028814_NEW_QUAD_DECOMPOSITION(x) (((unsigned)(x) & 0x1) << 23) /* >= gfx9 */ 10526 #define G_028814_NEW_QUAD_DECOMPOSITION(x) (((x) >> 23) & 0x1) 10527 #define C_028814_NEW_QUAD_DECOMPOSITION 0xFF7FFFFF 10528 #define S_028814_KEEP_TOGETHER_ENABLE(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx10 */ 10529 #define G_028814_KEEP_TOGETHER_ENABLE(x) (((x) >> 24) & 0x1) 10530 #define C_028814_KEEP_TOGETHER_ENABLE 0xFEFFFFFF 10531 #define R_028818_PA_CL_VTE_CNTL 0x028818 10532 #define S_028818_VPORT_X_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 0) 10533 #define G_028818_VPORT_X_SCALE_ENA(x) (((x) >> 0) & 0x1) 10534 #define C_028818_VPORT_X_SCALE_ENA 0xFFFFFFFE 10535 #define S_028818_VPORT_X_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 1) 10536 #define G_028818_VPORT_X_OFFSET_ENA(x) (((x) >> 1) & 0x1) 10537 #define C_028818_VPORT_X_OFFSET_ENA 0xFFFFFFFD 10538 #define S_028818_VPORT_Y_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 2) 10539 #define G_028818_VPORT_Y_SCALE_ENA(x) (((x) >> 2) & 0x1) 10540 #define C_028818_VPORT_Y_SCALE_ENA 0xFFFFFFFB 10541 #define S_028818_VPORT_Y_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 3) 10542 #define G_028818_VPORT_Y_OFFSET_ENA(x) (((x) >> 3) & 0x1) 10543 #define C_028818_VPORT_Y_OFFSET_ENA 0xFFFFFFF7 10544 #define S_028818_VPORT_Z_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 4) 10545 #define G_028818_VPORT_Z_SCALE_ENA(x) (((x) >> 4) & 0x1) 10546 #define C_028818_VPORT_Z_SCALE_ENA 0xFFFFFFEF 10547 #define S_028818_VPORT_Z_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 5) 10548 #define G_028818_VPORT_Z_OFFSET_ENA(x) (((x) >> 5) & 0x1) 10549 #define C_028818_VPORT_Z_OFFSET_ENA 0xFFFFFFDF 10550 #define S_028818_VTX_XY_FMT(x) (((unsigned)(x) & 0x1) << 8) 10551 #define G_028818_VTX_XY_FMT(x) (((x) >> 8) & 0x1) 10552 #define C_028818_VTX_XY_FMT 0xFFFFFEFF 10553 #define S_028818_VTX_Z_FMT(x) (((unsigned)(x) & 0x1) << 9) 10554 #define G_028818_VTX_Z_FMT(x) (((x) >> 9) & 0x1) 10555 #define C_028818_VTX_Z_FMT 0xFFFFFDFF 10556 #define S_028818_VTX_W0_FMT(x) (((unsigned)(x) & 0x1) << 10) 10557 #define G_028818_VTX_W0_FMT(x) (((x) >> 10) & 0x1) 10558 #define C_028818_VTX_W0_FMT 0xFFFFFBFF 10559 #define S_028818_PERFCOUNTER_REF(x) (((unsigned)(x) & 0x1) << 11) 10560 #define G_028818_PERFCOUNTER_REF(x) (((x) >> 11) & 0x1) 10561 #define C_028818_PERFCOUNTER_REF 0xFFFFF7FF 10562 #define R_02881C_PA_CL_VS_OUT_CNTL 0x02881C 10563 #define S_02881C_CLIP_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 0) 10564 #define G_02881C_CLIP_DIST_ENA_0(x) (((x) >> 0) & 0x1) 10565 #define C_02881C_CLIP_DIST_ENA_0 0xFFFFFFFE 10566 #define S_02881C_CLIP_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 1) 10567 #define G_02881C_CLIP_DIST_ENA_1(x) (((x) >> 1) & 0x1) 10568 #define C_02881C_CLIP_DIST_ENA_1 0xFFFFFFFD 10569 #define S_02881C_CLIP_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 2) 10570 #define G_02881C_CLIP_DIST_ENA_2(x) (((x) >> 2) & 0x1) 10571 #define C_02881C_CLIP_DIST_ENA_2 0xFFFFFFFB 10572 #define S_02881C_CLIP_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 3) 10573 #define G_02881C_CLIP_DIST_ENA_3(x) (((x) >> 3) & 0x1) 10574 #define C_02881C_CLIP_DIST_ENA_3 0xFFFFFFF7 10575 #define S_02881C_CLIP_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 4) 10576 #define G_02881C_CLIP_DIST_ENA_4(x) (((x) >> 4) & 0x1) 10577 #define C_02881C_CLIP_DIST_ENA_4 0xFFFFFFEF 10578 #define S_02881C_CLIP_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 5) 10579 #define G_02881C_CLIP_DIST_ENA_5(x) (((x) >> 5) & 0x1) 10580 #define C_02881C_CLIP_DIST_ENA_5 0xFFFFFFDF 10581 #define S_02881C_CLIP_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 6) 10582 #define G_02881C_CLIP_DIST_ENA_6(x) (((x) >> 6) & 0x1) 10583 #define C_02881C_CLIP_DIST_ENA_6 0xFFFFFFBF 10584 #define S_02881C_CLIP_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 7) 10585 #define G_02881C_CLIP_DIST_ENA_7(x) (((x) >> 7) & 0x1) 10586 #define C_02881C_CLIP_DIST_ENA_7 0xFFFFFF7F 10587 #define S_02881C_CULL_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 8) 10588 #define G_02881C_CULL_DIST_ENA_0(x) (((x) >> 8) & 0x1) 10589 #define C_02881C_CULL_DIST_ENA_0 0xFFFFFEFF 10590 #define S_02881C_CULL_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 9) 10591 #define G_02881C_CULL_DIST_ENA_1(x) (((x) >> 9) & 0x1) 10592 #define C_02881C_CULL_DIST_ENA_1 0xFFFFFDFF 10593 #define S_02881C_CULL_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 10) 10594 #define G_02881C_CULL_DIST_ENA_2(x) (((x) >> 10) & 0x1) 10595 #define C_02881C_CULL_DIST_ENA_2 0xFFFFFBFF 10596 #define S_02881C_CULL_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 11) 10597 #define G_02881C_CULL_DIST_ENA_3(x) (((x) >> 11) & 0x1) 10598 #define C_02881C_CULL_DIST_ENA_3 0xFFFFF7FF 10599 #define S_02881C_CULL_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 12) 10600 #define G_02881C_CULL_DIST_ENA_4(x) (((x) >> 12) & 0x1) 10601 #define C_02881C_CULL_DIST_ENA_4 0xFFFFEFFF 10602 #define S_02881C_CULL_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 13) 10603 #define G_02881C_CULL_DIST_ENA_5(x) (((x) >> 13) & 0x1) 10604 #define C_02881C_CULL_DIST_ENA_5 0xFFFFDFFF 10605 #define S_02881C_CULL_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 14) 10606 #define G_02881C_CULL_DIST_ENA_6(x) (((x) >> 14) & 0x1) 10607 #define C_02881C_CULL_DIST_ENA_6 0xFFFFBFFF 10608 #define S_02881C_CULL_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 15) 10609 #define G_02881C_CULL_DIST_ENA_7(x) (((x) >> 15) & 0x1) 10610 #define C_02881C_CULL_DIST_ENA_7 0xFFFF7FFF 10611 #define S_02881C_USE_VTX_POINT_SIZE(x) (((unsigned)(x) & 0x1) << 16) 10612 #define G_02881C_USE_VTX_POINT_SIZE(x) (((x) >> 16) & 0x1) 10613 #define C_02881C_USE_VTX_POINT_SIZE 0xFFFEFFFF 10614 #define S_02881C_USE_VTX_EDGE_FLAG(x) (((unsigned)(x) & 0x1) << 17) 10615 #define G_02881C_USE_VTX_EDGE_FLAG(x) (((x) >> 17) & 0x1) 10616 #define C_02881C_USE_VTX_EDGE_FLAG 0xFFFDFFFF 10617 #define S_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((unsigned)(x) & 0x1) << 18) 10618 #define G_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((x) >> 18) & 0x1) 10619 #define C_02881C_USE_VTX_RENDER_TARGET_INDX 0xFFFBFFFF 10620 #define S_02881C_USE_VTX_VIEWPORT_INDX(x) (((unsigned)(x) & 0x1) << 19) 10621 #define G_02881C_USE_VTX_VIEWPORT_INDX(x) (((x) >> 19) & 0x1) 10622 #define C_02881C_USE_VTX_VIEWPORT_INDX 0xFFF7FFFF 10623 #define S_02881C_USE_VTX_KILL_FLAG(x) (((unsigned)(x) & 0x1) << 20) 10624 #define G_02881C_USE_VTX_KILL_FLAG(x) (((x) >> 20) & 0x1) 10625 #define C_02881C_USE_VTX_KILL_FLAG 0xFFEFFFFF 10626 #define S_02881C_VS_OUT_MISC_VEC_ENA(x) (((unsigned)(x) & 0x1) << 21) 10627 #define G_02881C_VS_OUT_MISC_VEC_ENA(x) (((x) >> 21) & 0x1) 10628 #define C_02881C_VS_OUT_MISC_VEC_ENA 0xFFDFFFFF 10629 #define S_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((unsigned)(x) & 0x1) << 22) 10630 #define G_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((x) >> 22) & 0x1) 10631 #define C_02881C_VS_OUT_CCDIST0_VEC_ENA 0xFFBFFFFF 10632 #define S_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((unsigned)(x) & 0x1) << 23) 10633 #define G_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((x) >> 23) & 0x1) 10634 #define C_02881C_VS_OUT_CCDIST1_VEC_ENA 0xFF7FFFFF 10635 #define S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((unsigned)(x) & 0x1) << 24) 10636 #define G_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((x) >> 24) & 0x1) 10637 #define C_02881C_VS_OUT_MISC_SIDE_BUS_ENA 0xFEFFFFFF 10638 #define S_02881C_USE_VTX_GS_CUT_FLAG(x) (((unsigned)(x) & 0x1) << 25) 10639 #define G_02881C_USE_VTX_GS_CUT_FLAG(x) (((x) >> 25) & 0x1) 10640 #define C_02881C_USE_VTX_GS_CUT_FLAG 0xFDFFFFFF 10641 #define S_02881C_USE_VTX_LINE_WIDTH_GFX8(x) (((unsigned)(x) & 0x1) << 26) /* gfx8, gfx81, gfx9 */ 10642 #define G_02881C_USE_VTX_LINE_WIDTH_GFX8(x) (((x) >> 26) & 0x1) 10643 #define C_02881C_USE_VTX_LINE_WIDTH_GFX8 0xFBFFFFFF 10644 #define S_02881C_USE_VTX_SHD_OBJPRIM_ID_GFX10(x) (((unsigned)(x) & 0x1) << 26) /* gfx10 */ 10645 #define G_02881C_USE_VTX_SHD_OBJPRIM_ID_GFX10(x) (((x) >> 26) & 0x1) 10646 #define C_02881C_USE_VTX_SHD_OBJPRIM_ID_GFX10 0xFBFFFFFF 10647 #define S_02881C_USE_VTX_LINE_WIDTH_GFX10(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 10648 #define G_02881C_USE_VTX_LINE_WIDTH_GFX10(x) (((x) >> 27) & 0x1) 10649 #define C_02881C_USE_VTX_LINE_WIDTH_GFX10 0xF7FFFFFF 10650 #define S_02881C_USE_VTX_SHD_OBJPRIM_ID_GFX9(x) (((unsigned)(x) & 0x1) << 27) /* gfx9 */ 10651 #define G_02881C_USE_VTX_SHD_OBJPRIM_ID_GFX9(x) (((x) >> 27) & 0x1) 10652 #define C_02881C_USE_VTX_SHD_OBJPRIM_ID_GFX9 0xF7FFFFFF 10653 #define S_02881C_USE_VTX_VRS_RATE(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx103 */ 10654 #define G_02881C_USE_VTX_VRS_RATE(x) (((x) >> 28) & 0x1) 10655 #define C_02881C_USE_VTX_VRS_RATE 0xEFFFFFFF 10656 #define S_02881C_BYPASS_VTX_RATE_COMBINER(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx103 */ 10657 #define G_02881C_BYPASS_VTX_RATE_COMBINER(x) (((x) >> 29) & 0x1) 10658 #define C_02881C_BYPASS_VTX_RATE_COMBINER 0xDFFFFFFF 10659 #define S_02881C_BYPASS_PRIM_RATE_COMBINER(x) (((unsigned)(x) & 0x1) << 30) /* >= gfx103 */ 10660 #define G_02881C_BYPASS_PRIM_RATE_COMBINER(x) (((x) >> 30) & 0x1) 10661 #define C_02881C_BYPASS_PRIM_RATE_COMBINER 0xBFFFFFFF 10662 #define R_028820_PA_CL_NANINF_CNTL 0x028820 10663 #define S_028820_VTE_XY_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 0) 10664 #define G_028820_VTE_XY_INF_DISCARD(x) (((x) >> 0) & 0x1) 10665 #define C_028820_VTE_XY_INF_DISCARD 0xFFFFFFFE 10666 #define S_028820_VTE_Z_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 1) 10667 #define G_028820_VTE_Z_INF_DISCARD(x) (((x) >> 1) & 0x1) 10668 #define C_028820_VTE_Z_INF_DISCARD 0xFFFFFFFD 10669 #define S_028820_VTE_W_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 2) 10670 #define G_028820_VTE_W_INF_DISCARD(x) (((x) >> 2) & 0x1) 10671 #define C_028820_VTE_W_INF_DISCARD 0xFFFFFFFB 10672 #define S_028820_VTE_0XNANINF_IS_0(x) (((unsigned)(x) & 0x1) << 3) 10673 #define G_028820_VTE_0XNANINF_IS_0(x) (((x) >> 3) & 0x1) 10674 #define C_028820_VTE_0XNANINF_IS_0 0xFFFFFFF7 10675 #define S_028820_VTE_XY_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 4) 10676 #define G_028820_VTE_XY_NAN_RETAIN(x) (((x) >> 4) & 0x1) 10677 #define C_028820_VTE_XY_NAN_RETAIN 0xFFFFFFEF 10678 #define S_028820_VTE_Z_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 5) 10679 #define G_028820_VTE_Z_NAN_RETAIN(x) (((x) >> 5) & 0x1) 10680 #define C_028820_VTE_Z_NAN_RETAIN 0xFFFFFFDF 10681 #define S_028820_VTE_W_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 6) 10682 #define G_028820_VTE_W_NAN_RETAIN(x) (((x) >> 6) & 0x1) 10683 #define C_028820_VTE_W_NAN_RETAIN 0xFFFFFFBF 10684 #define S_028820_VTE_W_RECIP_NAN_IS_0(x) (((unsigned)(x) & 0x1) << 7) 10685 #define G_028820_VTE_W_RECIP_NAN_IS_0(x) (((x) >> 7) & 0x1) 10686 #define C_028820_VTE_W_RECIP_NAN_IS_0 0xFFFFFF7F 10687 #define S_028820_VS_XY_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 8) 10688 #define G_028820_VS_XY_NAN_TO_INF(x) (((x) >> 8) & 0x1) 10689 #define C_028820_VS_XY_NAN_TO_INF 0xFFFFFEFF 10690 #define S_028820_VS_XY_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 9) 10691 #define G_028820_VS_XY_INF_RETAIN(x) (((x) >> 9) & 0x1) 10692 #define C_028820_VS_XY_INF_RETAIN 0xFFFFFDFF 10693 #define S_028820_VS_Z_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 10) 10694 #define G_028820_VS_Z_NAN_TO_INF(x) (((x) >> 10) & 0x1) 10695 #define C_028820_VS_Z_NAN_TO_INF 0xFFFFFBFF 10696 #define S_028820_VS_Z_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 11) 10697 #define G_028820_VS_Z_INF_RETAIN(x) (((x) >> 11) & 0x1) 10698 #define C_028820_VS_Z_INF_RETAIN 0xFFFFF7FF 10699 #define S_028820_VS_W_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 12) 10700 #define G_028820_VS_W_NAN_TO_INF(x) (((x) >> 12) & 0x1) 10701 #define C_028820_VS_W_NAN_TO_INF 0xFFFFEFFF 10702 #define S_028820_VS_W_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 13) 10703 #define G_028820_VS_W_INF_RETAIN(x) (((x) >> 13) & 0x1) 10704 #define C_028820_VS_W_INF_RETAIN 0xFFFFDFFF 10705 #define S_028820_VS_CLIP_DIST_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 14) 10706 #define G_028820_VS_CLIP_DIST_INF_DISCARD(x) (((x) >> 14) & 0x1) 10707 #define C_028820_VS_CLIP_DIST_INF_DISCARD 0xFFFFBFFF 10708 #define S_028820_VTE_NO_OUTPUT_NEG_0(x) (((unsigned)(x) & 0x1) << 20) 10709 #define G_028820_VTE_NO_OUTPUT_NEG_0(x) (((x) >> 20) & 0x1) 10710 #define C_028820_VTE_NO_OUTPUT_NEG_0 0xFFEFFFFF 10711 #define R_028824_PA_SU_LINE_STIPPLE_CNTL 0x028824 10712 #define S_028824_LINE_STIPPLE_RESET(x) (((unsigned)(x) & 0x3) << 0) 10713 #define G_028824_LINE_STIPPLE_RESET(x) (((x) >> 0) & 0x3) 10714 #define C_028824_LINE_STIPPLE_RESET 0xFFFFFFFC 10715 #define S_028824_EXPAND_FULL_LENGTH(x) (((unsigned)(x) & 0x1) << 2) 10716 #define G_028824_EXPAND_FULL_LENGTH(x) (((x) >> 2) & 0x1) 10717 #define C_028824_EXPAND_FULL_LENGTH 0xFFFFFFFB 10718 #define S_028824_FRACTIONAL_ACCUM(x) (((unsigned)(x) & 0x1) << 3) 10719 #define G_028824_FRACTIONAL_ACCUM(x) (((x) >> 3) & 0x1) 10720 #define C_028824_FRACTIONAL_ACCUM 0xFFFFFFF7 10721 #define S_028824_DIAMOND_ADJUST(x) (((unsigned)(x) & 0x1) << 4) 10722 #define G_028824_DIAMOND_ADJUST(x) (((x) >> 4) & 0x1) 10723 #define C_028824_DIAMOND_ADJUST 0xFFFFFFEF 10724 #define R_028828_PA_SU_LINE_STIPPLE_SCALE 0x028828 10725 #define R_02882C_PA_SU_PRIM_FILTER_CNTL 0x02882C 10726 #define S_02882C_TRIANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 10727 #define G_02882C_TRIANGLE_FILTER_DISABLE(x) (((x) >> 0) & 0x1) 10728 #define C_02882C_TRIANGLE_FILTER_DISABLE 0xFFFFFFFE 10729 #define S_02882C_LINE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 10730 #define G_02882C_LINE_FILTER_DISABLE(x) (((x) >> 1) & 0x1) 10731 #define C_02882C_LINE_FILTER_DISABLE 0xFFFFFFFD 10732 #define S_02882C_POINT_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 2) 10733 #define G_02882C_POINT_FILTER_DISABLE(x) (((x) >> 2) & 0x1) 10734 #define C_02882C_POINT_FILTER_DISABLE 0xFFFFFFFB 10735 #define S_02882C_RECTANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 3) 10736 #define G_02882C_RECTANGLE_FILTER_DISABLE(x) (((x) >> 3) & 0x1) 10737 #define C_02882C_RECTANGLE_FILTER_DISABLE 0xFFFFFFF7 10738 #define S_02882C_TRIANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 4) 10739 #define G_02882C_TRIANGLE_EXPAND_ENA(x) (((x) >> 4) & 0x1) 10740 #define C_02882C_TRIANGLE_EXPAND_ENA 0xFFFFFFEF 10741 #define S_02882C_LINE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 5) 10742 #define G_02882C_LINE_EXPAND_ENA(x) (((x) >> 5) & 0x1) 10743 #define C_02882C_LINE_EXPAND_ENA 0xFFFFFFDF 10744 #define S_02882C_POINT_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 6) 10745 #define G_02882C_POINT_EXPAND_ENA(x) (((x) >> 6) & 0x1) 10746 #define C_02882C_POINT_EXPAND_ENA 0xFFFFFFBF 10747 #define S_02882C_RECTANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 7) 10748 #define G_02882C_RECTANGLE_EXPAND_ENA(x) (((x) >> 7) & 0x1) 10749 #define C_02882C_RECTANGLE_EXPAND_ENA 0xFFFFFF7F 10750 #define S_02882C_PRIM_EXPAND_CONSTANT(x) (((unsigned)(x) & 0xFF) << 8) 10751 #define G_02882C_PRIM_EXPAND_CONSTANT(x) (((x) >> 8) & 0xFF) 10752 #define C_02882C_PRIM_EXPAND_CONSTANT 0xFFFF00FF 10753 #define S_02882C_XMAX_RIGHT_EXCLUSION(x) (((unsigned)(x) & 0x1) << 30) 10754 #define G_02882C_XMAX_RIGHT_EXCLUSION(x) (((x) >> 30) & 0x1) 10755 #define C_02882C_XMAX_RIGHT_EXCLUSION 0xBFFFFFFF 10756 #define S_02882C_YMAX_BOTTOM_EXCLUSION(x) (((unsigned)(x) & 0x1) << 31) 10757 #define G_02882C_YMAX_BOTTOM_EXCLUSION(x) (((x) >> 31) & 0x1) 10758 #define C_02882C_YMAX_BOTTOM_EXCLUSION 0x7FFFFFFF 10759 #define R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL 0x028830 /* >= gfx9 */ 10760 #define S_028830_SMALL_PRIM_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 10761 #define G_028830_SMALL_PRIM_FILTER_ENABLE(x) (((x) >> 0) & 0x1) 10762 #define C_028830_SMALL_PRIM_FILTER_ENABLE 0xFFFFFFFE 10763 #define S_028830_TRIANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 10764 #define G_028830_TRIANGLE_FILTER_DISABLE(x) (((x) >> 1) & 0x1) 10765 #define C_028830_TRIANGLE_FILTER_DISABLE 0xFFFFFFFD 10766 #define S_028830_LINE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 2) 10767 #define G_028830_LINE_FILTER_DISABLE(x) (((x) >> 2) & 0x1) 10768 #define C_028830_LINE_FILTER_DISABLE 0xFFFFFFFB 10769 #define S_028830_POINT_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 3) 10770 #define G_028830_POINT_FILTER_DISABLE(x) (((x) >> 3) & 0x1) 10771 #define C_028830_POINT_FILTER_DISABLE 0xFFFFFFF7 10772 #define S_028830_RECTANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 4) 10773 #define G_028830_RECTANGLE_FILTER_DISABLE(x) (((x) >> 4) & 0x1) 10774 #define C_028830_RECTANGLE_FILTER_DISABLE 0xFFFFFFEF 10775 #define S_028830_SRBSL_ENABLE(x) (((unsigned)(x) & 0x1) << 5) /* gfx10 */ 10776 #define G_028830_SRBSL_ENABLE(x) (((x) >> 5) & 0x1) 10777 #define C_028830_SRBSL_ENABLE 0xFFFFFFDF 10778 #define S_028830_SC_1XMSAA_COMPATIBLE_DISABLE(x) (((unsigned)(x) & 0x1) << 6) /* gfx9, gfx10 */ 10779 #define G_028830_SC_1XMSAA_COMPATIBLE_DISABLE(x) (((x) >> 6) & 0x1) 10780 #define C_028830_SC_1XMSAA_COMPATIBLE_DISABLE 0xFFFFFFBF 10781 #define R_028834_PA_CL_OBJPRIM_ID_CNTL 0x028834 /* gfx9, gfx10 */ 10782 #define S_028834_OBJ_ID_SEL(x) (((unsigned)(x) & 0x1) << 0) 10783 #define G_028834_OBJ_ID_SEL(x) (((x) >> 0) & 0x1) 10784 #define C_028834_OBJ_ID_SEL 0xFFFFFFFE 10785 #define S_028834_ADD_PIPED_PRIM_ID(x) (((unsigned)(x) & 0x1) << 1) 10786 #define G_028834_ADD_PIPED_PRIM_ID(x) (((x) >> 1) & 0x1) 10787 #define C_028834_ADD_PIPED_PRIM_ID 0xFFFFFFFD 10788 #define S_028834_EN_32BIT_OBJPRIMID(x) (((unsigned)(x) & 0x1) << 2) /* gfx9 */ 10789 #define G_028834_EN_32BIT_OBJPRIMID(x) (((x) >> 2) & 0x1) 10790 #define C_028834_EN_32BIT_OBJPRIMID 0xFFFFFFFB 10791 #define R_028838_PA_CL_NGG_CNTL 0x028838 /* >= gfx9 */ 10792 #define S_028838_VERTEX_REUSE_OFF(x) (((unsigned)(x) & 0x1) << 0) 10793 #define G_028838_VERTEX_REUSE_OFF(x) (((x) >> 0) & 0x1) 10794 #define C_028838_VERTEX_REUSE_OFF 0xFFFFFFFE 10795 #define S_028838_INDEX_BUF_EDGE_FLAG_ENA(x) (((unsigned)(x) & 0x1) << 1) 10796 #define G_028838_INDEX_BUF_EDGE_FLAG_ENA(x) (((x) >> 1) & 0x1) 10797 #define C_028838_INDEX_BUF_EDGE_FLAG_ENA 0xFFFFFFFD 10798 #define S_028838_VERTEX_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 2) /* >= gfx103 */ 10799 #define G_028838_VERTEX_REUSE_DEPTH(x) (((x) >> 2) & 0xFF) 10800 #define C_028838_VERTEX_REUSE_DEPTH 0xFFFFFC03 10801 #define R_02883C_PA_SU_OVER_RASTERIZATION_CNTL 0x02883C /* >= gfx9 */ 10802 #define S_02883C_DISCARD_0_AREA_TRIANGLES(x) (((unsigned)(x) & 0x1) << 0) 10803 #define G_02883C_DISCARD_0_AREA_TRIANGLES(x) (((x) >> 0) & 0x1) 10804 #define C_02883C_DISCARD_0_AREA_TRIANGLES 0xFFFFFFFE 10805 #define S_02883C_DISCARD_0_AREA_LINES(x) (((unsigned)(x) & 0x1) << 1) 10806 #define G_02883C_DISCARD_0_AREA_LINES(x) (((x) >> 1) & 0x1) 10807 #define C_02883C_DISCARD_0_AREA_LINES 0xFFFFFFFD 10808 #define S_02883C_DISCARD_0_AREA_POINTS(x) (((unsigned)(x) & 0x1) << 2) 10809 #define G_02883C_DISCARD_0_AREA_POINTS(x) (((x) >> 2) & 0x1) 10810 #define C_02883C_DISCARD_0_AREA_POINTS 0xFFFFFFFB 10811 #define S_02883C_DISCARD_0_AREA_RECTANGLES(x) (((unsigned)(x) & 0x1) << 3) 10812 #define G_02883C_DISCARD_0_AREA_RECTANGLES(x) (((x) >> 3) & 0x1) 10813 #define C_02883C_DISCARD_0_AREA_RECTANGLES 0xFFFFFFF7 10814 #define S_02883C_USE_PROVOKING_ZW(x) (((unsigned)(x) & 0x1) << 4) 10815 #define G_02883C_USE_PROVOKING_ZW(x) (((x) >> 4) & 0x1) 10816 #define C_02883C_USE_PROVOKING_ZW 0xFFFFFFEF 10817 #define R_028840_PA_STEREO_CNTL 0x028840 /* >= gfx9 */ 10818 #define S_028840_EN_STEREO(x) (((unsigned)(x) & 0x1) << 0) /* gfx9 */ 10819 #define G_028840_EN_STEREO(x) (((x) >> 0) & 0x1) 10820 #define C_028840_EN_STEREO 0xFFFFFFFE 10821 #define S_028840_STEREO_MODE(x) (((unsigned)(x) & 0xF) << 1) 10822 #define G_028840_STEREO_MODE(x) (((x) >> 1) & 0xF) 10823 #define C_028840_STEREO_MODE 0xFFFFFFE1 10824 #define S_028840_RT_SLICE_MODE(x) (((unsigned)(x) & 0x7) << 5) 10825 #define G_028840_RT_SLICE_MODE(x) (((x) >> 5) & 0x7) 10826 #define C_028840_RT_SLICE_MODE 0xFFFFFF1F 10827 #define S_028840_RT_SLICE_OFFSET_GFX10(x) (((unsigned)(x) & 0xF) << 8) /* >= gfx10 */ 10828 #define G_028840_RT_SLICE_OFFSET_GFX10(x) (((x) >> 8) & 0xF) 10829 #define C_028840_RT_SLICE_OFFSET_GFX10 0xFFFFF0FF 10830 #define S_028840_RT_SLICE_OFFSET_GFX9(x) (((unsigned)(x) & 0x3) << 8) /* gfx9 */ 10831 #define G_028840_RT_SLICE_OFFSET_GFX9(x) (((x) >> 8) & 0x3) 10832 #define C_028840_RT_SLICE_OFFSET_GFX9 0xFFFFFCFF 10833 #define S_028840_VP_ID_MODE_GFX9(x) (((unsigned)(x) & 0x7) << 10) /* gfx9 */ 10834 #define G_028840_VP_ID_MODE_GFX9(x) (((x) >> 10) & 0x7) 10835 #define C_028840_VP_ID_MODE_GFX9 0xFFFFE3FF 10836 #define S_028840_VP_ID_OFFSET_GFX9(x) (((unsigned)(x) & 0xF) << 13) /* gfx9 */ 10837 #define G_028840_VP_ID_OFFSET_GFX9(x) (((x) >> 13) & 0xF) 10838 #define C_028840_VP_ID_OFFSET_GFX9 0xFFFE1FFF 10839 #define S_028840_VP_ID_MODE_GFX10(x) (((unsigned)(x) & 0x7) << 16) /* >= gfx10 */ 10840 #define G_028840_VP_ID_MODE_GFX10(x) (((x) >> 16) & 0x7) 10841 #define C_028840_VP_ID_MODE_GFX10 0xFFF8FFFF 10842 #define S_028840_VP_ID_OFFSET_GFX10(x) (((unsigned)(x) & 0xF) << 19) /* >= gfx10 */ 10843 #define G_028840_VP_ID_OFFSET_GFX10(x) (((x) >> 19) & 0xF) 10844 #define C_028840_VP_ID_OFFSET_GFX10 0xFF87FFFF 10845 #define R_028844_PA_STATE_STEREO_X 0x028844 /* >= gfx10 */ 10846 #define R_028848_PA_CL_VRS_CNTL 0x028848 /* >= gfx103 */ 10847 #define S_028848_VERTEX_RATE_COMBINER_MODE(x) (((unsigned)(x) & 0x7) << 0) 10848 #define G_028848_VERTEX_RATE_COMBINER_MODE(x) (((x) >> 0) & 0x7) 10849 #define C_028848_VERTEX_RATE_COMBINER_MODE 0xFFFFFFF8 10850 #define V_028848_VRS_COMB_MODE_PASSTHRU 0 10851 #define V_028848_VRS_COMB_MODE_OVERRIDE 1 10852 #define V_028848_VRS_COMB_MODE_MIN 2 10853 #define V_028848_VRS_COMB_MODE_MAX 3 10854 #define V_028848_VRS_COMB_MODE_SATURATE 4 10855 #define S_028848_PRIMITIVE_RATE_COMBINER_MODE(x) (((unsigned)(x) & 0x7) << 3) 10856 #define G_028848_PRIMITIVE_RATE_COMBINER_MODE(x) (((x) >> 3) & 0x7) 10857 #define C_028848_PRIMITIVE_RATE_COMBINER_MODE 0xFFFFFFC7 10858 #define S_028848_HTILE_RATE_COMBINER_MODE(x) (((unsigned)(x) & 0x7) << 6) 10859 #define G_028848_HTILE_RATE_COMBINER_MODE(x) (((x) >> 6) & 0x7) 10860 #define C_028848_HTILE_RATE_COMBINER_MODE 0xFFFFFE3F 10861 #define S_028848_SAMPLE_ITER_COMBINER_MODE(x) (((unsigned)(x) & 0x7) << 9) 10862 #define G_028848_SAMPLE_ITER_COMBINER_MODE(x) (((x) >> 9) & 0x7) 10863 #define C_028848_SAMPLE_ITER_COMBINER_MODE 0xFFFFF1FF 10864 #define S_028848_EXPOSE_VRS_PIXELS_MASK(x) (((unsigned)(x) & 0x1) << 13) 10865 #define G_028848_EXPOSE_VRS_PIXELS_MASK(x) (((x) >> 13) & 0x1) 10866 #define C_028848_EXPOSE_VRS_PIXELS_MASK 0xFFFFDFFF 10867 #define S_028848_CMASK_RATE_HINT_FORCE_ZERO(x) (((unsigned)(x) & 0x1) << 14) 10868 #define G_028848_CMASK_RATE_HINT_FORCE_ZERO(x) (((x) >> 14) & 0x1) 10869 #define C_028848_CMASK_RATE_HINT_FORCE_ZERO 0xFFFFBFFF 10870 #define R_028A00_PA_SU_POINT_SIZE 0x028A00 10871 #define S_028A00_HEIGHT(x) (((unsigned)(x) & 0xFFFF) << 0) 10872 #define G_028A00_HEIGHT(x) (((x) >> 0) & 0xFFFF) 10873 #define C_028A00_HEIGHT 0xFFFF0000 10874 #define S_028A00_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 16) 10875 #define G_028A00_WIDTH(x) (((x) >> 16) & 0xFFFF) 10876 #define C_028A00_WIDTH 0x0000FFFF 10877 #define R_028A04_PA_SU_POINT_MINMAX 0x028A04 10878 #define S_028A04_MIN_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 10879 #define G_028A04_MIN_SIZE(x) (((x) >> 0) & 0xFFFF) 10880 #define C_028A04_MIN_SIZE 0xFFFF0000 10881 #define S_028A04_MAX_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) 10882 #define G_028A04_MAX_SIZE(x) (((x) >> 16) & 0xFFFF) 10883 #define C_028A04_MAX_SIZE 0x0000FFFF 10884 #define R_028A08_PA_SU_LINE_CNTL 0x028A08 10885 #define S_028A08_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 0) 10886 #define G_028A08_WIDTH(x) (((x) >> 0) & 0xFFFF) 10887 #define C_028A08_WIDTH 0xFFFF0000 10888 #define R_028A0C_PA_SC_LINE_STIPPLE 0x028A0C 10889 #define S_028A0C_LINE_PATTERN(x) (((unsigned)(x) & 0xFFFF) << 0) 10890 #define G_028A0C_LINE_PATTERN(x) (((x) >> 0) & 0xFFFF) 10891 #define C_028A0C_LINE_PATTERN 0xFFFF0000 10892 #define S_028A0C_REPEAT_COUNT(x) (((unsigned)(x) & 0xFF) << 16) 10893 #define G_028A0C_REPEAT_COUNT(x) (((x) >> 16) & 0xFF) 10894 #define C_028A0C_REPEAT_COUNT 0xFF00FFFF 10895 #define S_028A0C_PATTERN_BIT_ORDER(x) (((unsigned)(x) & 0x1) << 28) 10896 #define G_028A0C_PATTERN_BIT_ORDER(x) (((x) >> 28) & 0x1) 10897 #define C_028A0C_PATTERN_BIT_ORDER 0xEFFFFFFF 10898 #define S_028A0C_AUTO_RESET_CNTL(x) (((unsigned)(x) & 0x3) << 29) 10899 #define G_028A0C_AUTO_RESET_CNTL(x) (((x) >> 29) & 0x3) 10900 #define C_028A0C_AUTO_RESET_CNTL 0x9FFFFFFF 10901 #define R_028A10_VGT_OUTPUT_PATH_CNTL 0x028A10 10902 #define S_028A10_PATH_SELECT(x) (((unsigned)(x) & 0x7) << 0) 10903 #define G_028A10_PATH_SELECT(x) (((x) >> 0) & 0x7) 10904 #define C_028A10_PATH_SELECT 0xFFFFFFF8 10905 #define R_028A14_VGT_HOS_CNTL 0x028A14 10906 #define S_028A14_TESS_MODE(x) (((unsigned)(x) & 0x3) << 0) 10907 #define G_028A14_TESS_MODE(x) (((x) >> 0) & 0x3) 10908 #define C_028A14_TESS_MODE 0xFFFFFFFC 10909 #define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x028A18 10910 #define R_028A1C_VGT_HOS_MIN_TESS_LEVEL 0x028A1C 10911 #define R_028A20_VGT_HOS_REUSE_DEPTH 0x028A20 10912 #define S_028A20_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) 10913 #define G_028A20_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) 10914 #define C_028A20_REUSE_DEPTH 0xFFFFFF00 10915 #define R_028A24_VGT_GROUP_PRIM_TYPE 0x028A24 10916 #define S_028A24_PRIM_TYPE(x) (((unsigned)(x) & 0x1F) << 0) 10917 #define G_028A24_PRIM_TYPE(x) (((x) >> 0) & 0x1F) 10918 #define C_028A24_PRIM_TYPE 0xFFFFFFE0 10919 #define V_028A24_DI_PT_NONE 0 10920 #define V_028A24_DI_PT_POINTLIST 1 10921 #define V_028A24_DI_PT_LINELIST 2 10922 #define V_028A24_DI_PT_LINESTRIP 3 10923 #define V_028A24_DI_PT_TRILIST 4 10924 #define V_028A24_DI_PT_TRIFAN 5 10925 #define V_028A24_DI_PT_TRISTRIP 6 10926 #define V_028A24_DI_PT_2D_RECTANGLE 7 /* >= gfx9 */ 10927 #define V_028A24_DI_PT_UNUSED_0 7 /* <= gfx81 */ 10928 #define V_028A24_DI_PT_UNUSED_1 8 10929 #define V_028A24_DI_PT_PATCH 9 10930 #define V_028A24_DI_PT_LINELIST_ADJ 10 10931 #define V_028A24_DI_PT_LINESTRIP_ADJ 11 10932 #define V_028A24_DI_PT_TRILIST_ADJ 12 10933 #define V_028A24_DI_PT_TRISTRIP_ADJ 13 10934 #define V_028A24_DI_PT_UNUSED_3 14 10935 #define V_028A24_DI_PT_UNUSED_4 15 10936 #define V_028A24_DI_PT_TRI_WITH_WFLAGS 16 10937 #define V_028A24_DI_PT_RECTLIST 17 10938 #define V_028A24_DI_PT_LINELOOP 18 10939 #define V_028A24_DI_PT_QUADLIST 19 10940 #define V_028A24_DI_PT_QUADSTRIP 20 10941 #define V_028A24_DI_PT_POLYGON 21 10942 #define V_028A24_DI_PT_2D_COPY_RECT_LIST_V0 22 /* <= gfx81 */ 10943 #define V_028A24_DI_PT_2D_COPY_RECT_LIST_V1 23 /* <= gfx81 */ 10944 #define V_028A24_DI_PT_2D_COPY_RECT_LIST_V2 24 /* <= gfx81 */ 10945 #define V_028A24_DI_PT_2D_COPY_RECT_LIST_V3 25 /* <= gfx81 */ 10946 #define V_028A24_DI_PT_2D_FILL_RECT_LIST 26 /* <= gfx81 */ 10947 #define V_028A24_DI_PT_2D_LINE_STRIP 27 /* <= gfx81 */ 10948 #define V_028A24_DI_PT_2D_TRI_STRIP 28 /* <= gfx81 */ 10949 #define S_028A24_RETAIN_ORDER(x) (((unsigned)(x) & 0x1) << 14) 10950 #define G_028A24_RETAIN_ORDER(x) (((x) >> 14) & 0x1) 10951 #define C_028A24_RETAIN_ORDER 0xFFFFBFFF 10952 #define S_028A24_RETAIN_QUADS(x) (((unsigned)(x) & 0x1) << 15) 10953 #define G_028A24_RETAIN_QUADS(x) (((x) >> 15) & 0x1) 10954 #define C_028A24_RETAIN_QUADS 0xFFFF7FFF 10955 #define S_028A24_PRIM_ORDER(x) (((unsigned)(x) & 0x7) << 16) 10956 #define G_028A24_PRIM_ORDER(x) (((x) >> 16) & 0x7) 10957 #define C_028A24_PRIM_ORDER 0xFFF8FFFF 10958 #define R_028A28_VGT_GROUP_FIRST_DECR 0x028A28 10959 #define S_028A28_FIRST_DECR(x) (((unsigned)(x) & 0xF) << 0) 10960 #define G_028A28_FIRST_DECR(x) (((x) >> 0) & 0xF) 10961 #define C_028A28_FIRST_DECR 0xFFFFFFF0 10962 #define R_028A2C_VGT_GROUP_DECR 0x028A2C 10963 #define S_028A2C_DECR(x) (((unsigned)(x) & 0xF) << 0) 10964 #define G_028A2C_DECR(x) (((x) >> 0) & 0xF) 10965 #define C_028A2C_DECR 0xFFFFFFF0 10966 #define R_028A30_VGT_GROUP_VECT_0_CNTL 0x028A30 10967 #define S_028A30_COMP_X_EN(x) (((unsigned)(x) & 0x1) << 0) 10968 #define G_028A30_COMP_X_EN(x) (((x) >> 0) & 0x1) 10969 #define C_028A30_COMP_X_EN 0xFFFFFFFE 10970 #define S_028A30_COMP_Y_EN(x) (((unsigned)(x) & 0x1) << 1) 10971 #define G_028A30_COMP_Y_EN(x) (((x) >> 1) & 0x1) 10972 #define C_028A30_COMP_Y_EN 0xFFFFFFFD 10973 #define S_028A30_COMP_Z_EN(x) (((unsigned)(x) & 0x1) << 2) 10974 #define G_028A30_COMP_Z_EN(x) (((x) >> 2) & 0x1) 10975 #define C_028A30_COMP_Z_EN 0xFFFFFFFB 10976 #define S_028A30_COMP_W_EN(x) (((unsigned)(x) & 0x1) << 3) 10977 #define G_028A30_COMP_W_EN(x) (((x) >> 3) & 0x1) 10978 #define C_028A30_COMP_W_EN 0xFFFFFFF7 10979 #define S_028A30_STRIDE(x) (((unsigned)(x) & 0xFF) << 8) 10980 #define G_028A30_STRIDE(x) (((x) >> 8) & 0xFF) 10981 #define C_028A30_STRIDE 0xFFFF00FF 10982 #define S_028A30_SHIFT(x) (((unsigned)(x) & 0xFF) << 16) 10983 #define G_028A30_SHIFT(x) (((x) >> 16) & 0xFF) 10984 #define C_028A30_SHIFT 0xFF00FFFF 10985 #define R_028A34_VGT_GROUP_VECT_1_CNTL 0x028A34 10986 #define R_028A38_VGT_GROUP_VECT_0_FMT_CNTL 0x028A38 10987 #define S_028A38_X_CONV(x) (((unsigned)(x) & 0xF) << 0) 10988 #define G_028A38_X_CONV(x) (((x) >> 0) & 0xF) 10989 #define C_028A38_X_CONV 0xFFFFFFF0 10990 #define S_028A38_X_OFFSET(x) (((unsigned)(x) & 0xF) << 4) 10991 #define G_028A38_X_OFFSET(x) (((x) >> 4) & 0xF) 10992 #define C_028A38_X_OFFSET 0xFFFFFF0F 10993 #define S_028A38_Y_CONV(x) (((unsigned)(x) & 0xF) << 8) 10994 #define G_028A38_Y_CONV(x) (((x) >> 8) & 0xF) 10995 #define C_028A38_Y_CONV 0xFFFFF0FF 10996 #define S_028A38_Y_OFFSET(x) (((unsigned)(x) & 0xF) << 12) 10997 #define G_028A38_Y_OFFSET(x) (((x) >> 12) & 0xF) 10998 #define C_028A38_Y_OFFSET 0xFFFF0FFF 10999 #define S_028A38_Z_CONV(x) (((unsigned)(x) & 0xF) << 16) 11000 #define G_028A38_Z_CONV(x) (((x) >> 16) & 0xF) 11001 #define C_028A38_Z_CONV 0xFFF0FFFF 11002 #define S_028A38_Z_OFFSET(x) (((unsigned)(x) & 0xF) << 20) 11003 #define G_028A38_Z_OFFSET(x) (((x) >> 20) & 0xF) 11004 #define C_028A38_Z_OFFSET 0xFF0FFFFF 11005 #define S_028A38_W_CONV(x) (((unsigned)(x) & 0xF) << 24) 11006 #define G_028A38_W_CONV(x) (((x) >> 24) & 0xF) 11007 #define C_028A38_W_CONV 0xF0FFFFFF 11008 #define S_028A38_W_OFFSET(x) (((unsigned)(x) & 0xF) << 28) 11009 #define G_028A38_W_OFFSET(x) (((x) >> 28) & 0xF) 11010 #define C_028A38_W_OFFSET 0x0FFFFFFF 11011 #define R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL 0x028A3C 11012 #define R_028A40_VGT_GS_MODE 0x028A40 11013 #define S_028A40_MODE(x) (((unsigned)(x) & 0x7) << 0) 11014 #define G_028A40_MODE(x) (((x) >> 0) & 0x7) 11015 #define C_028A40_MODE 0xFFFFFFF8 11016 #define V_028A40_GS_OFF 0 11017 #define V_028A40_GS_SCENARIO_A 1 11018 #define V_028A40_GS_SCENARIO_B 2 11019 #define V_028A40_GS_SCENARIO_G 3 11020 #define V_028A40_GS_SCENARIO_C 4 11021 #define V_028A40_SPRITE_EN 5 11022 #define S_028A40_RESERVED_0(x) (((unsigned)(x) & 0x1) << 3) 11023 #define G_028A40_RESERVED_0(x) (((x) >> 3) & 0x1) 11024 #define C_028A40_RESERVED_0 0xFFFFFFF7 11025 #define S_028A40_CUT_MODE(x) (((unsigned)(x) & 0x3) << 4) 11026 #define G_028A40_CUT_MODE(x) (((x) >> 4) & 0x3) 11027 #define C_028A40_CUT_MODE 0xFFFFFFCF 11028 #define V_028A40_GS_CUT_1024 0 11029 #define V_028A40_GS_CUT_512 1 11030 #define V_028A40_GS_CUT_256 2 11031 #define V_028A40_GS_CUT_128 3 11032 #define S_028A40_RESERVED_1(x) (((unsigned)(x) & 0x1F) << 6) 11033 #define G_028A40_RESERVED_1(x) (((x) >> 6) & 0x1F) 11034 #define C_028A40_RESERVED_1 0xFFFFF83F 11035 #define S_028A40_GS_C_PACK_EN(x) (((unsigned)(x) & 0x1) << 11) 11036 #define G_028A40_GS_C_PACK_EN(x) (((x) >> 11) & 0x1) 11037 #define C_028A40_GS_C_PACK_EN 0xFFFFF7FF 11038 #define S_028A40_RESERVED_2(x) (((unsigned)(x) & 0x1) << 12) 11039 #define G_028A40_RESERVED_2(x) (((x) >> 12) & 0x1) 11040 #define C_028A40_RESERVED_2 0xFFFFEFFF 11041 #define S_028A40_ES_PASSTHRU(x) (((unsigned)(x) & 0x1) << 13) 11042 #define G_028A40_ES_PASSTHRU(x) (((x) >> 13) & 0x1) 11043 #define C_028A40_ES_PASSTHRU 0xFFFFDFFF 11044 #define S_028A40_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 14) /* <= gfx7, >= gfx10 */ 11045 #define G_028A40_COMPUTE_MODE(x) (((x) >> 14) & 0x1) 11046 #define C_028A40_COMPUTE_MODE 0xFFFFBFFF 11047 #define S_028A40_RESERVED_3(x) (((unsigned)(x) & 0x1) << 14) /* gfx8, gfx81, gfx9 */ 11048 #define G_028A40_RESERVED_3(x) (((x) >> 14) & 0x1) 11049 #define C_028A40_RESERVED_3 0xFFFFBFFF 11050 #define S_028A40_FAST_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 15) /* <= gfx7, >= gfx10 */ 11051 #define G_028A40_FAST_COMPUTE_MODE(x) (((x) >> 15) & 0x1) 11052 #define C_028A40_FAST_COMPUTE_MODE 0xFFFF7FFF 11053 #define S_028A40_RESERVED_4(x) (((unsigned)(x) & 0x1) << 15) /* gfx8, gfx81, gfx9 */ 11054 #define G_028A40_RESERVED_4(x) (((x) >> 15) & 0x1) 11055 #define C_028A40_RESERVED_4 0xFFFF7FFF 11056 #define S_028A40_ELEMENT_INFO_EN(x) (((unsigned)(x) & 0x1) << 16) /* <= gfx7, >= gfx10 */ 11057 #define G_028A40_ELEMENT_INFO_EN(x) (((x) >> 16) & 0x1) 11058 #define C_028A40_ELEMENT_INFO_EN 0xFFFEFFFF 11059 #define S_028A40_RESERVED_5(x) (((unsigned)(x) & 0x1) << 16) /* gfx8, gfx81, gfx9 */ 11060 #define G_028A40_RESERVED_5(x) (((x) >> 16) & 0x1) 11061 #define C_028A40_RESERVED_5 0xFFFEFFFF 11062 #define S_028A40_PARTIAL_THD_AT_EOI(x) (((unsigned)(x) & 0x1) << 17) 11063 #define G_028A40_PARTIAL_THD_AT_EOI(x) (((x) >> 17) & 0x1) 11064 #define C_028A40_PARTIAL_THD_AT_EOI 0xFFFDFFFF 11065 #define S_028A40_SUPPRESS_CUTS(x) (((unsigned)(x) & 0x1) << 18) 11066 #define G_028A40_SUPPRESS_CUTS(x) (((x) >> 18) & 0x1) 11067 #define C_028A40_SUPPRESS_CUTS 0xFFFBFFFF 11068 #define S_028A40_ES_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 19) 11069 #define G_028A40_ES_WRITE_OPTIMIZE(x) (((x) >> 19) & 0x1) 11070 #define C_028A40_ES_WRITE_OPTIMIZE 0xFFF7FFFF 11071 #define S_028A40_GS_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 20) 11072 #define G_028A40_GS_WRITE_OPTIMIZE(x) (((x) >> 20) & 0x1) 11073 #define C_028A40_GS_WRITE_OPTIMIZE 0xFFEFFFFF 11074 #define S_028A40_ONCHIP(x) (((unsigned)(x) & 0x3) << 21) 11075 #define G_028A40_ONCHIP(x) (((x) >> 21) & 0x3) 11076 #define C_028A40_ONCHIP 0xFF9FFFFF 11077 #define R_028A44_VGT_GS_ONCHIP_CNTL 0x028A44 /* >= gfx7 */ 11078 #define S_028A44_ES_VERTS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 0) 11079 #define G_028A44_ES_VERTS_PER_SUBGRP(x) (((x) >> 0) & 0x7FF) 11080 #define C_028A44_ES_VERTS_PER_SUBGRP 0xFFFFF800 11081 #define S_028A44_GS_PRIMS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 11) 11082 #define G_028A44_GS_PRIMS_PER_SUBGRP(x) (((x) >> 11) & 0x7FF) 11083 #define C_028A44_GS_PRIMS_PER_SUBGRP 0xFFC007FF 11084 #define S_028A44_GS_INST_PRIMS_IN_SUBGRP(x) (((unsigned)(x) & 0x3FF) << 22) /* >= gfx9 */ 11085 #define G_028A44_GS_INST_PRIMS_IN_SUBGRP(x) (((x) >> 22) & 0x3FF) 11086 #define C_028A44_GS_INST_PRIMS_IN_SUBGRP 0x003FFFFF 11087 #define R_028A48_PA_SC_MODE_CNTL_0 0x028A48 11088 #define S_028A48_MSAA_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 11089 #define G_028A48_MSAA_ENABLE(x) (((x) >> 0) & 0x1) 11090 #define C_028A48_MSAA_ENABLE 0xFFFFFFFE 11091 #define S_028A48_VPORT_SCISSOR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 11092 #define G_028A48_VPORT_SCISSOR_ENABLE(x) (((x) >> 1) & 0x1) 11093 #define C_028A48_VPORT_SCISSOR_ENABLE 0xFFFFFFFD 11094 #define S_028A48_LINE_STIPPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 11095 #define G_028A48_LINE_STIPPLE_ENABLE(x) (((x) >> 2) & 0x1) 11096 #define C_028A48_LINE_STIPPLE_ENABLE 0xFFFFFFFB 11097 #define S_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((unsigned)(x) & 0x1) << 3) 11098 #define G_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((x) >> 3) & 0x1) 11099 #define C_028A48_SEND_UNLIT_STILES_TO_PKR 0xFFFFFFF7 11100 #define S_028A48_SCALE_LINE_WIDTH_PAD(x) (((unsigned)(x) & 0x1) << 4) /* gfx9, gfx10 */ 11101 #define G_028A48_SCALE_LINE_WIDTH_PAD(x) (((x) >> 4) & 0x1) 11102 #define C_028A48_SCALE_LINE_WIDTH_PAD 0xFFFFFFEF 11103 #define S_028A48_ALTERNATE_RBS_PER_TILE(x) (((unsigned)(x) & 0x1) << 5) /* >= gfx9 */ 11104 #define G_028A48_ALTERNATE_RBS_PER_TILE(x) (((x) >> 5) & 0x1) 11105 #define C_028A48_ALTERNATE_RBS_PER_TILE 0xFFFFFFDF 11106 #define S_028A48_COARSE_TILE_STARTS_ON_EVEN_RB(x) (((unsigned)(x) & 0x1) << 6) /* >= gfx9 */ 11107 #define G_028A48_COARSE_TILE_STARTS_ON_EVEN_RB(x) (((x) >> 6) & 0x1) 11108 #define C_028A48_COARSE_TILE_STARTS_ON_EVEN_RB 0xFFFFFFBF 11109 #define R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C 11110 #define S_028A4C_WALK_SIZE(x) (((unsigned)(x) & 0x1) << 0) 11111 #define G_028A4C_WALK_SIZE(x) (((x) >> 0) & 0x1) 11112 #define C_028A4C_WALK_SIZE 0xFFFFFFFE 11113 #define S_028A4C_WALK_ALIGNMENT(x) (((unsigned)(x) & 0x1) << 1) 11114 #define G_028A4C_WALK_ALIGNMENT(x) (((x) >> 1) & 0x1) 11115 #define C_028A4C_WALK_ALIGNMENT 0xFFFFFFFD 11116 #define S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((unsigned)(x) & 0x1) << 2) 11117 #define G_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((x) >> 2) & 0x1) 11118 #define C_028A4C_WALK_ALIGN8_PRIM_FITS_ST 0xFFFFFFFB 11119 #define S_028A4C_WALK_FENCE_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 11120 #define G_028A4C_WALK_FENCE_ENABLE(x) (((x) >> 3) & 0x1) 11121 #define C_028A4C_WALK_FENCE_ENABLE 0xFFFFFFF7 11122 #define S_028A4C_WALK_FENCE_SIZE(x) (((unsigned)(x) & 0x7) << 4) 11123 #define G_028A4C_WALK_FENCE_SIZE(x) (((x) >> 4) & 0x7) 11124 #define C_028A4C_WALK_FENCE_SIZE 0xFFFFFF8F 11125 #define S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 11126 #define G_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((x) >> 7) & 0x1) 11127 #define C_028A4C_SUPERTILE_WALK_ORDER_ENABLE 0xFFFFFF7F 11128 #define S_028A4C_TILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 8) 11129 #define G_028A4C_TILE_WALK_ORDER_ENABLE(x) (((x) >> 8) & 0x1) 11130 #define C_028A4C_TILE_WALK_ORDER_ENABLE 0xFFFFFEFF 11131 #define S_028A4C_TILE_COVER_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 11132 #define G_028A4C_TILE_COVER_DISABLE(x) (((x) >> 9) & 0x1) 11133 #define C_028A4C_TILE_COVER_DISABLE 0xFFFFFDFF 11134 #define S_028A4C_TILE_COVER_NO_SCISSOR(x) (((unsigned)(x) & 0x1) << 10) 11135 #define G_028A4C_TILE_COVER_NO_SCISSOR(x) (((x) >> 10) & 0x1) 11136 #define C_028A4C_TILE_COVER_NO_SCISSOR 0xFFFFFBFF 11137 #define S_028A4C_ZMM_LINE_EXTENT(x) (((unsigned)(x) & 0x1) << 11) 11138 #define G_028A4C_ZMM_LINE_EXTENT(x) (((x) >> 11) & 0x1) 11139 #define C_028A4C_ZMM_LINE_EXTENT 0xFFFFF7FF 11140 #define S_028A4C_ZMM_LINE_OFFSET(x) (((unsigned)(x) & 0x1) << 12) 11141 #define G_028A4C_ZMM_LINE_OFFSET(x) (((x) >> 12) & 0x1) 11142 #define C_028A4C_ZMM_LINE_OFFSET 0xFFFFEFFF 11143 #define S_028A4C_ZMM_RECT_EXTENT(x) (((unsigned)(x) & 0x1) << 13) 11144 #define G_028A4C_ZMM_RECT_EXTENT(x) (((x) >> 13) & 0x1) 11145 #define C_028A4C_ZMM_RECT_EXTENT 0xFFFFDFFF 11146 #define S_028A4C_KILL_PIX_POST_HI_Z(x) (((unsigned)(x) & 0x1) << 14) 11147 #define G_028A4C_KILL_PIX_POST_HI_Z(x) (((x) >> 14) & 0x1) 11148 #define C_028A4C_KILL_PIX_POST_HI_Z 0xFFFFBFFF 11149 #define S_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((unsigned)(x) & 0x1) << 15) 11150 #define G_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((x) >> 15) & 0x1) 11151 #define C_028A4C_KILL_PIX_POST_DETAIL_MASK 0xFFFF7FFF 11152 #define S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) 11153 #define G_028A4C_PS_ITER_SAMPLE(x) (((x) >> 16) & 0x1) 11154 #define C_028A4C_PS_ITER_SAMPLE 0xFFFEFFFF 11155 #define S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 17) 11156 #define G_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((x) >> 17) & 0x1) 11157 #define C_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE 0xFFFDFFFF 11158 #define S_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((unsigned)(x) & 0x1) << 18) 11159 #define G_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((x) >> 18) & 0x1) 11160 #define C_028A4C_MULTI_GPU_SUPERTILE_ENABLE 0xFFFBFFFF 11161 #define S_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((unsigned)(x) & 0x1) << 19) 11162 #define G_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((x) >> 19) & 0x1) 11163 #define C_028A4C_GPU_ID_OVERRIDE_ENABLE 0xFFF7FFFF 11164 #define S_028A4C_GPU_ID_OVERRIDE(x) (((unsigned)(x) & 0xF) << 20) 11165 #define G_028A4C_GPU_ID_OVERRIDE(x) (((x) >> 20) & 0xF) 11166 #define C_028A4C_GPU_ID_OVERRIDE 0xFF0FFFFF 11167 #define S_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 24) 11168 #define G_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((x) >> 24) & 0x1) 11169 #define C_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE 0xFEFFFFFF 11170 #define S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) 11171 #define G_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((x) >> 25) & 0x1) 11172 #define C_028A4C_FORCE_EOV_CNTDWN_ENABLE 0xFDFFFFFF 11173 #define S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 11174 #define G_028A4C_FORCE_EOV_REZ_ENABLE(x) (((x) >> 26) & 0x1) 11175 #define C_028A4C_FORCE_EOV_REZ_ENABLE 0xFBFFFFFF 11176 #define S_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((unsigned)(x) & 0x1) << 27) 11177 #define G_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((x) >> 27) & 0x1) 11178 #define C_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE 0xF7FFFFFF 11179 #define S_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((unsigned)(x) & 0x7) << 28) 11180 #define G_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((x) >> 28) & 0x7) 11181 #define C_028A4C_OUT_OF_ORDER_WATER_MARK 0x8FFFFFFF 11182 #define R_028A50_VGT_ENHANCE 0x028A50 11183 #define R_028A54_VGT_GS_PER_ES 0x028A54 11184 #define S_028A54_GS_PER_ES(x) (((unsigned)(x) & 0x7FF) << 0) 11185 #define G_028A54_GS_PER_ES(x) (((x) >> 0) & 0x7FF) 11186 #define C_028A54_GS_PER_ES 0xFFFFF800 11187 #define R_028A58_VGT_ES_PER_GS 0x028A58 11188 #define S_028A58_ES_PER_GS(x) (((unsigned)(x) & 0x7FF) << 0) 11189 #define G_028A58_ES_PER_GS(x) (((x) >> 0) & 0x7FF) 11190 #define C_028A58_ES_PER_GS 0xFFFFF800 11191 #define R_028A5C_VGT_GS_PER_VS 0x028A5C 11192 #define S_028A5C_GS_PER_VS(x) (((unsigned)(x) & 0xF) << 0) 11193 #define G_028A5C_GS_PER_VS(x) (((x) >> 0) & 0xF) 11194 #define C_028A5C_GS_PER_VS 0xFFFFFFF0 11195 #define R_028A60_VGT_GSVS_RING_OFFSET_1 0x028A60 11196 #define S_028A60_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) 11197 #define G_028A60_OFFSET(x) (((x) >> 0) & 0x7FFF) 11198 #define C_028A60_OFFSET 0xFFFF8000 11199 #define R_028A64_VGT_GSVS_RING_OFFSET_2 0x028A64 11200 #define R_028A68_VGT_GSVS_RING_OFFSET_3 0x028A68 11201 #define R_028A6C_VGT_GS_OUT_PRIM_TYPE 0x028A6C 11202 #define S_028A6C_OUTPRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 11203 #define G_028A6C_OUTPRIM_TYPE(x) (((x) >> 0) & 0x3F) 11204 #define C_028A6C_OUTPRIM_TYPE 0xFFFFFFC0 11205 #define V_028A6C_POINTLIST 0 11206 #define V_028A6C_LINESTRIP 1 11207 #define V_028A6C_TRISTRIP 2 11208 #define V_028A6C_RECTLIST 3 /* >= gfx9 */ 11209 #define S_028A6C_OUTPRIM_TYPE_1(x) (((unsigned)(x) & 0x3F) << 8) 11210 #define G_028A6C_OUTPRIM_TYPE_1(x) (((x) >> 8) & 0x3F) 11211 #define C_028A6C_OUTPRIM_TYPE_1 0xFFFFC0FF 11212 #define S_028A6C_OUTPRIM_TYPE_2(x) (((unsigned)(x) & 0x3F) << 16) 11213 #define G_028A6C_OUTPRIM_TYPE_2(x) (((x) >> 16) & 0x3F) 11214 #define C_028A6C_OUTPRIM_TYPE_2 0xFFC0FFFF 11215 #define S_028A6C_OUTPRIM_TYPE_3(x) (((unsigned)(x) & 0x3F) << 22) 11216 #define G_028A6C_OUTPRIM_TYPE_3(x) (((x) >> 22) & 0x3F) 11217 #define C_028A6C_OUTPRIM_TYPE_3 0xF03FFFFF 11218 #define S_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((unsigned)(x) & 0x1) << 31) 11219 #define G_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((x) >> 31) & 0x1) 11220 #define C_028A6C_UNIQUE_TYPE_PER_STREAM 0x7FFFFFFF 11221 #define R_028A70_IA_ENHANCE 0x028A70 11222 #define R_028A74_VGT_DMA_SIZE 0x028A74 11223 #define R_028A78_VGT_DMA_MAX_SIZE 0x028A78 11224 #define R_028A7C_VGT_DMA_INDEX_TYPE 0x028A7C 11225 #define S_028A7C_INDEX_TYPE(x) (((unsigned)(x) & 0x3) << 0) 11226 #define G_028A7C_INDEX_TYPE(x) (((x) >> 0) & 0x3) 11227 #define C_028A7C_INDEX_TYPE 0xFFFFFFFC 11228 #define V_028A7C_VGT_INDEX_16 0 11229 #define V_028A7C_VGT_INDEX_32 1 11230 #define V_028A7C_VGT_INDEX_8 2 /* >= gfx8 */ 11231 #define S_028A7C_SWAP_MODE(x) (((unsigned)(x) & 0x3) << 2) 11232 #define G_028A7C_SWAP_MODE(x) (((x) >> 2) & 0x3) 11233 #define C_028A7C_SWAP_MODE 0xFFFFFFF3 11234 #define V_028A7C_VGT_DMA_SWAP_NONE 0 11235 #define V_028A7C_VGT_DMA_SWAP_16_BIT 1 11236 #define V_028A7C_VGT_DMA_SWAP_32_BIT 2 11237 #define V_028A7C_VGT_DMA_SWAP_WORD 3 11238 #define S_028A7C_BUF_TYPE(x) (((unsigned)(x) & 0x3) << 4) 11239 #define G_028A7C_BUF_TYPE(x) (((x) >> 4) & 0x3) 11240 #define C_028A7C_BUF_TYPE 0xFFFFFFCF 11241 #define V_028A7C_VGT_DMA_BUF_MEM 0 11242 #define V_028A7C_VGT_DMA_BUF_RING 1 11243 #define V_028A7C_VGT_DMA_BUF_SETUP 2 11244 #define V_028A7C_VGT_DMA_PTR_UPDATE 3 /* >= gfx8 */ 11245 #define S_028A7C_RDREQ_POLICY(x) (((unsigned)(x) & 0x3) << 6) 11246 #define G_028A7C_RDREQ_POLICY(x) (((x) >> 6) & 0x3) 11247 #define C_028A7C_RDREQ_POLICY 0xFFFFFF3F 11248 #define V_028A7C_VGT_POLICY_LRU 0 11249 #define V_028A7C_VGT_POLICY_STREAM 1 11250 #define V_028A7C_VGT_POLICY_BYPASS 2 /* <= gfx7, >= gfx10 */ 11251 #define V_028A7C_VGT_POLICY_RESERVED 3 /* <= gfx7 */ 11252 #define S_028A7C_ATC(x) (((unsigned)(x) & 0x1) << 8) /* <= gfx7, >= gfx10 */ 11253 #define G_028A7C_ATC(x) (((x) >> 8) & 0x1) 11254 #define C_028A7C_ATC 0xFFFFFEFF 11255 #define S_028A7C_PRIMGEN_EN(x) (((unsigned)(x) & 0x1) << 8) /* gfx9 */ 11256 #define G_028A7C_PRIMGEN_EN(x) (((x) >> 8) & 0x1) 11257 #define C_028A7C_PRIMGEN_EN 0xFFFFFEFF 11258 #define S_028A7C_NOT_EOP(x) (((unsigned)(x) & 0x1) << 9) 11259 #define G_028A7C_NOT_EOP(x) (((x) >> 9) & 0x1) 11260 #define C_028A7C_NOT_EOP 0xFFFFFDFF 11261 #define S_028A7C_REQ_PATH(x) (((unsigned)(x) & 0x1) << 10) 11262 #define G_028A7C_REQ_PATH(x) (((x) >> 10) & 0x1) 11263 #define C_028A7C_REQ_PATH 0xFFFFFBFF 11264 #define S_028A7C_MTYPE(x) (((unsigned)(x) & 0x7) << 11) /* gfx8, gfx81, >= gfx10 */ 11265 #define G_028A7C_MTYPE(x) (((x) >> 11) & 0x7) 11266 #define C_028A7C_MTYPE 0xFFFFC7FF 11267 #define S_028A7C_DISABLE_INSTANCE_PACKING(x) (((unsigned)(x) & 0x1) << 14) /* >= gfx103 */ 11268 #define G_028A7C_DISABLE_INSTANCE_PACKING(x) (((x) >> 14) & 0x1) 11269 #define C_028A7C_DISABLE_INSTANCE_PACKING 0xFFFFBFFF 11270 #define R_028A80_WD_ENHANCE 0x028A80 /* >= gfx7 */ 11271 #define R_028A84_VGT_PRIMITIVEID_EN 0x028A84 11272 #define S_028A84_PRIMITIVEID_EN(x) (((unsigned)(x) & 0x1) << 0) 11273 #define G_028A84_PRIMITIVEID_EN(x) (((x) >> 0) & 0x1) 11274 #define C_028A84_PRIMITIVEID_EN 0xFFFFFFFE 11275 #define S_028A84_DISABLE_RESET_ON_EOI(x) (((unsigned)(x) & 0x1) << 1) 11276 #define G_028A84_DISABLE_RESET_ON_EOI(x) (((x) >> 1) & 0x1) 11277 #define C_028A84_DISABLE_RESET_ON_EOI 0xFFFFFFFD 11278 #define S_028A84_NGG_DISABLE_PROVOK_REUSE(x) (((unsigned)(x) & 0x1) << 2) /* >= gfx9 */ 11279 #define G_028A84_NGG_DISABLE_PROVOK_REUSE(x) (((x) >> 2) & 0x1) 11280 #define C_028A84_NGG_DISABLE_PROVOK_REUSE 0xFFFFFFFB 11281 #define R_028A88_VGT_DMA_NUM_INSTANCES 0x028A88 11282 #define R_028A8C_VGT_PRIMITIVEID_RESET 0x028A8C 11283 #define R_028A90_VGT_EVENT_INITIATOR 0x028A90 11284 #define S_028A90_EVENT_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 11285 #define G_028A90_EVENT_TYPE(x) (((x) >> 0) & 0x3F) 11286 #define C_028A90_EVENT_TYPE 0xFFFFFFC0 11287 #define V_028A90_Reserved_0x00 0 11288 #define V_028A90_SAMPLE_STREAMOUTSTATS1 1 11289 #define V_028A90_SAMPLE_STREAMOUTSTATS2 2 11290 #define V_028A90_SAMPLE_STREAMOUTSTATS3 3 11291 #define V_028A90_CACHE_FLUSH_TS 4 11292 #define V_028A90_CONTEXT_DONE 5 11293 #define V_028A90_CACHE_FLUSH 6 11294 #define V_028A90_CS_PARTIAL_FLUSH 7 11295 #define V_028A90_VGT_STREAMOUT_SYNC 8 11296 #define V_028A90_Reserved_0x09 9 /* <= gfx9 */ 11297 #define V_028A90_SET_FE_ID 9 /* >= gfx10 */ 11298 #define V_028A90_VGT_STREAMOUT_RESET 10 11299 #define V_028A90_END_OF_PIPE_INCR_DE 11 11300 #define V_028A90_END_OF_PIPE_IB_END 12 11301 #define V_028A90_RST_PIX_CNT 13 11302 #define V_028A90_BREAK_BATCH 14 /* >= gfx9 */ 11303 #define V_028A90_Reserved_0x0E 14 /* <= gfx81 */ 11304 #define V_028A90_VS_PARTIAL_FLUSH 15 11305 #define V_028A90_PS_PARTIAL_FLUSH 16 11306 #define V_028A90_FLUSH_HS_OUTPUT 17 11307 #define V_028A90_FLUSH_DFSM 18 /* >= gfx9 */ 11308 #define V_028A90_FLUSH_LS_OUTPUT 18 /* <= gfx81 */ 11309 #define V_028A90_RESET_TO_LOWEST_VGT 19 /* >= gfx9 */ 11310 #define V_028A90_Reserved_0x13 19 /* <= gfx81 */ 11311 #define V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT 20 11312 #define V_028A90_ZPASS_DONE 21 11313 #define V_028A90_CACHE_FLUSH_AND_INV_EVENT 22 11314 #define V_028A90_PERFCOUNTER_START 23 11315 #define V_028A90_PERFCOUNTER_STOP 24 11316 #define V_028A90_PIPELINESTAT_START 25 11317 #define V_028A90_PIPELINESTAT_STOP 26 11318 #define V_028A90_PERFCOUNTER_SAMPLE 27 11319 #define V_028A90_Available_0x1c 28 /* gfx9 */ 11320 #define V_028A90_FLUSH_ES_OUTPUT 28 /* <= gfx81, >= gfx10 */ 11321 #define V_028A90_Available_0x1d 29 /* gfx9 */ 11322 #define V_028A90_BIN_CONF_OVERRIDE_CHECK 29 /* >= gfx10 */ 11323 #define V_028A90_FLUSH_GS_OUTPUT 29 /* <= gfx81 */ 11324 #define V_028A90_SAMPLE_PIPELINESTAT 30 11325 #define V_028A90_SO_VGTSTREAMOUT_FLUSH 31 11326 #define V_028A90_SAMPLE_STREAMOUTSTATS 32 11327 #define V_028A90_RESET_VTX_CNT 33 11328 #define V_028A90_BLOCK_CONTEXT_DONE 34 11329 #define V_028A90_CS_CONTEXT_DONE 35 11330 #define V_028A90_VGT_FLUSH 36 11331 #define V_028A90_Reserved_0x25 37 /* <= gfx7 */ 11332 #define V_028A90_TGID_ROLLOVER 37 /* >= gfx8 */ 11333 #define V_028A90_SQ_NON_EVENT 38 11334 #define V_028A90_SC_SEND_DB_VPZ 39 11335 #define V_028A90_BOTTOM_OF_PIPE_TS 40 11336 #define V_028A90_FLUSH_SX_TS 41 11337 #define V_028A90_DB_CACHE_FLUSH_AND_INV 42 11338 #define V_028A90_FLUSH_AND_INV_DB_DATA_TS 43 11339 #define V_028A90_FLUSH_AND_INV_DB_META 44 11340 #define V_028A90_FLUSH_AND_INV_CB_DATA_TS 45 11341 #define V_028A90_FLUSH_AND_INV_CB_META 46 11342 #define V_028A90_CS_DONE 47 11343 #define V_028A90_PS_DONE 48 11344 #define V_028A90_FLUSH_AND_INV_CB_PIXEL_DATA 49 11345 #define V_028A90_SX_CB_RAT_ACK_REQUEST 50 11346 #define V_028A90_THREAD_TRACE_START 51 11347 #define V_028A90_THREAD_TRACE_STOP 52 11348 #define V_028A90_THREAD_TRACE_MARKER 53 11349 #define V_028A90_THREAD_TRACE_DRAW 54 /* >= gfx10 */ 11350 #define V_028A90_THREAD_TRACE_FLUSH 54 /* <= gfx9 */ 11351 #define V_028A90_THREAD_TRACE_FINISH 55 11352 #define V_028A90_PIXEL_PIPE_STAT_CONTROL 56 11353 #define V_028A90_PIXEL_PIPE_STAT_DUMP 57 11354 #define V_028A90_PIXEL_PIPE_STAT_RESET 58 11355 #define V_028A90_CONTEXT_SUSPEND 59 11356 #define V_028A90_OFFCHIP_HS_DEALLOC 60 /* >= gfx8 */ 11357 #define V_028A90_ENABLE_NGG_PIPELINE 61 /* >= gfx9 */ 11358 #define V_028A90_ENABLE_LEGACY_PIPELINE 62 /* >= gfx9 */ 11359 #define V_028A90_DRAW_DONE 63 /* >= gfx10 */ 11360 #define V_028A90_Reserved_0x3f 63 /* gfx9 */ 11361 #define S_028A90_ADDRESS_HI_GFX9(x) (((unsigned)(x) & 0x1FFFF) << 10) /* >= gfx9 */ 11362 #define G_028A90_ADDRESS_HI_GFX9(x) (((x) >> 10) & 0x1FFFF) 11363 #define C_028A90_ADDRESS_HI_GFX9 0xF80003FF 11364 #define S_028A90_ADDRESS_HI_GFX6(x) (((unsigned)(x) & 0x1FF) << 18) /* <= gfx81 */ 11365 #define G_028A90_ADDRESS_HI_GFX6(x) (((x) >> 18) & 0x1FF) 11366 #define C_028A90_ADDRESS_HI_GFX6 0xF803FFFF 11367 #define S_028A90_EXTENDED_EVENT(x) (((unsigned)(x) & 0x1) << 27) 11368 #define G_028A90_EXTENDED_EVENT(x) (((x) >> 27) & 0x1) 11369 #define C_028A90_EXTENDED_EVENT 0xF7FFFFFF 11370 #define R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP 0x028A94 /* gfx9 */ 11371 #define S_028A94_MAX_PRIMS_PER_SUBGROUP(x) (((unsigned)(x) & 0xFFFF) << 0) 11372 #define G_028A94_MAX_PRIMS_PER_SUBGROUP(x) (((x) >> 0) & 0xFFFF) 11373 #define C_028A94_MAX_PRIMS_PER_SUBGROUP 0xFFFF0000 11374 #define R_028A94_VGT_MULTI_PRIM_IB_RESET_EN 0x028A94 /* <= gfx81, >= gfx10 */ 11375 #define S_028A94_RESET_EN(x) (((unsigned)(x) & 0x1) << 0) 11376 #define G_028A94_RESET_EN(x) (((x) >> 0) & 0x1) 11377 #define C_028A94_RESET_EN 0xFFFFFFFE 11378 #define S_028A94_MATCH_ALL_BITS(x) (((unsigned)(x) & 0x1) << 1) /* >= gfx10 */ 11379 #define G_028A94_MATCH_ALL_BITS(x) (((x) >> 1) & 0x1) 11380 #define C_028A94_MATCH_ALL_BITS 0xFFFFFFFD 11381 #define R_028A98_VGT_DRAW_PAYLOAD_CNTL 0x028A98 /* >= gfx9 */ 11382 #define S_028A98_OBJPRIM_ID_EN(x) (((unsigned)(x) & 0x1) << 0) /* gfx9, gfx10 */ 11383 #define G_028A98_OBJPRIM_ID_EN(x) (((x) >> 0) & 0x1) 11384 #define C_028A98_OBJPRIM_ID_EN 0xFFFFFFFE 11385 #define S_028A98_EN_REG_RT_INDEX(x) (((unsigned)(x) & 0x1) << 1) 11386 #define G_028A98_EN_REG_RT_INDEX(x) (((x) >> 1) & 0x1) 11387 #define C_028A98_EN_REG_RT_INDEX 0xFFFFFFFD 11388 #define S_028A98_EN_PIPELINE_PRIMID(x) (((unsigned)(x) & 0x1) << 2) /* gfx9 */ 11389 #define G_028A98_EN_PIPELINE_PRIMID(x) (((x) >> 2) & 0x1) 11390 #define C_028A98_EN_PIPELINE_PRIMID 0xFFFFFFFB 11391 #define S_028A98_OBJECT_ID_INST_EN_GFX10(x) (((unsigned)(x) & 0x1) << 2) /* gfx10 */ 11392 #define G_028A98_OBJECT_ID_INST_EN_GFX10(x) (((x) >> 2) & 0x1) 11393 #define C_028A98_OBJECT_ID_INST_EN_GFX10 0xFFFFFFFB 11394 #define S_028A98_EN_PRIM_PAYLOAD(x) (((unsigned)(x) & 0x1) << 3) /* >= gfx10 */ 11395 #define G_028A98_EN_PRIM_PAYLOAD(x) (((x) >> 3) & 0x1) 11396 #define C_028A98_EN_PRIM_PAYLOAD 0xFFFFFFF7 11397 #define S_028A98_OBJECT_ID_INST_EN_GFX9(x) (((unsigned)(x) & 0x1) << 3) /* gfx9 */ 11398 #define G_028A98_OBJECT_ID_INST_EN_GFX9(x) (((x) >> 3) & 0x1) 11399 #define C_028A98_OBJECT_ID_INST_EN_GFX9 0xFFFFFFF7 11400 #define S_028A98_EN_DRAW_VP(x) (((unsigned)(x) & 0x1) << 4) /* >= gfx10 */ 11401 #define G_028A98_EN_DRAW_VP(x) (((x) >> 4) & 0x1) 11402 #define C_028A98_EN_DRAW_VP 0xFFFFFFEF 11403 #define S_028A98_EN_VRS_RATE(x) (((unsigned)(x) & 0x1) << 6) /* >= gfx103 */ 11404 #define G_028A98_EN_VRS_RATE(x) (((x) >> 6) & 0x1) 11405 #define C_028A98_EN_VRS_RATE 0xFFFFFFBF 11406 #define R_028AA0_VGT_INSTANCE_STEP_RATE_0 0x028AA0 11407 #define R_028AA4_VGT_INSTANCE_STEP_RATE_1 0x028AA4 11408 #define R_028AA8_IA_MULTI_VGT_PARAM 0x028AA8 /* <= gfx81, >= gfx10 */ 11409 #define S_028AA8_PRIMGROUP_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 11410 #define G_028AA8_PRIMGROUP_SIZE(x) (((x) >> 0) & 0xFFFF) 11411 #define C_028AA8_PRIMGROUP_SIZE 0xFFFF0000 11412 #define S_028AA8_PARTIAL_VS_WAVE_ON(x) (((unsigned)(x) & 0x1) << 16) 11413 #define G_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1) 11414 #define C_028AA8_PARTIAL_VS_WAVE_ON 0xFFFEFFFF 11415 #define S_028AA8_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 17) 11416 #define G_028AA8_SWITCH_ON_EOP(x) (((x) >> 17) & 0x1) 11417 #define C_028AA8_SWITCH_ON_EOP 0xFFFDFFFF 11418 #define S_028AA8_PARTIAL_ES_WAVE_ON(x) (((unsigned)(x) & 0x1) << 18) 11419 #define G_028AA8_PARTIAL_ES_WAVE_ON(x) (((x) >> 18) & 0x1) 11420 #define C_028AA8_PARTIAL_ES_WAVE_ON 0xFFFBFFFF 11421 #define S_028AA8_SWITCH_ON_EOI(x) (((unsigned)(x) & 0x1) << 19) 11422 #define G_028AA8_SWITCH_ON_EOI(x) (((x) >> 19) & 0x1) 11423 #define C_028AA8_SWITCH_ON_EOI 0xFFF7FFFF 11424 #define S_028AA8_WD_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 20) 11425 #define G_028AA8_WD_SWITCH_ON_EOP(x) (((x) >> 20) & 0x1) 11426 #define C_028AA8_WD_SWITCH_ON_EOP 0xFFEFFFFF 11427 #define S_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((unsigned)(x) & 0xF) << 28) /* gfx8, gfx81 */ 11428 #define G_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((x) >> 28) & 0xF) 11429 #define C_028AA8_MAX_PRIMGRP_IN_WAVE 0x0FFFFFFF 11430 #define R_028AAC_VGT_ESGS_RING_ITEMSIZE 0x028AAC 11431 #define S_028AAC_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 11432 #define G_028AAC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 11433 #define C_028AAC_ITEMSIZE 0xFFFF8000 11434 #define R_028AB0_VGT_GSVS_RING_ITEMSIZE 0x028AB0 11435 #define S_028AB0_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 11436 #define G_028AB0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 11437 #define C_028AB0_ITEMSIZE 0xFFFF8000 11438 #define R_028AB4_VGT_REUSE_OFF 0x028AB4 11439 #define S_028AB4_REUSE_OFF(x) (((unsigned)(x) & 0x1) << 0) 11440 #define G_028AB4_REUSE_OFF(x) (((x) >> 0) & 0x1) 11441 #define C_028AB4_REUSE_OFF 0xFFFFFFFE 11442 #define R_028AB8_VGT_VTX_CNT_EN 0x028AB8 11443 #define S_028AB8_VTX_CNT_EN(x) (((unsigned)(x) & 0x1) << 0) 11444 #define G_028AB8_VTX_CNT_EN(x) (((x) >> 0) & 0x1) 11445 #define C_028AB8_VTX_CNT_EN 0xFFFFFFFE 11446 #define R_028ABC_DB_HTILE_SURFACE 0x028ABC 11447 #define S_028ABC_LINEAR(x) (((unsigned)(x) & 0x1) << 0) /* <= gfx81 */ 11448 #define G_028ABC_LINEAR(x) (((x) >> 0) & 0x1) 11449 #define C_028ABC_LINEAR 0xFFFFFFFE 11450 #define S_028ABC_RESERVED_FIELD_1(x) (((unsigned)(x) & 0x1) << 0) /* >= gfx10 */ 11451 #define G_028ABC_RESERVED_FIELD_1(x) (((x) >> 0) & 0x1) 11452 #define C_028ABC_RESERVED_FIELD_1 0xFFFFFFFE 11453 #define S_028ABC_FULL_CACHE(x) (((unsigned)(x) & 0x1) << 1) 11454 #define G_028ABC_FULL_CACHE(x) (((x) >> 1) & 0x1) 11455 #define C_028ABC_FULL_CACHE 0xFFFFFFFD 11456 #define S_028ABC_HTILE_USES_PRELOAD_WIN(x) (((unsigned)(x) & 0x1) << 2) /* <= gfx9 */ 11457 #define G_028ABC_HTILE_USES_PRELOAD_WIN(x) (((x) >> 2) & 0x1) 11458 #define C_028ABC_HTILE_USES_PRELOAD_WIN 0xFFFFFFFB 11459 #define S_028ABC_RESERVED_FIELD_2(x) (((unsigned)(x) & 0x1) << 2) /* >= gfx10 */ 11460 #define G_028ABC_RESERVED_FIELD_2(x) (((x) >> 2) & 0x1) 11461 #define C_028ABC_RESERVED_FIELD_2 0xFFFFFFFB 11462 #define S_028ABC_PRELOAD(x) (((unsigned)(x) & 0x1) << 3) /* <= gfx9 */ 11463 #define G_028ABC_PRELOAD(x) (((x) >> 3) & 0x1) 11464 #define C_028ABC_PRELOAD 0xFFFFFFF7 11465 #define S_028ABC_RESERVED_FIELD_3(x) (((unsigned)(x) & 0x1) << 3) /* >= gfx10 */ 11466 #define G_028ABC_RESERVED_FIELD_3(x) (((x) >> 3) & 0x1) 11467 #define C_028ABC_RESERVED_FIELD_3 0xFFFFFFF7 11468 #define S_028ABC_PREFETCH_WIDTH(x) (((unsigned)(x) & 0x3F) << 4) /* <= gfx9 */ 11469 #define G_028ABC_PREFETCH_WIDTH(x) (((x) >> 4) & 0x3F) 11470 #define C_028ABC_PREFETCH_WIDTH 0xFFFFFC0F 11471 #define S_028ABC_RESERVED_FIELD_4(x) (((unsigned)(x) & 0x3F) << 4) /* >= gfx10 */ 11472 #define G_028ABC_RESERVED_FIELD_4(x) (((x) >> 4) & 0x3F) 11473 #define C_028ABC_RESERVED_FIELD_4 0xFFFFFC0F 11474 #define S_028ABC_PREFETCH_HEIGHT(x) (((unsigned)(x) & 0x3F) << 10) /* <= gfx9 */ 11475 #define G_028ABC_PREFETCH_HEIGHT(x) (((x) >> 10) & 0x3F) 11476 #define C_028ABC_PREFETCH_HEIGHT 0xFFFF03FF 11477 #define S_028ABC_RESERVED_FIELD_5(x) (((unsigned)(x) & 0x3F) << 10) /* >= gfx10 */ 11478 #define G_028ABC_RESERVED_FIELD_5(x) (((x) >> 10) & 0x3F) 11479 #define C_028ABC_RESERVED_FIELD_5 0xFFFF03FF 11480 #define S_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((unsigned)(x) & 0x1) << 16) 11481 #define G_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((x) >> 16) & 0x1) 11482 #define C_028ABC_DST_OUTSIDE_ZERO_TO_ONE 0xFFFEFFFF 11483 #define S_028ABC_RESERVED_FIELD_6(x) (((unsigned)(x) & 0x1) << 17) /* >= gfx10 */ 11484 #define G_028ABC_RESERVED_FIELD_6(x) (((x) >> 17) & 0x1) 11485 #define C_028ABC_RESERVED_FIELD_6 0xFFFDFFFF 11486 #define S_028ABC_TC_COMPATIBLE(x) (((unsigned)(x) & 0x1) << 17) /* gfx8, gfx81 */ 11487 #define G_028ABC_TC_COMPATIBLE(x) (((x) >> 17) & 0x1) 11488 #define C_028ABC_TC_COMPATIBLE 0xFFFDFFFF 11489 #define S_028ABC_PIPE_ALIGNED(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx9 */ 11490 #define G_028ABC_PIPE_ALIGNED(x) (((x) >> 18) & 0x1) 11491 #define C_028ABC_PIPE_ALIGNED 0xFFFBFFFF 11492 #define S_028ABC_RB_ALIGNED(x) (((unsigned)(x) & 0x1) << 19) /* gfx9 */ 11493 #define G_028ABC_RB_ALIGNED(x) (((x) >> 19) & 0x1) 11494 #define C_028ABC_RB_ALIGNED 0xFFF7FFFF 11495 #define S_028ABC_VRS_HTILE_ENCODING(x) (((unsigned)(x) & 0x3) << 19) /* >= gfx103 */ 11496 #define G_028ABC_VRS_HTILE_ENCODING(x) (((x) >> 19) & 0x3) 11497 #define C_028ABC_VRS_HTILE_ENCODING 0xFFE7FFFF 11498 #define V_028ABC_VRS_HTILE_DISABLE 0 11499 #define V_028ABC_VRS_HTILE_2BIT_ENCODING 1 11500 #define V_028ABC_VRS_HTILE_4BIT_ENCODING 2 11501 #define R_028AC0_DB_SRESULTS_COMPARE_STATE0 0x028AC0 11502 #define S_028AC0_COMPAREFUNC0(x) (((unsigned)(x) & 0x7) << 0) 11503 #define G_028AC0_COMPAREFUNC0(x) (((x) >> 0) & 0x7) 11504 #define C_028AC0_COMPAREFUNC0 0xFFFFFFF8 11505 #define V_028AC0_FRAG_NEVER 0 11506 #define V_028AC0_FRAG_LESS 1 11507 #define V_028AC0_FRAG_EQUAL 2 11508 #define V_028AC0_FRAG_LEQUAL 3 11509 #define V_028AC0_FRAG_GREATER 4 11510 #define V_028AC0_FRAG_NOTEQUAL 5 11511 #define V_028AC0_FRAG_GEQUAL 6 11512 #define V_028AC0_FRAG_ALWAYS 7 11513 #define S_028AC0_COMPAREVALUE0(x) (((unsigned)(x) & 0xFF) << 4) 11514 #define G_028AC0_COMPAREVALUE0(x) (((x) >> 4) & 0xFF) 11515 #define C_028AC0_COMPAREVALUE0 0xFFFFF00F 11516 #define S_028AC0_COMPAREMASK0(x) (((unsigned)(x) & 0xFF) << 12) 11517 #define G_028AC0_COMPAREMASK0(x) (((x) >> 12) & 0xFF) 11518 #define C_028AC0_COMPAREMASK0 0xFFF00FFF 11519 #define S_028AC0_ENABLE0(x) (((unsigned)(x) & 0x1) << 24) 11520 #define G_028AC0_ENABLE0(x) (((x) >> 24) & 0x1) 11521 #define C_028AC0_ENABLE0 0xFEFFFFFF 11522 #define R_028AC4_DB_SRESULTS_COMPARE_STATE1 0x028AC4 11523 #define S_028AC4_COMPAREFUNC1(x) (((unsigned)(x) & 0x7) << 0) 11524 #define G_028AC4_COMPAREFUNC1(x) (((x) >> 0) & 0x7) 11525 #define C_028AC4_COMPAREFUNC1 0xFFFFFFF8 11526 #define V_028AC4_FRAG_NEVER 0 11527 #define V_028AC4_FRAG_LESS 1 11528 #define V_028AC4_FRAG_EQUAL 2 11529 #define V_028AC4_FRAG_LEQUAL 3 11530 #define V_028AC4_FRAG_GREATER 4 11531 #define V_028AC4_FRAG_NOTEQUAL 5 11532 #define V_028AC4_FRAG_GEQUAL 6 11533 #define V_028AC4_FRAG_ALWAYS 7 11534 #define S_028AC4_COMPAREVALUE1(x) (((unsigned)(x) & 0xFF) << 4) 11535 #define G_028AC4_COMPAREVALUE1(x) (((x) >> 4) & 0xFF) 11536 #define C_028AC4_COMPAREVALUE1 0xFFFFF00F 11537 #define S_028AC4_COMPAREMASK1(x) (((unsigned)(x) & 0xFF) << 12) 11538 #define G_028AC4_COMPAREMASK1(x) (((x) >> 12) & 0xFF) 11539 #define C_028AC4_COMPAREMASK1 0xFFF00FFF 11540 #define S_028AC4_ENABLE1(x) (((unsigned)(x) & 0x1) << 24) 11541 #define G_028AC4_ENABLE1(x) (((x) >> 24) & 0x1) 11542 #define C_028AC4_ENABLE1 0xFEFFFFFF 11543 #define R_028AC8_DB_PRELOAD_CONTROL 0x028AC8 11544 #define S_028AC8_START_X(x) (((unsigned)(x) & 0xFF) << 0) 11545 #define G_028AC8_START_X(x) (((x) >> 0) & 0xFF) 11546 #define C_028AC8_START_X 0xFFFFFF00 11547 #define S_028AC8_START_Y(x) (((unsigned)(x) & 0xFF) << 8) 11548 #define G_028AC8_START_Y(x) (((x) >> 8) & 0xFF) 11549 #define C_028AC8_START_Y 0xFFFF00FF 11550 #define S_028AC8_MAX_X(x) (((unsigned)(x) & 0xFF) << 16) 11551 #define G_028AC8_MAX_X(x) (((x) >> 16) & 0xFF) 11552 #define C_028AC8_MAX_X 0xFF00FFFF 11553 #define S_028AC8_MAX_Y(x) (((unsigned)(x) & 0xFF) << 24) 11554 #define G_028AC8_MAX_Y(x) (((x) >> 24) & 0xFF) 11555 #define C_028AC8_MAX_Y 0x00FFFFFF 11556 #define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0 11557 #define R_028AD4_VGT_STRMOUT_VTX_STRIDE_0 0x028AD4 11558 #define S_028AD4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) 11559 #define G_028AD4_STRIDE(x) (((x) >> 0) & 0x3FF) 11560 #define C_028AD4_STRIDE 0xFFFFFC00 11561 #define R_028ADC_VGT_STRMOUT_BUFFER_OFFSET_0 0x028ADC 11562 #define R_028AE0_VGT_STRMOUT_BUFFER_SIZE_1 0x028AE0 11563 #define R_028AE4_VGT_STRMOUT_VTX_STRIDE_1 0x028AE4 11564 #define R_028AEC_VGT_STRMOUT_BUFFER_OFFSET_1 0x028AEC 11565 #define R_028AF0_VGT_STRMOUT_BUFFER_SIZE_2 0x028AF0 11566 #define R_028AF4_VGT_STRMOUT_VTX_STRIDE_2 0x028AF4 11567 #define R_028AFC_VGT_STRMOUT_BUFFER_OFFSET_2 0x028AFC 11568 #define R_028B00_VGT_STRMOUT_BUFFER_SIZE_3 0x028B00 11569 #define R_028B04_VGT_STRMOUT_VTX_STRIDE_3 0x028B04 11570 #define R_028B0C_VGT_STRMOUT_BUFFER_OFFSET_3 0x028B0C 11571 #define R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET 0x028B28 11572 #define R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0x028B2C 11573 #define R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0x028B30 11574 #define S_028B30_VERTEX_STRIDE(x) (((unsigned)(x) & 0x1FF) << 0) 11575 #define G_028B30_VERTEX_STRIDE(x) (((x) >> 0) & 0x1FF) 11576 #define C_028B30_VERTEX_STRIDE 0xFFFFFE00 11577 #define R_028B38_VGT_GS_MAX_VERT_OUT 0x028B38 11578 #define S_028B38_MAX_VERT_OUT(x) (((unsigned)(x) & 0x7FF) << 0) 11579 #define G_028B38_MAX_VERT_OUT(x) (((x) >> 0) & 0x7FF) 11580 #define C_028B38_MAX_VERT_OUT 0xFFFFF800 11581 #define R_028B4C_GE_NGG_SUBGRP_CNTL 0x028B4C /* >= gfx10 */ 11582 #define S_028B4C_PRIM_AMP_FACTOR(x) (((unsigned)(x) & 0x1FF) << 0) 11583 #define G_028B4C_PRIM_AMP_FACTOR(x) (((x) >> 0) & 0x1FF) 11584 #define C_028B4C_PRIM_AMP_FACTOR 0xFFFFFE00 11585 #define S_028B4C_THDS_PER_SUBGRP(x) (((unsigned)(x) & 0x1FF) << 9) 11586 #define G_028B4C_THDS_PER_SUBGRP(x) (((x) >> 9) & 0x1FF) 11587 #define C_028B4C_THDS_PER_SUBGRP 0xFFFC01FF 11588 #define R_028B50_VGT_TESS_DISTRIBUTION 0x028B50 /* >= gfx8 */ 11589 #define S_028B50_ACCUM_ISOLINE(x) (((unsigned)(x) & 0xFF) << 0) 11590 #define G_028B50_ACCUM_ISOLINE(x) (((x) >> 0) & 0xFF) 11591 #define C_028B50_ACCUM_ISOLINE 0xFFFFFF00 11592 #define S_028B50_ACCUM_TRI(x) (((unsigned)(x) & 0xFF) << 8) 11593 #define G_028B50_ACCUM_TRI(x) (((x) >> 8) & 0xFF) 11594 #define C_028B50_ACCUM_TRI 0xFFFF00FF 11595 #define S_028B50_ACCUM_QUAD(x) (((unsigned)(x) & 0xFF) << 16) 11596 #define G_028B50_ACCUM_QUAD(x) (((x) >> 16) & 0xFF) 11597 #define C_028B50_ACCUM_QUAD 0xFF00FFFF 11598 #define S_028B50_DONUT_SPLIT_GFX81(x) (((unsigned)(x) & 0xFF) << 24) /* gfx81 */ 11599 #define G_028B50_DONUT_SPLIT_GFX81(x) (((x) >> 24) & 0xFF) 11600 #define C_028B50_DONUT_SPLIT_GFX81 0x00FFFFFF 11601 #define S_028B50_DONUT_SPLIT_GFX9(x) (((unsigned)(x) & 0x1F) << 24) /* >= gfx9 */ 11602 #define G_028B50_DONUT_SPLIT_GFX9(x) (((x) >> 24) & 0x1F) 11603 #define C_028B50_DONUT_SPLIT_GFX9 0xE0FFFFFF 11604 #define S_028B50_TRAP_SPLIT(x) (((unsigned)(x) & 0x7) << 29) /* >= gfx9 */ 11605 #define G_028B50_TRAP_SPLIT(x) (((x) >> 29) & 0x7) 11606 #define C_028B50_TRAP_SPLIT 0x1FFFFFFF 11607 #define R_028B54_VGT_SHADER_STAGES_EN 0x028B54 11608 #define S_028B54_LS_EN(x) (((unsigned)(x) & 0x3) << 0) 11609 #define G_028B54_LS_EN(x) (((x) >> 0) & 0x3) 11610 #define C_028B54_LS_EN 0xFFFFFFFC 11611 #define V_028B54_LS_STAGE_OFF 0 11612 #define V_028B54_LS_STAGE_ON 1 11613 #define V_028B54_CS_STAGE_ON 2 11614 #define V_028B54_RESERVED_LS 3 11615 #define S_028B54_HS_EN(x) (((unsigned)(x) & 0x1) << 2) 11616 #define G_028B54_HS_EN(x) (((x) >> 2) & 0x1) 11617 #define C_028B54_HS_EN 0xFFFFFFFB 11618 #define V_028B54_HS_STAGE_OFF 0 11619 #define V_028B54_HS_STAGE_ON 1 11620 #define S_028B54_ES_EN(x) (((unsigned)(x) & 0x3) << 3) 11621 #define G_028B54_ES_EN(x) (((x) >> 3) & 0x3) 11622 #define C_028B54_ES_EN 0xFFFFFFE7 11623 #define V_028B54_ES_STAGE_OFF 0 11624 #define V_028B54_ES_STAGE_DS 1 11625 #define V_028B54_ES_STAGE_REAL 2 11626 #define V_028B54_RESERVED_ES 3 11627 #define S_028B54_GS_EN(x) (((unsigned)(x) & 0x1) << 5) 11628 #define G_028B54_GS_EN(x) (((x) >> 5) & 0x1) 11629 #define C_028B54_GS_EN 0xFFFFFFDF 11630 #define V_028B54_GS_STAGE_OFF 0 11631 #define V_028B54_GS_STAGE_ON 1 11632 #define S_028B54_VS_EN(x) (((unsigned)(x) & 0x3) << 6) 11633 #define G_028B54_VS_EN(x) (((x) >> 6) & 0x3) 11634 #define C_028B54_VS_EN 0xFFFFFF3F 11635 #define V_028B54_VS_STAGE_REAL 0 11636 #define V_028B54_VS_STAGE_DS 1 11637 #define V_028B54_VS_STAGE_COPY_SHADER 2 11638 #define V_028B54_RESERVED_VS 3 11639 #define S_028B54_DYNAMIC_HS(x) (((unsigned)(x) & 0x1) << 8) /* <= gfx81, >= gfx10 */ 11640 #define G_028B54_DYNAMIC_HS(x) (((x) >> 8) & 0x1) 11641 #define C_028B54_DYNAMIC_HS 0xFFFFFEFF 11642 #define S_028B54_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 9) /* >= gfx8 */ 11643 #define G_028B54_DISPATCH_DRAW_EN(x) (((x) >> 9) & 0x1) 11644 #define C_028B54_DISPATCH_DRAW_EN 0xFFFFFDFF 11645 #define S_028B54_DIS_DEALLOC_ACCUM_0(x) (((unsigned)(x) & 0x1) << 10) /* >= gfx8 */ 11646 #define G_028B54_DIS_DEALLOC_ACCUM_0(x) (((x) >> 10) & 0x1) 11647 #define C_028B54_DIS_DEALLOC_ACCUM_0 0xFFFFFBFF 11648 #define S_028B54_DIS_DEALLOC_ACCUM_1(x) (((unsigned)(x) & 0x1) << 11) /* >= gfx8 */ 11649 #define G_028B54_DIS_DEALLOC_ACCUM_1(x) (((x) >> 11) & 0x1) 11650 #define C_028B54_DIS_DEALLOC_ACCUM_1 0xFFFFF7FF 11651 #define S_028B54_VS_WAVE_ID_EN(x) (((unsigned)(x) & 0x1) << 12) /* >= gfx8 */ 11652 #define G_028B54_VS_WAVE_ID_EN(x) (((x) >> 12) & 0x1) 11653 #define C_028B54_VS_WAVE_ID_EN 0xFFFFEFFF 11654 #define S_028B54_PRIMGEN_EN(x) (((unsigned)(x) & 0x1) << 13) /* >= gfx9 */ 11655 #define G_028B54_PRIMGEN_EN(x) (((x) >> 13) & 0x1) 11656 #define C_028B54_PRIMGEN_EN 0xFFFFDFFF 11657 #define S_028B54_ORDERED_ID_MODE(x) (((unsigned)(x) & 0x1) << 14) /* >= gfx9 */ 11658 #define G_028B54_ORDERED_ID_MODE(x) (((x) >> 14) & 0x1) 11659 #define C_028B54_ORDERED_ID_MODE 0xFFFFBFFF 11660 #define S_028B54_MAX_PRIMGRP_IN_WAVE(x) (((unsigned)(x) & 0xF) << 15) /* >= gfx9 */ 11661 #define G_028B54_MAX_PRIMGRP_IN_WAVE(x) (((x) >> 15) & 0xF) 11662 #define C_028B54_MAX_PRIMGRP_IN_WAVE 0xFFF87FFF 11663 #define S_028B54_GS_FAST_LAUNCH(x) (((unsigned)(x) & 0x3) << 19) /* >= gfx9 */ 11664 #define G_028B54_GS_FAST_LAUNCH(x) (((x) >> 19) & 0x3) 11665 #define C_028B54_GS_FAST_LAUNCH 0xFFE7FFFF 11666 #define S_028B54_HS_W32_EN(x) (((unsigned)(x) & 0x1) << 21) /* >= gfx10 */ 11667 #define G_028B54_HS_W32_EN(x) (((x) >> 21) & 0x1) 11668 #define C_028B54_HS_W32_EN 0xFFDFFFFF 11669 #define S_028B54_GS_W32_EN(x) (((unsigned)(x) & 0x1) << 22) /* >= gfx10 */ 11670 #define G_028B54_GS_W32_EN(x) (((x) >> 22) & 0x1) 11671 #define C_028B54_GS_W32_EN 0xFFBFFFFF 11672 #define S_028B54_VS_W32_EN(x) (((unsigned)(x) & 0x1) << 23) /* >= gfx10 */ 11673 #define G_028B54_VS_W32_EN(x) (((x) >> 23) & 0x1) 11674 #define C_028B54_VS_W32_EN 0xFF7FFFFF 11675 #define S_028B54_NGG_WAVE_ID_EN(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx10 */ 11676 #define G_028B54_NGG_WAVE_ID_EN(x) (((x) >> 24) & 0x1) 11677 #define C_028B54_NGG_WAVE_ID_EN 0xFEFFFFFF 11678 #define S_028B54_PRIMGEN_PASSTHRU_EN(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx10 */ 11679 #define G_028B54_PRIMGEN_PASSTHRU_EN(x) (((x) >> 25) & 0x1) 11680 #define C_028B54_PRIMGEN_PASSTHRU_EN 0xFDFFFFFF 11681 #define S_028B54_PRIMGEN_PASSTHRU_NO_MSG(x) (((unsigned)(x) & 0x1) << 26) /* >= gfx103 */ 11682 #define G_028B54_PRIMGEN_PASSTHRU_NO_MSG(x) (((x) >> 26) & 0x1) 11683 #define C_028B54_PRIMGEN_PASSTHRU_NO_MSG 0xFBFFFFFF 11684 #define R_028B58_VGT_LS_HS_CONFIG 0x028B58 11685 #define S_028B58_NUM_PATCHES(x) (((unsigned)(x) & 0xFF) << 0) 11686 #define G_028B58_NUM_PATCHES(x) (((x) >> 0) & 0xFF) 11687 #define C_028B58_NUM_PATCHES 0xFFFFFF00 11688 #define S_028B58_HS_NUM_INPUT_CP(x) (((unsigned)(x) & 0x3F) << 8) 11689 #define G_028B58_HS_NUM_INPUT_CP(x) (((x) >> 8) & 0x3F) 11690 #define C_028B58_HS_NUM_INPUT_CP 0xFFFFC0FF 11691 #define S_028B58_HS_NUM_OUTPUT_CP(x) (((unsigned)(x) & 0x3F) << 14) 11692 #define G_028B58_HS_NUM_OUTPUT_CP(x) (((x) >> 14) & 0x3F) 11693 #define C_028B58_HS_NUM_OUTPUT_CP 0xFFF03FFF 11694 #define R_028B5C_VGT_GS_VERT_ITEMSIZE 0x028B5C 11695 #define S_028B5C_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 11696 #define G_028B5C_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 11697 #define C_028B5C_ITEMSIZE 0xFFFF8000 11698 #define R_028B60_VGT_GS_VERT_ITEMSIZE_1 0x028B60 11699 #define S_028B60_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 11700 #define G_028B60_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 11701 #define C_028B60_ITEMSIZE 0xFFFF8000 11702 #define R_028B64_VGT_GS_VERT_ITEMSIZE_2 0x028B64 11703 #define R_028B68_VGT_GS_VERT_ITEMSIZE_3 0x028B68 11704 #define R_028B6C_VGT_TF_PARAM 0x028B6C 11705 #define S_028B6C_TYPE(x) (((unsigned)(x) & 0x3) << 0) 11706 #define G_028B6C_TYPE(x) (((x) >> 0) & 0x3) 11707 #define C_028B6C_TYPE 0xFFFFFFFC 11708 #define V_028B6C_TESS_ISOLINE 0 11709 #define V_028B6C_TESS_TRIANGLE 1 11710 #define V_028B6C_TESS_QUAD 2 11711 #define S_028B6C_PARTITIONING(x) (((unsigned)(x) & 0x7) << 2) 11712 #define G_028B6C_PARTITIONING(x) (((x) >> 2) & 0x7) 11713 #define C_028B6C_PARTITIONING 0xFFFFFFE3 11714 #define V_028B6C_PART_INTEGER 0 11715 #define V_028B6C_PART_POW2 1 11716 #define V_028B6C_PART_FRAC_ODD 2 11717 #define V_028B6C_PART_FRAC_EVEN 3 11718 #define S_028B6C_TOPOLOGY(x) (((unsigned)(x) & 0x7) << 5) 11719 #define G_028B6C_TOPOLOGY(x) (((x) >> 5) & 0x7) 11720 #define C_028B6C_TOPOLOGY 0xFFFFFF1F 11721 #define V_028B6C_OUTPUT_POINT 0 11722 #define V_028B6C_OUTPUT_LINE 1 11723 #define V_028B6C_OUTPUT_TRIANGLE_CW 2 11724 #define V_028B6C_OUTPUT_TRIANGLE_CCW 3 11725 #define S_028B6C_RESERVED_REDUC_AXIS(x) (((unsigned)(x) & 0x1) << 8) 11726 #define G_028B6C_RESERVED_REDUC_AXIS(x) (((x) >> 8) & 0x1) 11727 #define C_028B6C_RESERVED_REDUC_AXIS 0xFFFFFEFF 11728 #define S_028B6C_DEPRECATED(x) (((unsigned)(x) & 0x1) << 9) 11729 #define G_028B6C_DEPRECATED(x) (((x) >> 9) & 0x1) 11730 #define C_028B6C_DEPRECATED 0xFFFFFDFF 11731 #define S_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((unsigned)(x) & 0xF) << 10) /* <= gfx81, >= gfx10 */ 11732 #define G_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((x) >> 10) & 0xF) 11733 #define C_028B6C_NUM_DS_WAVES_PER_SIMD 0xFFFFC3FF 11734 #define S_028B6C_DISABLE_DONUTS(x) (((unsigned)(x) & 0x1) << 14) 11735 #define G_028B6C_DISABLE_DONUTS(x) (((x) >> 14) & 0x1) 11736 #define C_028B6C_DISABLE_DONUTS 0xFFFFBFFF 11737 #define S_028B6C_RDREQ_POLICY(x) (((unsigned)(x) & 0x3) << 15) 11738 #define G_028B6C_RDREQ_POLICY(x) (((x) >> 15) & 0x3) 11739 #define C_028B6C_RDREQ_POLICY 0xFFFE7FFF 11740 #define V_028B6C_VGT_POLICY_LRU 0 11741 #define V_028B6C_VGT_POLICY_STREAM 1 11742 #define V_028B6C_VGT_POLICY_BYPASS 2 /* <= gfx7, >= gfx10 */ 11743 #define V_028B6C_VGT_POLICY_RESERVED 3 /* <= gfx7 */ 11744 #define S_028B6C_DISTRIBUTION_MODE(x) (((unsigned)(x) & 0x3) << 17) /* >= gfx8 */ 11745 #define G_028B6C_DISTRIBUTION_MODE(x) (((x) >> 17) & 0x3) 11746 #define C_028B6C_DISTRIBUTION_MODE 0xFFF9FFFF 11747 #define V_028B6C_NO_DIST 0 11748 #define V_028B6C_PATCHES 1 11749 #define V_028B6C_DONUTS 2 11750 #define V_028B6C_TRAPEZOIDS 3 /* >= gfx9 */ 11751 #define S_028B6C_DETECT_ONE(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx10 */ 11752 #define G_028B6C_DETECT_ONE(x) (((x) >> 19) & 0x1) 11753 #define C_028B6C_DETECT_ONE 0xFFF7FFFF 11754 #define V_028B6C_PRE_CLAMP_TF1 0 11755 #define V_028B6C_POST_CLAMP_TF1 1 11756 #define V_028B6C_DISABLE_TF1 2 11757 #define S_028B6C_MTYPE_GFX8(x) (((unsigned)(x) & 0x3) << 19) /* gfx8, gfx81 */ 11758 #define G_028B6C_MTYPE_GFX8(x) (((x) >> 19) & 0x3) 11759 #define C_028B6C_MTYPE_GFX8 0xFFE7FFFF 11760 #define S_028B6C_DETECT_ZERO(x) (((unsigned)(x) & 0x1) << 20) /* >= gfx10 */ 11761 #define G_028B6C_DETECT_ZERO(x) (((x) >> 20) & 0x1) 11762 #define C_028B6C_DETECT_ZERO 0xFFEFFFFF 11763 #define V_028B6C_PRE_CLAMP_TF0 0 11764 #define V_028B6C_POST_CLAMP_TF0 1 11765 #define V_028B6C_DISABLE_TF0 2 11766 #define S_028B6C_MTYPE_GFX10(x) (((unsigned)(x) & 0x7) << 23) /* >= gfx10 */ 11767 #define G_028B6C_MTYPE_GFX10(x) (((x) >> 23) & 0x7) 11768 #define C_028B6C_MTYPE_GFX10 0xFC7FFFFF 11769 #define R_028B70_DB_ALPHA_TO_MASK 0x028B70 11770 #define S_028B70_ALPHA_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 11771 #define G_028B70_ALPHA_TO_MASK_ENABLE(x) (((x) >> 0) & 0x1) 11772 #define C_028B70_ALPHA_TO_MASK_ENABLE 0xFFFFFFFE 11773 #define S_028B70_ALPHA_TO_MASK_OFFSET0(x) (((unsigned)(x) & 0x3) << 8) 11774 #define G_028B70_ALPHA_TO_MASK_OFFSET0(x) (((x) >> 8) & 0x3) 11775 #define C_028B70_ALPHA_TO_MASK_OFFSET0 0xFFFFFCFF 11776 #define S_028B70_ALPHA_TO_MASK_OFFSET1(x) (((unsigned)(x) & 0x3) << 10) 11777 #define G_028B70_ALPHA_TO_MASK_OFFSET1(x) (((x) >> 10) & 0x3) 11778 #define C_028B70_ALPHA_TO_MASK_OFFSET1 0xFFFFF3FF 11779 #define S_028B70_ALPHA_TO_MASK_OFFSET2(x) (((unsigned)(x) & 0x3) << 12) 11780 #define G_028B70_ALPHA_TO_MASK_OFFSET2(x) (((x) >> 12) & 0x3) 11781 #define C_028B70_ALPHA_TO_MASK_OFFSET2 0xFFFFCFFF 11782 #define S_028B70_ALPHA_TO_MASK_OFFSET3(x) (((unsigned)(x) & 0x3) << 14) 11783 #define G_028B70_ALPHA_TO_MASK_OFFSET3(x) (((x) >> 14) & 0x3) 11784 #define C_028B70_ALPHA_TO_MASK_OFFSET3 0xFFFF3FFF 11785 #define S_028B70_OFFSET_ROUND(x) (((unsigned)(x) & 0x1) << 16) 11786 #define G_028B70_OFFSET_ROUND(x) (((x) >> 16) & 0x1) 11787 #define C_028B70_OFFSET_ROUND 0xFFFEFFFF 11788 #define R_028B74_VGT_DISPATCH_DRAW_INDEX 0x028B74 /* >= gfx7 */ 11789 #define R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL 0x028B78 11790 #define S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((unsigned)(x) & 0xFF) << 0) 11791 #define G_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((x) >> 0) & 0xFF) 11792 #define C_028B78_POLY_OFFSET_NEG_NUM_DB_BITS 0xFFFFFF00 11793 #define S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((unsigned)(x) & 0x1) << 8) 11794 #define G_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((x) >> 8) & 0x1) 11795 #define C_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT 0xFFFFFEFF 11796 #define R_028B7C_PA_SU_POLY_OFFSET_CLAMP 0x028B7C 11797 #define R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE 0x028B80 11798 #define R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET 0x028B84 11799 #define R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE 0x028B88 11800 #define R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET 0x028B8C 11801 #define R_028B90_VGT_GS_INSTANCE_CNT 0x028B90 11802 #define S_028B90_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 11803 #define G_028B90_ENABLE(x) (((x) >> 0) & 0x1) 11804 #define C_028B90_ENABLE 0xFFFFFFFE 11805 #define S_028B90_CNT(x) (((unsigned)(x) & 0x7F) << 2) 11806 #define G_028B90_CNT(x) (((x) >> 2) & 0x7F) 11807 #define C_028B90_CNT 0xFFFFFE03 11808 #define S_028B90_EN_MAX_VERT_OUT_PER_GS_INSTANCE(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx10 */ 11809 #define G_028B90_EN_MAX_VERT_OUT_PER_GS_INSTANCE(x) (((x) >> 31) & 0x1) 11810 #define C_028B90_EN_MAX_VERT_OUT_PER_GS_INSTANCE 0x7FFFFFFF 11811 #define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 11812 #define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) 11813 #define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) 11814 #define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE 11815 #define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) 11816 #define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) 11817 #define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD 11818 #define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) 11819 #define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) 11820 #define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB 11821 #define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) 11822 #define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) 11823 #define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 11824 #define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x7) << 4) 11825 #define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x7) 11826 #define C_028B94_RAST_STREAM 0xFFFFFF8F 11827 #define S_028B94_EN_PRIMS_NEEDED_CNT(x) (((unsigned)(x) & 0x1) << 7) /* >= gfx9 */ 11828 #define G_028B94_EN_PRIMS_NEEDED_CNT(x) (((x) >> 7) & 0x1) 11829 #define C_028B94_EN_PRIMS_NEEDED_CNT 0xFFFFFF7F 11830 #define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0xF) << 8) 11831 #define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0xF) 11832 #define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF 11833 #define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) 11834 #define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) 11835 #define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF 11836 #define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 11837 #define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0xF) << 0) 11838 #define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0xF) 11839 #define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 11840 #define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0xF) << 4) 11841 #define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0xF) 11842 #define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F 11843 #define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0xF) << 8) 11844 #define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0xF) 11845 #define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF 11846 #define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0xF) << 12) 11847 #define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0xF) 11848 #define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF 11849 #define R_028B9C_VGT_DMA_EVENT_INITIATOR 0x028B9C /* >= gfx9 */ 11850 #define S_028B9C_EVENT_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 11851 #define G_028B9C_EVENT_TYPE(x) (((x) >> 0) & 0x3F) 11852 #define C_028B9C_EVENT_TYPE 0xFFFFFFC0 11853 #define V_028B9C_Reserved_0x00 0 11854 #define V_028B9C_SAMPLE_STREAMOUTSTATS1 1 11855 #define V_028B9C_SAMPLE_STREAMOUTSTATS2 2 11856 #define V_028B9C_SAMPLE_STREAMOUTSTATS3 3 11857 #define V_028B9C_CACHE_FLUSH_TS 4 11858 #define V_028B9C_CONTEXT_DONE 5 11859 #define V_028B9C_CACHE_FLUSH 6 11860 #define V_028B9C_CS_PARTIAL_FLUSH 7 11861 #define V_028B9C_VGT_STREAMOUT_SYNC 8 11862 #define V_028B9C_Reserved_0x09 9 /* gfx9 */ 11863 #define V_028B9C_SET_FE_ID 9 /* >= gfx10 */ 11864 #define V_028B9C_VGT_STREAMOUT_RESET 10 11865 #define V_028B9C_END_OF_PIPE_INCR_DE 11 11866 #define V_028B9C_END_OF_PIPE_IB_END 12 11867 #define V_028B9C_RST_PIX_CNT 13 11868 #define V_028B9C_BREAK_BATCH 14 11869 #define V_028B9C_VS_PARTIAL_FLUSH 15 11870 #define V_028B9C_PS_PARTIAL_FLUSH 16 11871 #define V_028B9C_FLUSH_HS_OUTPUT 17 11872 #define V_028B9C_FLUSH_DFSM 18 11873 #define V_028B9C_RESET_TO_LOWEST_VGT 19 11874 #define V_028B9C_CACHE_FLUSH_AND_INV_TS_EVENT 20 11875 #define V_028B9C_ZPASS_DONE 21 11876 #define V_028B9C_CACHE_FLUSH_AND_INV_EVENT 22 11877 #define V_028B9C_PERFCOUNTER_START 23 11878 #define V_028B9C_PERFCOUNTER_STOP 24 11879 #define V_028B9C_PIPELINESTAT_START 25 11880 #define V_028B9C_PIPELINESTAT_STOP 26 11881 #define V_028B9C_PERFCOUNTER_SAMPLE 27 11882 #define V_028B9C_Available_0x1c 28 /* gfx9 */ 11883 #define V_028B9C_FLUSH_ES_OUTPUT 28 /* >= gfx10 */ 11884 #define V_028B9C_Available_0x1d 29 /* gfx9 */ 11885 #define V_028B9C_BIN_CONF_OVERRIDE_CHECK 29 /* >= gfx10 */ 11886 #define V_028B9C_SAMPLE_PIPELINESTAT 30 11887 #define V_028B9C_SO_VGTSTREAMOUT_FLUSH 31 11888 #define V_028B9C_SAMPLE_STREAMOUTSTATS 32 11889 #define V_028B9C_RESET_VTX_CNT 33 11890 #define V_028B9C_BLOCK_CONTEXT_DONE 34 11891 #define V_028B9C_CS_CONTEXT_DONE 35 11892 #define V_028B9C_VGT_FLUSH 36 11893 #define V_028B9C_TGID_ROLLOVER 37 11894 #define V_028B9C_SQ_NON_EVENT 38 11895 #define V_028B9C_SC_SEND_DB_VPZ 39 11896 #define V_028B9C_BOTTOM_OF_PIPE_TS 40 11897 #define V_028B9C_FLUSH_SX_TS 41 11898 #define V_028B9C_DB_CACHE_FLUSH_AND_INV 42 11899 #define V_028B9C_FLUSH_AND_INV_DB_DATA_TS 43 11900 #define V_028B9C_FLUSH_AND_INV_DB_META 44 11901 #define V_028B9C_FLUSH_AND_INV_CB_DATA_TS 45 11902 #define V_028B9C_FLUSH_AND_INV_CB_META 46 11903 #define V_028B9C_CS_DONE 47 11904 #define V_028B9C_PS_DONE 48 11905 #define V_028B9C_FLUSH_AND_INV_CB_PIXEL_DATA 49 11906 #define V_028B9C_SX_CB_RAT_ACK_REQUEST 50 11907 #define V_028B9C_THREAD_TRACE_START 51 11908 #define V_028B9C_THREAD_TRACE_STOP 52 11909 #define V_028B9C_THREAD_TRACE_MARKER 53 11910 #define V_028B9C_THREAD_TRACE_DRAW 54 /* >= gfx10 */ 11911 #define V_028B9C_THREAD_TRACE_FLUSH 54 /* gfx9 */ 11912 #define V_028B9C_THREAD_TRACE_FINISH 55 11913 #define V_028B9C_PIXEL_PIPE_STAT_CONTROL 56 11914 #define V_028B9C_PIXEL_PIPE_STAT_DUMP 57 11915 #define V_028B9C_PIXEL_PIPE_STAT_RESET 58 11916 #define V_028B9C_CONTEXT_SUSPEND 59 11917 #define V_028B9C_OFFCHIP_HS_DEALLOC 60 11918 #define V_028B9C_ENABLE_NGG_PIPELINE 61 11919 #define V_028B9C_ENABLE_LEGACY_PIPELINE 62 11920 #define V_028B9C_DRAW_DONE 63 /* >= gfx10 */ 11921 #define V_028B9C_Reserved_0x3f 63 /* gfx9 */ 11922 #define S_028B9C_ADDRESS_HI(x) (((unsigned)(x) & 0x1FFFF) << 10) 11923 #define G_028B9C_ADDRESS_HI(x) (((x) >> 10) & 0x1FFFF) 11924 #define C_028B9C_ADDRESS_HI 0xF80003FF 11925 #define S_028B9C_EXTENDED_EVENT(x) (((unsigned)(x) & 0x1) << 27) 11926 #define G_028B9C_EXTENDED_EVENT(x) (((x) >> 27) & 0x1) 11927 #define C_028B9C_EXTENDED_EVENT 0xF7FFFFFF 11928 #define R_028BD4_PA_SC_CENTROID_PRIORITY_0 0x028BD4 11929 #define S_028BD4_DISTANCE_0(x) (((unsigned)(x) & 0xF) << 0) 11930 #define G_028BD4_DISTANCE_0(x) (((x) >> 0) & 0xF) 11931 #define C_028BD4_DISTANCE_0 0xFFFFFFF0 11932 #define S_028BD4_DISTANCE_1(x) (((unsigned)(x) & 0xF) << 4) 11933 #define G_028BD4_DISTANCE_1(x) (((x) >> 4) & 0xF) 11934 #define C_028BD4_DISTANCE_1 0xFFFFFF0F 11935 #define S_028BD4_DISTANCE_2(x) (((unsigned)(x) & 0xF) << 8) 11936 #define G_028BD4_DISTANCE_2(x) (((x) >> 8) & 0xF) 11937 #define C_028BD4_DISTANCE_2 0xFFFFF0FF 11938 #define S_028BD4_DISTANCE_3(x) (((unsigned)(x) & 0xF) << 12) 11939 #define G_028BD4_DISTANCE_3(x) (((x) >> 12) & 0xF) 11940 #define C_028BD4_DISTANCE_3 0xFFFF0FFF 11941 #define S_028BD4_DISTANCE_4(x) (((unsigned)(x) & 0xF) << 16) 11942 #define G_028BD4_DISTANCE_4(x) (((x) >> 16) & 0xF) 11943 #define C_028BD4_DISTANCE_4 0xFFF0FFFF 11944 #define S_028BD4_DISTANCE_5(x) (((unsigned)(x) & 0xF) << 20) 11945 #define G_028BD4_DISTANCE_5(x) (((x) >> 20) & 0xF) 11946 #define C_028BD4_DISTANCE_5 0xFF0FFFFF 11947 #define S_028BD4_DISTANCE_6(x) (((unsigned)(x) & 0xF) << 24) 11948 #define G_028BD4_DISTANCE_6(x) (((x) >> 24) & 0xF) 11949 #define C_028BD4_DISTANCE_6 0xF0FFFFFF 11950 #define S_028BD4_DISTANCE_7(x) (((unsigned)(x) & 0xF) << 28) 11951 #define G_028BD4_DISTANCE_7(x) (((x) >> 28) & 0xF) 11952 #define C_028BD4_DISTANCE_7 0x0FFFFFFF 11953 #define R_028BD8_PA_SC_CENTROID_PRIORITY_1 0x028BD8 11954 #define S_028BD8_DISTANCE_8(x) (((unsigned)(x) & 0xF) << 0) 11955 #define G_028BD8_DISTANCE_8(x) (((x) >> 0) & 0xF) 11956 #define C_028BD8_DISTANCE_8 0xFFFFFFF0 11957 #define S_028BD8_DISTANCE_9(x) (((unsigned)(x) & 0xF) << 4) 11958 #define G_028BD8_DISTANCE_9(x) (((x) >> 4) & 0xF) 11959 #define C_028BD8_DISTANCE_9 0xFFFFFF0F 11960 #define S_028BD8_DISTANCE_10(x) (((unsigned)(x) & 0xF) << 8) 11961 #define G_028BD8_DISTANCE_10(x) (((x) >> 8) & 0xF) 11962 #define C_028BD8_DISTANCE_10 0xFFFFF0FF 11963 #define S_028BD8_DISTANCE_11(x) (((unsigned)(x) & 0xF) << 12) 11964 #define G_028BD8_DISTANCE_11(x) (((x) >> 12) & 0xF) 11965 #define C_028BD8_DISTANCE_11 0xFFFF0FFF 11966 #define S_028BD8_DISTANCE_12(x) (((unsigned)(x) & 0xF) << 16) 11967 #define G_028BD8_DISTANCE_12(x) (((x) >> 16) & 0xF) 11968 #define C_028BD8_DISTANCE_12 0xFFF0FFFF 11969 #define S_028BD8_DISTANCE_13(x) (((unsigned)(x) & 0xF) << 20) 11970 #define G_028BD8_DISTANCE_13(x) (((x) >> 20) & 0xF) 11971 #define C_028BD8_DISTANCE_13 0xFF0FFFFF 11972 #define S_028BD8_DISTANCE_14(x) (((unsigned)(x) & 0xF) << 24) 11973 #define G_028BD8_DISTANCE_14(x) (((x) >> 24) & 0xF) 11974 #define C_028BD8_DISTANCE_14 0xF0FFFFFF 11975 #define S_028BD8_DISTANCE_15(x) (((unsigned)(x) & 0xF) << 28) 11976 #define G_028BD8_DISTANCE_15(x) (((x) >> 28) & 0xF) 11977 #define C_028BD8_DISTANCE_15 0x0FFFFFFF 11978 #define R_028BDC_PA_SC_LINE_CNTL 0x028BDC 11979 #define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) 11980 #define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) 11981 #define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF 11982 #define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) 11983 #define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) 11984 #define C_028BDC_LAST_PIXEL 0xFFFFFBFF 11985 #define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((unsigned)(x) & 0x1) << 11) 11986 #define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1) 11987 #define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF 11988 #define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((unsigned)(x) & 0x1) << 12) 11989 #define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1) 11990 #define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF 11991 #define S_028BDC_EXTRA_DX_DY_PRECISION(x) (((unsigned)(x) & 0x1) << 13) /* >= gfx9 */ 11992 #define G_028BDC_EXTRA_DX_DY_PRECISION(x) (((x) >> 13) & 0x1) 11993 #define C_028BDC_EXTRA_DX_DY_PRECISION 0xFFFFDFFF 11994 #define R_028BE0_PA_SC_AA_CONFIG 0x028BE0 11995 #define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) 11996 #define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x7) 11997 #define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8 11998 #define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) 11999 #define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) 12000 #define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF 12001 #define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0xF) << 13) 12002 #define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0xF) 12003 #define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF 12004 #define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x7) << 20) 12005 #define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x7) 12006 #define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF 12007 #define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x3) << 24) 12008 #define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x3) 12009 #define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF 12010 #define S_028BE0_COVERAGE_TO_SHADER_SELECT(x) (((unsigned)(x) & 0x3) << 26) /* >= gfx9 */ 12011 #define G_028BE0_COVERAGE_TO_SHADER_SELECT(x) (((x) >> 26) & 0x3) 12012 #define C_028BE0_COVERAGE_TO_SHADER_SELECT 0xF3FFFFFF 12013 #define V_028BE0_INPUT_COVERAGE 0 12014 #define V_028BE0_INPUT_INNER_COVERAGE 1 12015 #define V_028BE0_INPUT_DEPTH_COVERAGE 2 12016 #define V_028BE0_RAW 3 12017 #define S_028BE0_SAMPLE_COVERAGE_ENCODING(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx103 */ 12018 #define G_028BE0_SAMPLE_COVERAGE_ENCODING(x) (((x) >> 28) & 0x1) 12019 #define C_028BE0_SAMPLE_COVERAGE_ENCODING 0xEFFFFFFF 12020 #define S_028BE0_COVERED_CENTROID_IS_CENTER(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx103 */ 12021 #define G_028BE0_COVERED_CENTROID_IS_CENTER(x) (((x) >> 29) & 0x1) 12022 #define C_028BE0_COVERED_CENTROID_IS_CENTER 0xDFFFFFFF 12023 #define R_028BE4_PA_SU_VTX_CNTL 0x028BE4 12024 #define S_028BE4_PIX_CENTER(x) (((unsigned)(x) & 0x1) << 0) 12025 #define G_028BE4_PIX_CENTER(x) (((x) >> 0) & 0x1) 12026 #define C_028BE4_PIX_CENTER 0xFFFFFFFE 12027 #define S_028BE4_ROUND_MODE(x) (((unsigned)(x) & 0x3) << 1) 12028 #define G_028BE4_ROUND_MODE(x) (((x) >> 1) & 0x3) 12029 #define C_028BE4_ROUND_MODE 0xFFFFFFF9 12030 #define V_028BE4_X_TRUNCATE 0 12031 #define V_028BE4_X_ROUND 1 12032 #define V_028BE4_X_ROUND_TO_EVEN 2 12033 #define V_028BE4_X_ROUND_TO_ODD 3 12034 #define S_028BE4_QUANT_MODE(x) (((unsigned)(x) & 0x7) << 3) 12035 #define G_028BE4_QUANT_MODE(x) (((x) >> 3) & 0x7) 12036 #define C_028BE4_QUANT_MODE 0xFFFFFFC7 12037 #define V_028BE4_X_16_8_FIXED_POINT_1_16TH 0 12038 #define V_028BE4_X_16_8_FIXED_POINT_1_8TH 1 12039 #define V_028BE4_X_16_8_FIXED_POINT_1_4TH 2 12040 #define V_028BE4_X_16_8_FIXED_POINT_1_2 3 12041 #define V_028BE4_X_16_8_FIXED_POINT_1 4 12042 #define V_028BE4_X_16_8_FIXED_POINT_1_256TH 5 12043 #define V_028BE4_X_14_10_FIXED_POINT_1_1024TH 6 12044 #define V_028BE4_X_12_12_FIXED_POINT_1_4096TH 7 12045 #define R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x028BE8 12046 #define R_028BEC_PA_CL_GB_VERT_DISC_ADJ 0x028BEC 12047 #define R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ 0x028BF0 12048 #define R_028BF4_PA_CL_GB_HORZ_DISC_ADJ 0x028BF4 12049 #define R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x028BF8 12050 #define S_028BF8_S0_X(x) (((unsigned)(x) & 0xF) << 0) 12051 #define G_028BF8_S0_X(x) (((x) >> 0) & 0xF) 12052 #define C_028BF8_S0_X 0xFFFFFFF0 12053 #define S_028BF8_S0_Y(x) (((unsigned)(x) & 0xF) << 4) 12054 #define G_028BF8_S0_Y(x) (((x) >> 4) & 0xF) 12055 #define C_028BF8_S0_Y 0xFFFFFF0F 12056 #define S_028BF8_S1_X(x) (((unsigned)(x) & 0xF) << 8) 12057 #define G_028BF8_S1_X(x) (((x) >> 8) & 0xF) 12058 #define C_028BF8_S1_X 0xFFFFF0FF 12059 #define S_028BF8_S1_Y(x) (((unsigned)(x) & 0xF) << 12) 12060 #define G_028BF8_S1_Y(x) (((x) >> 12) & 0xF) 12061 #define C_028BF8_S1_Y 0xFFFF0FFF 12062 #define S_028BF8_S2_X(x) (((unsigned)(x) & 0xF) << 16) 12063 #define G_028BF8_S2_X(x) (((x) >> 16) & 0xF) 12064 #define C_028BF8_S2_X 0xFFF0FFFF 12065 #define S_028BF8_S2_Y(x) (((unsigned)(x) & 0xF) << 20) 12066 #define G_028BF8_S2_Y(x) (((x) >> 20) & 0xF) 12067 #define C_028BF8_S2_Y 0xFF0FFFFF 12068 #define S_028BF8_S3_X(x) (((unsigned)(x) & 0xF) << 24) 12069 #define G_028BF8_S3_X(x) (((x) >> 24) & 0xF) 12070 #define C_028BF8_S3_X 0xF0FFFFFF 12071 #define S_028BF8_S3_Y(x) (((unsigned)(x) & 0xF) << 28) 12072 #define G_028BF8_S3_Y(x) (((x) >> 28) & 0xF) 12073 #define C_028BF8_S3_Y 0x0FFFFFFF 12074 #define R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0x028BFC 12075 #define S_028BFC_S4_X(x) (((unsigned)(x) & 0xF) << 0) 12076 #define G_028BFC_S4_X(x) (((x) >> 0) & 0xF) 12077 #define C_028BFC_S4_X 0xFFFFFFF0 12078 #define S_028BFC_S4_Y(x) (((unsigned)(x) & 0xF) << 4) 12079 #define G_028BFC_S4_Y(x) (((x) >> 4) & 0xF) 12080 #define C_028BFC_S4_Y 0xFFFFFF0F 12081 #define S_028BFC_S5_X(x) (((unsigned)(x) & 0xF) << 8) 12082 #define G_028BFC_S5_X(x) (((x) >> 8) & 0xF) 12083 #define C_028BFC_S5_X 0xFFFFF0FF 12084 #define S_028BFC_S5_Y(x) (((unsigned)(x) & 0xF) << 12) 12085 #define G_028BFC_S5_Y(x) (((x) >> 12) & 0xF) 12086 #define C_028BFC_S5_Y 0xFFFF0FFF 12087 #define S_028BFC_S6_X(x) (((unsigned)(x) & 0xF) << 16) 12088 #define G_028BFC_S6_X(x) (((x) >> 16) & 0xF) 12089 #define C_028BFC_S6_X 0xFFF0FFFF 12090 #define S_028BFC_S6_Y(x) (((unsigned)(x) & 0xF) << 20) 12091 #define G_028BFC_S6_Y(x) (((x) >> 20) & 0xF) 12092 #define C_028BFC_S6_Y 0xFF0FFFFF 12093 #define S_028BFC_S7_X(x) (((unsigned)(x) & 0xF) << 24) 12094 #define G_028BFC_S7_X(x) (((x) >> 24) & 0xF) 12095 #define C_028BFC_S7_X 0xF0FFFFFF 12096 #define S_028BFC_S7_Y(x) (((unsigned)(x) & 0xF) << 28) 12097 #define G_028BFC_S7_Y(x) (((x) >> 28) & 0xF) 12098 #define C_028BFC_S7_Y 0x0FFFFFFF 12099 #define R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0x028C00 12100 #define S_028C00_S8_X(x) (((unsigned)(x) & 0xF) << 0) 12101 #define G_028C00_S8_X(x) (((x) >> 0) & 0xF) 12102 #define C_028C00_S8_X 0xFFFFFFF0 12103 #define S_028C00_S8_Y(x) (((unsigned)(x) & 0xF) << 4) 12104 #define G_028C00_S8_Y(x) (((x) >> 4) & 0xF) 12105 #define C_028C00_S8_Y 0xFFFFFF0F 12106 #define S_028C00_S9_X(x) (((unsigned)(x) & 0xF) << 8) 12107 #define G_028C00_S9_X(x) (((x) >> 8) & 0xF) 12108 #define C_028C00_S9_X 0xFFFFF0FF 12109 #define S_028C00_S9_Y(x) (((unsigned)(x) & 0xF) << 12) 12110 #define G_028C00_S9_Y(x) (((x) >> 12) & 0xF) 12111 #define C_028C00_S9_Y 0xFFFF0FFF 12112 #define S_028C00_S10_X(x) (((unsigned)(x) & 0xF) << 16) 12113 #define G_028C00_S10_X(x) (((x) >> 16) & 0xF) 12114 #define C_028C00_S10_X 0xFFF0FFFF 12115 #define S_028C00_S10_Y(x) (((unsigned)(x) & 0xF) << 20) 12116 #define G_028C00_S10_Y(x) (((x) >> 20) & 0xF) 12117 #define C_028C00_S10_Y 0xFF0FFFFF 12118 #define S_028C00_S11_X(x) (((unsigned)(x) & 0xF) << 24) 12119 #define G_028C00_S11_X(x) (((x) >> 24) & 0xF) 12120 #define C_028C00_S11_X 0xF0FFFFFF 12121 #define S_028C00_S11_Y(x) (((unsigned)(x) & 0xF) << 28) 12122 #define G_028C00_S11_Y(x) (((x) >> 28) & 0xF) 12123 #define C_028C00_S11_Y 0x0FFFFFFF 12124 #define R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0x028C04 12125 #define S_028C04_S12_X(x) (((unsigned)(x) & 0xF) << 0) 12126 #define G_028C04_S12_X(x) (((x) >> 0) & 0xF) 12127 #define C_028C04_S12_X 0xFFFFFFF0 12128 #define S_028C04_S12_Y(x) (((unsigned)(x) & 0xF) << 4) 12129 #define G_028C04_S12_Y(x) (((x) >> 4) & 0xF) 12130 #define C_028C04_S12_Y 0xFFFFFF0F 12131 #define S_028C04_S13_X(x) (((unsigned)(x) & 0xF) << 8) 12132 #define G_028C04_S13_X(x) (((x) >> 8) & 0xF) 12133 #define C_028C04_S13_X 0xFFFFF0FF 12134 #define S_028C04_S13_Y(x) (((unsigned)(x) & 0xF) << 12) 12135 #define G_028C04_S13_Y(x) (((x) >> 12) & 0xF) 12136 #define C_028C04_S13_Y 0xFFFF0FFF 12137 #define S_028C04_S14_X(x) (((unsigned)(x) & 0xF) << 16) 12138 #define G_028C04_S14_X(x) (((x) >> 16) & 0xF) 12139 #define C_028C04_S14_X 0xFFF0FFFF 12140 #define S_028C04_S14_Y(x) (((unsigned)(x) & 0xF) << 20) 12141 #define G_028C04_S14_Y(x) (((x) >> 20) & 0xF) 12142 #define C_028C04_S14_Y 0xFF0FFFFF 12143 #define S_028C04_S15_X(x) (((unsigned)(x) & 0xF) << 24) 12144 #define G_028C04_S15_X(x) (((x) >> 24) & 0xF) 12145 #define C_028C04_S15_X 0xF0FFFFFF 12146 #define S_028C04_S15_Y(x) (((unsigned)(x) & 0xF) << 28) 12147 #define G_028C04_S15_Y(x) (((x) >> 28) & 0xF) 12148 #define C_028C04_S15_Y 0x0FFFFFFF 12149 #define R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x028C08 12150 #define R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0x028C0C 12151 #define R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0x028C10 12152 #define R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0x028C14 12153 #define R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x028C18 12154 #define R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0x028C1C 12155 #define R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0x028C20 12156 #define R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0x028C24 12157 #define R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x028C28 12158 #define R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0x028C2C 12159 #define R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0x028C30 12160 #define R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0x028C34 12161 #define R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0 0x028C38 12162 #define S_028C38_AA_MASK_X0Y0(x) (((unsigned)(x) & 0xFFFF) << 0) 12163 #define G_028C38_AA_MASK_X0Y0(x) (((x) >> 0) & 0xFFFF) 12164 #define C_028C38_AA_MASK_X0Y0 0xFFFF0000 12165 #define S_028C38_AA_MASK_X1Y0(x) (((unsigned)(x) & 0xFFFF) << 16) 12166 #define G_028C38_AA_MASK_X1Y0(x) (((x) >> 16) & 0xFFFF) 12167 #define C_028C38_AA_MASK_X1Y0 0x0000FFFF 12168 #define R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1 0x028C3C 12169 #define S_028C3C_AA_MASK_X0Y1(x) (((unsigned)(x) & 0xFFFF) << 0) 12170 #define G_028C3C_AA_MASK_X0Y1(x) (((x) >> 0) & 0xFFFF) 12171 #define C_028C3C_AA_MASK_X0Y1 0xFFFF0000 12172 #define S_028C3C_AA_MASK_X1Y1(x) (((unsigned)(x) & 0xFFFF) << 16) 12173 #define G_028C3C_AA_MASK_X1Y1(x) (((x) >> 16) & 0xFFFF) 12174 #define C_028C3C_AA_MASK_X1Y1 0x0000FFFF 12175 #define R_028C40_PA_SC_SHADER_CONTROL 0x028C40 /* >= gfx81 */ 12176 #define S_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((unsigned)(x) & 0x3) << 0) 12177 #define G_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((x) >> 0) & 0x3) 12178 #define C_028C40_REALIGN_DQUADS_AFTER_N_WAVES 0xFFFFFFFC 12179 #define S_028C40_LOAD_COLLISION_WAVEID(x) (((unsigned)(x) & 0x1) << 2) /* >= gfx9 */ 12180 #define G_028C40_LOAD_COLLISION_WAVEID(x) (((x) >> 2) & 0x1) 12181 #define C_028C40_LOAD_COLLISION_WAVEID 0xFFFFFFFB 12182 #define S_028C40_LOAD_INTRAWAVE_COLLISION(x) (((unsigned)(x) & 0x1) << 3) /* >= gfx9 */ 12183 #define G_028C40_LOAD_INTRAWAVE_COLLISION(x) (((x) >> 3) & 0x1) 12184 #define C_028C40_LOAD_INTRAWAVE_COLLISION 0xFFFFFFF7 12185 #define S_028C40_WAVE_BREAK_REGION_SIZE(x) (((unsigned)(x) & 0x3) << 5) /* >= gfx10 */ 12186 #define G_028C40_WAVE_BREAK_REGION_SIZE(x) (((x) >> 5) & 0x3) 12187 #define C_028C40_WAVE_BREAK_REGION_SIZE 0xFFFFFF9F 12188 #define R_028C44_PA_SC_BINNER_CNTL_0 0x028C44 /* >= gfx9 */ 12189 #define S_028C44_BINNING_MODE(x) (((unsigned)(x) & 0x3) << 0) 12190 #define G_028C44_BINNING_MODE(x) (((x) >> 0) & 0x3) 12191 #define C_028C44_BINNING_MODE 0xFFFFFFFC 12192 #define V_028C44_BINNING_ALLOWED 0 12193 #define V_028C44_FORCE_BINNING_ON 1 12194 #define V_028C44_DISABLE_BINNING_USE_NEW_SC 2 12195 #define V_028C44_DISABLE_BINNING_USE_LEGACY_SC 3 12196 #define S_028C44_BIN_SIZE_X(x) (((unsigned)(x) & 0x1) << 2) 12197 #define G_028C44_BIN_SIZE_X(x) (((x) >> 2) & 0x1) 12198 #define C_028C44_BIN_SIZE_X 0xFFFFFFFB 12199 #define S_028C44_BIN_SIZE_Y(x) (((unsigned)(x) & 0x1) << 3) 12200 #define G_028C44_BIN_SIZE_Y(x) (((x) >> 3) & 0x1) 12201 #define C_028C44_BIN_SIZE_Y 0xFFFFFFF7 12202 #define S_028C44_BIN_SIZE_X_EXTEND(x) (((unsigned)(x) & 0x7) << 4) 12203 #define G_028C44_BIN_SIZE_X_EXTEND(x) (((x) >> 4) & 0x7) 12204 #define C_028C44_BIN_SIZE_X_EXTEND 0xFFFFFF8F 12205 #define V_028C44_BIN_SIZE_32_PIXELS 0 /* >= gfx10 */ 12206 #define V_028C44_BIN_SIZE_64_PIXELS 1 /* >= gfx10 */ 12207 #define V_028C44_BIN_SIZE_128_PIXELS 2 /* >= gfx10 */ 12208 #define V_028C44_BIN_SIZE_256_PIXELS 3 /* >= gfx10 */ 12209 #define V_028C44_BIN_SIZE_512_PIXELS 4 /* >= gfx10 */ 12210 #define S_028C44_BIN_SIZE_Y_EXTEND(x) (((unsigned)(x) & 0x7) << 7) 12211 #define G_028C44_BIN_SIZE_Y_EXTEND(x) (((x) >> 7) & 0x7) 12212 #define C_028C44_BIN_SIZE_Y_EXTEND 0xFFFFFC7F 12213 #define S_028C44_CONTEXT_STATES_PER_BIN(x) (((unsigned)(x) & 0x7) << 10) 12214 #define G_028C44_CONTEXT_STATES_PER_BIN(x) (((x) >> 10) & 0x7) 12215 #define C_028C44_CONTEXT_STATES_PER_BIN 0xFFFFE3FF 12216 #define S_028C44_PERSISTENT_STATES_PER_BIN(x) (((unsigned)(x) & 0x1F) << 13) 12217 #define G_028C44_PERSISTENT_STATES_PER_BIN(x) (((x) >> 13) & 0x1F) 12218 #define C_028C44_PERSISTENT_STATES_PER_BIN 0xFFFC1FFF 12219 #define S_028C44_DISABLE_START_OF_PRIM(x) (((unsigned)(x) & 0x1) << 18) 12220 #define G_028C44_DISABLE_START_OF_PRIM(x) (((x) >> 18) & 0x1) 12221 #define C_028C44_DISABLE_START_OF_PRIM 0xFFFBFFFF 12222 #define S_028C44_FPOVS_PER_BATCH(x) (((unsigned)(x) & 0xFF) << 19) 12223 #define G_028C44_FPOVS_PER_BATCH(x) (((x) >> 19) & 0xFF) 12224 #define C_028C44_FPOVS_PER_BATCH 0xF807FFFF 12225 #define S_028C44_OPTIMAL_BIN_SELECTION(x) (((unsigned)(x) & 0x1) << 27) 12226 #define G_028C44_OPTIMAL_BIN_SELECTION(x) (((x) >> 27) & 0x1) 12227 #define C_028C44_OPTIMAL_BIN_SELECTION 0xF7FFFFFF 12228 #define S_028C44_FLUSH_ON_BINNING_TRANSITION(x) (((unsigned)(x) & 0x1) << 28) 12229 #define G_028C44_FLUSH_ON_BINNING_TRANSITION(x) (((x) >> 28) & 0x1) 12230 #define C_028C44_FLUSH_ON_BINNING_TRANSITION 0xEFFFFFFF 12231 #define S_028C44_BIN_MAPPING_MODE(x) (((unsigned)(x) & 0x3) << 29) /* >= gfx10 */ 12232 #define G_028C44_BIN_MAPPING_MODE(x) (((x) >> 29) & 0x3) 12233 #define C_028C44_BIN_MAPPING_MODE 0x9FFFFFFF 12234 #define V_028C44_BIN_MAP_MODE_NONE 0 12235 #define V_028C44_BIN_MAP_MODE_RTA_INDEX 1 12236 #define V_028C44_BIN_MAP_MODE_POPS 2 12237 #define R_028C48_PA_SC_BINNER_CNTL_1 0x028C48 /* >= gfx9 */ 12238 #define S_028C48_MAX_ALLOC_COUNT(x) (((unsigned)(x) & 0xFFFF) << 0) 12239 #define G_028C48_MAX_ALLOC_COUNT(x) (((x) >> 0) & 0xFFFF) 12240 #define C_028C48_MAX_ALLOC_COUNT 0xFFFF0000 12241 #define S_028C48_MAX_PRIM_PER_BATCH(x) (((unsigned)(x) & 0xFFFF) << 16) 12242 #define G_028C48_MAX_PRIM_PER_BATCH(x) (((x) >> 16) & 0xFFFF) 12243 #define C_028C48_MAX_PRIM_PER_BATCH 0x0000FFFF 12244 #define R_028C4C_PA_SC_CONSERVATIVE_RASTERIZATION_CNTL 0x028C4C /* >= gfx9 */ 12245 #define S_028C4C_OVER_RAST_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 12246 #define G_028C4C_OVER_RAST_ENABLE(x) (((x) >> 0) & 0x1) 12247 #define C_028C4C_OVER_RAST_ENABLE 0xFFFFFFFE 12248 #define S_028C4C_OVER_RAST_SAMPLE_SELECT(x) (((unsigned)(x) & 0xF) << 1) 12249 #define G_028C4C_OVER_RAST_SAMPLE_SELECT(x) (((x) >> 1) & 0xF) 12250 #define C_028C4C_OVER_RAST_SAMPLE_SELECT 0xFFFFFFE1 12251 #define S_028C4C_UNDER_RAST_ENABLE(x) (((unsigned)(x) & 0x1) << 5) 12252 #define G_028C4C_UNDER_RAST_ENABLE(x) (((x) >> 5) & 0x1) 12253 #define C_028C4C_UNDER_RAST_ENABLE 0xFFFFFFDF 12254 #define S_028C4C_UNDER_RAST_SAMPLE_SELECT(x) (((unsigned)(x) & 0xF) << 6) 12255 #define G_028C4C_UNDER_RAST_SAMPLE_SELECT(x) (((x) >> 6) & 0xF) 12256 #define C_028C4C_UNDER_RAST_SAMPLE_SELECT 0xFFFFFC3F 12257 #define S_028C4C_PBB_UNCERTAINTY_REGION_ENABLE(x) (((unsigned)(x) & 0x1) << 10) 12258 #define G_028C4C_PBB_UNCERTAINTY_REGION_ENABLE(x) (((x) >> 10) & 0x1) 12259 #define C_028C4C_PBB_UNCERTAINTY_REGION_ENABLE 0xFFFFFBFF 12260 #define S_028C4C_ZMM_TRI_EXTENT(x) (((unsigned)(x) & 0x1) << 11) 12261 #define G_028C4C_ZMM_TRI_EXTENT(x) (((x) >> 11) & 0x1) 12262 #define C_028C4C_ZMM_TRI_EXTENT 0xFFFFF7FF 12263 #define S_028C4C_ZMM_TRI_OFFSET(x) (((unsigned)(x) & 0x1) << 12) 12264 #define G_028C4C_ZMM_TRI_OFFSET(x) (((x) >> 12) & 0x1) 12265 #define C_028C4C_ZMM_TRI_OFFSET 0xFFFFEFFF 12266 #define S_028C4C_OVERRIDE_OVER_RAST_INNER_TO_NORMAL(x) (((unsigned)(x) & 0x1) << 13) 12267 #define G_028C4C_OVERRIDE_OVER_RAST_INNER_TO_NORMAL(x) (((x) >> 13) & 0x1) 12268 #define C_028C4C_OVERRIDE_OVER_RAST_INNER_TO_NORMAL 0xFFFFDFFF 12269 #define S_028C4C_OVERRIDE_UNDER_RAST_INNER_TO_NORMAL(x) (((unsigned)(x) & 0x1) << 14) 12270 #define G_028C4C_OVERRIDE_UNDER_RAST_INNER_TO_NORMAL(x) (((x) >> 14) & 0x1) 12271 #define C_028C4C_OVERRIDE_UNDER_RAST_INNER_TO_NORMAL 0xFFFFBFFF 12272 #define S_028C4C_DEGENERATE_OVERRIDE_INNER_TO_NORMAL_DISABLE(x) (((unsigned)(x) & 0x1) << 15) 12273 #define G_028C4C_DEGENERATE_OVERRIDE_INNER_TO_NORMAL_DISABLE(x) (((x) >> 15) & 0x1) 12274 #define C_028C4C_DEGENERATE_OVERRIDE_INNER_TO_NORMAL_DISABLE 0xFFFF7FFF 12275 #define S_028C4C_UNCERTAINTY_REGION_MODE(x) (((unsigned)(x) & 0x3) << 16) 12276 #define G_028C4C_UNCERTAINTY_REGION_MODE(x) (((x) >> 16) & 0x3) 12277 #define C_028C4C_UNCERTAINTY_REGION_MODE 0xFFFCFFFF 12278 #define V_028C4C_SC_HALF_LSB 0 /* >= gfx10 */ 12279 #define V_028C4C_SC_LSB_ONE_SIDED 1 /* >= gfx10 */ 12280 #define V_028C4C_SC_LSB_TWO_SIDED 2 /* >= gfx10 */ 12281 #define S_028C4C_OUTER_UNCERTAINTY_EDGERULE_OVERRIDE(x) (((unsigned)(x) & 0x1) << 18) 12282 #define G_028C4C_OUTER_UNCERTAINTY_EDGERULE_OVERRIDE(x) (((x) >> 18) & 0x1) 12283 #define C_028C4C_OUTER_UNCERTAINTY_EDGERULE_OVERRIDE 0xFFFBFFFF 12284 #define S_028C4C_INNER_UNCERTAINTY_EDGERULE_OVERRIDE(x) (((unsigned)(x) & 0x1) << 19) 12285 #define G_028C4C_INNER_UNCERTAINTY_EDGERULE_OVERRIDE(x) (((x) >> 19) & 0x1) 12286 #define C_028C4C_INNER_UNCERTAINTY_EDGERULE_OVERRIDE 0xFFF7FFFF 12287 #define S_028C4C_NULL_SQUAD_AA_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 20) 12288 #define G_028C4C_NULL_SQUAD_AA_MASK_ENABLE(x) (((x) >> 20) & 0x1) 12289 #define C_028C4C_NULL_SQUAD_AA_MASK_ENABLE 0xFFEFFFFF 12290 #define S_028C4C_COVERAGE_AA_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 21) 12291 #define G_028C4C_COVERAGE_AA_MASK_ENABLE(x) (((x) >> 21) & 0x1) 12292 #define C_028C4C_COVERAGE_AA_MASK_ENABLE 0xFFDFFFFF 12293 #define S_028C4C_PREZ_AA_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 22) 12294 #define G_028C4C_PREZ_AA_MASK_ENABLE(x) (((x) >> 22) & 0x1) 12295 #define C_028C4C_PREZ_AA_MASK_ENABLE 0xFFBFFFFF 12296 #define S_028C4C_POSTZ_AA_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 23) 12297 #define G_028C4C_POSTZ_AA_MASK_ENABLE(x) (((x) >> 23) & 0x1) 12298 #define C_028C4C_POSTZ_AA_MASK_ENABLE 0xFF7FFFFF 12299 #define S_028C4C_CENTROID_SAMPLE_OVERRIDE(x) (((unsigned)(x) & 0x1) << 24) 12300 #define G_028C4C_CENTROID_SAMPLE_OVERRIDE(x) (((x) >> 24) & 0x1) 12301 #define C_028C4C_CENTROID_SAMPLE_OVERRIDE 0xFEFFFFFF 12302 #define S_028C4C_UNCERTAINTY_REGION_MULT(x) (((unsigned)(x) & 0x3) << 25) /* >= gfx10 */ 12303 #define G_028C4C_UNCERTAINTY_REGION_MULT(x) (((x) >> 25) & 0x3) 12304 #define C_028C4C_UNCERTAINTY_REGION_MULT 0xF9FFFFFF 12305 #define S_028C4C_UNCERTAINTY_REGION_PBB_MULT(x) (((unsigned)(x) & 0x3) << 27) /* >= gfx10 */ 12306 #define G_028C4C_UNCERTAINTY_REGION_PBB_MULT(x) (((x) >> 27) & 0x3) 12307 #define C_028C4C_UNCERTAINTY_REGION_PBB_MULT 0xE7FFFFFF 12308 #define R_028C50_PA_SC_NGG_MODE_CNTL 0x028C50 /* >= gfx9 */ 12309 #define S_028C50_MAX_DEALLOCS_IN_WAVE(x) (((unsigned)(x) & 0x7FF) << 0) 12310 #define G_028C50_MAX_DEALLOCS_IN_WAVE(x) (((x) >> 0) & 0x7FF) 12311 #define C_028C50_MAX_DEALLOCS_IN_WAVE 0xFFFFF800 12312 #define S_028C50_MAX_FPOVS_IN_WAVE(x) (((unsigned)(x) & 0xFF) << 16) /* >= gfx10 */ 12313 #define G_028C50_MAX_FPOVS_IN_WAVE(x) (((x) >> 16) & 0xFF) 12314 #define C_028C50_MAX_FPOVS_IN_WAVE 0xFF00FFFF 12315 #define R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL 0x028C58 12316 #define S_028C58_VTX_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) 12317 #define G_028C58_VTX_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) 12318 #define C_028C58_VTX_REUSE_DEPTH 0xFFFFFF00 12319 #define R_028C5C_VGT_OUT_DEALLOC_CNTL 0x028C5C 12320 #define S_028C5C_DEALLOC_DIST(x) (((unsigned)(x) & 0x7F) << 0) 12321 #define G_028C5C_DEALLOC_DIST(x) (((x) >> 0) & 0x7F) 12322 #define C_028C5C_DEALLOC_DIST 0xFFFFFF80 12323 #define R_028C60_CB_COLOR0_BASE 0x028C60 12324 #define R_028C64_CB_COLOR0_BASE_EXT 0x028C64 /* gfx9 */ 12325 #define S_028C64_BASE_256B(x) (((unsigned)(x) & 0xFF) << 0) 12326 #define G_028C64_BASE_256B(x) (((x) >> 0) & 0xFF) 12327 #define C_028C64_BASE_256B 0xFFFFFF00 12328 #define R_028C64_CB_COLOR0_PITCH 0x028C64 /* <= gfx81, >= gfx10 */ 12329 #define S_028C64_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) 12330 #define G_028C64_TILE_MAX(x) (((x) >> 0) & 0x7FF) 12331 #define C_028C64_TILE_MAX 0xFFFFF800 12332 #define S_028C64_FMASK_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 20) 12333 #define G_028C64_FMASK_TILE_MAX(x) (((x) >> 20) & 0x7FF) 12334 #define C_028C64_FMASK_TILE_MAX 0x800FFFFF 12335 #define R_028C68_CB_COLOR0_ATTRIB2 0x028C68 /* gfx9 */ 12336 #define S_028C68_MIP0_HEIGHT(x) (((unsigned)(x) & 0x3FFF) << 0) 12337 #define G_028C68_MIP0_HEIGHT(x) (((x) >> 0) & 0x3FFF) 12338 #define C_028C68_MIP0_HEIGHT 0xFFFFC000 12339 #define S_028C68_MIP0_WIDTH(x) (((unsigned)(x) & 0x3FFF) << 14) 12340 #define G_028C68_MIP0_WIDTH(x) (((x) >> 14) & 0x3FFF) 12341 #define C_028C68_MIP0_WIDTH 0xF0003FFF 12342 #define S_028C68_MAX_MIP(x) (((unsigned)(x) & 0xF) << 28) 12343 #define G_028C68_MAX_MIP(x) (((x) >> 28) & 0xF) 12344 #define C_028C68_MAX_MIP 0x0FFFFFFF 12345 #define R_028C68_CB_COLOR0_SLICE 0x028C68 /* <= gfx81, >= gfx10 */ 12346 #define S_028C68_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 12347 #define G_028C68_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 12348 #define C_028C68_TILE_MAX 0xFFC00000 12349 #define R_028C6C_CB_COLOR0_VIEW 0x028C6C 12350 #define S_028C6C_SLICE_START(x) (((unsigned)(x) & 0x1FFF) << 0) 12351 #define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x1FFF) 12352 #define C_028C6C_SLICE_START 0xFFFFE000 12353 #define S_028C6C_SLICE_MAX_GFX10(x) (((unsigned)(x) & 0x1FFF) << 13) /* >= gfx10 */ 12354 #define G_028C6C_SLICE_MAX_GFX10(x) (((x) >> 13) & 0x1FFF) 12355 #define C_028C6C_SLICE_MAX_GFX10 0xFC001FFF 12356 #define S_028C6C_SLICE_MAX_GFX6(x) (((unsigned)(x) & 0x7FF) << 13) /* <= gfx9 */ 12357 #define G_028C6C_SLICE_MAX_GFX6(x) (((x) >> 13) & 0x7FF) 12358 #define C_028C6C_SLICE_MAX_GFX6 0xFF001FFF 12359 #define S_028C6C_MIP_LEVEL_GFX9(x) (((unsigned)(x) & 0xF) << 24) /* gfx9 */ 12360 #define G_028C6C_MIP_LEVEL_GFX9(x) (((x) >> 24) & 0xF) 12361 #define C_028C6C_MIP_LEVEL_GFX9 0xF0FFFFFF 12362 #define S_028C6C_MIP_LEVEL_GFX10(x) (((unsigned)(x) & 0xF) << 26) /* >= gfx10 */ 12363 #define G_028C6C_MIP_LEVEL_GFX10(x) (((x) >> 26) & 0xF) 12364 #define C_028C6C_MIP_LEVEL_GFX10 0xC3FFFFFF 12365 #define R_028C70_CB_COLOR0_INFO 0x028C70 12366 #define S_028C70_ENDIAN(x) (((unsigned)(x) & 0x3) << 0) 12367 #define G_028C70_ENDIAN(x) (((x) >> 0) & 0x3) 12368 #define C_028C70_ENDIAN 0xFFFFFFFC 12369 #define V_028C70_ENDIAN_NONE 0 12370 #define V_028C70_ENDIAN_8IN16 1 12371 #define V_028C70_ENDIAN_8IN32 2 12372 #define V_028C70_ENDIAN_8IN64 3 12373 #define S_028C70_FORMAT(x) (((unsigned)(x) & 0x1F) << 2) 12374 #define G_028C70_FORMAT(x) (((x) >> 2) & 0x1F) 12375 #define C_028C70_FORMAT 0xFFFFFF83 12376 #define V_028C70_COLOR_INVALID 0 12377 #define V_028C70_COLOR_8 1 12378 #define V_028C70_COLOR_16 2 12379 #define V_028C70_COLOR_8_8 3 12380 #define V_028C70_COLOR_32 4 12381 #define V_028C70_COLOR_16_16 5 12382 #define V_028C70_COLOR_10_11_11 6 12383 #define V_028C70_COLOR_11_11_10 7 12384 #define V_028C70_COLOR_10_10_10_2 8 12385 #define V_028C70_COLOR_2_10_10_10 9 12386 #define V_028C70_COLOR_8_8_8_8 10 12387 #define V_028C70_COLOR_32_32 11 12388 #define V_028C70_COLOR_16_16_16_16 12 12389 #define V_028C70_COLOR_RESERVED_13 13 /* <= gfx10 */ 12390 #define V_028C70_COLOR_32_32_32_32 14 12391 #define V_028C70_COLOR_RESERVED_15 15 /* <= gfx10 */ 12392 #define V_028C70_COLOR_5_6_5 16 12393 #define V_028C70_COLOR_1_5_5_5 17 12394 #define V_028C70_COLOR_5_5_5_1 18 12395 #define V_028C70_COLOR_4_4_4_4 19 12396 #define V_028C70_COLOR_8_24 20 12397 #define V_028C70_COLOR_24_8 21 12398 #define V_028C70_COLOR_X24_8_32_FLOAT 22 12399 #define V_028C70_COLOR_RESERVED_23 23 /* <= gfx10 */ 12400 #define V_028C70_COLOR_5_9_9_9 24 /* >= gfx103 */ 12401 #define V_028C70_COLOR_RESERVED_24 24 /* gfx81, gfx9, gfx10 */ 12402 #define V_028C70_COLOR_RESERVED_25 25 /* gfx81, gfx9, gfx10 */ 12403 #define V_028C70_COLOR_RESERVED_26 26 /* gfx81, gfx9, gfx10 */ 12404 #define V_028C70_COLOR_RESERVED_27 27 /* gfx81, gfx9, gfx10 */ 12405 #define V_028C70_COLOR_RESERVED_28 28 /* gfx81, gfx9, gfx10 */ 12406 #define V_028C70_COLOR_RESERVED_29 29 /* gfx81, gfx9, gfx10 */ 12407 #define V_028C70_COLOR_RESERVED_30 30 /* gfx81, gfx9, gfx10 */ 12408 #define V_028C70_COLOR_2_10_10_10_6E4 31 /* gfx9, gfx10 */ 12409 #define S_028C70_LINEAR_GENERAL(x) (((unsigned)(x) & 0x1) << 7) /* <= gfx81, >= gfx10 */ 12410 #define G_028C70_LINEAR_GENERAL(x) (((x) >> 7) & 0x1) 12411 #define C_028C70_LINEAR_GENERAL 0xFFFFFF7F 12412 #define S_028C70_NUMBER_TYPE(x) (((unsigned)(x) & 0x7) << 8) 12413 #define G_028C70_NUMBER_TYPE(x) (((x) >> 8) & 0x7) 12414 #define C_028C70_NUMBER_TYPE 0xFFFFF8FF 12415 #define V_028C70_NUMBER_UNORM 0 12416 #define V_028C70_NUMBER_SNORM 1 12417 #define V_028C70_NUMBER_USCALED 2 12418 #define V_028C70_NUMBER_SSCALED 3 12419 #define V_028C70_NUMBER_UINT 4 12420 #define V_028C70_NUMBER_SINT 5 12421 #define V_028C70_NUMBER_SRGB 6 12422 #define V_028C70_NUMBER_FLOAT 7 12423 #define S_028C70_COMP_SWAP(x) (((unsigned)(x) & 0x3) << 11) 12424 #define G_028C70_COMP_SWAP(x) (((x) >> 11) & 0x3) 12425 #define C_028C70_COMP_SWAP 0xFFFFE7FF 12426 #define V_028C70_SWAP_STD 0 12427 #define V_028C70_SWAP_ALT 1 12428 #define V_028C70_SWAP_STD_REV 2 12429 #define V_028C70_SWAP_ALT_REV 3 12430 #define S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 13) 12431 #define G_028C70_FAST_CLEAR(x) (((x) >> 13) & 0x1) 12432 #define C_028C70_FAST_CLEAR 0xFFFFDFFF 12433 #define S_028C70_COMPRESSION(x) (((unsigned)(x) & 0x1) << 14) 12434 #define G_028C70_COMPRESSION(x) (((x) >> 14) & 0x1) 12435 #define C_028C70_COMPRESSION 0xFFFFBFFF 12436 #define S_028C70_BLEND_CLAMP(x) (((unsigned)(x) & 0x1) << 15) 12437 #define G_028C70_BLEND_CLAMP(x) (((x) >> 15) & 0x1) 12438 #define C_028C70_BLEND_CLAMP 0xFFFF7FFF 12439 #define S_028C70_BLEND_BYPASS(x) (((unsigned)(x) & 0x1) << 16) 12440 #define G_028C70_BLEND_BYPASS(x) (((x) >> 16) & 0x1) 12441 #define C_028C70_BLEND_BYPASS 0xFFFEFFFF 12442 #define S_028C70_SIMPLE_FLOAT(x) (((unsigned)(x) & 0x1) << 17) 12443 #define G_028C70_SIMPLE_FLOAT(x) (((x) >> 17) & 0x1) 12444 #define C_028C70_SIMPLE_FLOAT 0xFFFDFFFF 12445 #define S_028C70_ROUND_MODE(x) (((unsigned)(x) & 0x1) << 18) 12446 #define G_028C70_ROUND_MODE(x) (((x) >> 18) & 0x1) 12447 #define C_028C70_ROUND_MODE 0xFFFBFFFF 12448 #define S_028C70_CMASK_IS_LINEAR(x) (((unsigned)(x) & 0x1) << 19) /* <= gfx81, >= gfx10 */ 12449 #define G_028C70_CMASK_IS_LINEAR(x) (((x) >> 19) & 0x1) 12450 #define C_028C70_CMASK_IS_LINEAR 0xFFF7FFFF 12451 #define S_028C70_BLEND_OPT_DONT_RD_DST(x) (((unsigned)(x) & 0x7) << 20) 12452 #define G_028C70_BLEND_OPT_DONT_RD_DST(x) (((x) >> 20) & 0x7) 12453 #define C_028C70_BLEND_OPT_DONT_RD_DST 0xFF8FFFFF 12454 #define V_028C70_FORCE_OPT_AUTO 0 12455 #define V_028C70_FORCE_OPT_DISABLE 1 12456 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 2 12457 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 3 12458 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 4 12459 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 5 12460 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 6 12461 #define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 7 12462 #define S_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((unsigned)(x) & 0x7) << 23) 12463 #define G_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((x) >> 23) & 0x7) 12464 #define C_028C70_BLEND_OPT_DISCARD_PIXEL 0xFC7FFFFF 12465 #define S_028C70_FMASK_COMPRESSION_DISABLE(x) (((unsigned)(x) & 0x1) << 26) 12466 #define G_028C70_FMASK_COMPRESSION_DISABLE(x) (((x) >> 26) & 0x1) 12467 #define C_028C70_FMASK_COMPRESSION_DISABLE 0xFBFFFFFF 12468 #define S_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx8 */ 12469 #define G_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((x) >> 27) & 0x1) 12470 #define C_028C70_FMASK_COMPRESS_1FRAG_ONLY 0xF7FFFFFF 12471 #define S_028C70_DCC_ENABLE(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx8 */ 12472 #define G_028C70_DCC_ENABLE(x) (((x) >> 28) & 0x1) 12473 #define C_028C70_DCC_ENABLE 0xEFFFFFFF 12474 #define S_028C70_CMASK_ADDR_TYPE(x) (((unsigned)(x) & 0x3) << 29) /* >= gfx8 */ 12475 #define G_028C70_CMASK_ADDR_TYPE(x) (((x) >> 29) & 0x3) 12476 #define C_028C70_CMASK_ADDR_TYPE 0x9FFFFFFF 12477 #define V_028C70_CMASK_ADDR_TILED 0 12478 #define V_028C70_CMASK_ADDR_LINEAR 1 12479 #define V_028C70_CMASK_ADDR_COMPATIBLE 2 12480 #define S_028C70_ALT_TILE_MODE(x) (((unsigned)(x) & 0x1) << 31) /* gfx10 */ 12481 #define G_028C70_ALT_TILE_MODE(x) (((x) >> 31) & 0x1) 12482 #define C_028C70_ALT_TILE_MODE 0x7FFFFFFF 12483 #define S_028C70_NBC_TILING(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx103 */ 12484 #define G_028C70_NBC_TILING(x) (((x) >> 31) & 0x1) 12485 #define C_028C70_NBC_TILING 0x7FFFFFFF 12486 #define R_028C74_CB_COLOR0_ATTRIB 0x028C74 12487 #define S_028C74_MIP0_DEPTH(x) (((unsigned)(x) & 0x7FF) << 0) /* gfx9 */ 12488 #define G_028C74_MIP0_DEPTH(x) (((x) >> 0) & 0x7FF) 12489 #define C_028C74_MIP0_DEPTH 0xFFFFF800 12490 #define S_028C74_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 0) /* <= gfx81, >= gfx10 */ 12491 #define G_028C74_TILE_MODE_INDEX(x) (((x) >> 0) & 0x1F) 12492 #define C_028C74_TILE_MODE_INDEX 0xFFFFFFE0 12493 #define S_028C74_FMASK_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 5) /* <= gfx81, >= gfx10 */ 12494 #define G_028C74_FMASK_TILE_MODE_INDEX(x) (((x) >> 5) & 0x1F) 12495 #define C_028C74_FMASK_TILE_MODE_INDEX 0xFFFFFC1F 12496 #define S_028C74_FMASK_BANK_HEIGHT(x) (((unsigned)(x) & 0x3) << 10) /* <= gfx81, >= gfx10 */ 12497 #define G_028C74_FMASK_BANK_HEIGHT(x) (((x) >> 10) & 0x3) 12498 #define C_028C74_FMASK_BANK_HEIGHT 0xFFFFF3FF 12499 #define S_028C74_META_LINEAR(x) (((unsigned)(x) & 0x1) << 11) /* gfx9 */ 12500 #define G_028C74_META_LINEAR(x) (((x) >> 11) & 0x1) 12501 #define C_028C74_META_LINEAR 0xFFFFF7FF 12502 #define S_028C74_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 12) 12503 #define G_028C74_NUM_SAMPLES(x) (((x) >> 12) & 0x7) 12504 #define C_028C74_NUM_SAMPLES 0xFFFF8FFF 12505 #define S_028C74_NUM_FRAGMENTS(x) (((unsigned)(x) & 0x3) << 15) 12506 #define G_028C74_NUM_FRAGMENTS(x) (((x) >> 15) & 0x3) 12507 #define C_028C74_NUM_FRAGMENTS 0xFFFE7FFF 12508 #define S_028C74_FORCE_DST_ALPHA_1(x) (((unsigned)(x) & 0x1) << 17) 12509 #define G_028C74_FORCE_DST_ALPHA_1(x) (((x) >> 17) & 0x1) 12510 #define C_028C74_FORCE_DST_ALPHA_1 0xFFFDFFFF 12511 #define S_028C74_COLOR_SW_MODE(x) (((unsigned)(x) & 0x1F) << 18) /* gfx9 */ 12512 #define G_028C74_COLOR_SW_MODE(x) (((x) >> 18) & 0x1F) 12513 #define C_028C74_COLOR_SW_MODE 0xFF83FFFF 12514 #define S_028C74_DISABLE_FMASK_NOFETCH_OPT(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx10 */ 12515 #define G_028C74_DISABLE_FMASK_NOFETCH_OPT(x) (((x) >> 18) & 0x1) 12516 #define C_028C74_DISABLE_FMASK_NOFETCH_OPT 0xFFFBFFFF 12517 #define S_028C74_LIMIT_COLOR_FETCH_TO_256B_MAX(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx10 */ 12518 #define G_028C74_LIMIT_COLOR_FETCH_TO_256B_MAX(x) (((x) >> 19) & 0x1) 12519 #define C_028C74_LIMIT_COLOR_FETCH_TO_256B_MAX 0xFFF7FFFF 12520 #define S_028C74_FMASK_SW_MODE(x) (((unsigned)(x) & 0x1F) << 23) /* gfx9 */ 12521 #define G_028C74_FMASK_SW_MODE(x) (((x) >> 23) & 0x1F) 12522 #define C_028C74_FMASK_SW_MODE 0xF07FFFFF 12523 #define S_028C74_RESOURCE_TYPE(x) (((unsigned)(x) & 0x3) << 28) /* gfx9 */ 12524 #define G_028C74_RESOURCE_TYPE(x) (((x) >> 28) & 0x3) 12525 #define C_028C74_RESOURCE_TYPE 0xCFFFFFFF 12526 #define S_028C74_RB_ALIGNED(x) (((unsigned)(x) & 0x1) << 30) /* gfx9 */ 12527 #define G_028C74_RB_ALIGNED(x) (((x) >> 30) & 0x1) 12528 #define C_028C74_RB_ALIGNED 0xBFFFFFFF 12529 #define S_028C74_PIPE_ALIGNED(x) (((unsigned)(x) & 0x1) << 31) /* gfx9 */ 12530 #define G_028C74_PIPE_ALIGNED(x) (((x) >> 31) & 0x1) 12531 #define C_028C74_PIPE_ALIGNED 0x7FFFFFFF 12532 #define R_028C78_CB_COLOR0_DCC_CONTROL 0x028C78 /* >= gfx8 */ 12533 #define S_028C78_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 12534 #define G_028C78_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) 12535 #define C_028C78_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE 12536 #define S_028C78_KEY_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 12537 #define G_028C78_KEY_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) 12538 #define C_028C78_KEY_CLEAR_ENABLE 0xFFFFFFFD 12539 #define S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x3) << 2) 12540 #define G_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 2) & 0x3) 12541 #define C_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFFFFF3 12542 #define V_028C78_MAX_BLOCK_SIZE_64B 0 12543 #define V_028C78_MAX_BLOCK_SIZE_128B 1 12544 #define V_028C78_MAX_BLOCK_SIZE_256B 2 12545 #define S_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x1) << 4) 12546 #define G_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) >> 4) & 0x1) 12547 #define C_028C78_MIN_COMPRESSED_BLOCK_SIZE 0xFFFFFFEF 12548 #define V_028C78_MIN_BLOCK_SIZE_32B 0 12549 #define V_028C78_MIN_BLOCK_SIZE_64B 1 12550 #define S_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x3) << 5) 12551 #define G_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 5) & 0x3) 12552 #define C_028C78_MAX_COMPRESSED_BLOCK_SIZE 0xFFFFFF9F 12553 #define S_028C78_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x3) << 7) 12554 #define G_028C78_COLOR_TRANSFORM(x) (((x) >> 7) & 0x3) 12555 #define C_028C78_COLOR_TRANSFORM 0xFFFFFE7F 12556 #define S_028C78_INDEPENDENT_64B_BLOCKS(x) (((unsigned)(x) & 0x1) << 9) 12557 #define G_028C78_INDEPENDENT_64B_BLOCKS(x) (((x) >> 9) & 0x1) 12558 #define C_028C78_INDEPENDENT_64B_BLOCKS 0xFFFFFDFF 12559 #define S_028C78_LOSSY_RGB_PRECISION(x) (((unsigned)(x) & 0xF) << 10) 12560 #define G_028C78_LOSSY_RGB_PRECISION(x) (((x) >> 10) & 0xF) 12561 #define C_028C78_LOSSY_RGB_PRECISION 0xFFFFC3FF 12562 #define S_028C78_LOSSY_ALPHA_PRECISION(x) (((unsigned)(x) & 0xF) << 14) 12563 #define G_028C78_LOSSY_ALPHA_PRECISION(x) (((x) >> 14) & 0xF) 12564 #define C_028C78_LOSSY_ALPHA_PRECISION 0xFFFC3FFF 12565 #define S_028C78_DISABLE_CONSTANT_ENCODE_REG(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx9 */ 12566 #define G_028C78_DISABLE_CONSTANT_ENCODE_REG(x) (((x) >> 18) & 0x1) 12567 #define C_028C78_DISABLE_CONSTANT_ENCODE_REG 0xFFFBFFFF 12568 #define S_028C78_ENABLE_CONSTANT_ENCODE_REG_WRITE(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx9 */ 12569 #define G_028C78_ENABLE_CONSTANT_ENCODE_REG_WRITE(x) (((x) >> 19) & 0x1) 12570 #define C_028C78_ENABLE_CONSTANT_ENCODE_REG_WRITE 0xFFF7FFFF 12571 #define S_028C78_INDEPENDENT_128B_BLOCKS(x) (((unsigned)(x) & 0x1) << 20) /* >= gfx10 */ 12572 #define G_028C78_INDEPENDENT_128B_BLOCKS(x) (((x) >> 20) & 0x1) 12573 #define C_028C78_INDEPENDENT_128B_BLOCKS 0xFFEFFFFF 12574 #define S_028C78_SKIP_LOW_COMP_RATIO(x) (((unsigned)(x) & 0x1) << 21) /* >= gfx103 */ 12575 #define G_028C78_SKIP_LOW_COMP_RATIO(x) (((x) >> 21) & 0x1) 12576 #define C_028C78_SKIP_LOW_COMP_RATIO 0xFFDFFFFF 12577 #define S_028C78_DCC_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 22) /* >= gfx103 */ 12578 #define G_028C78_DCC_COMPRESS_DISABLE(x) (((x) >> 22) & 0x1) 12579 #define C_028C78_DCC_COMPRESS_DISABLE 0xFFBFFFFF 12580 #define R_028C7C_CB_COLOR0_CMASK 0x028C7C 12581 #define R_028C80_CB_COLOR0_CMASK_BASE_EXT 0x028C80 /* gfx9 */ 12582 #define S_028C80_BASE_256B(x) (((unsigned)(x) & 0xFF) << 0) 12583 #define G_028C80_BASE_256B(x) (((x) >> 0) & 0xFF) 12584 #define C_028C80_BASE_256B 0xFFFFFF00 12585 #define R_028C80_CB_COLOR0_CMASK_SLICE 0x028C80 /* <= gfx81, >= gfx10 */ 12586 #define S_028C80_TILE_MAX(x) (((unsigned)(x) & 0x3FFF) << 0) 12587 #define G_028C80_TILE_MAX(x) (((x) >> 0) & 0x3FFF) 12588 #define C_028C80_TILE_MAX 0xFFFFC000 12589 #define R_028C84_CB_COLOR0_FMASK 0x028C84 12590 #define R_028C88_CB_COLOR0_FMASK_BASE_EXT 0x028C88 /* gfx9 */ 12591 #define S_028C88_BASE_256B(x) (((unsigned)(x) & 0xFF) << 0) 12592 #define G_028C88_BASE_256B(x) (((x) >> 0) & 0xFF) 12593 #define C_028C88_BASE_256B 0xFFFFFF00 12594 #define R_028C88_CB_COLOR0_FMASK_SLICE 0x028C88 /* <= gfx81, >= gfx10 */ 12595 #define S_028C88_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 12596 #define G_028C88_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 12597 #define C_028C88_TILE_MAX 0xFFC00000 12598 #define R_028C8C_CB_COLOR0_CLEAR_WORD0 0x028C8C 12599 #define R_028C90_CB_COLOR0_CLEAR_WORD1 0x028C90 12600 #define R_028C94_CB_COLOR0_DCC_BASE 0x028C94 /* >= gfx8 */ 12601 #define R_028C98_CB_COLOR0_DCC_BASE_EXT 0x028C98 /* gfx9 */ 12602 #define S_028C98_BASE_256B(x) (((unsigned)(x) & 0xFF) << 0) 12603 #define G_028C98_BASE_256B(x) (((x) >> 0) & 0xFF) 12604 #define C_028C98_BASE_256B 0xFFFFFF00 12605 #define R_028C9C_CB_COLOR1_BASE 0x028C9C 12606 #define R_028CA0_CB_COLOR1_BASE_EXT 0x028CA0 /* gfx9 */ 12607 #define R_028CA0_CB_COLOR1_PITCH 0x028CA0 /* <= gfx81, >= gfx10 */ 12608 #define R_028CA4_CB_COLOR1_ATTRIB2 0x028CA4 /* gfx9 */ 12609 #define R_028CA4_CB_COLOR1_SLICE 0x028CA4 /* <= gfx81, >= gfx10 */ 12610 #define R_028CA8_CB_COLOR1_VIEW 0x028CA8 12611 #define R_028CAC_CB_COLOR1_INFO 0x028CAC 12612 #define R_028CB0_CB_COLOR1_ATTRIB 0x028CB0 12613 #define R_028CB4_CB_COLOR1_DCC_CONTROL 0x028CB4 /* >= gfx8 */ 12614 #define R_028CB8_CB_COLOR1_CMASK 0x028CB8 12615 #define R_028CBC_CB_COLOR1_CMASK_BASE_EXT 0x028CBC /* gfx9 */ 12616 #define R_028CBC_CB_COLOR1_CMASK_SLICE 0x028CBC /* <= gfx81, >= gfx10 */ 12617 #define R_028CC0_CB_COLOR1_FMASK 0x028CC0 12618 #define R_028CC4_CB_COLOR1_FMASK_BASE_EXT 0x028CC4 /* gfx9 */ 12619 #define R_028CC4_CB_COLOR1_FMASK_SLICE 0x028CC4 /* <= gfx81, >= gfx10 */ 12620 #define R_028CC8_CB_COLOR1_CLEAR_WORD0 0x028CC8 12621 #define R_028CCC_CB_COLOR1_CLEAR_WORD1 0x028CCC 12622 #define R_028CD0_CB_COLOR1_DCC_BASE 0x028CD0 /* >= gfx8 */ 12623 #define R_028CD4_CB_COLOR1_DCC_BASE_EXT 0x028CD4 /* gfx9 */ 12624 #define R_028CD8_CB_COLOR2_BASE 0x028CD8 12625 #define R_028CDC_CB_COLOR2_BASE_EXT 0x028CDC /* gfx9 */ 12626 #define R_028CDC_CB_COLOR2_PITCH 0x028CDC /* <= gfx81, >= gfx10 */ 12627 #define R_028CE0_CB_COLOR2_ATTRIB2 0x028CE0 /* gfx9 */ 12628 #define R_028CE0_CB_COLOR2_SLICE 0x028CE0 /* <= gfx81, >= gfx10 */ 12629 #define R_028CE4_CB_COLOR2_VIEW 0x028CE4 12630 #define R_028CE8_CB_COLOR2_INFO 0x028CE8 12631 #define R_028CEC_CB_COLOR2_ATTRIB 0x028CEC 12632 #define R_028CF0_CB_COLOR2_DCC_CONTROL 0x028CF0 /* >= gfx8 */ 12633 #define R_028CF4_CB_COLOR2_CMASK 0x028CF4 12634 #define R_028CF8_CB_COLOR2_CMASK_BASE_EXT 0x028CF8 /* gfx9 */ 12635 #define R_028CF8_CB_COLOR2_CMASK_SLICE 0x028CF8 /* <= gfx81, >= gfx10 */ 12636 #define R_028CFC_CB_COLOR2_FMASK 0x028CFC 12637 #define R_028D00_CB_COLOR2_FMASK_BASE_EXT 0x028D00 /* gfx9 */ 12638 #define R_028D00_CB_COLOR2_FMASK_SLICE 0x028D00 /* <= gfx81, >= gfx10 */ 12639 #define R_028D04_CB_COLOR2_CLEAR_WORD0 0x028D04 12640 #define R_028D08_CB_COLOR2_CLEAR_WORD1 0x028D08 12641 #define R_028D0C_CB_COLOR2_DCC_BASE 0x028D0C /* >= gfx8 */ 12642 #define R_028D10_CB_COLOR2_DCC_BASE_EXT 0x028D10 /* gfx9 */ 12643 #define R_028D14_CB_COLOR3_BASE 0x028D14 12644 #define R_028D18_CB_COLOR3_BASE_EXT 0x028D18 /* gfx9 */ 12645 #define R_028D18_CB_COLOR3_PITCH 0x028D18 /* <= gfx81, >= gfx10 */ 12646 #define R_028D1C_CB_COLOR3_ATTRIB2 0x028D1C /* gfx9 */ 12647 #define R_028D1C_CB_COLOR3_SLICE 0x028D1C /* <= gfx81, >= gfx10 */ 12648 #define R_028D20_CB_COLOR3_VIEW 0x028D20 12649 #define R_028D24_CB_COLOR3_INFO 0x028D24 12650 #define R_028D28_CB_COLOR3_ATTRIB 0x028D28 12651 #define R_028D2C_CB_COLOR3_DCC_CONTROL 0x028D2C /* >= gfx8 */ 12652 #define R_028D30_CB_COLOR3_CMASK 0x028D30 12653 #define R_028D34_CB_COLOR3_CMASK_BASE_EXT 0x028D34 /* gfx9 */ 12654 #define R_028D34_CB_COLOR3_CMASK_SLICE 0x028D34 /* <= gfx81, >= gfx10 */ 12655 #define R_028D38_CB_COLOR3_FMASK 0x028D38 12656 #define R_028D3C_CB_COLOR3_FMASK_BASE_EXT 0x028D3C /* gfx9 */ 12657 #define R_028D3C_CB_COLOR3_FMASK_SLICE 0x028D3C /* <= gfx81, >= gfx10 */ 12658 #define R_028D40_CB_COLOR3_CLEAR_WORD0 0x028D40 12659 #define R_028D44_CB_COLOR3_CLEAR_WORD1 0x028D44 12660 #define R_028D48_CB_COLOR3_DCC_BASE 0x028D48 /* >= gfx8 */ 12661 #define R_028D4C_CB_COLOR3_DCC_BASE_EXT 0x028D4C /* gfx9 */ 12662 #define R_028D50_CB_COLOR4_BASE 0x028D50 12663 #define R_028D54_CB_COLOR4_BASE_EXT 0x028D54 /* gfx9 */ 12664 #define R_028D54_CB_COLOR4_PITCH 0x028D54 /* <= gfx81, >= gfx10 */ 12665 #define R_028D58_CB_COLOR4_ATTRIB2 0x028D58 /* gfx9 */ 12666 #define R_028D58_CB_COLOR4_SLICE 0x028D58 /* <= gfx81, >= gfx10 */ 12667 #define R_028D5C_CB_COLOR4_VIEW 0x028D5C 12668 #define R_028D60_CB_COLOR4_INFO 0x028D60 12669 #define R_028D64_CB_COLOR4_ATTRIB 0x028D64 12670 #define R_028D68_CB_COLOR4_DCC_CONTROL 0x028D68 /* >= gfx8 */ 12671 #define R_028D6C_CB_COLOR4_CMASK 0x028D6C 12672 #define R_028D70_CB_COLOR4_CMASK_BASE_EXT 0x028D70 /* gfx9 */ 12673 #define R_028D70_CB_COLOR4_CMASK_SLICE 0x028D70 /* <= gfx81, >= gfx10 */ 12674 #define R_028D74_CB_COLOR4_FMASK 0x028D74 12675 #define R_028D78_CB_COLOR4_FMASK_BASE_EXT 0x028D78 /* gfx9 */ 12676 #define R_028D78_CB_COLOR4_FMASK_SLICE 0x028D78 /* <= gfx81, >= gfx10 */ 12677 #define R_028D7C_CB_COLOR4_CLEAR_WORD0 0x028D7C 12678 #define R_028D80_CB_COLOR4_CLEAR_WORD1 0x028D80 12679 #define R_028D84_CB_COLOR4_DCC_BASE 0x028D84 /* >= gfx8 */ 12680 #define R_028D88_CB_COLOR4_DCC_BASE_EXT 0x028D88 /* gfx9 */ 12681 #define R_028D8C_CB_COLOR5_BASE 0x028D8C 12682 #define R_028D90_CB_COLOR5_BASE_EXT 0x028D90 /* gfx9 */ 12683 #define R_028D90_CB_COLOR5_PITCH 0x028D90 /* <= gfx81, >= gfx10 */ 12684 #define R_028D94_CB_COLOR5_ATTRIB2 0x028D94 /* gfx9 */ 12685 #define R_028D94_CB_COLOR5_SLICE 0x028D94 /* <= gfx81, >= gfx10 */ 12686 #define R_028D98_CB_COLOR5_VIEW 0x028D98 12687 #define R_028D9C_CB_COLOR5_INFO 0x028D9C 12688 #define R_028DA0_CB_COLOR5_ATTRIB 0x028DA0 12689 #define R_028DA4_CB_COLOR5_DCC_CONTROL 0x028DA4 /* >= gfx8 */ 12690 #define R_028DA8_CB_COLOR5_CMASK 0x028DA8 12691 #define R_028DAC_CB_COLOR5_CMASK_BASE_EXT 0x028DAC /* gfx9 */ 12692 #define R_028DAC_CB_COLOR5_CMASK_SLICE 0x028DAC /* <= gfx81, >= gfx10 */ 12693 #define R_028DB0_CB_COLOR5_FMASK 0x028DB0 12694 #define R_028DB4_CB_COLOR5_FMASK_BASE_EXT 0x028DB4 /* gfx9 */ 12695 #define R_028DB4_CB_COLOR5_FMASK_SLICE 0x028DB4 /* <= gfx81, >= gfx10 */ 12696 #define R_028DB8_CB_COLOR5_CLEAR_WORD0 0x028DB8 12697 #define R_028DBC_CB_COLOR5_CLEAR_WORD1 0x028DBC 12698 #define R_028DC0_CB_COLOR5_DCC_BASE 0x028DC0 /* >= gfx8 */ 12699 #define R_028DC4_CB_COLOR5_DCC_BASE_EXT 0x028DC4 /* gfx9 */ 12700 #define R_028DC8_CB_COLOR6_BASE 0x028DC8 12701 #define R_028DCC_CB_COLOR6_BASE_EXT 0x028DCC /* gfx9 */ 12702 #define R_028DCC_CB_COLOR6_PITCH 0x028DCC /* <= gfx81, >= gfx10 */ 12703 #define R_028DD0_CB_COLOR6_ATTRIB2 0x028DD0 /* gfx9 */ 12704 #define R_028DD0_CB_COLOR6_SLICE 0x028DD0 /* <= gfx81, >= gfx10 */ 12705 #define R_028DD4_CB_COLOR6_VIEW 0x028DD4 12706 #define R_028DD8_CB_COLOR6_INFO 0x028DD8 12707 #define R_028DDC_CB_COLOR6_ATTRIB 0x028DDC 12708 #define R_028DE0_CB_COLOR6_DCC_CONTROL 0x028DE0 /* >= gfx8 */ 12709 #define R_028DE4_CB_COLOR6_CMASK 0x028DE4 12710 #define R_028DE8_CB_COLOR6_CMASK_BASE_EXT 0x028DE8 /* gfx9 */ 12711 #define R_028DE8_CB_COLOR6_CMASK_SLICE 0x028DE8 /* <= gfx81, >= gfx10 */ 12712 #define R_028DEC_CB_COLOR6_FMASK 0x028DEC 12713 #define R_028DF0_CB_COLOR6_FMASK_BASE_EXT 0x028DF0 /* gfx9 */ 12714 #define R_028DF0_CB_COLOR6_FMASK_SLICE 0x028DF0 /* <= gfx81, >= gfx10 */ 12715 #define R_028DF4_CB_COLOR6_CLEAR_WORD0 0x028DF4 12716 #define R_028DF8_CB_COLOR6_CLEAR_WORD1 0x028DF8 12717 #define R_028DFC_CB_COLOR6_DCC_BASE 0x028DFC /* >= gfx8 */ 12718 #define R_028E00_CB_COLOR6_DCC_BASE_EXT 0x028E00 /* gfx9 */ 12719 #define R_028E04_CB_COLOR7_BASE 0x028E04 12720 #define R_028E08_CB_COLOR7_BASE_EXT 0x028E08 /* gfx9 */ 12721 #define R_028E08_CB_COLOR7_PITCH 0x028E08 /* <= gfx81, >= gfx10 */ 12722 #define R_028E0C_CB_COLOR7_ATTRIB2 0x028E0C /* gfx9 */ 12723 #define R_028E0C_CB_COLOR7_SLICE 0x028E0C /* <= gfx81, >= gfx10 */ 12724 #define R_028E10_CB_COLOR7_VIEW 0x028E10 12725 #define R_028E14_CB_COLOR7_INFO 0x028E14 12726 #define R_028E18_CB_COLOR7_ATTRIB 0x028E18 12727 #define R_028E1C_CB_COLOR7_DCC_CONTROL 0x028E1C /* >= gfx8 */ 12728 #define R_028E20_CB_COLOR7_CMASK 0x028E20 12729 #define R_028E24_CB_COLOR7_CMASK_BASE_EXT 0x028E24 /* gfx9 */ 12730 #define R_028E24_CB_COLOR7_CMASK_SLICE 0x028E24 /* <= gfx81, >= gfx10 */ 12731 #define R_028E28_CB_COLOR7_FMASK 0x028E28 12732 #define R_028E2C_CB_COLOR7_FMASK_BASE_EXT 0x028E2C /* gfx9 */ 12733 #define R_028E2C_CB_COLOR7_FMASK_SLICE 0x028E2C /* <= gfx81, >= gfx10 */ 12734 #define R_028E30_CB_COLOR7_CLEAR_WORD0 0x028E30 12735 #define R_028E34_CB_COLOR7_CLEAR_WORD1 0x028E34 12736 #define R_028E38_CB_COLOR7_DCC_BASE 0x028E38 /* >= gfx8 */ 12737 #define R_028E3C_CB_COLOR7_DCC_BASE_EXT 0x028E3C /* gfx9 */ 12738 #define R_028E40_CB_COLOR0_BASE_EXT 0x028E40 /* >= gfx10 */ 12739 #define S_028E40_BASE_256B(x) (((unsigned)(x) & 0xFF) << 0) 12740 #define G_028E40_BASE_256B(x) (((x) >> 0) & 0xFF) 12741 #define C_028E40_BASE_256B 0xFFFFFF00 12742 #define R_028E44_CB_COLOR1_BASE_EXT 0x028E44 /* >= gfx10 */ 12743 #define R_028E48_CB_COLOR2_BASE_EXT 0x028E48 /* >= gfx10 */ 12744 #define R_028E4C_CB_COLOR3_BASE_EXT 0x028E4C /* >= gfx10 */ 12745 #define R_028E50_CB_COLOR4_BASE_EXT 0x028E50 /* >= gfx10 */ 12746 #define R_028E54_CB_COLOR5_BASE_EXT 0x028E54 /* >= gfx10 */ 12747 #define R_028E58_CB_COLOR6_BASE_EXT 0x028E58 /* >= gfx10 */ 12748 #define R_028E5C_CB_COLOR7_BASE_EXT 0x028E5C /* >= gfx10 */ 12749 #define R_028E60_CB_COLOR0_CMASK_BASE_EXT 0x028E60 /* >= gfx10 */ 12750 #define S_028E60_BASE_256B(x) (((unsigned)(x) & 0xFF) << 0) 12751 #define G_028E60_BASE_256B(x) (((x) >> 0) & 0xFF) 12752 #define C_028E60_BASE_256B 0xFFFFFF00 12753 #define R_028E64_CB_COLOR1_CMASK_BASE_EXT 0x028E64 /* >= gfx10 */ 12754 #define R_028E68_CB_COLOR2_CMASK_BASE_EXT 0x028E68 /* >= gfx10 */ 12755 #define R_028E6C_CB_COLOR3_CMASK_BASE_EXT 0x028E6C /* >= gfx10 */ 12756 #define R_028E70_CB_COLOR4_CMASK_BASE_EXT 0x028E70 /* >= gfx10 */ 12757 #define R_028E74_CB_COLOR5_CMASK_BASE_EXT 0x028E74 /* >= gfx10 */ 12758 #define R_028E78_CB_COLOR6_CMASK_BASE_EXT 0x028E78 /* >= gfx10 */ 12759 #define R_028E7C_CB_COLOR7_CMASK_BASE_EXT 0x028E7C /* >= gfx10 */ 12760 #define R_028E80_CB_COLOR0_FMASK_BASE_EXT 0x028E80 /* >= gfx10 */ 12761 #define S_028E80_BASE_256B(x) (((unsigned)(x) & 0xFF) << 0) 12762 #define G_028E80_BASE_256B(x) (((x) >> 0) & 0xFF) 12763 #define C_028E80_BASE_256B 0xFFFFFF00 12764 #define R_028E84_CB_COLOR1_FMASK_BASE_EXT 0x028E84 /* >= gfx10 */ 12765 #define R_028E88_CB_COLOR2_FMASK_BASE_EXT 0x028E88 /* >= gfx10 */ 12766 #define R_028E8C_CB_COLOR3_FMASK_BASE_EXT 0x028E8C /* >= gfx10 */ 12767 #define R_028E90_CB_COLOR4_FMASK_BASE_EXT 0x028E90 /* >= gfx10 */ 12768 #define R_028E94_CB_COLOR5_FMASK_BASE_EXT 0x028E94 /* >= gfx10 */ 12769 #define R_028E98_CB_COLOR6_FMASK_BASE_EXT 0x028E98 /* >= gfx10 */ 12770 #define R_028E9C_CB_COLOR7_FMASK_BASE_EXT 0x028E9C /* >= gfx10 */ 12771 #define R_028EA0_CB_COLOR0_DCC_BASE_EXT 0x028EA0 /* >= gfx10 */ 12772 #define S_028EA0_BASE_256B(x) (((unsigned)(x) & 0xFF) << 0) 12773 #define G_028EA0_BASE_256B(x) (((x) >> 0) & 0xFF) 12774 #define C_028EA0_BASE_256B 0xFFFFFF00 12775 #define R_028EA4_CB_COLOR1_DCC_BASE_EXT 0x028EA4 /* >= gfx10 */ 12776 #define R_028EA8_CB_COLOR2_DCC_BASE_EXT 0x028EA8 /* >= gfx10 */ 12777 #define R_028EAC_CB_COLOR3_DCC_BASE_EXT 0x028EAC /* >= gfx10 */ 12778 #define R_028EB0_CB_COLOR4_DCC_BASE_EXT 0x028EB0 /* >= gfx10 */ 12779 #define R_028EB4_CB_COLOR5_DCC_BASE_EXT 0x028EB4 /* >= gfx10 */ 12780 #define R_028EB8_CB_COLOR6_DCC_BASE_EXT 0x028EB8 /* >= gfx10 */ 12781 #define R_028EBC_CB_COLOR7_DCC_BASE_EXT 0x028EBC /* >= gfx10 */ 12782 #define R_028EC0_CB_COLOR0_ATTRIB2 0x028EC0 /* >= gfx10 */ 12783 #define S_028EC0_MIP0_HEIGHT(x) (((unsigned)(x) & 0x3FFF) << 0) 12784 #define G_028EC0_MIP0_HEIGHT(x) (((x) >> 0) & 0x3FFF) 12785 #define C_028EC0_MIP0_HEIGHT 0xFFFFC000 12786 #define S_028EC0_MIP0_WIDTH(x) (((unsigned)(x) & 0x3FFF) << 14) 12787 #define G_028EC0_MIP0_WIDTH(x) (((x) >> 14) & 0x3FFF) 12788 #define C_028EC0_MIP0_WIDTH 0xF0003FFF 12789 #define S_028EC0_MAX_MIP(x) (((unsigned)(x) & 0xF) << 28) 12790 #define G_028EC0_MAX_MIP(x) (((x) >> 28) & 0xF) 12791 #define C_028EC0_MAX_MIP 0x0FFFFFFF 12792 #define R_028EC4_CB_COLOR1_ATTRIB2 0x028EC4 /* >= gfx10 */ 12793 #define R_028EC8_CB_COLOR2_ATTRIB2 0x028EC8 /* >= gfx10 */ 12794 #define R_028ECC_CB_COLOR3_ATTRIB2 0x028ECC /* >= gfx10 */ 12795 #define R_028ED0_CB_COLOR4_ATTRIB2 0x028ED0 /* >= gfx10 */ 12796 #define R_028ED4_CB_COLOR5_ATTRIB2 0x028ED4 /* >= gfx10 */ 12797 #define R_028ED8_CB_COLOR6_ATTRIB2 0x028ED8 /* >= gfx10 */ 12798 #define R_028EDC_CB_COLOR7_ATTRIB2 0x028EDC /* >= gfx10 */ 12799 #define R_028EE0_CB_COLOR0_ATTRIB3 0x028EE0 /* >= gfx10 */ 12800 #define S_028EE0_MIP0_DEPTH(x) (((unsigned)(x) & 0x1FFF) << 0) 12801 #define G_028EE0_MIP0_DEPTH(x) (((x) >> 0) & 0x1FFF) 12802 #define C_028EE0_MIP0_DEPTH 0xFFFFE000 12803 #define S_028EE0_META_LINEAR(x) (((unsigned)(x) & 0x1) << 13) 12804 #define G_028EE0_META_LINEAR(x) (((x) >> 13) & 0x1) 12805 #define C_028EE0_META_LINEAR 0xFFFFDFFF 12806 #define S_028EE0_COLOR_SW_MODE(x) (((unsigned)(x) & 0x1F) << 14) 12807 #define G_028EE0_COLOR_SW_MODE(x) (((x) >> 14) & 0x1F) 12808 #define C_028EE0_COLOR_SW_MODE 0xFFF83FFF 12809 #define S_028EE0_FMASK_SW_MODE(x) (((unsigned)(x) & 0x1F) << 19) 12810 #define G_028EE0_FMASK_SW_MODE(x) (((x) >> 19) & 0x1F) 12811 #define C_028EE0_FMASK_SW_MODE 0xFF07FFFF 12812 #define S_028EE0_RESOURCE_TYPE(x) (((unsigned)(x) & 0x3) << 24) 12813 #define G_028EE0_RESOURCE_TYPE(x) (((x) >> 24) & 0x3) 12814 #define C_028EE0_RESOURCE_TYPE 0xFCFFFFFF 12815 #define S_028EE0_CMASK_PIPE_ALIGNED(x) (((unsigned)(x) & 0x1) << 26) 12816 #define G_028EE0_CMASK_PIPE_ALIGNED(x) (((x) >> 26) & 0x1) 12817 #define C_028EE0_CMASK_PIPE_ALIGNED 0xFBFFFFFF 12818 #define S_028EE0_RESOURCE_LEVEL(x) (((unsigned)(x) & 0x7) << 27) 12819 #define G_028EE0_RESOURCE_LEVEL(x) (((x) >> 27) & 0x7) 12820 #define C_028EE0_RESOURCE_LEVEL 0xC7FFFFFF 12821 #define S_028EE0_DCC_PIPE_ALIGNED(x) (((unsigned)(x) & 0x1) << 30) 12822 #define G_028EE0_DCC_PIPE_ALIGNED(x) (((x) >> 30) & 0x1) 12823 #define C_028EE0_DCC_PIPE_ALIGNED 0xBFFFFFFF 12824 #define S_028EE0_VRS_RATE_HINT_ENABLE(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx103 */ 12825 #define G_028EE0_VRS_RATE_HINT_ENABLE(x) (((x) >> 31) & 0x1) 12826 #define C_028EE0_VRS_RATE_HINT_ENABLE 0x7FFFFFFF 12827 #define R_028EE4_CB_COLOR1_ATTRIB3 0x028EE4 /* >= gfx10 */ 12828 #define R_028EE8_CB_COLOR2_ATTRIB3 0x028EE8 /* >= gfx10 */ 12829 #define R_028EEC_CB_COLOR3_ATTRIB3 0x028EEC /* >= gfx10 */ 12830 #define R_028EF0_CB_COLOR4_ATTRIB3 0x028EF0 /* >= gfx10 */ 12831 #define R_028EF4_CB_COLOR5_ATTRIB3 0x028EF4 /* >= gfx10 */ 12832 #define R_028EF8_CB_COLOR6_ATTRIB3 0x028EF8 /* >= gfx10 */ 12833 #define R_028EFC_CB_COLOR7_ATTRIB3 0x028EFC /* >= gfx10 */ 12834 #define R_030000_CP_EOP_DONE_ADDR_LO 0x030000 /* >= gfx7 */ 12835 #define S_030000_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) /* gfx7 */ 12836 #define G_030000_ADDR_SWAP(x) (((x) >> 0) & 0x3) 12837 #define C_030000_ADDR_SWAP 0xFFFFFFFC 12838 #define S_030000_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 12839 #define G_030000_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 12840 #define C_030000_ADDR_LO 0x00000003 12841 #define R_030004_CP_EOP_DONE_ADDR_HI 0x030004 /* >= gfx7 */ 12842 #define S_030004_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 12843 #define G_030004_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 12844 #define C_030004_ADDR_HI 0xFFFF0000 12845 #define R_030008_CP_EOP_DONE_DATA_LO 0x030008 /* >= gfx7 */ 12846 #define R_03000C_CP_EOP_DONE_DATA_HI 0x03000C /* >= gfx7 */ 12847 #define R_030010_CP_EOP_LAST_FENCE_LO 0x030010 /* >= gfx7 */ 12848 #define R_030014_CP_EOP_LAST_FENCE_HI 0x030014 /* >= gfx7 */ 12849 #define R_030018_CP_STREAM_OUT_ADDR_LO 0x030018 /* >= gfx7 */ 12850 #define S_030018_STREAM_OUT_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) /* gfx7 */ 12851 #define G_030018_STREAM_OUT_ADDR_SWAP(x) (((x) >> 0) & 0x3) 12852 #define C_030018_STREAM_OUT_ADDR_SWAP 0xFFFFFFFC 12853 #define S_030018_STREAM_OUT_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 12854 #define G_030018_STREAM_OUT_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 12855 #define C_030018_STREAM_OUT_ADDR_LO 0x00000003 12856 #define R_03001C_CP_STREAM_OUT_ADDR_HI 0x03001C /* >= gfx7 */ 12857 #define S_03001C_STREAM_OUT_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 12858 #define G_03001C_STREAM_OUT_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 12859 #define C_03001C_STREAM_OUT_ADDR_HI 0xFFFF0000 12860 #define R_030020_CP_NUM_PRIM_WRITTEN_COUNT0_LO 0x030020 /* >= gfx7 */ 12861 #define R_030024_CP_NUM_PRIM_WRITTEN_COUNT0_HI 0x030024 /* >= gfx7 */ 12862 #define R_030028_CP_NUM_PRIM_NEEDED_COUNT0_LO 0x030028 /* >= gfx7 */ 12863 #define R_03002C_CP_NUM_PRIM_NEEDED_COUNT0_HI 0x03002C /* >= gfx7 */ 12864 #define R_030030_CP_NUM_PRIM_WRITTEN_COUNT1_LO 0x030030 /* >= gfx7 */ 12865 #define R_030034_CP_NUM_PRIM_WRITTEN_COUNT1_HI 0x030034 /* >= gfx7 */ 12866 #define R_030038_CP_NUM_PRIM_NEEDED_COUNT1_LO 0x030038 /* >= gfx7 */ 12867 #define R_03003C_CP_NUM_PRIM_NEEDED_COUNT1_HI 0x03003C /* >= gfx7 */ 12868 #define R_030040_CP_NUM_PRIM_WRITTEN_COUNT2_LO 0x030040 /* >= gfx7 */ 12869 #define R_030044_CP_NUM_PRIM_WRITTEN_COUNT2_HI 0x030044 /* >= gfx7 */ 12870 #define R_030048_CP_NUM_PRIM_NEEDED_COUNT2_LO 0x030048 /* >= gfx7 */ 12871 #define R_03004C_CP_NUM_PRIM_NEEDED_COUNT2_HI 0x03004C /* >= gfx7 */ 12872 #define R_030050_CP_NUM_PRIM_WRITTEN_COUNT3_LO 0x030050 /* >= gfx7 */ 12873 #define R_030054_CP_NUM_PRIM_WRITTEN_COUNT3_HI 0x030054 /* >= gfx7 */ 12874 #define R_030058_CP_NUM_PRIM_NEEDED_COUNT3_LO 0x030058 /* >= gfx7 */ 12875 #define R_03005C_CP_NUM_PRIM_NEEDED_COUNT3_HI 0x03005C /* >= gfx7 */ 12876 #define R_030060_CP_PIPE_STATS_ADDR_LO 0x030060 /* >= gfx7 */ 12877 #define S_030060_PIPE_STATS_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) /* gfx7 */ 12878 #define G_030060_PIPE_STATS_ADDR_SWAP(x) (((x) >> 0) & 0x3) 12879 #define C_030060_PIPE_STATS_ADDR_SWAP 0xFFFFFFFC 12880 #define S_030060_PIPE_STATS_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 12881 #define G_030060_PIPE_STATS_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 12882 #define C_030060_PIPE_STATS_ADDR_LO 0x00000003 12883 #define R_030064_CP_PIPE_STATS_ADDR_HI 0x030064 /* >= gfx7 */ 12884 #define S_030064_PIPE_STATS_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 12885 #define G_030064_PIPE_STATS_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 12886 #define C_030064_PIPE_STATS_ADDR_HI 0xFFFF0000 12887 #define R_030068_CP_VGT_IAVERT_COUNT_LO 0x030068 /* >= gfx7 */ 12888 #define R_03006C_CP_VGT_IAVERT_COUNT_HI 0x03006C /* >= gfx7 */ 12889 #define R_030070_CP_VGT_IAPRIM_COUNT_LO 0x030070 /* >= gfx7 */ 12890 #define R_030074_CP_VGT_IAPRIM_COUNT_HI 0x030074 /* >= gfx7 */ 12891 #define R_030078_CP_VGT_GSPRIM_COUNT_LO 0x030078 /* >= gfx7 */ 12892 #define R_03007C_CP_VGT_GSPRIM_COUNT_HI 0x03007C /* >= gfx7 */ 12893 #define R_030080_CP_VGT_VSINVOC_COUNT_LO 0x030080 /* >= gfx7 */ 12894 #define R_030084_CP_VGT_VSINVOC_COUNT_HI 0x030084 /* >= gfx7 */ 12895 #define R_030088_CP_VGT_GSINVOC_COUNT_LO 0x030088 /* >= gfx7 */ 12896 #define R_03008C_CP_VGT_GSINVOC_COUNT_HI 0x03008C /* >= gfx7 */ 12897 #define R_030090_CP_VGT_HSINVOC_COUNT_LO 0x030090 /* >= gfx7 */ 12898 #define R_030094_CP_VGT_HSINVOC_COUNT_HI 0x030094 /* >= gfx7 */ 12899 #define R_030098_CP_VGT_DSINVOC_COUNT_LO 0x030098 /* >= gfx7 */ 12900 #define R_03009C_CP_VGT_DSINVOC_COUNT_HI 0x03009C /* >= gfx7 */ 12901 #define R_0300A0_CP_PA_CINVOC_COUNT_LO 0x0300A0 /* >= gfx7 */ 12902 #define R_0300A4_CP_PA_CINVOC_COUNT_HI 0x0300A4 /* >= gfx7 */ 12903 #define R_0300A8_CP_PA_CPRIM_COUNT_LO 0x0300A8 /* >= gfx7 */ 12904 #define R_0300AC_CP_PA_CPRIM_COUNT_HI 0x0300AC /* >= gfx7 */ 12905 #define R_0300B0_CP_SC_PSINVOC_COUNT0_LO 0x0300B0 /* >= gfx7 */ 12906 #define R_0300B4_CP_SC_PSINVOC_COUNT0_HI 0x0300B4 /* >= gfx7 */ 12907 #define R_0300B8_CP_SC_PSINVOC_COUNT1_LO 0x0300B8 /* >= gfx7 */ 12908 #define R_0300BC_CP_SC_PSINVOC_COUNT1_HI 0x0300BC /* >= gfx7 */ 12909 #define R_0300C0_CP_VGT_CSINVOC_COUNT_LO 0x0300C0 /* >= gfx7 */ 12910 #define R_0300C4_CP_VGT_CSINVOC_COUNT_HI 0x0300C4 /* >= gfx7 */ 12911 #define R_0300C8_CP_EOP_DONE_DOORBELL 0x0300C8 /* gfx10 */ 12912 #define S_0300C8_DOORBELL_OFFSET(x) (((unsigned)(x) & 0x3FFFFFF) << 2) 12913 #define G_0300C8_DOORBELL_OFFSET(x) (((x) >> 2) & 0x3FFFFFF) 12914 #define C_0300C8_DOORBELL_OFFSET 0xF0000003 12915 #define R_0300CC_CP_STREAM_OUT_DOORBELL 0x0300CC /* gfx10 */ 12916 #define S_0300CC_DOORBELL_OFFSET(x) (((unsigned)(x) & 0x3FFFFFF) << 2) 12917 #define G_0300CC_DOORBELL_OFFSET(x) (((x) >> 2) & 0x3FFFFFF) 12918 #define C_0300CC_DOORBELL_OFFSET 0xF0000003 12919 #define R_0300D0_CP_SEM_DOORBELL 0x0300D0 /* gfx10 */ 12920 #define S_0300D0_DOORBELL_OFFSET(x) (((unsigned)(x) & 0x3FFFFFF) << 2) 12921 #define G_0300D0_DOORBELL_OFFSET(x) (((x) >> 2) & 0x3FFFFFF) 12922 #define C_0300D0_DOORBELL_OFFSET 0xF0000003 12923 #define R_0300F4_CP_PIPE_STATS_CONTROL 0x0300F4 /* >= gfx8 */ 12924 #define S_0300F4_CACHE_CONTROL(x) (((unsigned)(x) & 0x1) << 25) /* gfx8, gfx81 */ 12925 #define G_0300F4_CACHE_CONTROL(x) (((x) >> 25) & 0x1) 12926 #define C_0300F4_CACHE_CONTROL 0xFDFFFFFF 12927 #define S_0300F4_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 25) /* >= gfx9 */ 12928 #define G_0300F4_CACHE_POLICY(x) (((x) >> 25) & 0x3) 12929 #define C_0300F4_CACHE_POLICY 0xF9FFFFFF 12930 #define S_0300F4_MTYPE(x) (((unsigned)(x) & 0x3) << 27) /* gfx8, gfx81 */ 12931 #define G_0300F4_MTYPE(x) (((x) >> 27) & 0x3) 12932 #define C_0300F4_MTYPE 0xE7FFFFFF 12933 #define R_0300F8_CP_STREAM_OUT_CONTROL 0x0300F8 /* >= gfx8 */ 12934 #define S_0300F8_CACHE_CONTROL(x) (((unsigned)(x) & 0x1) << 25) /* gfx8, gfx81 */ 12935 #define G_0300F8_CACHE_CONTROL(x) (((x) >> 25) & 0x1) 12936 #define C_0300F8_CACHE_CONTROL 0xFDFFFFFF 12937 #define S_0300F8_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 25) /* >= gfx9 */ 12938 #define G_0300F8_CACHE_POLICY(x) (((x) >> 25) & 0x3) 12939 #define C_0300F8_CACHE_POLICY 0xF9FFFFFF 12940 #define S_0300F8_MTYPE(x) (((unsigned)(x) & 0x3) << 27) /* gfx8, gfx81 */ 12941 #define G_0300F8_MTYPE(x) (((x) >> 27) & 0x3) 12942 #define C_0300F8_MTYPE 0xE7FFFFFF 12943 #define R_0300FC_CP_STRMOUT_CNTL 0x0300FC /* >= gfx7 */ 12944 #define S_0300FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) 12945 #define G_0300FC_OFFSET_UPDATE_DONE(x) (((x) >> 0) & 0x1) 12946 #define C_0300FC_OFFSET_UPDATE_DONE 0xFFFFFFFE 12947 #define R_030100_SCRATCH_REG0 0x030100 /* >= gfx7 */ 12948 #define R_030104_SCRATCH_REG1 0x030104 /* >= gfx7 */ 12949 #define R_030108_SCRATCH_REG2 0x030108 /* >= gfx7 */ 12950 #define R_03010C_SCRATCH_REG3 0x03010C /* >= gfx7 */ 12951 #define R_030110_SCRATCH_REG4 0x030110 /* >= gfx7 */ 12952 #define R_030114_SCRATCH_REG5 0x030114 /* >= gfx7 */ 12953 #define R_030118_SCRATCH_REG6 0x030118 /* >= gfx7 */ 12954 #define R_03011C_SCRATCH_REG7 0x03011C /* >= gfx7 */ 12955 #define R_030120_CP_PIPE_STATS_DOORBELL 0x030120 /* gfx10 */ 12956 #define S_030120_DOORBELL_OFFSET(x) (((unsigned)(x) & 0x3FFFFFF) << 2) 12957 #define G_030120_DOORBELL_OFFSET(x) (((x) >> 2) & 0x3FFFFFF) 12958 #define C_030120_DOORBELL_OFFSET 0xF0000003 12959 #define R_030120_SCRATCH_REG_ATOMIC 0x030120 /* >= gfx103 */ 12960 #define S_030120_IMMED(x) (((unsigned)(x) & 0xFFFFFF) << 0) 12961 #define G_030120_IMMED(x) (((x) >> 0) & 0xFFFFFF) 12962 #define C_030120_IMMED 0xFF000000 12963 #define S_030120_ID(x) (((unsigned)(x) & 0x7) << 24) 12964 #define G_030120_ID(x) (((x) >> 24) & 0x7) 12965 #define C_030120_ID 0xF8FFFFFF 12966 #define S_030120_reserved27(x) (((unsigned)(x) & 0x1) << 27) 12967 #define G_030120_reserved27(x) (((x) >> 27) & 0x1) 12968 #define C_030120_reserved27 0xF7FFFFFF 12969 #define S_030120_OP(x) (((unsigned)(x) & 0x7) << 28) 12970 #define G_030120_OP(x) (((x) >> 28) & 0x7) 12971 #define C_030120_OP 0x8FFFFFFF 12972 #define S_030120_reserved31(x) (((unsigned)(x) & 0x1) << 31) 12973 #define G_030120_reserved31(x) (((x) >> 31) & 0x1) 12974 #define C_030120_reserved31 0x7FFFFFFF 12975 #define R_03012C_CP_APPEND_DDID_CNT 0x03012C /* >= gfx10 */ 12976 #define S_03012C_DATA(x) (((unsigned)(x) & 0xFF) << 0) 12977 #define G_03012C_DATA(x) (((x) >> 0) & 0xFF) 12978 #define C_03012C_DATA 0xFFFFFF00 12979 #define R_030130_CP_APPEND_DATA_HI 0x030130 /* >= gfx9 */ 12980 #define R_030134_CP_APPEND_LAST_CS_FENCE_HI 0x030134 /* >= gfx9 */ 12981 #define R_030138_CP_APPEND_LAST_PS_FENCE_HI 0x030138 /* >= gfx9 */ 12982 #define R_030140_SCRATCH_UMSK 0x030140 /* >= gfx7 */ 12983 #define S_030140_OBSOLETE_UMSK(x) (((unsigned)(x) & 0xFF) << 0) 12984 #define G_030140_OBSOLETE_UMSK(x) (((x) >> 0) & 0xFF) 12985 #define C_030140_OBSOLETE_UMSK 0xFFFFFF00 12986 #define S_030140_OBSOLETE_SWAP(x) (((unsigned)(x) & 0x3) << 16) 12987 #define G_030140_OBSOLETE_SWAP(x) (((x) >> 16) & 0x3) 12988 #define C_030140_OBSOLETE_SWAP 0xFFFCFFFF 12989 #define R_030144_SCRATCH_ADDR 0x030144 /* >= gfx7 */ 12990 #define R_030148_CP_PFP_ATOMIC_PREOP_LO 0x030148 /* >= gfx7 */ 12991 #define R_03014C_CP_PFP_ATOMIC_PREOP_HI 0x03014C /* >= gfx7 */ 12992 #define R_030150_CP_PFP_GDS_ATOMIC0_PREOP_LO 0x030150 /* >= gfx7 */ 12993 #define R_030154_CP_PFP_GDS_ATOMIC0_PREOP_HI 0x030154 /* >= gfx7 */ 12994 #define R_030158_CP_PFP_GDS_ATOMIC1_PREOP_LO 0x030158 /* >= gfx7 */ 12995 #define R_03015C_CP_PFP_GDS_ATOMIC1_PREOP_HI 0x03015C /* >= gfx7 */ 12996 #define R_030160_CP_APPEND_ADDR_LO 0x030160 /* >= gfx7 */ 12997 #define S_030160_MEM_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 12998 #define G_030160_MEM_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 12999 #define C_030160_MEM_ADDR_LO 0x00000003 13000 #define R_030164_CP_APPEND_ADDR_HI 0x030164 /* >= gfx7 */ 13001 #define S_030164_MEM_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13002 #define G_030164_MEM_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13003 #define C_030164_MEM_ADDR_HI 0xFFFF0000 13004 #define S_030164_CS_PS_SEL(x) (((unsigned)(x) & 0x1) << 16) 13005 #define G_030164_CS_PS_SEL(x) (((x) >> 16) & 0x1) 13006 #define C_030164_CS_PS_SEL 0xFFFEFFFF 13007 #define S_030164_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 25) /* >= gfx8 */ 13008 #define G_030164_CACHE_POLICY(x) (((x) >> 25) & 0x3) 13009 #define C_030164_CACHE_POLICY 0xF9FFFFFF 13010 #define S_030164_MTYPE(x) (((unsigned)(x) & 0x3) << 27) /* gfx8, gfx81 */ 13011 #define G_030164_MTYPE(x) (((x) >> 27) & 0x3) 13012 #define C_030164_MTYPE 0xE7FFFFFF 13013 #define S_030164_COMMAND(x) (((unsigned)(x) & 0x7) << 29) 13014 #define G_030164_COMMAND(x) (((x) >> 29) & 0x7) 13015 #define C_030164_COMMAND 0x1FFFFFFF 13016 #define R_030168_CP_APPEND_DATA 0x030168 /* gfx7, gfx8, gfx81, >= gfx10 */ 13017 #define R_030168_CP_APPEND_DATA_LO 0x030168 /* gfx9 */ 13018 #define R_03016C_CP_APPEND_LAST_CS_FENCE 0x03016C /* gfx7, gfx8, gfx81, >= gfx10 */ 13019 #define R_03016C_CP_APPEND_LAST_CS_FENCE_LO 0x03016C /* gfx9 */ 13020 #define R_030170_CP_APPEND_LAST_PS_FENCE 0x030170 /* gfx7, gfx8, gfx81, >= gfx10 */ 13021 #define R_030170_CP_APPEND_LAST_PS_FENCE_LO 0x030170 /* gfx9 */ 13022 #define R_030174_CP_ATOMIC_PREOP_LO 0x030174 /* >= gfx7 */ 13023 #define R_030178_CP_ATOMIC_PREOP_HI 0x030178 /* >= gfx7 */ 13024 #define R_03017C_CP_GDS_ATOMIC0_PREOP_LO 0x03017C /* >= gfx7 */ 13025 #define R_030180_CP_GDS_ATOMIC0_PREOP_HI 0x030180 /* >= gfx7 */ 13026 #define R_030184_CP_GDS_ATOMIC1_PREOP_LO 0x030184 /* >= gfx7 */ 13027 #define R_030188_CP_GDS_ATOMIC1_PREOP_HI 0x030188 /* >= gfx7 */ 13028 #define R_0301A4_CP_ME_MC_WADDR_LO 0x0301A4 /* >= gfx7 */ 13029 #define S_0301A4_ME_MC_WADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) /* gfx7, gfx8, gfx81 */ 13030 #define G_0301A4_ME_MC_WADDR_SWAP(x) (((x) >> 0) & 0x3) 13031 #define C_0301A4_ME_MC_WADDR_SWAP 0xFFFFFFFC 13032 #define S_0301A4_ME_MC_WADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13033 #define G_0301A4_ME_MC_WADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13034 #define C_0301A4_ME_MC_WADDR_LO 0x00000003 13035 #define R_0301A8_CP_ME_MC_WADDR_HI 0x0301A8 /* >= gfx7 */ 13036 #define S_0301A8_ME_MC_WADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13037 #define G_0301A8_ME_MC_WADDR_HI(x) (((x) >> 0) & 0xFFFF) 13038 #define C_0301A8_ME_MC_WADDR_HI 0xFFFF0000 13039 #define S_0301A8_MTYPE(x) (((unsigned)(x) & 0x3) << 20) /* gfx8, gfx81 */ 13040 #define G_0301A8_MTYPE(x) (((x) >> 20) & 0x3) 13041 #define C_0301A8_MTYPE 0xFFCFFFFF 13042 #define S_0301A8_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 22) /* >= gfx8 */ 13043 #define G_0301A8_CACHE_POLICY(x) (((x) >> 22) & 0x3) 13044 #define C_0301A8_CACHE_POLICY 0xFF3FFFFF 13045 #define R_0301AC_CP_ME_MC_WDATA_LO 0x0301AC /* >= gfx7 */ 13046 #define R_0301B0_CP_ME_MC_WDATA_HI 0x0301B0 /* >= gfx7 */ 13047 #define R_0301B4_CP_ME_MC_RADDR_LO 0x0301B4 /* >= gfx7 */ 13048 #define S_0301B4_ME_MC_RADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) /* gfx7, gfx8, gfx81 */ 13049 #define G_0301B4_ME_MC_RADDR_SWAP(x) (((x) >> 0) & 0x3) 13050 #define C_0301B4_ME_MC_RADDR_SWAP 0xFFFFFFFC 13051 #define S_0301B4_ME_MC_RADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13052 #define G_0301B4_ME_MC_RADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13053 #define C_0301B4_ME_MC_RADDR_LO 0x00000003 13054 #define R_0301B8_CP_ME_MC_RADDR_HI 0x0301B8 /* >= gfx7 */ 13055 #define S_0301B8_ME_MC_RADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13056 #define G_0301B8_ME_MC_RADDR_HI(x) (((x) >> 0) & 0xFFFF) 13057 #define C_0301B8_ME_MC_RADDR_HI 0xFFFF0000 13058 #define S_0301B8_MTYPE(x) (((unsigned)(x) & 0x3) << 20) /* gfx8, gfx81 */ 13059 #define G_0301B8_MTYPE(x) (((x) >> 20) & 0x3) 13060 #define C_0301B8_MTYPE 0xFFCFFFFF 13061 #define S_0301B8_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 22) /* >= gfx8 */ 13062 #define G_0301B8_CACHE_POLICY(x) (((x) >> 22) & 0x3) 13063 #define C_0301B8_CACHE_POLICY 0xFF3FFFFF 13064 #define R_0301BC_CP_SEM_WAIT_TIMER 0x0301BC /* >= gfx7 */ 13065 #define R_0301C0_CP_SIG_SEM_ADDR_LO 0x0301C0 /* >= gfx7 */ 13066 #define S_0301C0_SEM_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 13067 #define G_0301C0_SEM_ADDR_SWAP(x) (((x) >> 0) & 0x3) 13068 #define C_0301C0_SEM_ADDR_SWAP 0xFFFFFFFC 13069 #define S_0301C0_SEM_PRIV(x) (((unsigned)(x) & 0x1) << 0) /* >= gfx103 */ 13070 #define G_0301C0_SEM_PRIV(x) (((x) >> 0) & 0x1) 13071 #define C_0301C0_SEM_PRIV 0xFFFFFFFE 13072 #define S_0301C0_SEM_ADDR_LO(x) (((unsigned)(x) & 0x1FFFFFFF) << 3) 13073 #define G_0301C0_SEM_ADDR_LO(x) (((x) >> 3) & 0x1FFFFFFF) 13074 #define C_0301C0_SEM_ADDR_LO 0x00000007 13075 #define R_0301C4_CP_SIG_SEM_ADDR_HI 0x0301C4 /* >= gfx7 */ 13076 #define S_0301C4_SEM_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13077 #define G_0301C4_SEM_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13078 #define C_0301C4_SEM_ADDR_HI 0xFFFF0000 13079 #define S_0301C4_SEM_USE_MAILBOX(x) (((unsigned)(x) & 0x1) << 16) 13080 #define G_0301C4_SEM_USE_MAILBOX(x) (((x) >> 16) & 0x1) 13081 #define C_0301C4_SEM_USE_MAILBOX 0xFFFEFFFF 13082 #define S_0301C4_SEM_SIGNAL_TYPE(x) (((unsigned)(x) & 0x1) << 20) 13083 #define G_0301C4_SEM_SIGNAL_TYPE(x) (((x) >> 20) & 0x1) 13084 #define C_0301C4_SEM_SIGNAL_TYPE 0xFFEFFFFF 13085 #define S_0301C4_SEM_CLIENT_CODE(x) (((unsigned)(x) & 0x3) << 24) 13086 #define G_0301C4_SEM_CLIENT_CODE(x) (((x) >> 24) & 0x3) 13087 #define C_0301C4_SEM_CLIENT_CODE 0xFCFFFFFF 13088 #define S_0301C4_SEM_SELECT(x) (((unsigned)(x) & 0x7) << 29) 13089 #define G_0301C4_SEM_SELECT(x) (((x) >> 29) & 0x7) 13090 #define C_0301C4_SEM_SELECT 0x1FFFFFFF 13091 #define R_0301D0_CP_WAIT_REG_MEM_TIMEOUT 0x0301D0 /* >= gfx7 */ 13092 #define R_0301D4_CP_WAIT_SEM_ADDR_LO 0x0301D4 /* >= gfx7 */ 13093 #define S_0301D4_SEM_ADDR_SWAP(x) (((unsigned)(x) & 0x3) << 0) /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 13094 #define G_0301D4_SEM_ADDR_SWAP(x) (((x) >> 0) & 0x3) 13095 #define C_0301D4_SEM_ADDR_SWAP 0xFFFFFFFC 13096 #define S_0301D4_SEM_PRIV(x) (((unsigned)(x) & 0x1) << 0) /* >= gfx103 */ 13097 #define G_0301D4_SEM_PRIV(x) (((x) >> 0) & 0x1) 13098 #define C_0301D4_SEM_PRIV 0xFFFFFFFE 13099 #define S_0301D4_SEM_ADDR_LO(x) (((unsigned)(x) & 0x1FFFFFFF) << 3) 13100 #define G_0301D4_SEM_ADDR_LO(x) (((x) >> 3) & 0x1FFFFFFF) 13101 #define C_0301D4_SEM_ADDR_LO 0x00000007 13102 #define R_0301D8_CP_WAIT_SEM_ADDR_HI 0x0301D8 /* >= gfx7 */ 13103 #define S_0301D8_SEM_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13104 #define G_0301D8_SEM_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13105 #define C_0301D8_SEM_ADDR_HI 0xFFFF0000 13106 #define S_0301D8_SEM_USE_MAILBOX(x) (((unsigned)(x) & 0x1) << 16) 13107 #define G_0301D8_SEM_USE_MAILBOX(x) (((x) >> 16) & 0x1) 13108 #define C_0301D8_SEM_USE_MAILBOX 0xFFFEFFFF 13109 #define S_0301D8_SEM_SIGNAL_TYPE(x) (((unsigned)(x) & 0x1) << 20) 13110 #define G_0301D8_SEM_SIGNAL_TYPE(x) (((x) >> 20) & 0x1) 13111 #define C_0301D8_SEM_SIGNAL_TYPE 0xFFEFFFFF 13112 #define S_0301D8_SEM_CLIENT_CODE(x) (((unsigned)(x) & 0x3) << 24) 13113 #define G_0301D8_SEM_CLIENT_CODE(x) (((x) >> 24) & 0x3) 13114 #define C_0301D8_SEM_CLIENT_CODE 0xFCFFFFFF 13115 #define S_0301D8_SEM_SELECT(x) (((unsigned)(x) & 0x7) << 29) 13116 #define G_0301D8_SEM_SELECT(x) (((x) >> 29) & 0x7) 13117 #define C_0301D8_SEM_SELECT 0x1FFFFFFF 13118 #define R_0301DC_CP_DMA_PFP_CONTROL 0x0301DC /* >= gfx7 */ 13119 #define S_0301DC_MEMLOG_CLEAR(x) (((unsigned)(x) & 0x1) << 10) /* >= gfx9 */ 13120 #define G_0301DC_MEMLOG_CLEAR(x) (((x) >> 10) & 0x1) 13121 #define C_0301DC_MEMLOG_CLEAR 0xFFFFFBFF 13122 #define S_0301DC_SRC_MTYPE(x) (((unsigned)(x) & 0x3) << 10) /* gfx8, gfx81 */ 13123 #define G_0301DC_SRC_MTYPE(x) (((x) >> 10) & 0x3) 13124 #define C_0301DC_SRC_MTYPE 0xFFFFF3FF 13125 #define S_0301DC_SRC_ATC(x) (((unsigned)(x) & 0x1) << 12) /* gfx7, gfx8, gfx81 */ 13126 #define G_0301DC_SRC_ATC(x) (((x) >> 12) & 0x1) 13127 #define C_0301DC_SRC_ATC 0xFFFFEFFF 13128 #define S_0301DC_SRC_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 13) 13129 #define G_0301DC_SRC_CACHE_POLICY(x) (((x) >> 13) & 0x3) 13130 #define C_0301DC_SRC_CACHE_POLICY 0xFFFF9FFF 13131 #define S_0301DC_SRC_VOLATILE(x) (((unsigned)(x) & 0x1) << 15) /* gfx7 */ 13132 #define G_0301DC_SRC_VOLATILE(x) (((x) >> 15) & 0x1) 13133 #define C_0301DC_SRC_VOLATILE 0xFFFF7FFF 13134 #define S_0301DC_SRC_VOLATLE(x) (((unsigned)(x) & 0x1) << 15) /* >= gfx10 */ 13135 #define G_0301DC_SRC_VOLATLE(x) (((x) >> 15) & 0x1) 13136 #define C_0301DC_SRC_VOLATLE 0xFFFF7FFF 13137 #define S_0301DC_DST_SELECT(x) (((unsigned)(x) & 0x3) << 20) 13138 #define G_0301DC_DST_SELECT(x) (((x) >> 20) & 0x3) 13139 #define C_0301DC_DST_SELECT 0xFFCFFFFF 13140 #define S_0301DC_DST_MTYPE(x) (((unsigned)(x) & 0x3) << 22) /* gfx8, gfx81 */ 13141 #define G_0301DC_DST_MTYPE(x) (((x) >> 22) & 0x3) 13142 #define C_0301DC_DST_MTYPE 0xFF3FFFFF 13143 #define S_0301DC_DST_ATC(x) (((unsigned)(x) & 0x1) << 24) /* gfx7, gfx8, gfx81 */ 13144 #define G_0301DC_DST_ATC(x) (((x) >> 24) & 0x1) 13145 #define C_0301DC_DST_ATC 0xFEFFFFFF 13146 #define S_0301DC_DST_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 25) 13147 #define G_0301DC_DST_CACHE_POLICY(x) (((x) >> 25) & 0x3) 13148 #define C_0301DC_DST_CACHE_POLICY 0xF9FFFFFF 13149 #define S_0301DC_DST_VOLATILE(x) (((unsigned)(x) & 0x1) << 27) /* gfx7 */ 13150 #define G_0301DC_DST_VOLATILE(x) (((x) >> 27) & 0x1) 13151 #define C_0301DC_DST_VOLATILE 0xF7FFFFFF 13152 #define S_0301DC_DST_VOLATLE(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 13153 #define G_0301DC_DST_VOLATLE(x) (((x) >> 27) & 0x1) 13154 #define C_0301DC_DST_VOLATLE 0xF7FFFFFF 13155 #define S_0301DC_SRC_SELECT(x) (((unsigned)(x) & 0x3) << 29) 13156 #define G_0301DC_SRC_SELECT(x) (((x) >> 29) & 0x3) 13157 #define C_0301DC_SRC_SELECT 0x9FFFFFFF 13158 #define R_0301E0_CP_DMA_ME_CONTROL 0x0301E0 /* >= gfx7 */ 13159 #define S_0301E0_MEMLOG_CLEAR(x) (((unsigned)(x) & 0x1) << 10) /* >= gfx9 */ 13160 #define G_0301E0_MEMLOG_CLEAR(x) (((x) >> 10) & 0x1) 13161 #define C_0301E0_MEMLOG_CLEAR 0xFFFFFBFF 13162 #define S_0301E0_SRC_MTYPE(x) (((unsigned)(x) & 0x3) << 10) /* gfx8, gfx81 */ 13163 #define G_0301E0_SRC_MTYPE(x) (((x) >> 10) & 0x3) 13164 #define C_0301E0_SRC_MTYPE 0xFFFFF3FF 13165 #define S_0301E0_SRC_ATC(x) (((unsigned)(x) & 0x1) << 12) /* gfx7, gfx8, gfx81 */ 13166 #define G_0301E0_SRC_ATC(x) (((x) >> 12) & 0x1) 13167 #define C_0301E0_SRC_ATC 0xFFFFEFFF 13168 #define S_0301E0_SRC_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 13) 13169 #define G_0301E0_SRC_CACHE_POLICY(x) (((x) >> 13) & 0x3) 13170 #define C_0301E0_SRC_CACHE_POLICY 0xFFFF9FFF 13171 #define S_0301E0_SRC_VOLATILE(x) (((unsigned)(x) & 0x1) << 15) /* gfx7 */ 13172 #define G_0301E0_SRC_VOLATILE(x) (((x) >> 15) & 0x1) 13173 #define C_0301E0_SRC_VOLATILE 0xFFFF7FFF 13174 #define S_0301E0_SRC_VOLATLE(x) (((unsigned)(x) & 0x1) << 15) /* >= gfx10 */ 13175 #define G_0301E0_SRC_VOLATLE(x) (((x) >> 15) & 0x1) 13176 #define C_0301E0_SRC_VOLATLE 0xFFFF7FFF 13177 #define S_0301E0_DST_SELECT(x) (((unsigned)(x) & 0x3) << 20) 13178 #define G_0301E0_DST_SELECT(x) (((x) >> 20) & 0x3) 13179 #define C_0301E0_DST_SELECT 0xFFCFFFFF 13180 #define S_0301E0_DST_MTYPE(x) (((unsigned)(x) & 0x3) << 22) /* gfx8, gfx81 */ 13181 #define G_0301E0_DST_MTYPE(x) (((x) >> 22) & 0x3) 13182 #define C_0301E0_DST_MTYPE 0xFF3FFFFF 13183 #define S_0301E0_DST_ATC(x) (((unsigned)(x) & 0x1) << 24) /* gfx7, gfx8, gfx81 */ 13184 #define G_0301E0_DST_ATC(x) (((x) >> 24) & 0x1) 13185 #define C_0301E0_DST_ATC 0xFEFFFFFF 13186 #define S_0301E0_DST_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 25) 13187 #define G_0301E0_DST_CACHE_POLICY(x) (((x) >> 25) & 0x3) 13188 #define C_0301E0_DST_CACHE_POLICY 0xF9FFFFFF 13189 #define S_0301E0_DST_VOLATILE(x) (((unsigned)(x) & 0x1) << 27) /* gfx7 */ 13190 #define G_0301E0_DST_VOLATILE(x) (((x) >> 27) & 0x1) 13191 #define C_0301E0_DST_VOLATILE 0xF7FFFFFF 13192 #define S_0301E0_DST_VOLATLE(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 13193 #define G_0301E0_DST_VOLATLE(x) (((x) >> 27) & 0x1) 13194 #define C_0301E0_DST_VOLATLE 0xF7FFFFFF 13195 #define S_0301E0_SRC_SELECT(x) (((unsigned)(x) & 0x3) << 29) 13196 #define G_0301E0_SRC_SELECT(x) (((x) >> 29) & 0x3) 13197 #define C_0301E0_SRC_SELECT 0x9FFFFFFF 13198 #define R_0301E4_CP_COHER_BASE_HI 0x0301E4 /* >= gfx7 */ 13199 #define S_0301E4_COHER_BASE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) 13200 #define G_0301E4_COHER_BASE_HI_256B(x) (((x) >> 0) & 0xFF) 13201 #define C_0301E4_COHER_BASE_HI_256B 0xFFFFFF00 13202 #define R_0301EC_CP_COHER_START_DELAY 0x0301EC /* >= gfx7 */ 13203 #define S_0301EC_START_DELAY_COUNT(x) (((unsigned)(x) & 0x3F) << 0) 13204 #define G_0301EC_START_DELAY_COUNT(x) (((x) >> 0) & 0x3F) 13205 #define C_0301EC_START_DELAY_COUNT 0xFFFFFFC0 13206 #define R_0301F0_CP_COHER_CNTL 0x0301F0 /* >= gfx7 */ 13207 #define S_0301F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) /* gfx7, gfx8, gfx81 */ 13208 #define G_0301F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) 13209 #define C_0301F0_DEST_BASE_0_ENA 0xFFFFFFFE 13210 #define S_0301F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) /* gfx7, gfx8, gfx81 */ 13211 #define G_0301F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) 13212 #define C_0301F0_DEST_BASE_1_ENA 0xFFFFFFFD 13213 #define S_0301F0_TC_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 2) /* gfx8, gfx81 */ 13214 #define G_0301F0_TC_SD_ACTION_ENA(x) (((x) >> 2) & 0x1) 13215 #define C_0301F0_TC_SD_ACTION_ENA 0xFFFFFFFB 13216 #define S_0301F0_TC_NC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 3) /* >= gfx8 */ 13217 #define G_0301F0_TC_NC_ACTION_ENA(x) (((x) >> 3) & 0x1) 13218 #define C_0301F0_TC_NC_ACTION_ENA 0xFFFFFFF7 13219 #define S_0301F0_TC_WC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 4) /* >= gfx9 */ 13220 #define G_0301F0_TC_WC_ACTION_ENA(x) (((x) >> 4) & 0x1) 13221 #define C_0301F0_TC_WC_ACTION_ENA 0xFFFFFFEF 13222 #define S_0301F0_TC_INV_METADATA_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 5) /* >= gfx9 */ 13223 #define G_0301F0_TC_INV_METADATA_ACTION_ENA(x) (((x) >> 5) & 0x1) 13224 #define C_0301F0_TC_INV_METADATA_ACTION_ENA 0xFFFFFFDF 13225 #define S_0301F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) /* gfx7, gfx8, gfx81 */ 13226 #define G_0301F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) 13227 #define C_0301F0_CB0_DEST_BASE_ENA 0xFFFFFFBF 13228 #define S_0301F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) /* gfx7, gfx8, gfx81 */ 13229 #define G_0301F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) 13230 #define C_0301F0_CB1_DEST_BASE_ENA 0xFFFFFF7F 13231 #define S_0301F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) /* gfx7, gfx8, gfx81 */ 13232 #define G_0301F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) 13233 #define C_0301F0_CB2_DEST_BASE_ENA 0xFFFFFEFF 13234 #define S_0301F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) /* gfx7, gfx8, gfx81 */ 13235 #define G_0301F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) 13236 #define C_0301F0_CB3_DEST_BASE_ENA 0xFFFFFDFF 13237 #define S_0301F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) /* gfx7, gfx8, gfx81 */ 13238 #define G_0301F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) 13239 #define C_0301F0_CB4_DEST_BASE_ENA 0xFFFFFBFF 13240 #define S_0301F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) /* gfx7, gfx8, gfx81 */ 13241 #define G_0301F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) 13242 #define C_0301F0_CB5_DEST_BASE_ENA 0xFFFFF7FF 13243 #define S_0301F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) /* gfx7, gfx8, gfx81 */ 13244 #define G_0301F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) 13245 #define C_0301F0_CB6_DEST_BASE_ENA 0xFFFFEFFF 13246 #define S_0301F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) /* gfx7, gfx8, gfx81 */ 13247 #define G_0301F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) 13248 #define C_0301F0_CB7_DEST_BASE_ENA 0xFFFFDFFF 13249 #define S_0301F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) /* gfx7, gfx8, gfx81 */ 13250 #define G_0301F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) 13251 #define C_0301F0_DB_DEST_BASE_ENA 0xFFFFBFFF 13252 #define S_0301F0_TCL1_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 15) 13253 #define G_0301F0_TCL1_VOL_ACTION_ENA(x) (((x) >> 15) & 0x1) 13254 #define C_0301F0_TCL1_VOL_ACTION_ENA 0xFFFF7FFF 13255 #define S_0301F0_TC_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 16) /* gfx7 */ 13256 #define G_0301F0_TC_VOL_ACTION_ENA(x) (((x) >> 16) & 0x1) 13257 #define C_0301F0_TC_VOL_ACTION_ENA 0xFFFEFFFF 13258 #define S_0301F0_TC_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 18) 13259 #define G_0301F0_TC_WB_ACTION_ENA(x) (((x) >> 18) & 0x1) 13260 #define C_0301F0_TC_WB_ACTION_ENA 0xFFFBFFFF 13261 #define S_0301F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) /* gfx7, gfx8, gfx81 */ 13262 #define G_0301F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) 13263 #define C_0301F0_DEST_BASE_2_ENA 0xFFF7FFFF 13264 #define S_0301F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) /* gfx7, gfx8, gfx81 */ 13265 #define G_0301F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) 13266 #define C_0301F0_DEST_BASE_3_ENA 0xFFDFFFFF 13267 #define S_0301F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) 13268 #define G_0301F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) 13269 #define C_0301F0_TCL1_ACTION_ENA 0xFFBFFFFF 13270 #define S_0301F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) 13271 #define G_0301F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) 13272 #define C_0301F0_TC_ACTION_ENA 0xFF7FFFFF 13273 #define S_0301F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) 13274 #define G_0301F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) 13275 #define C_0301F0_CB_ACTION_ENA 0xFDFFFFFF 13276 #define S_0301F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) 13277 #define G_0301F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) 13278 #define C_0301F0_DB_ACTION_ENA 0xFBFFFFFF 13279 #define S_0301F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) 13280 #define G_0301F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) 13281 #define C_0301F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF 13282 #define S_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 28) 13283 #define G_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((x) >> 28) & 0x1) 13284 #define C_0301F0_SH_KCACHE_VOL_ACTION_ENA 0xEFFFFFFF 13285 #define S_0301F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) 13286 #define G_0301F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) 13287 #define C_0301F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF 13288 #define S_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 30) /* >= gfx8 */ 13289 #define G_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((x) >> 30) & 0x1) 13290 #define C_0301F0_SH_KCACHE_WB_ACTION_ENA 0xBFFFFFFF 13291 #define S_0301F0_SH_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 31) /* gfx8, gfx81 */ 13292 #define G_0301F0_SH_SD_ACTION_ENA(x) (((x) >> 31) & 0x1) 13293 #define C_0301F0_SH_SD_ACTION_ENA 0x7FFFFFFF 13294 #define R_0301F4_CP_COHER_SIZE 0x0301F4 /* >= gfx7 */ 13295 #define R_0301F8_CP_COHER_BASE 0x0301F8 /* >= gfx7 */ 13296 #define R_0301FC_CP_COHER_STATUS 0x0301FC /* >= gfx7 */ 13297 #define S_0301FC_MATCHING_GFX_CNTX(x) (((unsigned)(x) & 0xFF) << 0) /* gfx7, gfx8, gfx81 */ 13298 #define G_0301FC_MATCHING_GFX_CNTX(x) (((x) >> 0) & 0xFF) 13299 #define C_0301FC_MATCHING_GFX_CNTX 0xFFFFFF00 13300 #define S_0301FC_MEID(x) (((unsigned)(x) & 0x3) << 24) 13301 #define G_0301FC_MEID(x) (((x) >> 24) & 0x3) 13302 #define C_0301FC_MEID 0xFCFFFFFF 13303 #define S_0301FC_PHASE1_STATUS(x) (((unsigned)(x) & 0x1) << 30) /* gfx7, gfx8, gfx81 */ 13304 #define G_0301FC_PHASE1_STATUS(x) (((x) >> 30) & 0x1) 13305 #define C_0301FC_PHASE1_STATUS 0xBFFFFFFF 13306 #define S_0301FC_STATUS(x) (((unsigned)(x) & 0x1) << 31) 13307 #define G_0301FC_STATUS(x) (((x) >> 31) & 0x1) 13308 #define C_0301FC_STATUS 0x7FFFFFFF 13309 #define R_030200_CP_DMA_ME_SRC_ADDR 0x030200 /* >= gfx7 */ 13310 #define R_030204_CP_DMA_ME_SRC_ADDR_HI 0x030204 /* >= gfx7 */ 13311 #define S_030204_SRC_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13312 #define G_030204_SRC_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13313 #define C_030204_SRC_ADDR_HI 0xFFFF0000 13314 #define R_030208_CP_DMA_ME_DST_ADDR 0x030208 /* >= gfx7 */ 13315 #define R_03020C_CP_DMA_ME_DST_ADDR_HI 0x03020C /* >= gfx7 */ 13316 #define S_03020C_DST_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13317 #define G_03020C_DST_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13318 #define C_03020C_DST_ADDR_HI 0xFFFF0000 13319 #define R_030210_CP_DMA_ME_COMMAND 0x030210 /* >= gfx7 */ 13320 #define S_030210_BYTE_COUNT_GFX7(x) (((unsigned)(x) & 0x1FFFFF) << 0) /* gfx7, gfx8, gfx81 */ 13321 #define G_030210_BYTE_COUNT_GFX7(x) (((x) >> 0) & 0x1FFFFF) 13322 #define C_030210_BYTE_COUNT_GFX7 0xFFE00000 13323 #define S_030210_BYTE_COUNT_GFX9(x) (((unsigned)(x) & 0x3FFFFFF) << 0) /* >= gfx9 */ 13324 #define G_030210_BYTE_COUNT_GFX9(x) (((x) >> 0) & 0x3FFFFFF) 13325 #define C_030210_BYTE_COUNT_GFX9 0xFC000000 13326 #define S_030210_DIS_WC_GFX7(x) (((unsigned)(x) & 0x1) << 21) /* gfx7, gfx8, gfx81 */ 13327 #define G_030210_DIS_WC_GFX7(x) (((x) >> 21) & 0x1) 13328 #define C_030210_DIS_WC_GFX7 0xFFDFFFFF 13329 #define S_030210_SRC_SWAP(x) (((unsigned)(x) & 0x3) << 22) /* gfx7, gfx8, gfx81 */ 13330 #define G_030210_SRC_SWAP(x) (((x) >> 22) & 0x3) 13331 #define C_030210_SRC_SWAP 0xFF3FFFFF 13332 #define S_030210_DST_SWAP(x) (((unsigned)(x) & 0x3) << 24) /* gfx7, gfx8, gfx81 */ 13333 #define G_030210_DST_SWAP(x) (((x) >> 24) & 0x3) 13334 #define C_030210_DST_SWAP 0xFCFFFFFF 13335 #define S_030210_SAS(x) (((unsigned)(x) & 0x1) << 26) 13336 #define G_030210_SAS(x) (((x) >> 26) & 0x1) 13337 #define C_030210_SAS 0xFBFFFFFF 13338 #define S_030210_DAS(x) (((unsigned)(x) & 0x1) << 27) 13339 #define G_030210_DAS(x) (((x) >> 27) & 0x1) 13340 #define C_030210_DAS 0xF7FFFFFF 13341 #define S_030210_SAIC(x) (((unsigned)(x) & 0x1) << 28) 13342 #define G_030210_SAIC(x) (((x) >> 28) & 0x1) 13343 #define C_030210_SAIC 0xEFFFFFFF 13344 #define S_030210_DAIC(x) (((unsigned)(x) & 0x1) << 29) 13345 #define G_030210_DAIC(x) (((x) >> 29) & 0x1) 13346 #define C_030210_DAIC 0xDFFFFFFF 13347 #define S_030210_RAW_WAIT(x) (((unsigned)(x) & 0x1) << 30) 13348 #define G_030210_RAW_WAIT(x) (((x) >> 30) & 0x1) 13349 #define C_030210_RAW_WAIT 0xBFFFFFFF 13350 #define S_030210_DIS_WC_GFX9(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx9 */ 13351 #define G_030210_DIS_WC_GFX9(x) (((x) >> 31) & 0x1) 13352 #define C_030210_DIS_WC_GFX9 0x7FFFFFFF 13353 #define R_030214_CP_DMA_PFP_SRC_ADDR 0x030214 /* >= gfx7 */ 13354 #define R_030218_CP_DMA_PFP_SRC_ADDR_HI 0x030218 /* >= gfx7 */ 13355 #define S_030218_SRC_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13356 #define G_030218_SRC_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13357 #define C_030218_SRC_ADDR_HI 0xFFFF0000 13358 #define R_03021C_CP_DMA_PFP_DST_ADDR 0x03021C /* >= gfx7 */ 13359 #define R_030220_CP_DMA_PFP_DST_ADDR_HI 0x030220 /* >= gfx7 */ 13360 #define S_030220_DST_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13361 #define G_030220_DST_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13362 #define C_030220_DST_ADDR_HI 0xFFFF0000 13363 #define R_030224_CP_DMA_PFP_COMMAND 0x030224 /* >= gfx7 */ 13364 #define S_030224_BYTE_COUNT_GFX7(x) (((unsigned)(x) & 0x1FFFFF) << 0) /* gfx7, gfx8, gfx81 */ 13365 #define G_030224_BYTE_COUNT_GFX7(x) (((x) >> 0) & 0x1FFFFF) 13366 #define C_030224_BYTE_COUNT_GFX7 0xFFE00000 13367 #define S_030224_BYTE_COUNT_GFX9(x) (((unsigned)(x) & 0x3FFFFFF) << 0) /* >= gfx9 */ 13368 #define G_030224_BYTE_COUNT_GFX9(x) (((x) >> 0) & 0x3FFFFFF) 13369 #define C_030224_BYTE_COUNT_GFX9 0xFC000000 13370 #define S_030224_DIS_WC_GFX7(x) (((unsigned)(x) & 0x1) << 21) /* gfx7, gfx8, gfx81 */ 13371 #define G_030224_DIS_WC_GFX7(x) (((x) >> 21) & 0x1) 13372 #define C_030224_DIS_WC_GFX7 0xFFDFFFFF 13373 #define S_030224_SRC_SWAP(x) (((unsigned)(x) & 0x3) << 22) /* gfx7, gfx8, gfx81 */ 13374 #define G_030224_SRC_SWAP(x) (((x) >> 22) & 0x3) 13375 #define C_030224_SRC_SWAP 0xFF3FFFFF 13376 #define S_030224_DST_SWAP(x) (((unsigned)(x) & 0x3) << 24) /* gfx7, gfx8, gfx81 */ 13377 #define G_030224_DST_SWAP(x) (((x) >> 24) & 0x3) 13378 #define C_030224_DST_SWAP 0xFCFFFFFF 13379 #define S_030224_SAS(x) (((unsigned)(x) & 0x1) << 26) 13380 #define G_030224_SAS(x) (((x) >> 26) & 0x1) 13381 #define C_030224_SAS 0xFBFFFFFF 13382 #define S_030224_DAS(x) (((unsigned)(x) & 0x1) << 27) 13383 #define G_030224_DAS(x) (((x) >> 27) & 0x1) 13384 #define C_030224_DAS 0xF7FFFFFF 13385 #define S_030224_SAIC(x) (((unsigned)(x) & 0x1) << 28) 13386 #define G_030224_SAIC(x) (((x) >> 28) & 0x1) 13387 #define C_030224_SAIC 0xEFFFFFFF 13388 #define S_030224_DAIC(x) (((unsigned)(x) & 0x1) << 29) 13389 #define G_030224_DAIC(x) (((x) >> 29) & 0x1) 13390 #define C_030224_DAIC 0xDFFFFFFF 13391 #define S_030224_RAW_WAIT(x) (((unsigned)(x) & 0x1) << 30) 13392 #define G_030224_RAW_WAIT(x) (((x) >> 30) & 0x1) 13393 #define C_030224_RAW_WAIT 0xBFFFFFFF 13394 #define S_030224_DIS_WC_GFX9(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx9 */ 13395 #define G_030224_DIS_WC_GFX9(x) (((x) >> 31) & 0x1) 13396 #define C_030224_DIS_WC_GFX9 0x7FFFFFFF 13397 #define R_030228_CP_DMA_CNTL 0x030228 /* >= gfx7 */ 13398 #define S_030228_UTCL1_FAULT_CONTROL(x) (((unsigned)(x) & 0x1) << 0) /* >= gfx9 */ 13399 #define G_030228_UTCL1_FAULT_CONTROL(x) (((x) >> 0) & 0x1) 13400 #define C_030228_UTCL1_FAULT_CONTROL 0xFFFFFFFE 13401 #define S_030228_WATCH_CONTROL(x) (((unsigned)(x) & 0x1) << 1) /* >= gfx10 */ 13402 #define G_030228_WATCH_CONTROL(x) (((x) >> 1) & 0x1) 13403 #define C_030228_WATCH_CONTROL 0xFFFFFFFD 13404 #define S_030228_MIN_AVAILSZ(x) (((unsigned)(x) & 0x3) << 4) 13405 #define G_030228_MIN_AVAILSZ(x) (((x) >> 4) & 0x3) 13406 #define C_030228_MIN_AVAILSZ 0xFFFFFFCF 13407 #define S_030228_BUFFER_DEPTH(x) (((unsigned)(x) & 0x1FF) << 16) 13408 #define G_030228_BUFFER_DEPTH(x) (((x) >> 16) & 0x1FF) 13409 #define C_030228_BUFFER_DEPTH 0xFE00FFFF 13410 #define S_030228_PIO_FIFO_EMPTY(x) (((unsigned)(x) & 0x1) << 28) 13411 #define G_030228_PIO_FIFO_EMPTY(x) (((x) >> 28) & 0x1) 13412 #define C_030228_PIO_FIFO_EMPTY 0xEFFFFFFF 13413 #define S_030228_PIO_FIFO_FULL(x) (((unsigned)(x) & 0x1) << 29) 13414 #define G_030228_PIO_FIFO_FULL(x) (((x) >> 29) & 0x1) 13415 #define C_030228_PIO_FIFO_FULL 0xDFFFFFFF 13416 #define S_030228_PIO_COUNT(x) (((unsigned)(x) & 0x3) << 30) 13417 #define G_030228_PIO_COUNT(x) (((x) >> 30) & 0x3) 13418 #define C_030228_PIO_COUNT 0x3FFFFFFF 13419 #define R_03022C_CP_DMA_READ_TAGS 0x03022C /* >= gfx7 */ 13420 #define S_03022C_DMA_READ_TAG(x) (((unsigned)(x) & 0x3FFFFFF) << 0) 13421 #define G_03022C_DMA_READ_TAG(x) (((x) >> 0) & 0x3FFFFFF) 13422 #define C_03022C_DMA_READ_TAG 0xFC000000 13423 #define S_03022C_DMA_READ_TAG_VALID(x) (((unsigned)(x) & 0x1) << 28) 13424 #define G_03022C_DMA_READ_TAG_VALID(x) (((x) >> 28) & 0x1) 13425 #define C_03022C_DMA_READ_TAG_VALID 0xEFFFFFFF 13426 #define R_030230_CP_COHER_SIZE_HI 0x030230 /* >= gfx7 */ 13427 #define S_030230_COHER_SIZE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) 13428 #define G_030230_COHER_SIZE_HI_256B(x) (((x) >> 0) & 0xFF) 13429 #define C_030230_COHER_SIZE_HI_256B 0xFFFFFF00 13430 #define R_030234_CP_PFP_IB_CONTROL 0x030234 /* >= gfx7 */ 13431 #define S_030234_IB_EN(x) (((unsigned)(x) & 0xFF) << 0) 13432 #define G_030234_IB_EN(x) (((x) >> 0) & 0xFF) 13433 #define C_030234_IB_EN 0xFFFFFF00 13434 #define R_030238_CP_PFP_LOAD_CONTROL 0x030238 /* >= gfx7 */ 13435 #define S_030238_CONFIG_REG_EN(x) (((unsigned)(x) & 0x1) << 0) 13436 #define G_030238_CONFIG_REG_EN(x) (((x) >> 0) & 0x1) 13437 #define C_030238_CONFIG_REG_EN 0xFFFFFFFE 13438 #define S_030238_CNTX_REG_EN(x) (((unsigned)(x) & 0x1) << 1) 13439 #define G_030238_CNTX_REG_EN(x) (((x) >> 1) & 0x1) 13440 #define C_030238_CNTX_REG_EN 0xFFFFFFFD 13441 #define S_030238_UCONFIG_REG_EN(x) (((unsigned)(x) & 0x1) << 15) /* gfx7, >= gfx103 */ 13442 #define G_030238_UCONFIG_REG_EN(x) (((x) >> 15) & 0x1) 13443 #define C_030238_UCONFIG_REG_EN 0xFFFF7FFF 13444 #define S_030238_SH_GFX_REG_EN(x) (((unsigned)(x) & 0x1) << 16) 13445 #define G_030238_SH_GFX_REG_EN(x) (((x) >> 16) & 0x1) 13446 #define C_030238_SH_GFX_REG_EN 0xFFFEFFFF 13447 #define S_030238_SH_CS_REG_EN(x) (((unsigned)(x) & 0x1) << 24) 13448 #define G_030238_SH_CS_REG_EN(x) (((x) >> 24) & 0x1) 13449 #define C_030238_SH_CS_REG_EN 0xFEFFFFFF 13450 #define R_03023C_CP_SCRATCH_INDEX 0x03023C /* >= gfx7 */ 13451 #define S_03023C_SCRATCH_INDEX(x) (((unsigned)(x) & 0x1FF) << 0) 13452 #define G_03023C_SCRATCH_INDEX(x) (((x) >> 0) & 0x1FF) 13453 #define C_03023C_SCRATCH_INDEX 0xFFFFFE00 13454 #define S_03023C_SCRATCH_INDEX_64BIT_MODE(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx10 */ 13455 #define G_03023C_SCRATCH_INDEX_64BIT_MODE(x) (((x) >> 31) & 0x1) 13456 #define C_03023C_SCRATCH_INDEX_64BIT_MODE 0x7FFFFFFF 13457 #define R_030240_CP_SCRATCH_DATA 0x030240 /* >= gfx7 */ 13458 #define R_030244_CP_RB_OFFSET 0x030244 /* >= gfx7 */ 13459 #define S_030244_RB_OFFSET(x) (((unsigned)(x) & 0xFFFFF) << 0) 13460 #define G_030244_RB_OFFSET(x) (((x) >> 0) & 0xFFFFF) 13461 #define C_030244_RB_OFFSET 0xFFF00000 13462 #define R_030248_CP_IB1_OFFSET 0x030248 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 13463 #define S_030248_IB1_OFFSET(x) (((unsigned)(x) & 0xFFFFF) << 0) 13464 #define G_030248_IB1_OFFSET(x) (((x) >> 0) & 0xFFFFF) 13465 #define C_030248_IB1_OFFSET 0xFFF00000 13466 #define R_03024C_CP_IB2_OFFSET 0x03024C /* >= gfx7 */ 13467 #define S_03024C_IB2_OFFSET(x) (((unsigned)(x) & 0xFFFFF) << 0) 13468 #define G_03024C_IB2_OFFSET(x) (((x) >> 0) & 0xFFFFF) 13469 #define C_03024C_IB2_OFFSET 0xFFF00000 13470 #define R_030250_CP_IB1_PREAMBLE_BEGIN 0x030250 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 13471 #define S_030250_IB1_PREAMBLE_BEGIN(x) (((unsigned)(x) & 0xFFFFF) << 0) 13472 #define G_030250_IB1_PREAMBLE_BEGIN(x) (((x) >> 0) & 0xFFFFF) 13473 #define C_030250_IB1_PREAMBLE_BEGIN 0xFFF00000 13474 #define R_030254_CP_IB1_PREAMBLE_END 0x030254 /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 13475 #define S_030254_IB1_PREAMBLE_END(x) (((unsigned)(x) & 0xFFFFF) << 0) 13476 #define G_030254_IB1_PREAMBLE_END(x) (((x) >> 0) & 0xFFFFF) 13477 #define C_030254_IB1_PREAMBLE_END 0xFFF00000 13478 #define R_030258_CP_IB2_PREAMBLE_BEGIN 0x030258 /* >= gfx7 */ 13479 #define S_030258_IB2_PREAMBLE_BEGIN(x) (((unsigned)(x) & 0xFFFFF) << 0) 13480 #define G_030258_IB2_PREAMBLE_BEGIN(x) (((x) >> 0) & 0xFFFFF) 13481 #define C_030258_IB2_PREAMBLE_BEGIN 0xFFF00000 13482 #define R_03025C_CP_IB2_PREAMBLE_END 0x03025C /* >= gfx7 */ 13483 #define S_03025C_IB2_PREAMBLE_END(x) (((unsigned)(x) & 0xFFFFF) << 0) 13484 #define G_03025C_IB2_PREAMBLE_END(x) (((x) >> 0) & 0xFFFFF) 13485 #define C_03025C_IB2_PREAMBLE_END 0xFFF00000 13486 #define R_030260_CP_CE_IB1_OFFSET 0x030260 /* >= gfx7 */ 13487 #define S_030260_IB1_OFFSET(x) (((unsigned)(x) & 0xFFFFF) << 0) 13488 #define G_030260_IB1_OFFSET(x) (((x) >> 0) & 0xFFFFF) 13489 #define C_030260_IB1_OFFSET 0xFFF00000 13490 #define R_030264_CP_CE_IB2_OFFSET 0x030264 /* >= gfx7 */ 13491 #define S_030264_IB2_OFFSET(x) (((unsigned)(x) & 0xFFFFF) << 0) 13492 #define G_030264_IB2_OFFSET(x) (((x) >> 0) & 0xFFFFF) 13493 #define C_030264_IB2_OFFSET 0xFFF00000 13494 #define R_030268_CP_CE_COUNTER 0x030268 /* >= gfx7 */ 13495 #define R_03026C_CP_CE_RB_OFFSET 0x03026C /* gfx8, gfx81, gfx9 */ 13496 #define S_03026C_RB_OFFSET(x) (((unsigned)(x) & 0xFFFFF) << 0) 13497 #define G_03026C_RB_OFFSET(x) (((x) >> 0) & 0xFFFFF) 13498 #define C_03026C_RB_OFFSET 0xFFF00000 13499 #define R_030270_CP_DMA_ME_CMD_ADDR_LO 0x030270 /* >= gfx10 */ 13500 #define S_030270_RSVD(x) (((unsigned)(x) & 0x3) << 0) 13501 #define G_030270_RSVD(x) (((x) >> 0) & 0x3) 13502 #define C_030270_RSVD 0xFFFFFFFC 13503 #define S_030270_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13504 #define G_030270_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13505 #define C_030270_ADDR_LO 0x00000003 13506 #define R_030274_CP_DMA_ME_CMD_ADDR_HI 0x030274 /* >= gfx10 */ 13507 #define S_030274_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13508 #define G_030274_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13509 #define C_030274_ADDR_HI 0xFFFF0000 13510 #define S_030274_RSVD(x) (((unsigned)(x) & 0xFFFF) << 16) 13511 #define G_030274_RSVD(x) (((x) >> 16) & 0xFFFF) 13512 #define C_030274_RSVD 0x0000FFFF 13513 #define R_030278_CP_DMA_PFP_CMD_ADDR_LO 0x030278 /* >= gfx10 */ 13514 #define S_030278_RSVD(x) (((unsigned)(x) & 0x3) << 0) 13515 #define G_030278_RSVD(x) (((x) >> 0) & 0x3) 13516 #define C_030278_RSVD 0xFFFFFFFC 13517 #define S_030278_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13518 #define G_030278_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13519 #define C_030278_ADDR_LO 0x00000003 13520 #define R_03027C_CP_DMA_PFP_CMD_ADDR_HI 0x03027C /* >= gfx10 */ 13521 #define S_03027C_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13522 #define G_03027C_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13523 #define C_03027C_ADDR_HI 0xFFFF0000 13524 #define S_03027C_RSVD(x) (((unsigned)(x) & 0xFFFF) << 16) 13525 #define G_03027C_RSVD(x) (((x) >> 16) & 0xFFFF) 13526 #define C_03027C_RSVD 0x0000FFFF 13527 #define R_030280_CP_APPEND_CMD_ADDR_LO 0x030280 /* >= gfx10 */ 13528 #define S_030280_RSVD(x) (((unsigned)(x) & 0x3) << 0) 13529 #define G_030280_RSVD(x) (((x) >> 0) & 0x3) 13530 #define C_030280_RSVD 0xFFFFFFFC 13531 #define S_030280_ADDR_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13532 #define G_030280_ADDR_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13533 #define C_030280_ADDR_LO 0x00000003 13534 #define R_030284_CP_APPEND_CMD_ADDR_HI 0x030284 /* >= gfx10 */ 13535 #define S_030284_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13536 #define G_030284_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13537 #define C_030284_ADDR_HI 0xFFFF0000 13538 #define S_030284_RSVD(x) (((unsigned)(x) & 0xFFFF) << 16) 13539 #define G_030284_RSVD(x) (((x) >> 16) & 0xFFFF) 13540 #define C_030284_RSVD 0x0000FFFF 13541 #define R_030288_UCONFIG_RESERVED_REG0 0x030288 /* >= gfx103 */ 13542 #define R_03028C_UCONFIG_RESERVED_REG1 0x03028C /* >= gfx103 */ 13543 #define R_0302A0_CP_CE_ATOMIC_PREOP_LO 0x0302A0 /* >= gfx103 */ 13544 #define R_0302A4_CP_CE_ATOMIC_PREOP_HI 0x0302A4 /* >= gfx103 */ 13545 #define R_0302A8_CP_CE_GDS_ATOMIC0_PREOP_LO 0x0302A8 /* >= gfx103 */ 13546 #define R_0302AC_CP_CE_GDS_ATOMIC0_PREOP_HI 0x0302AC /* >= gfx103 */ 13547 #define R_0302B0_CP_CE_GDS_ATOMIC1_PREOP_LO 0x0302B0 /* >= gfx103 */ 13548 #define R_0302B4_CP_CE_GDS_ATOMIC1_PREOP_HI 0x0302B4 /* >= gfx103 */ 13549 #define R_0302F4_CP_CE_INIT_CMD_BUFSZ 0x0302F4 /* >= gfx9 */ 13550 #define S_0302F4_INIT_CMD_REQSZ(x) (((unsigned)(x) & 0xFFF) << 0) 13551 #define G_0302F4_INIT_CMD_REQSZ(x) (((x) >> 0) & 0xFFF) 13552 #define C_0302F4_INIT_CMD_REQSZ 0xFFFFF000 13553 #define R_0302F8_CP_CE_IB1_CMD_BUFSZ 0x0302F8 /* >= gfx9 */ 13554 #define S_0302F8_IB1_CMD_REQSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13555 #define G_0302F8_IB1_CMD_REQSZ(x) (((x) >> 0) & 0xFFFFF) 13556 #define C_0302F8_IB1_CMD_REQSZ 0xFFF00000 13557 #define R_0302FC_CP_CE_IB2_CMD_BUFSZ 0x0302FC /* >= gfx9 */ 13558 #define S_0302FC_IB2_CMD_REQSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13559 #define G_0302FC_IB2_CMD_REQSZ(x) (((x) >> 0) & 0xFFFFF) 13560 #define C_0302FC_IB2_CMD_REQSZ 0xFFF00000 13561 #define R_030300_CP_IB1_CMD_BUFSZ 0x030300 /* gfx9, gfx10 */ 13562 #define S_030300_IB1_CMD_REQSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13563 #define G_030300_IB1_CMD_REQSZ(x) (((x) >> 0) & 0xFFFFF) 13564 #define C_030300_IB1_CMD_REQSZ 0xFFF00000 13565 #define R_030304_CP_IB2_CMD_BUFSZ 0x030304 /* >= gfx9 */ 13566 #define S_030304_IB2_CMD_REQSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13567 #define G_030304_IB2_CMD_REQSZ(x) (((x) >> 0) & 0xFFFFF) 13568 #define C_030304_IB2_CMD_REQSZ 0xFFF00000 13569 #define R_030308_CP_ST_CMD_BUFSZ 0x030308 /* >= gfx9 */ 13570 #define S_030308_ST_CMD_REQSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13571 #define G_030308_ST_CMD_REQSZ(x) (((x) >> 0) & 0xFFFFF) 13572 #define C_030308_ST_CMD_REQSZ 0xFFF00000 13573 #define R_03030C_CP_CE_INIT_BASE_LO 0x03030C /* >= gfx7 */ 13574 #define S_03030C_INIT_BASE_LO(x) (((unsigned)(x) & 0x7FFFFFF) << 5) 13575 #define G_03030C_INIT_BASE_LO(x) (((x) >> 5) & 0x7FFFFFF) 13576 #define C_03030C_INIT_BASE_LO 0x0000001F 13577 #define R_030310_CP_CE_INIT_BASE_HI 0x030310 /* >= gfx7 */ 13578 #define S_030310_INIT_BASE_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13579 #define G_030310_INIT_BASE_HI(x) (((x) >> 0) & 0xFFFF) 13580 #define C_030310_INIT_BASE_HI 0xFFFF0000 13581 #define R_030314_CP_CE_INIT_BUFSZ 0x030314 /* >= gfx7 */ 13582 #define S_030314_INIT_BUFSZ(x) (((unsigned)(x) & 0xFFF) << 0) 13583 #define G_030314_INIT_BUFSZ(x) (((x) >> 0) & 0xFFF) 13584 #define C_030314_INIT_BUFSZ 0xFFFFF000 13585 #define R_030318_CP_CE_IB1_BASE_LO 0x030318 /* >= gfx7 */ 13586 #define S_030318_IB1_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13587 #define G_030318_IB1_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13588 #define C_030318_IB1_BASE_LO 0x00000003 13589 #define R_03031C_CP_CE_IB1_BASE_HI 0x03031C /* >= gfx7 */ 13590 #define S_03031C_IB1_BASE_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13591 #define G_03031C_IB1_BASE_HI(x) (((x) >> 0) & 0xFFFF) 13592 #define C_03031C_IB1_BASE_HI 0xFFFF0000 13593 #define R_030320_CP_CE_IB1_BUFSZ 0x030320 /* >= gfx7 */ 13594 #define S_030320_IB1_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13595 #define G_030320_IB1_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 13596 #define C_030320_IB1_BUFSZ 0xFFF00000 13597 #define R_030324_CP_CE_IB2_BASE_LO 0x030324 /* >= gfx7 */ 13598 #define S_030324_IB2_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13599 #define G_030324_IB2_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13600 #define C_030324_IB2_BASE_LO 0x00000003 13601 #define R_030328_CP_CE_IB2_BASE_HI 0x030328 /* >= gfx7 */ 13602 #define S_030328_IB2_BASE_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13603 #define G_030328_IB2_BASE_HI(x) (((x) >> 0) & 0xFFFF) 13604 #define C_030328_IB2_BASE_HI 0xFFFF0000 13605 #define R_03032C_CP_CE_IB2_BUFSZ 0x03032C /* >= gfx7 */ 13606 #define S_03032C_IB2_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13607 #define G_03032C_IB2_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 13608 #define C_03032C_IB2_BUFSZ 0xFFF00000 13609 #define R_030330_CP_IB1_BASE_LO 0x030330 /* >= gfx7 */ 13610 #define S_030330_IB1_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13611 #define G_030330_IB1_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13612 #define C_030330_IB1_BASE_LO 0x00000003 13613 #define R_030334_CP_IB1_BASE_HI 0x030334 /* >= gfx7 */ 13614 #define S_030334_IB1_BASE_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13615 #define G_030334_IB1_BASE_HI(x) (((x) >> 0) & 0xFFFF) 13616 #define C_030334_IB1_BASE_HI 0xFFFF0000 13617 #define R_030338_CP_IB1_BUFSZ 0x030338 /* >= gfx7 */ 13618 #define S_030338_IB1_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13619 #define G_030338_IB1_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 13620 #define C_030338_IB1_BUFSZ 0xFFF00000 13621 #define R_03033C_CP_IB2_BASE_LO 0x03033C /* >= gfx7 */ 13622 #define S_03033C_IB2_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13623 #define G_03033C_IB2_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13624 #define C_03033C_IB2_BASE_LO 0x00000003 13625 #define R_030340_CP_IB2_BASE_HI 0x030340 /* >= gfx7 */ 13626 #define S_030340_IB2_BASE_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13627 #define G_030340_IB2_BASE_HI(x) (((x) >> 0) & 0xFFFF) 13628 #define C_030340_IB2_BASE_HI 0xFFFF0000 13629 #define R_030344_CP_IB2_BUFSZ 0x030344 /* >= gfx7 */ 13630 #define S_030344_IB2_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13631 #define G_030344_IB2_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 13632 #define C_030344_IB2_BUFSZ 0xFFF00000 13633 #define R_030348_CP_ST_BASE_LO 0x030348 /* >= gfx7 */ 13634 #define S_030348_ST_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13635 #define G_030348_ST_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13636 #define C_030348_ST_BASE_LO 0x00000003 13637 #define R_03034C_CP_ST_BASE_HI 0x03034C /* >= gfx7 */ 13638 #define S_03034C_ST_BASE_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13639 #define G_03034C_ST_BASE_HI(x) (((x) >> 0) & 0xFFFF) 13640 #define C_03034C_ST_BASE_HI 0xFFFF0000 13641 #define R_030350_CP_ST_BUFSZ 0x030350 /* >= gfx7 */ 13642 #define S_030350_ST_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13643 #define G_030350_ST_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 13644 #define C_030350_ST_BUFSZ 0xFFF00000 13645 #define R_030354_CP_EOP_DONE_EVENT_CNTL 0x030354 /* >= gfx7 */ 13646 #define S_030354_WBINV_TC_OP(x) (((unsigned)(x) & 0x7F) << 0) /* gfx7, gfx8, gfx81, gfx9 */ 13647 #define G_030354_WBINV_TC_OP(x) (((x) >> 0) & 0x7F) 13648 #define C_030354_WBINV_TC_OP 0xFFFFFF80 13649 #define S_030354_GCR_CNTL(x) (((unsigned)(x) & 0xFFF) << 12) /* >= gfx10 */ 13650 #define G_030354_GCR_CNTL(x) (((x) >> 12) & 0xFFF) 13651 #define C_030354_GCR_CNTL 0xFF000FFF 13652 #define S_030354_WBINV_ACTION_ENA(x) (((unsigned)(x) & 0x3F) << 12) /* gfx7, gfx8, gfx81, gfx9 */ 13653 #define G_030354_WBINV_ACTION_ENA(x) (((x) >> 12) & 0x3F) 13654 #define C_030354_WBINV_ACTION_ENA 0xFFFC0FFF 13655 #define S_030354_CACHE_CONTROL(x) (((unsigned)(x) & 0x3) << 25) /* gfx7, gfx8, gfx81 */ 13656 #define G_030354_CACHE_CONTROL(x) (((x) >> 25) & 0x3) 13657 #define C_030354_CACHE_CONTROL 0xF9FFFFFF 13658 #define S_030354_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 25) /* >= gfx9 */ 13659 #define G_030354_CACHE_POLICY(x) (((x) >> 25) & 0x3) 13660 #define C_030354_CACHE_POLICY 0xF9FFFFFF 13661 #define S_030354_EOP_VOLATILE(x) (((unsigned)(x) & 0x1) << 27) /* gfx7, >= gfx10 */ 13662 #define G_030354_EOP_VOLATILE(x) (((x) >> 27) & 0x1) 13663 #define C_030354_EOP_VOLATILE 0xF7FFFFFF 13664 #define S_030354_MTYPE(x) (((unsigned)(x) & 0x3) << 27) /* gfx8, gfx81 */ 13665 #define G_030354_MTYPE(x) (((x) >> 27) & 0x3) 13666 #define C_030354_MTYPE 0xE7FFFFFF 13667 #define S_030354_EXECUTE(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx9 */ 13668 #define G_030354_EXECUTE(x) (((x) >> 28) & 0x1) 13669 #define C_030354_EXECUTE 0xEFFFFFFF 13670 #define R_030358_CP_EOP_DONE_DATA_CNTL 0x030358 /* >= gfx7 */ 13671 #define S_030358_CNTX_ID(x) (((unsigned)(x) & 0xFFFF) << 0) /* gfx7, gfx8, gfx81 */ 13672 #define G_030358_CNTX_ID(x) (((x) >> 0) & 0xFFFF) 13673 #define C_030358_CNTX_ID 0xFFFF0000 13674 #define S_030358_DST_SEL(x) (((unsigned)(x) & 0x3) << 16) 13675 #define G_030358_DST_SEL(x) (((x) >> 16) & 0x3) 13676 #define C_030358_DST_SEL 0xFFFCFFFF 13677 #define S_030358_ACTION_PIPE_ID(x) (((unsigned)(x) & 0x3) << 20) /* >= gfx103 */ 13678 #define G_030358_ACTION_PIPE_ID(x) (((x) >> 20) & 0x3) 13679 #define C_030358_ACTION_PIPE_ID 0xFFCFFFFF 13680 #define S_030358_ACTION_ID(x) (((unsigned)(x) & 0x3) << 22) /* >= gfx103 */ 13681 #define G_030358_ACTION_ID(x) (((x) >> 22) & 0x3) 13682 #define C_030358_ACTION_ID 0xFF3FFFFF 13683 #define S_030358_INT_SEL(x) (((unsigned)(x) & 0x7) << 24) 13684 #define G_030358_INT_SEL(x) (((x) >> 24) & 0x7) 13685 #define C_030358_INT_SEL 0xF8FFFFFF 13686 #define S_030358_DATA_SEL(x) (((unsigned)(x) & 0x7) << 29) 13687 #define G_030358_DATA_SEL(x) (((x) >> 29) & 0x7) 13688 #define C_030358_DATA_SEL 0x1FFFFFFF 13689 #define R_03035C_CP_EOP_DONE_CNTX_ID 0x03035C /* >= gfx8 */ 13690 #define S_03035C_CNTX_ID(x) (((unsigned)(x) & 0xFFFFFFF) << 0) 13691 #define G_03035C_CNTX_ID(x) (((x) >> 0) & 0xFFFFFFF) 13692 #define C_03035C_CNTX_ID 0xF0000000 13693 #define R_030360_CP_DB_BASE_LO 0x030360 /* >= gfx10 */ 13694 #define S_030360_DB_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13695 #define G_030360_DB_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13696 #define C_030360_DB_BASE_LO 0x00000003 13697 #define R_030364_CP_DB_BASE_HI 0x030364 /* >= gfx10 */ 13698 #define S_030364_DB_BASE_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13699 #define G_030364_DB_BASE_HI(x) (((x) >> 0) & 0xFFFF) 13700 #define C_030364_DB_BASE_HI 0xFFFF0000 13701 #define R_030368_CP_DB_BUFSZ 0x030368 /* >= gfx10 */ 13702 #define S_030368_DB_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13703 #define G_030368_DB_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 13704 #define C_030368_DB_BUFSZ 0xFFF00000 13705 #define R_03036C_CP_DB_CMD_BUFSZ 0x03036C /* >= gfx10 */ 13706 #define S_03036C_DB_CMD_REQSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13707 #define G_03036C_DB_CMD_REQSZ(x) (((x) >> 0) & 0xFFFFF) 13708 #define C_03036C_DB_CMD_REQSZ 0xFFF00000 13709 #define R_030370_CP_CE_DB_BASE_LO 0x030370 /* >= gfx10 */ 13710 #define S_030370_DB_BASE_LO(x) (((unsigned)(x) & 0x3FFFFFFF) << 2) 13711 #define G_030370_DB_BASE_LO(x) (((x) >> 2) & 0x3FFFFFFF) 13712 #define C_030370_DB_BASE_LO 0x00000003 13713 #define R_030374_CP_CE_DB_BASE_HI 0x030374 /* >= gfx10 */ 13714 #define S_030374_DB_BASE_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13715 #define G_030374_DB_BASE_HI(x) (((x) >> 0) & 0xFFFF) 13716 #define C_030374_DB_BASE_HI 0xFFFF0000 13717 #define R_030378_CP_CE_DB_BUFSZ 0x030378 /* >= gfx10 */ 13718 #define S_030378_DB_BUFSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13719 #define G_030378_DB_BUFSZ(x) (((x) >> 0) & 0xFFFFF) 13720 #define C_030378_DB_BUFSZ 0xFFF00000 13721 #define R_03037C_CP_CE_DB_CMD_BUFSZ 0x03037C /* >= gfx10 */ 13722 #define S_03037C_DB_CMD_REQSZ(x) (((unsigned)(x) & 0xFFFFF) << 0) 13723 #define G_03037C_DB_CMD_REQSZ(x) (((x) >> 0) & 0xFFFFF) 13724 #define C_03037C_DB_CMD_REQSZ 0xFFF00000 13725 #define R_0303B0_CP_PFP_COMPLETION_STATUS 0x0303B0 /* >= gfx8 */ 13726 #define S_0303B0_STATUS(x) (((unsigned)(x) & 0x3) << 0) 13727 #define G_0303B0_STATUS(x) (((x) >> 0) & 0x3) 13728 #define C_0303B0_STATUS 0xFFFFFFFC 13729 #define R_0303B4_CP_CE_COMPLETION_STATUS 0x0303B4 /* >= gfx8 */ 13730 #define S_0303B4_STATUS(x) (((unsigned)(x) & 0x3) << 0) 13731 #define G_0303B4_STATUS(x) (((x) >> 0) & 0x3) 13732 #define C_0303B4_STATUS 0xFFFFFFFC 13733 #define R_0303B8_CP_PRED_NOT_VISIBLE 0x0303B8 /* >= gfx8 */ 13734 #define S_0303B8_NOT_VISIBLE(x) (((unsigned)(x) & 0x1) << 0) 13735 #define G_0303B8_NOT_VISIBLE(x) (((x) >> 0) & 0x1) 13736 #define C_0303B8_NOT_VISIBLE 0xFFFFFFFE 13737 #define R_0303C0_CP_PFP_METADATA_BASE_ADDR 0x0303C0 /* >= gfx8 */ 13738 #define R_0303C4_CP_PFP_METADATA_BASE_ADDR_HI 0x0303C4 /* >= gfx8 */ 13739 #define S_0303C4_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13740 #define G_0303C4_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13741 #define C_0303C4_ADDR_HI 0xFFFF0000 13742 #define R_0303C8_CP_CE_METADATA_BASE_ADDR 0x0303C8 /* >= gfx8 */ 13743 #define R_0303CC_CP_CE_METADATA_BASE_ADDR_HI 0x0303CC /* >= gfx8 */ 13744 #define S_0303CC_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13745 #define G_0303CC_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13746 #define C_0303CC_ADDR_HI 0xFFFF0000 13747 #define R_0303D0_CP_DRAW_INDX_INDR_ADDR 0x0303D0 /* >= gfx8 */ 13748 #define R_0303D4_CP_DRAW_INDX_INDR_ADDR_HI 0x0303D4 /* >= gfx8 */ 13749 #define S_0303D4_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13750 #define G_0303D4_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13751 #define C_0303D4_ADDR_HI 0xFFFF0000 13752 #define R_0303D8_CP_DISPATCH_INDR_ADDR 0x0303D8 /* >= gfx8 */ 13753 #define R_0303DC_CP_DISPATCH_INDR_ADDR_HI 0x0303DC /* >= gfx8 */ 13754 #define S_0303DC_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13755 #define G_0303DC_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13756 #define C_0303DC_ADDR_HI 0xFFFF0000 13757 #define R_0303E0_CP_INDEX_BASE_ADDR 0x0303E0 /* >= gfx8 */ 13758 #define R_0303E4_CP_INDEX_BASE_ADDR_HI 0x0303E4 /* >= gfx8 */ 13759 #define S_0303E4_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13760 #define G_0303E4_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13761 #define C_0303E4_ADDR_HI 0xFFFF0000 13762 #define R_0303E8_CP_INDEX_TYPE 0x0303E8 /* >= gfx8 */ 13763 #define S_0303E8_INDEX_TYPE(x) (((unsigned)(x) & 0x3) << 0) 13764 #define G_0303E8_INDEX_TYPE(x) (((x) >> 0) & 0x3) 13765 #define C_0303E8_INDEX_TYPE 0xFFFFFFFC 13766 #define V_0303E8_VGT_INDEX_16 0 13767 #define V_0303E8_VGT_INDEX_32 1 13768 #define V_0303E8_VGT_INDEX_8 2 13769 #define R_0303EC_CP_GDS_BKUP_ADDR 0x0303EC /* >= gfx8 */ 13770 #define R_0303F0_CP_GDS_BKUP_ADDR_HI 0x0303F0 /* >= gfx8 */ 13771 #define S_0303F0_ADDR_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 13772 #define G_0303F0_ADDR_HI(x) (((x) >> 0) & 0xFFFF) 13773 #define C_0303F0_ADDR_HI 0xFFFF0000 13774 #define R_0303F4_CP_SAMPLE_STATUS 0x0303F4 /* >= gfx8 */ 13775 #define S_0303F4_Z_PASS_ACITVE(x) (((unsigned)(x) & 0x1) << 0) 13776 #define G_0303F4_Z_PASS_ACITVE(x) (((x) >> 0) & 0x1) 13777 #define C_0303F4_Z_PASS_ACITVE 0xFFFFFFFE 13778 #define S_0303F4_STREAMOUT_ACTIVE(x) (((unsigned)(x) & 0x1) << 1) 13779 #define G_0303F4_STREAMOUT_ACTIVE(x) (((x) >> 1) & 0x1) 13780 #define C_0303F4_STREAMOUT_ACTIVE 0xFFFFFFFD 13781 #define S_0303F4_PIPELINE_ACTIVE(x) (((unsigned)(x) & 0x1) << 2) 13782 #define G_0303F4_PIPELINE_ACTIVE(x) (((x) >> 2) & 0x1) 13783 #define C_0303F4_PIPELINE_ACTIVE 0xFFFFFFFB 13784 #define S_0303F4_STIPPLE_ACTIVE(x) (((unsigned)(x) & 0x1) << 3) 13785 #define G_0303F4_STIPPLE_ACTIVE(x) (((x) >> 3) & 0x1) 13786 #define C_0303F4_STIPPLE_ACTIVE 0xFFFFFFF7 13787 #define S_0303F4_VGT_BUFFERS_ACTIVE(x) (((unsigned)(x) & 0x1) << 4) 13788 #define G_0303F4_VGT_BUFFERS_ACTIVE(x) (((x) >> 4) & 0x1) 13789 #define C_0303F4_VGT_BUFFERS_ACTIVE 0xFFFFFFEF 13790 #define S_0303F4_SCREEN_EXT_ACTIVE(x) (((unsigned)(x) & 0x1) << 5) 13791 #define G_0303F4_SCREEN_EXT_ACTIVE(x) (((x) >> 5) & 0x1) 13792 #define C_0303F4_SCREEN_EXT_ACTIVE 0xFFFFFFDF 13793 #define S_0303F4_DRAW_INDIRECT_ACTIVE(x) (((unsigned)(x) & 0x1) << 6) 13794 #define G_0303F4_DRAW_INDIRECT_ACTIVE(x) (((x) >> 6) & 0x1) 13795 #define C_0303F4_DRAW_INDIRECT_ACTIVE 0xFFFFFFBF 13796 #define S_0303F4_DISP_INDIRECT_ACTIVE(x) (((unsigned)(x) & 0x1) << 7) 13797 #define G_0303F4_DISP_INDIRECT_ACTIVE(x) (((x) >> 7) & 0x1) 13798 #define C_0303F4_DISP_INDIRECT_ACTIVE 0xFFFFFF7F 13799 #define R_0303F8_CP_ME_COHER_CNTL 0x0303F8 /* >= gfx9 */ 13800 #define S_0303F8_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) 13801 #define G_0303F8_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) 13802 #define C_0303F8_DEST_BASE_0_ENA 0xFFFFFFFE 13803 #define S_0303F8_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) 13804 #define G_0303F8_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) 13805 #define C_0303F8_DEST_BASE_1_ENA 0xFFFFFFFD 13806 #define S_0303F8_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) 13807 #define G_0303F8_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) 13808 #define C_0303F8_CB0_DEST_BASE_ENA 0xFFFFFFBF 13809 #define S_0303F8_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) 13810 #define G_0303F8_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) 13811 #define C_0303F8_CB1_DEST_BASE_ENA 0xFFFFFF7F 13812 #define S_0303F8_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) 13813 #define G_0303F8_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) 13814 #define C_0303F8_CB2_DEST_BASE_ENA 0xFFFFFEFF 13815 #define S_0303F8_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) 13816 #define G_0303F8_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) 13817 #define C_0303F8_CB3_DEST_BASE_ENA 0xFFFFFDFF 13818 #define S_0303F8_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) 13819 #define G_0303F8_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) 13820 #define C_0303F8_CB4_DEST_BASE_ENA 0xFFFFFBFF 13821 #define S_0303F8_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) 13822 #define G_0303F8_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) 13823 #define C_0303F8_CB5_DEST_BASE_ENA 0xFFFFF7FF 13824 #define S_0303F8_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) 13825 #define G_0303F8_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) 13826 #define C_0303F8_CB6_DEST_BASE_ENA 0xFFFFEFFF 13827 #define S_0303F8_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) 13828 #define G_0303F8_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) 13829 #define C_0303F8_CB7_DEST_BASE_ENA 0xFFFFDFFF 13830 #define S_0303F8_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) 13831 #define G_0303F8_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) 13832 #define C_0303F8_DB_DEST_BASE_ENA 0xFFFFBFFF 13833 #define S_0303F8_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) 13834 #define G_0303F8_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) 13835 #define C_0303F8_DEST_BASE_2_ENA 0xFFF7FFFF 13836 #define S_0303F8_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) 13837 #define G_0303F8_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) 13838 #define C_0303F8_DEST_BASE_3_ENA 0xFFDFFFFF 13839 #define R_0303FC_CP_ME_COHER_SIZE 0x0303FC /* >= gfx9 */ 13840 #define R_030400_CP_ME_COHER_SIZE_HI 0x030400 /* >= gfx9 */ 13841 #define S_030400_COHER_SIZE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) 13842 #define G_030400_COHER_SIZE_HI_256B(x) (((x) >> 0) & 0xFF) 13843 #define C_030400_COHER_SIZE_HI_256B 0xFFFFFF00 13844 #define R_030404_CP_ME_COHER_BASE 0x030404 /* >= gfx9 */ 13845 #define R_030408_CP_ME_COHER_BASE_HI 0x030408 /* >= gfx9 */ 13846 #define S_030408_COHER_BASE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) 13847 #define G_030408_COHER_BASE_HI_256B(x) (((x) >> 0) & 0xFF) 13848 #define C_030408_COHER_BASE_HI_256B 0xFFFFFF00 13849 #define R_03040C_CP_ME_COHER_STATUS 0x03040C /* >= gfx9 */ 13850 #define S_03040C_MATCHING_GFX_CNTX(x) (((unsigned)(x) & 0xFF) << 0) 13851 #define G_03040C_MATCHING_GFX_CNTX(x) (((x) >> 0) & 0xFF) 13852 #define C_03040C_MATCHING_GFX_CNTX 0xFFFFFF00 13853 #define S_03040C_STATUS(x) (((unsigned)(x) & 0x1) << 31) 13854 #define G_03040C_STATUS(x) (((x) >> 31) & 0x1) 13855 #define C_03040C_STATUS 0x7FFFFFFF 13856 #define R_030500_RLC_GPM_PERF_COUNT_0 0x030500 /* >= gfx9 */ 13857 #define S_030500_FEATURE_SEL(x) (((unsigned)(x) & 0xF) << 0) 13858 #define G_030500_FEATURE_SEL(x) (((x) >> 0) & 0xF) 13859 #define C_030500_FEATURE_SEL 0xFFFFFFF0 13860 #define S_030500_SE_INDEX(x) (((unsigned)(x) & 0xF) << 4) 13861 #define G_030500_SE_INDEX(x) (((x) >> 4) & 0xF) 13862 #define C_030500_SE_INDEX 0xFFFFFF0F 13863 #define S_030500_SA_INDEX(x) (((unsigned)(x) & 0xF) << 8) /* >= gfx10 */ 13864 #define G_030500_SA_INDEX(x) (((x) >> 8) & 0xF) 13865 #define C_030500_SA_INDEX 0xFFFFF0FF 13866 #define S_030500_SH_INDEX(x) (((unsigned)(x) & 0xF) << 8) /* gfx9 */ 13867 #define G_030500_SH_INDEX(x) (((x) >> 8) & 0xF) 13868 #define C_030500_SH_INDEX 0xFFFFF0FF 13869 #define S_030500_CU_INDEX(x) (((unsigned)(x) & 0xF) << 12) /* gfx9 */ 13870 #define G_030500_CU_INDEX(x) (((x) >> 12) & 0xF) 13871 #define C_030500_CU_INDEX 0xFFFF0FFF 13872 #define S_030500_WGP_INDEX(x) (((unsigned)(x) & 0xF) << 12) /* >= gfx10 */ 13873 #define G_030500_WGP_INDEX(x) (((x) >> 12) & 0xF) 13874 #define C_030500_WGP_INDEX 0xFFFF0FFF 13875 #define S_030500_EVENT_SEL(x) (((unsigned)(x) & 0x3) << 16) 13876 #define G_030500_EVENT_SEL(x) (((x) >> 16) & 0x3) 13877 #define C_030500_EVENT_SEL 0xFFFCFFFF 13878 #define S_030500_UNUSED(x) (((unsigned)(x) & 0x3) << 18) 13879 #define G_030500_UNUSED(x) (((x) >> 18) & 0x3) 13880 #define C_030500_UNUSED 0xFFF3FFFF 13881 #define S_030500_ENABLE(x) (((unsigned)(x) & 0x1) << 20) 13882 #define G_030500_ENABLE(x) (((x) >> 20) & 0x1) 13883 #define C_030500_ENABLE 0xFFEFFFFF 13884 #define R_030504_RLC_GPM_PERF_COUNT_1 0x030504 /* >= gfx9 */ 13885 #define R_030800_GRBM_GFX_INDEX 0x030800 /* >= gfx7 */ 13886 #define S_030800_INSTANCE_INDEX(x) (((unsigned)(x) & 0xFF) << 0) 13887 #define G_030800_INSTANCE_INDEX(x) (((x) >> 0) & 0xFF) 13888 #define C_030800_INSTANCE_INDEX 0xFFFFFF00 13889 #define S_030800_SA_INDEX(x) (((unsigned)(x) & 0xFF) << 8) /* >= gfx10 */ 13890 #define G_030800_SA_INDEX(x) (((x) >> 8) & 0xFF) 13891 #define C_030800_SA_INDEX 0xFFFF00FF 13892 #define S_030800_SH_INDEX(x) (((unsigned)(x) & 0xFF) << 8) /* gfx7, gfx8, gfx81, gfx9 */ 13893 #define G_030800_SH_INDEX(x) (((x) >> 8) & 0xFF) 13894 #define C_030800_SH_INDEX 0xFFFF00FF 13895 #define S_030800_SE_INDEX(x) (((unsigned)(x) & 0xFF) << 16) 13896 #define G_030800_SE_INDEX(x) (((x) >> 16) & 0xFF) 13897 #define C_030800_SE_INDEX 0xFF00FFFF 13898 #define S_030800_SA_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx10 */ 13899 #define G_030800_SA_BROADCAST_WRITES(x) (((x) >> 29) & 0x1) 13900 #define C_030800_SA_BROADCAST_WRITES 0xDFFFFFFF 13901 #define S_030800_SH_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 29) /* gfx7, gfx8, gfx81, gfx9 */ 13902 #define G_030800_SH_BROADCAST_WRITES(x) (((x) >> 29) & 0x1) 13903 #define C_030800_SH_BROADCAST_WRITES 0xDFFFFFFF 13904 #define S_030800_INSTANCE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 30) 13905 #define G_030800_INSTANCE_BROADCAST_WRITES(x) (((x) >> 30) & 0x1) 13906 #define C_030800_INSTANCE_BROADCAST_WRITES 0xBFFFFFFF 13907 #define S_030800_SE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 31) 13908 #define G_030800_SE_BROADCAST_WRITES(x) (((x) >> 31) & 0x1) 13909 #define C_030800_SE_BROADCAST_WRITES 0x7FFFFFFF 13910 #define R_030900_VGT_ESGS_RING_SIZE 0x030900 /* gfx7, gfx8, gfx81 */ 13911 #define R_030900_VGT_ESGS_RING_SIZE_UMD 0x030900 /* >= gfx10 */ 13912 #define R_030904_VGT_GSVS_RING_SIZE 0x030904 /* gfx7, gfx8, gfx81, gfx9 */ 13913 #define R_030904_VGT_GSVS_RING_SIZE_UMD 0x030904 /* >= gfx10 */ 13914 #define R_030908_VGT_PRIMITIVE_TYPE 0x030908 /* >= gfx7 */ 13915 #define S_030908_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 13916 #define G_030908_PRIM_TYPE(x) (((x) >> 0) & 0x3F) 13917 #define C_030908_PRIM_TYPE 0xFFFFFFC0 13918 #define V_030908_DI_PT_NONE 0 13919 #define V_030908_DI_PT_POINTLIST 1 13920 #define V_030908_DI_PT_LINELIST 2 13921 #define V_030908_DI_PT_LINESTRIP 3 13922 #define V_030908_DI_PT_TRILIST 4 13923 #define V_030908_DI_PT_TRIFAN 5 13924 #define V_030908_DI_PT_TRISTRIP 6 13925 #define V_030908_DI_PT_2D_RECTANGLE 7 /* >= gfx9 */ 13926 #define V_030908_DI_PT_UNUSED_0 7 /* gfx7, gfx8, gfx81 */ 13927 #define V_030908_DI_PT_UNUSED_1 8 13928 #define V_030908_DI_PT_PATCH 9 13929 #define V_030908_DI_PT_LINELIST_ADJ 10 13930 #define V_030908_DI_PT_LINESTRIP_ADJ 11 13931 #define V_030908_DI_PT_TRILIST_ADJ 12 13932 #define V_030908_DI_PT_TRISTRIP_ADJ 13 13933 #define V_030908_DI_PT_UNUSED_3 14 13934 #define V_030908_DI_PT_UNUSED_4 15 13935 #define V_030908_DI_PT_TRI_WITH_WFLAGS 16 13936 #define V_030908_DI_PT_RECTLIST 17 13937 #define V_030908_DI_PT_LINELOOP 18 13938 #define V_030908_DI_PT_QUADLIST 19 13939 #define V_030908_DI_PT_QUADSTRIP 20 13940 #define V_030908_DI_PT_POLYGON 21 13941 #define V_030908_DI_PT_2D_COPY_RECT_LIST_V0 22 /* gfx7, gfx8, gfx81 */ 13942 #define V_030908_DI_PT_2D_COPY_RECT_LIST_V1 23 /* gfx7, gfx8, gfx81 */ 13943 #define V_030908_DI_PT_2D_COPY_RECT_LIST_V2 24 /* gfx7, gfx8, gfx81 */ 13944 #define V_030908_DI_PT_2D_COPY_RECT_LIST_V3 25 /* gfx7, gfx8, gfx81 */ 13945 #define V_030908_DI_PT_2D_FILL_RECT_LIST 26 /* gfx7, gfx8, gfx81 */ 13946 #define V_030908_DI_PT_2D_LINE_STRIP 27 /* gfx7, gfx8, gfx81 */ 13947 #define V_030908_DI_PT_2D_TRI_STRIP 28 /* gfx7, gfx8, gfx81 */ 13948 #define R_03090C_VGT_INDEX_TYPE 0x03090C /* >= gfx7 */ 13949 #define S_03090C_INDEX_TYPE(x) (((unsigned)(x) & 0x3) << 0) 13950 #define G_03090C_INDEX_TYPE(x) (((x) >> 0) & 0x3) 13951 #define C_03090C_INDEX_TYPE 0xFFFFFFFC 13952 #define V_03090C_VGT_INDEX_16 0 13953 #define V_03090C_VGT_INDEX_32 1 13954 #define V_03090C_VGT_INDEX_8 2 /* >= gfx8 */ 13955 #define S_03090C_PRIMGEN_EN(x) (((unsigned)(x) & 0x1) << 8) /* gfx9 */ 13956 #define G_03090C_PRIMGEN_EN(x) (((x) >> 8) & 0x1) 13957 #define C_03090C_PRIMGEN_EN 0xFFFFFEFF 13958 #define S_03090C_DISABLE_INSTANCE_PACKING(x) (((unsigned)(x) & 0x1) << 14) /* >= gfx103 */ 13959 #define G_03090C_DISABLE_INSTANCE_PACKING(x) (((x) >> 14) & 0x1) 13960 #define C_03090C_DISABLE_INSTANCE_PACKING 0xFFFFBFFF 13961 #define R_030910_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x030910 /* >= gfx7 */ 13962 #define R_030914_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x030914 /* >= gfx7 */ 13963 #define R_030918_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x030918 /* >= gfx7 */ 13964 #define R_03091C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x03091C /* >= gfx7 */ 13965 #define R_030920_VGT_MAX_VTX_INDX 0x030920 /* gfx9 */ 13966 #define R_030924_GE_MIN_VTX_INDX 0x030924 /* >= gfx10 */ 13967 #define R_030924_VGT_MIN_VTX_INDX 0x030924 /* gfx9 */ 13968 #define R_030928_GE_INDX_OFFSET 0x030928 /* >= gfx10 */ 13969 #define R_030928_VGT_INDX_OFFSET 0x030928 /* gfx9 */ 13970 #define R_03092C_GE_MULTI_PRIM_IB_RESET_EN 0x03092C /* >= gfx10 */ 13971 #define S_03092C_RESET_EN(x) (((unsigned)(x) & 0x1) << 0) 13972 #define G_03092C_RESET_EN(x) (((x) >> 0) & 0x1) 13973 #define C_03092C_RESET_EN 0xFFFFFFFE 13974 #define S_03092C_MATCH_ALL_BITS(x) (((unsigned)(x) & 0x1) << 1) 13975 #define G_03092C_MATCH_ALL_BITS(x) (((x) >> 1) & 0x1) 13976 #define C_03092C_MATCH_ALL_BITS 0xFFFFFFFD 13977 #define R_03092C_VGT_MULTI_PRIM_IB_RESET_EN 0x03092C /* gfx9 */ 13978 #define R_030930_VGT_NUM_INDICES 0x030930 /* >= gfx7 */ 13979 #define R_030934_VGT_NUM_INSTANCES 0x030934 /* >= gfx7 */ 13980 #define R_030938_VGT_TF_RING_SIZE 0x030938 /* gfx7, gfx8, gfx81, gfx9 */ 13981 #define S_030938_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 13982 #define G_030938_SIZE(x) (((x) >> 0) & 0xFFFF) 13983 #define C_030938_SIZE 0xFFFF0000 13984 #define R_030938_VGT_TF_RING_SIZE_UMD 0x030938 /* >= gfx10 */ 13985 #define R_03093C_VGT_HS_OFFCHIP_PARAM 0x03093C /* gfx7, gfx8, gfx81, gfx9 */ 13986 #define S_03093C_OFFCHIP_BUFFERING_GFX7(x) (((unsigned)(x) & 0x1FF) << 0) 13987 #define G_03093C_OFFCHIP_BUFFERING_GFX7(x) (((x) >> 0) & 0x1FF) 13988 #define C_03093C_OFFCHIP_BUFFERING_GFX7 0xFFFFFE00 13989 #define S_03093C_OFFCHIP_GRANULARITY_GFX7(x) (((unsigned)(x) & 0x3) << 9) 13990 #define G_03093C_OFFCHIP_GRANULARITY_GFX7(x) (((x) >> 9) & 0x3) 13991 #define C_03093C_OFFCHIP_GRANULARITY_GFX7 0xFFFFF9FF 13992 #define V_03093C_X_8K_DWORDS 0 13993 #define V_03093C_X_4K_DWORDS 1 13994 #define V_03093C_X_2K_DWORDS 2 13995 #define V_03093C_X_1K_DWORDS 3 13996 #define R_03093C_VGT_HS_OFFCHIP_PARAM_UMD 0x03093C /* >= gfx10 */ 13997 #define S_03093C_OFFCHIP_BUFFERING_GFX103(x) (((unsigned)(x) & 0x3FF) << 0) /* >= gfx103 */ 13998 #define G_03093C_OFFCHIP_BUFFERING_GFX103(x) (((x) >> 0) & 0x3FF) 13999 #define C_03093C_OFFCHIP_BUFFERING_GFX103 0xFFFFFC00 14000 #define S_03093C_OFFCHIP_GRANULARITY_GFX103(x) (((unsigned)(x) & 0x3) << 10) /* >= gfx103 */ 14001 #define G_03093C_OFFCHIP_GRANULARITY_GFX103(x) (((x) >> 10) & 0x3) 14002 #define C_03093C_OFFCHIP_GRANULARITY_GFX103 0xFFFFF3FF 14003 #define R_030940_VGT_TF_MEMORY_BASE 0x030940 /* gfx7, gfx8, gfx81, gfx9 */ 14004 #define R_030940_VGT_TF_MEMORY_BASE_UMD 0x030940 /* >= gfx10 */ 14005 #define R_030944_GE_DMA_FIRST_INDEX 0x030944 /* >= gfx10 */ 14006 #define R_030944_VGT_TF_MEMORY_BASE_HI 0x030944 /* gfx9 */ 14007 #define S_030944_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 14008 #define G_030944_BASE_HI(x) (((x) >> 0) & 0xFF) 14009 #define C_030944_BASE_HI 0xFFFFFF00 14010 #define R_030948_WD_POS_BUF_BASE 0x030948 /* >= gfx9 */ 14011 #define R_03094C_WD_POS_BUF_BASE_HI 0x03094C /* >= gfx9 */ 14012 #define S_03094C_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 14013 #define G_03094C_BASE_HI(x) (((x) >> 0) & 0xFF) 14014 #define C_03094C_BASE_HI 0xFFFFFF00 14015 #define R_030950_WD_CNTL_SB_BUF_BASE 0x030950 /* >= gfx9 */ 14016 #define R_030954_WD_CNTL_SB_BUF_BASE_HI 0x030954 /* >= gfx9 */ 14017 #define S_030954_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 14018 #define G_030954_BASE_HI(x) (((x) >> 0) & 0xFF) 14019 #define C_030954_BASE_HI 0xFFFFFF00 14020 #define R_030958_WD_INDEX_BUF_BASE 0x030958 /* >= gfx9 */ 14021 #define R_03095C_WD_INDEX_BUF_BASE_HI 0x03095C /* >= gfx9 */ 14022 #define S_03095C_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 14023 #define G_03095C_BASE_HI(x) (((x) >> 0) & 0xFF) 14024 #define C_03095C_BASE_HI 0xFFFFFF00 14025 #define R_030960_IA_MULTI_VGT_PARAM 0x030960 /* gfx9 */ 14026 #define S_030960_PRIMGROUP_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 14027 #define G_030960_PRIMGROUP_SIZE(x) (((x) >> 0) & 0xFFFF) 14028 #define C_030960_PRIMGROUP_SIZE 0xFFFF0000 14029 #define S_030960_PARTIAL_VS_WAVE_ON(x) (((unsigned)(x) & 0x1) << 16) 14030 #define G_030960_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1) 14031 #define C_030960_PARTIAL_VS_WAVE_ON 0xFFFEFFFF 14032 #define S_030960_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 17) 14033 #define G_030960_SWITCH_ON_EOP(x) (((x) >> 17) & 0x1) 14034 #define C_030960_SWITCH_ON_EOP 0xFFFDFFFF 14035 #define S_030960_PARTIAL_ES_WAVE_ON(x) (((unsigned)(x) & 0x1) << 18) 14036 #define G_030960_PARTIAL_ES_WAVE_ON(x) (((x) >> 18) & 0x1) 14037 #define C_030960_PARTIAL_ES_WAVE_ON 0xFFFBFFFF 14038 #define S_030960_SWITCH_ON_EOI(x) (((unsigned)(x) & 0x1) << 19) 14039 #define G_030960_SWITCH_ON_EOI(x) (((x) >> 19) & 0x1) 14040 #define C_030960_SWITCH_ON_EOI 0xFFF7FFFF 14041 #define S_030960_WD_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 20) 14042 #define G_030960_WD_SWITCH_ON_EOP(x) (((x) >> 20) & 0x1) 14043 #define C_030960_WD_SWITCH_ON_EOP 0xFFEFFFFF 14044 #define S_030960_EN_INST_OPT_BASIC(x) (((unsigned)(x) & 0x1) << 21) 14045 #define G_030960_EN_INST_OPT_BASIC(x) (((x) >> 21) & 0x1) 14046 #define C_030960_EN_INST_OPT_BASIC 0xFFDFFFFF 14047 #define S_030960_EN_INST_OPT_ADV(x) (((unsigned)(x) & 0x1) << 22) 14048 #define G_030960_EN_INST_OPT_ADV(x) (((x) >> 22) & 0x1) 14049 #define C_030960_EN_INST_OPT_ADV 0xFFBFFFFF 14050 #define S_030960_HW_USE_ONLY(x) (((unsigned)(x) & 0x1) << 23) 14051 #define G_030960_HW_USE_ONLY(x) (((x) >> 23) & 0x1) 14052 #define C_030960_HW_USE_ONLY 0xFF7FFFFF 14053 #define R_030960_IA_MULTI_VGT_PARAM_PIPED 0x030960 /* >= gfx10 */ 14054 #define R_030964_GE_MAX_VTX_INDX 0x030964 /* >= gfx10 */ 14055 #define R_030968_VGT_INSTANCE_BASE_ID 0x030968 /* >= gfx9 */ 14056 #define R_03096C_GE_CNTL 0x03096C /* >= gfx10 */ 14057 #define S_03096C_PRIM_GRP_SIZE(x) (((unsigned)(x) & 0x1FF) << 0) 14058 #define G_03096C_PRIM_GRP_SIZE(x) (((x) >> 0) & 0x1FF) 14059 #define C_03096C_PRIM_GRP_SIZE 0xFFFFFE00 14060 #define S_03096C_VERT_GRP_SIZE(x) (((unsigned)(x) & 0x1FF) << 9) 14061 #define G_03096C_VERT_GRP_SIZE(x) (((x) >> 9) & 0x1FF) 14062 #define C_03096C_VERT_GRP_SIZE 0xFFFC01FF 14063 #define S_03096C_BREAK_WAVE_AT_EOI(x) (((unsigned)(x) & 0x1) << 18) 14064 #define G_03096C_BREAK_WAVE_AT_EOI(x) (((x) >> 18) & 0x1) 14065 #define C_03096C_BREAK_WAVE_AT_EOI 0xFFFBFFFF 14066 #define S_03096C_PACKET_TO_ONE_PA(x) (((unsigned)(x) & 0x1) << 19) 14067 #define G_03096C_PACKET_TO_ONE_PA(x) (((x) >> 19) & 0x1) 14068 #define C_03096C_PACKET_TO_ONE_PA 0xFFF7FFFF 14069 #define R_030970_GE_USER_VGPR1 0x030970 /* >= gfx10 */ 14070 #define R_030974_GE_USER_VGPR2 0x030974 /* >= gfx10 */ 14071 #define R_030978_GE_USER_VGPR3 0x030978 /* >= gfx10 */ 14072 #define R_03097C_GE_STEREO_CNTL 0x03097C /* >= gfx10 */ 14073 #define S_03097C_RT_SLICE(x) (((unsigned)(x) & 0x7) << 0) 14074 #define G_03097C_RT_SLICE(x) (((x) >> 0) & 0x7) 14075 #define C_03097C_RT_SLICE 0xFFFFFFF8 14076 #define S_03097C_VIEWPORT(x) (((unsigned)(x) & 0xF) << 3) 14077 #define G_03097C_VIEWPORT(x) (((x) >> 3) & 0xF) 14078 #define C_03097C_VIEWPORT 0xFFFFFF87 14079 #define S_03097C_EN_STEREO(x) (((unsigned)(x) & 0x1) << 8) 14080 #define G_03097C_EN_STEREO(x) (((x) >> 8) & 0x1) 14081 #define C_03097C_EN_STEREO 0xFFFFFEFF 14082 #define R_030980_GE_PC_ALLOC 0x030980 /* >= gfx10 */ 14083 #define S_030980_OVERSUB_EN(x) (((unsigned)(x) & 0x1) << 0) 14084 #define G_030980_OVERSUB_EN(x) (((x) >> 0) & 0x1) 14085 #define C_030980_OVERSUB_EN 0xFFFFFFFE 14086 #define S_030980_NUM_PC_LINES(x) (((unsigned)(x) & 0x3FF) << 1) 14087 #define G_030980_NUM_PC_LINES(x) (((x) >> 1) & 0x3FF) 14088 #define C_030980_NUM_PC_LINES 0xFFFFF801 14089 #define R_030984_VGT_TF_MEMORY_BASE_HI_UMD 0x030984 /* >= gfx10 */ 14090 #define S_030984_BASE_HI(x) (((unsigned)(x) & 0xFF) << 0) 14091 #define G_030984_BASE_HI(x) (((x) >> 0) & 0xFF) 14092 #define C_030984_BASE_HI 0xFFFFFF00 14093 #define R_030988_GE_USER_VGPR_EN 0x030988 /* >= gfx10 */ 14094 #define S_030988_EN_USER_VGPR1(x) (((unsigned)(x) & 0x1) << 0) 14095 #define G_030988_EN_USER_VGPR1(x) (((x) >> 0) & 0x1) 14096 #define C_030988_EN_USER_VGPR1 0xFFFFFFFE 14097 #define S_030988_EN_USER_VGPR2(x) (((unsigned)(x) & 0x1) << 1) 14098 #define G_030988_EN_USER_VGPR2(x) (((x) >> 1) & 0x1) 14099 #define C_030988_EN_USER_VGPR2 0xFFFFFFFD 14100 #define S_030988_EN_USER_VGPR3(x) (((unsigned)(x) & 0x1) << 2) 14101 #define G_030988_EN_USER_VGPR3(x) (((x) >> 2) & 0x1) 14102 #define C_030988_EN_USER_VGPR3 0xFFFFFFFB 14103 #define R_03098C_GE_VRS_RATE 0x03098C /* >= gfx103 */ 14104 #define S_03098C_RATE_X(x) (((unsigned)(x) & 0x3) << 0) 14105 #define G_03098C_RATE_X(x) (((x) >> 0) & 0x3) 14106 #define C_03098C_RATE_X 0xFFFFFFFC 14107 #define S_03098C_RATE_Y(x) (((unsigned)(x) & 0x3) << 4) 14108 #define G_03098C_RATE_Y(x) (((x) >> 4) & 0x3) 14109 #define C_03098C_RATE_Y 0xFFFFFFCF 14110 #define R_030A00_PA_SU_LINE_STIPPLE_VALUE 0x030A00 /* >= gfx7 */ 14111 #define S_030A00_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) 14112 #define G_030A00_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) 14113 #define C_030A00_LINE_STIPPLE_VALUE 0xFF000000 14114 #define R_030A04_PA_SC_LINE_STIPPLE_STATE 0x030A04 /* >= gfx7 */ 14115 #define S_030A04_CURRENT_PTR(x) (((unsigned)(x) & 0xF) << 0) 14116 #define G_030A04_CURRENT_PTR(x) (((x) >> 0) & 0xF) 14117 #define C_030A04_CURRENT_PTR 0xFFFFFFF0 14118 #define S_030A04_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) 14119 #define G_030A04_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) 14120 #define C_030A04_CURRENT_COUNT 0xFFFF00FF 14121 #define R_030A10_PA_SC_SCREEN_EXTENT_MIN_0 0x030A10 /* >= gfx7 */ 14122 #define S_030A10_X(x) (((unsigned)(x) & 0xFFFF) << 0) 14123 #define G_030A10_X(x) (((x) >> 0) & 0xFFFF) 14124 #define C_030A10_X 0xFFFF0000 14125 #define S_030A10_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 14126 #define G_030A10_Y(x) (((x) >> 16) & 0xFFFF) 14127 #define C_030A10_Y 0x0000FFFF 14128 #define R_030A14_PA_SC_SCREEN_EXTENT_MAX_0 0x030A14 /* >= gfx7 */ 14129 #define S_030A14_X(x) (((unsigned)(x) & 0xFFFF) << 0) 14130 #define G_030A14_X(x) (((x) >> 0) & 0xFFFF) 14131 #define C_030A14_X 0xFFFF0000 14132 #define S_030A14_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 14133 #define G_030A14_Y(x) (((x) >> 16) & 0xFFFF) 14134 #define C_030A14_Y 0x0000FFFF 14135 #define R_030A18_PA_SC_SCREEN_EXTENT_MIN_1 0x030A18 /* >= gfx7 */ 14136 #define R_030A2C_PA_SC_SCREEN_EXTENT_MAX_1 0x030A2C /* >= gfx7 */ 14137 #define R_030A80_PA_SC_P3D_TRAP_SCREEN_HV_EN 0x030A80 /* >= gfx7 */ 14138 #define S_030A80_ENABLE_HV_PRE_SHADER(x) (((unsigned)(x) & 0x1) << 0) 14139 #define G_030A80_ENABLE_HV_PRE_SHADER(x) (((x) >> 0) & 0x1) 14140 #define C_030A80_ENABLE_HV_PRE_SHADER 0xFFFFFFFE 14141 #define S_030A80_FORCE_PRE_SHADER_ALL_PIXELS(x) (((unsigned)(x) & 0x1) << 1) 14142 #define G_030A80_FORCE_PRE_SHADER_ALL_PIXELS(x) (((x) >> 1) & 0x1) 14143 #define C_030A80_FORCE_PRE_SHADER_ALL_PIXELS 0xFFFFFFFD 14144 #define R_030A84_PA_SC_P3D_TRAP_SCREEN_H 0x030A84 /* >= gfx7 */ 14145 #define S_030A84_X_COORD(x) (((unsigned)(x) & 0x3FFF) << 0) 14146 #define G_030A84_X_COORD(x) (((x) >> 0) & 0x3FFF) 14147 #define C_030A84_X_COORD 0xFFFFC000 14148 #define R_030A88_PA_SC_P3D_TRAP_SCREEN_V 0x030A88 /* >= gfx7 */ 14149 #define S_030A88_Y_COORD(x) (((unsigned)(x) & 0x3FFF) << 0) 14150 #define G_030A88_Y_COORD(x) (((x) >> 0) & 0x3FFF) 14151 #define C_030A88_Y_COORD 0xFFFFC000 14152 #define R_030A8C_PA_SC_P3D_TRAP_SCREEN_OCCURRENCE 0x030A8C /* >= gfx7 */ 14153 #define S_030A8C_COUNT(x) (((unsigned)(x) & 0xFFFF) << 0) 14154 #define G_030A8C_COUNT(x) (((x) >> 0) & 0xFFFF) 14155 #define C_030A8C_COUNT 0xFFFF0000 14156 #define R_030A90_PA_SC_P3D_TRAP_SCREEN_COUNT 0x030A90 /* >= gfx7 */ 14157 #define S_030A90_COUNT(x) (((unsigned)(x) & 0xFFFF) << 0) 14158 #define G_030A90_COUNT(x) (((x) >> 0) & 0xFFFF) 14159 #define C_030A90_COUNT 0xFFFF0000 14160 #define R_030AA0_PA_SC_HP3D_TRAP_SCREEN_HV_EN 0x030AA0 /* >= gfx7 */ 14161 #define S_030AA0_ENABLE_HV_PRE_SHADER(x) (((unsigned)(x) & 0x1) << 0) 14162 #define G_030AA0_ENABLE_HV_PRE_SHADER(x) (((x) >> 0) & 0x1) 14163 #define C_030AA0_ENABLE_HV_PRE_SHADER 0xFFFFFFFE 14164 #define S_030AA0_FORCE_PRE_SHADER_ALL_PIXELS(x) (((unsigned)(x) & 0x1) << 1) 14165 #define G_030AA0_FORCE_PRE_SHADER_ALL_PIXELS(x) (((x) >> 1) & 0x1) 14166 #define C_030AA0_FORCE_PRE_SHADER_ALL_PIXELS 0xFFFFFFFD 14167 #define R_030AA4_PA_SC_HP3D_TRAP_SCREEN_H 0x030AA4 /* >= gfx7 */ 14168 #define S_030AA4_X_COORD(x) (((unsigned)(x) & 0x3FFF) << 0) 14169 #define G_030AA4_X_COORD(x) (((x) >> 0) & 0x3FFF) 14170 #define C_030AA4_X_COORD 0xFFFFC000 14171 #define R_030AA8_PA_SC_HP3D_TRAP_SCREEN_V 0x030AA8 /* >= gfx7 */ 14172 #define S_030AA8_Y_COORD(x) (((unsigned)(x) & 0x3FFF) << 0) 14173 #define G_030AA8_Y_COORD(x) (((x) >> 0) & 0x3FFF) 14174 #define C_030AA8_Y_COORD 0xFFFFC000 14175 #define R_030AAC_PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE 0x030AAC /* >= gfx7 */ 14176 #define S_030AAC_COUNT(x) (((unsigned)(x) & 0xFFFF) << 0) 14177 #define G_030AAC_COUNT(x) (((x) >> 0) & 0xFFFF) 14178 #define C_030AAC_COUNT 0xFFFF0000 14179 #define R_030AB0_PA_SC_HP3D_TRAP_SCREEN_COUNT 0x030AB0 /* >= gfx7 */ 14180 #define S_030AB0_COUNT(x) (((unsigned)(x) & 0xFFFF) << 0) 14181 #define G_030AB0_COUNT(x) (((x) >> 0) & 0xFFFF) 14182 #define C_030AB0_COUNT 0xFFFF0000 14183 #define R_030AC0_PA_SC_TRAP_SCREEN_HV_EN 0x030AC0 /* >= gfx7 */ 14184 #define S_030AC0_ENABLE_HV_PRE_SHADER(x) (((unsigned)(x) & 0x1) << 0) 14185 #define G_030AC0_ENABLE_HV_PRE_SHADER(x) (((x) >> 0) & 0x1) 14186 #define C_030AC0_ENABLE_HV_PRE_SHADER 0xFFFFFFFE 14187 #define S_030AC0_FORCE_PRE_SHADER_ALL_PIXELS(x) (((unsigned)(x) & 0x1) << 1) 14188 #define G_030AC0_FORCE_PRE_SHADER_ALL_PIXELS(x) (((x) >> 1) & 0x1) 14189 #define C_030AC0_FORCE_PRE_SHADER_ALL_PIXELS 0xFFFFFFFD 14190 #define R_030AC4_PA_SC_TRAP_SCREEN_H 0x030AC4 /* >= gfx7 */ 14191 #define S_030AC4_X_COORD(x) (((unsigned)(x) & 0x3FFF) << 0) 14192 #define G_030AC4_X_COORD(x) (((x) >> 0) & 0x3FFF) 14193 #define C_030AC4_X_COORD 0xFFFFC000 14194 #define R_030AC8_PA_SC_TRAP_SCREEN_V 0x030AC8 /* >= gfx7 */ 14195 #define S_030AC8_Y_COORD(x) (((unsigned)(x) & 0x3FFF) << 0) 14196 #define G_030AC8_Y_COORD(x) (((x) >> 0) & 0x3FFF) 14197 #define C_030AC8_Y_COORD 0xFFFFC000 14198 #define R_030ACC_PA_SC_TRAP_SCREEN_OCCURRENCE 0x030ACC /* >= gfx7 */ 14199 #define S_030ACC_COUNT(x) (((unsigned)(x) & 0xFFFF) << 0) 14200 #define G_030ACC_COUNT(x) (((x) >> 0) & 0xFFFF) 14201 #define C_030ACC_COUNT 0xFFFF0000 14202 #define R_030AD0_PA_SC_TRAP_SCREEN_COUNT 0x030AD0 /* >= gfx7 */ 14203 #define S_030AD0_COUNT(x) (((unsigned)(x) & 0xFFFF) << 0) 14204 #define G_030AD0_COUNT(x) (((x) >> 0) & 0xFFFF) 14205 #define C_030AD0_COUNT 0xFFFF0000 14206 #define R_030AD4_PA_STATE_STEREO_X 0x030AD4 /* gfx9 */ 14207 #define R_030CC0_SQ_THREAD_TRACE_BASE 0x030CC0 /* gfx8, gfx81, gfx9 */ 14208 #define R_030CC4_SQ_THREAD_TRACE_SIZE 0x030CC4 /* gfx8, gfx81, gfx9 */ 14209 #define S_030CC4_SIZE(x) (((unsigned)(x) & 0x3FFFFF) << 0) 14210 #define G_030CC4_SIZE(x) (((x) >> 0) & 0x3FFFFF) 14211 #define C_030CC4_SIZE 0xFFC00000 14212 #define R_030CC8_SQ_THREAD_TRACE_MASK 0x030CC8 /* gfx8, gfx81, gfx9 */ 14213 #define S_030CC8_CU_SEL(x) (((unsigned)(x) & 0x1F) << 0) 14214 #define G_030CC8_CU_SEL(x) (((x) >> 0) & 0x1F) 14215 #define C_030CC8_CU_SEL 0xFFFFFFE0 14216 #define S_030CC8_SH_SEL(x) (((unsigned)(x) & 0x1) << 5) 14217 #define G_030CC8_SH_SEL(x) (((x) >> 5) & 0x1) 14218 #define C_030CC8_SH_SEL 0xFFFFFFDF 14219 #define S_030CC8_REG_STALL_EN(x) (((unsigned)(x) & 0x1) << 7) 14220 #define G_030CC8_REG_STALL_EN(x) (((x) >> 7) & 0x1) 14221 #define C_030CC8_REG_STALL_EN 0xFFFFFF7F 14222 #define S_030CC8_SIMD_EN(x) (((unsigned)(x) & 0xF) << 8) 14223 #define G_030CC8_SIMD_EN(x) (((x) >> 8) & 0xF) 14224 #define C_030CC8_SIMD_EN 0xFFFFF0FF 14225 #define S_030CC8_VM_ID_MASK(x) (((unsigned)(x) & 0x3) << 12) 14226 #define G_030CC8_VM_ID_MASK(x) (((x) >> 12) & 0x3) 14227 #define C_030CC8_VM_ID_MASK 0xFFFFCFFF 14228 #define S_030CC8_SPI_STALL_EN(x) (((unsigned)(x) & 0x1) << 14) 14229 #define G_030CC8_SPI_STALL_EN(x) (((x) >> 14) & 0x1) 14230 #define C_030CC8_SPI_STALL_EN 0xFFFFBFFF 14231 #define S_030CC8_SQ_STALL_EN(x) (((unsigned)(x) & 0x1) << 15) 14232 #define G_030CC8_SQ_STALL_EN(x) (((x) >> 15) & 0x1) 14233 #define C_030CC8_SQ_STALL_EN 0xFFFF7FFF 14234 #define S_030CC8_RANDOM_SEED(x) (((unsigned)(x) & 0xFFFF) << 16) /* gfx8, gfx81 */ 14235 #define G_030CC8_RANDOM_SEED(x) (((x) >> 16) & 0xFFFF) 14236 #define C_030CC8_RANDOM_SEED 0x0000FFFF 14237 #define R_030CCC_SQ_THREAD_TRACE_TOKEN_MASK 0x030CCC /* gfx8, gfx81, gfx9 */ 14238 #define S_030CCC_TOKEN_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) 14239 #define G_030CCC_TOKEN_MASK(x) (((x) >> 0) & 0xFFFF) 14240 #define C_030CCC_TOKEN_MASK 0xFFFF0000 14241 #define S_030CCC_REG_MASK(x) (((unsigned)(x) & 0xFF) << 16) 14242 #define G_030CCC_REG_MASK(x) (((x) >> 16) & 0xFF) 14243 #define C_030CCC_REG_MASK 0xFF00FFFF 14244 #define S_030CCC_REG_DROP_ON_STALL(x) (((unsigned)(x) & 0x1) << 24) 14245 #define G_030CCC_REG_DROP_ON_STALL(x) (((x) >> 24) & 0x1) 14246 #define C_030CCC_REG_DROP_ON_STALL 0xFEFFFFFF 14247 #define R_030CD0_SQ_THREAD_TRACE_PERF_MASK 0x030CD0 /* gfx8, gfx81, gfx9 */ 14248 #define S_030CD0_SH0_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) 14249 #define G_030CD0_SH0_MASK(x) (((x) >> 0) & 0xFFFF) 14250 #define C_030CD0_SH0_MASK 0xFFFF0000 14251 #define S_030CD0_SH1_MASK(x) (((unsigned)(x) & 0xFFFF) << 16) 14252 #define G_030CD0_SH1_MASK(x) (((x) >> 16) & 0xFFFF) 14253 #define C_030CD0_SH1_MASK 0x0000FFFF 14254 #define R_030CD4_SQ_THREAD_TRACE_CTRL 0x030CD4 /* gfx8, gfx81, gfx9 */ 14255 #define S_030CD4_RESET_BUFFER(x) (((unsigned)(x) & 0x1) << 31) 14256 #define G_030CD4_RESET_BUFFER(x) (((x) >> 31) & 0x1) 14257 #define C_030CD4_RESET_BUFFER 0x7FFFFFFF 14258 #define R_030CD8_SQ_THREAD_TRACE_MODE 0x030CD8 /* gfx8, gfx81, gfx9 */ 14259 #define S_030CD8_MASK_PS(x) (((unsigned)(x) & 0x7) << 0) 14260 #define G_030CD8_MASK_PS(x) (((x) >> 0) & 0x7) 14261 #define C_030CD8_MASK_PS 0xFFFFFFF8 14262 #define S_030CD8_MASK_VS(x) (((unsigned)(x) & 0x7) << 3) 14263 #define G_030CD8_MASK_VS(x) (((x) >> 3) & 0x7) 14264 #define C_030CD8_MASK_VS 0xFFFFFFC7 14265 #define S_030CD8_MASK_GS(x) (((unsigned)(x) & 0x7) << 6) 14266 #define G_030CD8_MASK_GS(x) (((x) >> 6) & 0x7) 14267 #define C_030CD8_MASK_GS 0xFFFFFE3F 14268 #define S_030CD8_MASK_ES(x) (((unsigned)(x) & 0x7) << 9) 14269 #define G_030CD8_MASK_ES(x) (((x) >> 9) & 0x7) 14270 #define C_030CD8_MASK_ES 0xFFFFF1FF 14271 #define S_030CD8_MASK_HS(x) (((unsigned)(x) & 0x7) << 12) 14272 #define G_030CD8_MASK_HS(x) (((x) >> 12) & 0x7) 14273 #define C_030CD8_MASK_HS 0xFFFF8FFF 14274 #define S_030CD8_MASK_LS(x) (((unsigned)(x) & 0x7) << 15) 14275 #define G_030CD8_MASK_LS(x) (((x) >> 15) & 0x7) 14276 #define C_030CD8_MASK_LS 0xFFFC7FFF 14277 #define S_030CD8_MASK_CS(x) (((unsigned)(x) & 0x7) << 18) 14278 #define G_030CD8_MASK_CS(x) (((x) >> 18) & 0x7) 14279 #define C_030CD8_MASK_CS 0xFFE3FFFF 14280 #define S_030CD8_MODE(x) (((unsigned)(x) & 0x3) << 21) 14281 #define G_030CD8_MODE(x) (((x) >> 21) & 0x3) 14282 #define C_030CD8_MODE 0xFF9FFFFF 14283 #define S_030CD8_CAPTURE_MODE(x) (((unsigned)(x) & 0x3) << 23) 14284 #define G_030CD8_CAPTURE_MODE(x) (((x) >> 23) & 0x3) 14285 #define C_030CD8_CAPTURE_MODE 0xFE7FFFFF 14286 #define S_030CD8_AUTOFLUSH_EN(x) (((unsigned)(x) & 0x1) << 25) 14287 #define G_030CD8_AUTOFLUSH_EN(x) (((x) >> 25) & 0x1) 14288 #define C_030CD8_AUTOFLUSH_EN 0xFDFFFFFF 14289 #define S_030CD8_PRIV(x) (((unsigned)(x) & 0x1) << 26) /* gfx8, gfx81 */ 14290 #define G_030CD8_PRIV(x) (((x) >> 26) & 0x1) 14291 #define C_030CD8_PRIV 0xFBFFFFFF 14292 #define S_030CD8_TC_PERF_EN(x) (((unsigned)(x) & 0x1) << 26) /* gfx9 */ 14293 #define G_030CD8_TC_PERF_EN(x) (((x) >> 26) & 0x1) 14294 #define C_030CD8_TC_PERF_EN 0xFBFFFFFF 14295 #define S_030CD8_ISSUE_MASK(x) (((unsigned)(x) & 0x3) << 27) 14296 #define G_030CD8_ISSUE_MASK(x) (((x) >> 27) & 0x3) 14297 #define C_030CD8_ISSUE_MASK 0xE7FFFFFF 14298 #define S_030CD8_TEST_MODE(x) (((unsigned)(x) & 0x1) << 29) 14299 #define G_030CD8_TEST_MODE(x) (((x) >> 29) & 0x1) 14300 #define C_030CD8_TEST_MODE 0xDFFFFFFF 14301 #define S_030CD8_INTERRUPT_EN(x) (((unsigned)(x) & 0x1) << 30) 14302 #define G_030CD8_INTERRUPT_EN(x) (((x) >> 30) & 0x1) 14303 #define C_030CD8_INTERRUPT_EN 0xBFFFFFFF 14304 #define S_030CD8_WRAP(x) (((unsigned)(x) & 0x1) << 31) 14305 #define G_030CD8_WRAP(x) (((x) >> 31) & 0x1) 14306 #define C_030CD8_WRAP 0x7FFFFFFF 14307 #define R_030CDC_SQ_THREAD_TRACE_BASE2 0x030CDC /* gfx8, gfx81, gfx9 */ 14308 #define S_030CDC_ADDR_HI(x) (((unsigned)(x) & 0xF) << 0) 14309 #define G_030CDC_ADDR_HI(x) (((x) >> 0) & 0xF) 14310 #define C_030CDC_ADDR_HI 0xFFFFFFF0 14311 #define R_030CE0_SQ_THREAD_TRACE_TOKEN_MASK2 0x030CE0 /* gfx8, gfx81, gfx9 */ 14312 #define R_030CE4_SQ_THREAD_TRACE_WPTR 0x030CE4 /* gfx8, gfx81, gfx9 */ 14313 #define S_030CE4_WPTR(x) (((unsigned)(x) & 0x3FFFFFFF) << 0) 14314 #define G_030CE4_WPTR(x) (((x) >> 0) & 0x3FFFFFFF) 14315 #define C_030CE4_WPTR 0xC0000000 14316 #define S_030CE4_READ_OFFSET(x) (((unsigned)(x) & 0x3) << 30) 14317 #define G_030CE4_READ_OFFSET(x) (((x) >> 30) & 0x3) 14318 #define C_030CE4_READ_OFFSET 0x3FFFFFFF 14319 #define R_030CE8_SQ_THREAD_TRACE_STATUS 0x030CE8 /* gfx8, gfx81, gfx9 */ 14320 #define S_030CE8_FINISH_PENDING(x) (((unsigned)(x) & 0x3FF) << 0) 14321 #define G_030CE8_FINISH_PENDING(x) (((x) >> 0) & 0x3FF) 14322 #define C_030CE8_FINISH_PENDING 0xFFFFFC00 14323 #define S_030CE8_FINISH_DONE(x) (((unsigned)(x) & 0x3FF) << 16) 14324 #define G_030CE8_FINISH_DONE(x) (((x) >> 16) & 0x3FF) 14325 #define C_030CE8_FINISH_DONE 0xFC00FFFF 14326 #define S_030CE8_UTC_ERROR(x) (((unsigned)(x) & 0x1) << 28) /* gfx9 */ 14327 #define G_030CE8_UTC_ERROR(x) (((x) >> 28) & 0x1) 14328 #define C_030CE8_UTC_ERROR 0xEFFFFFFF 14329 #define S_030CE8_NEW_BUF(x) (((unsigned)(x) & 0x1) << 29) 14330 #define G_030CE8_NEW_BUF(x) (((x) >> 29) & 0x1) 14331 #define C_030CE8_NEW_BUF 0xDFFFFFFF 14332 #define S_030CE8_BUSY(x) (((unsigned)(x) & 0x1) << 30) 14333 #define G_030CE8_BUSY(x) (((x) >> 30) & 0x1) 14334 #define C_030CE8_BUSY 0xBFFFFFFF 14335 #define S_030CE8_FULL(x) (((unsigned)(x) & 0x1) << 31) 14336 #define G_030CE8_FULL(x) (((x) >> 31) & 0x1) 14337 #define C_030CE8_FULL 0x7FFFFFFF 14338 #define R_030CEC_SQ_THREAD_TRACE_HIWATER 0x030CEC /* gfx8, gfx81, gfx9 */ 14339 #define S_030CEC_HIWATER(x) (((unsigned)(x) & 0x7) << 0) 14340 #define G_030CEC_HIWATER(x) (((x) >> 0) & 0x7) 14341 #define C_030CEC_HIWATER 0xFFFFFFF8 14342 #define R_030CF0_SQ_THREAD_TRACE_CNTR 0x030CF0 /* gfx9 */ 14343 #define R_030D00_SQ_THREAD_TRACE_USERDATA_0 0x030D00 /* >= gfx7 */ 14344 #define R_030D04_SQ_THREAD_TRACE_USERDATA_1 0x030D04 /* >= gfx7 */ 14345 #define R_030D08_SQ_THREAD_TRACE_USERDATA_2 0x030D08 /* >= gfx7 */ 14346 #define R_030D0C_SQ_THREAD_TRACE_USERDATA_3 0x030D0C /* >= gfx7 */ 14347 #define R_030D10_SQ_THREAD_TRACE_USERDATA_4 0x030D10 /* >= gfx10 */ 14348 #define R_030D14_SQ_THREAD_TRACE_USERDATA_5 0x030D14 /* >= gfx10 */ 14349 #define R_030D18_SQ_THREAD_TRACE_USERDATA_6 0x030D18 /* >= gfx10 */ 14350 #define R_030D1C_SQ_THREAD_TRACE_USERDATA_7 0x030D1C /* >= gfx10 */ 14351 #define R_030D20_SQC_CACHES 0x030D20 /* >= gfx7 */ 14352 #define S_030D20_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) /* gfx7 */ 14353 #define G_030D20_INST_INVALIDATE(x) (((x) >> 0) & 0x1) 14354 #define C_030D20_INST_INVALIDATE 0xFFFFFFFE 14355 #define S_030D20_TARGET_INST(x) (((unsigned)(x) & 0x1) << 0) /* >= gfx8 */ 14356 #define G_030D20_TARGET_INST(x) (((x) >> 0) & 0x1) 14357 #define C_030D20_TARGET_INST 0xFFFFFFFE 14358 #define S_030D20_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) /* gfx7 */ 14359 #define G_030D20_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) 14360 #define C_030D20_DATA_INVALIDATE 0xFFFFFFFD 14361 #define S_030D20_TARGET_DATA(x) (((unsigned)(x) & 0x1) << 1) /* >= gfx8 */ 14362 #define G_030D20_TARGET_DATA(x) (((x) >> 1) & 0x1) 14363 #define C_030D20_TARGET_DATA 0xFFFFFFFD 14364 #define S_030D20_INVALIDATE(x) (((unsigned)(x) & 0x1) << 2) /* >= gfx8 */ 14365 #define G_030D20_INVALIDATE(x) (((x) >> 2) & 0x1) 14366 #define C_030D20_INVALIDATE 0xFFFFFFFB 14367 #define S_030D20_INVALIDATE_VOLATILE(x) (((unsigned)(x) & 0x1) << 2) /* gfx7 */ 14368 #define G_030D20_INVALIDATE_VOLATILE(x) (((x) >> 2) & 0x1) 14369 #define C_030D20_INVALIDATE_VOLATILE 0xFFFFFFFB 14370 #define S_030D20_WRITEBACK(x) (((unsigned)(x) & 0x1) << 3) /* gfx8, gfx81, gfx9, gfx10 */ 14371 #define G_030D20_WRITEBACK(x) (((x) >> 3) & 0x1) 14372 #define C_030D20_WRITEBACK 0xFFFFFFF7 14373 #define S_030D20_VOL(x) (((unsigned)(x) & 0x1) << 4) /* gfx8, gfx81, gfx9, gfx10 */ 14374 #define G_030D20_VOL(x) (((x) >> 4) & 0x1) 14375 #define C_030D20_VOL 0xFFFFFFEF 14376 #define S_030D20_COMPLETE(x) (((unsigned)(x) & 0x1) << 16) /* >= gfx8 */ 14377 #define G_030D20_COMPLETE(x) (((x) >> 16) & 0x1) 14378 #define C_030D20_COMPLETE 0xFFFEFFFF 14379 #define S_030D20_L2_WB_POLICY(x) (((unsigned)(x) & 0x3) << 17) /* >= gfx10 */ 14380 #define G_030D20_L2_WB_POLICY(x) (((x) >> 17) & 0x3) 14381 #define C_030D20_L2_WB_POLICY 0xFFF9FFFF 14382 #define R_030D24_SQC_WRITEBACK 0x030D24 /* gfx8, gfx81, gfx9, gfx10 */ 14383 #define S_030D24_DWB(x) (((unsigned)(x) & 0x1) << 0) 14384 #define G_030D24_DWB(x) (((x) >> 0) & 0x1) 14385 #define C_030D24_DWB 0xFFFFFFFE 14386 #define S_030D24_DIRTY(x) (((unsigned)(x) & 0x1) << 1) 14387 #define G_030D24_DIRTY(x) (((x) >> 1) & 0x1) 14388 #define C_030D24_DIRTY 0xFFFFFFFD 14389 #define R_030E00_TA_CS_BC_BASE_ADDR 0x030E00 /* >= gfx7 */ 14390 #define R_030E04_TA_CS_BC_BASE_ADDR_HI 0x030E04 /* >= gfx7 */ 14391 #define S_030E04_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) 14392 #define G_030E04_ADDRESS(x) (((x) >> 0) & 0xFF) 14393 #define C_030E04_ADDRESS 0xFFFFFF00 14394 #define R_030F00_DB_OCCLUSION_COUNT0_LOW 0x030F00 /* >= gfx7 */ 14395 #define R_030F04_DB_OCCLUSION_COUNT0_HI 0x030F04 /* >= gfx7 */ 14396 #define S_030F04_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 14397 #define G_030F04_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 14398 #define C_030F04_COUNT_HI 0x80000000 14399 #define R_030F08_DB_OCCLUSION_COUNT1_LOW 0x030F08 /* >= gfx7 */ 14400 #define R_030F0C_DB_OCCLUSION_COUNT1_HI 0x030F0C /* >= gfx7 */ 14401 #define R_030F10_DB_OCCLUSION_COUNT2_LOW 0x030F10 /* >= gfx7 */ 14402 #define R_030F14_DB_OCCLUSION_COUNT2_HI 0x030F14 /* >= gfx7 */ 14403 #define R_030F18_DB_OCCLUSION_COUNT3_LOW 0x030F18 /* >= gfx7 */ 14404 #define R_030F1C_DB_OCCLUSION_COUNT3_HI 0x030F1C /* >= gfx7 */ 14405 #define R_030FF8_DB_ZPASS_COUNT_LOW 0x030FF8 /* >= gfx7 */ 14406 #define R_030FFC_DB_ZPASS_COUNT_HI 0x030FFC /* >= gfx7 */ 14407 #define S_030FFC_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 14408 #define G_030FFC_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 14409 #define C_030FFC_COUNT_HI 0x80000000 14410 #define R_031000_GDS_RD_ADDR 0x031000 /* >= gfx7 */ 14411 #define R_031004_GDS_RD_DATA 0x031004 /* >= gfx7 */ 14412 #define R_031008_GDS_RD_BURST_ADDR 0x031008 /* >= gfx7 */ 14413 #define R_03100C_GDS_RD_BURST_COUNT 0x03100C /* >= gfx7 */ 14414 #define R_031010_GDS_RD_BURST_DATA 0x031010 /* >= gfx7 */ 14415 #define R_031014_GDS_WR_ADDR 0x031014 /* >= gfx7 */ 14416 #define R_031018_GDS_WR_DATA 0x031018 /* >= gfx7 */ 14417 #define R_03101C_GDS_WR_BURST_ADDR 0x03101C /* >= gfx7 */ 14418 #define R_031020_GDS_WR_BURST_DATA 0x031020 /* >= gfx7 */ 14419 #define R_031024_GDS_WRITE_COMPLETE 0x031024 /* >= gfx7 */ 14420 #define R_031028_GDS_ATOM_CNTL 0x031028 /* >= gfx7 */ 14421 #define S_031028_AINC(x) (((unsigned)(x) & 0x3F) << 0) 14422 #define G_031028_AINC(x) (((x) >> 0) & 0x3F) 14423 #define C_031028_AINC 0xFFFFFFC0 14424 #define S_031028_UNUSED1(x) (((unsigned)(x) & 0x3) << 6) 14425 #define G_031028_UNUSED1(x) (((x) >> 6) & 0x3) 14426 #define C_031028_UNUSED1 0xFFFFFF3F 14427 #define S_031028_DMODE_GFX7(x) (((unsigned)(x) & 0x1) << 8) /* gfx7 */ 14428 #define G_031028_DMODE_GFX7(x) (((x) >> 8) & 0x1) 14429 #define C_031028_DMODE_GFX7 0xFFFFFEFF 14430 #define S_031028_DMODE_GFX8(x) (((unsigned)(x) & 0x3) << 8) /* >= gfx8 */ 14431 #define G_031028_DMODE_GFX8(x) (((x) >> 8) & 0x3) 14432 #define C_031028_DMODE_GFX8 0xFFFFFCFF 14433 #define S_031028_UNUSED2_GFX7(x) (((unsigned)(x) & 0x7FFFFF) << 9) /* gfx7 */ 14434 #define G_031028_UNUSED2_GFX7(x) (((x) >> 9) & 0x7FFFFF) 14435 #define C_031028_UNUSED2_GFX7 0x000001FF 14436 #define S_031028_UNUSED2_GFX8(x) (((unsigned)(x) & 0x3FFFFF) << 10) /* >= gfx8 */ 14437 #define G_031028_UNUSED2_GFX8(x) (((x) >> 10) & 0x3FFFFF) 14438 #define C_031028_UNUSED2_GFX8 0x000003FF 14439 #define R_03102C_GDS_ATOM_COMPLETE 0x03102C /* >= gfx7 */ 14440 #define S_03102C_COMPLETE(x) (((unsigned)(x) & 0x1) << 0) 14441 #define G_03102C_COMPLETE(x) (((x) >> 0) & 0x1) 14442 #define C_03102C_COMPLETE 0xFFFFFFFE 14443 #define S_03102C_UNUSED(x) (((unsigned)(x) & 0x7FFFFFFF) << 1) 14444 #define G_03102C_UNUSED(x) (((x) >> 1) & 0x7FFFFFFF) 14445 #define C_03102C_UNUSED 0x00000001 14446 #define R_031030_GDS_ATOM_BASE 0x031030 /* >= gfx7 */ 14447 #define S_031030_BASE(x) (((unsigned)(x) & 0xFFFF) << 0) 14448 #define G_031030_BASE(x) (((x) >> 0) & 0xFFFF) 14449 #define C_031030_BASE 0xFFFF0000 14450 #define S_031030_UNUSED(x) (((unsigned)(x) & 0xFFFF) << 16) 14451 #define G_031030_UNUSED(x) (((x) >> 16) & 0xFFFF) 14452 #define C_031030_UNUSED 0x0000FFFF 14453 #define R_031034_GDS_ATOM_SIZE 0x031034 /* >= gfx7 */ 14454 #define S_031034_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 14455 #define G_031034_SIZE(x) (((x) >> 0) & 0xFFFF) 14456 #define C_031034_SIZE 0xFFFF0000 14457 #define S_031034_UNUSED(x) (((unsigned)(x) & 0xFFFF) << 16) 14458 #define G_031034_UNUSED(x) (((x) >> 16) & 0xFFFF) 14459 #define C_031034_UNUSED 0x0000FFFF 14460 #define R_031038_GDS_ATOM_OFFSET0 0x031038 /* >= gfx7 */ 14461 #define S_031038_OFFSET0(x) (((unsigned)(x) & 0xFF) << 0) 14462 #define G_031038_OFFSET0(x) (((x) >> 0) & 0xFF) 14463 #define C_031038_OFFSET0 0xFFFFFF00 14464 #define S_031038_UNUSED(x) (((unsigned)(x) & 0xFFFFFF) << 8) 14465 #define G_031038_UNUSED(x) (((x) >> 8) & 0xFFFFFF) 14466 #define C_031038_UNUSED 0x000000FF 14467 #define R_03103C_GDS_ATOM_OFFSET1 0x03103C /* >= gfx7 */ 14468 #define S_03103C_OFFSET1(x) (((unsigned)(x) & 0xFF) << 0) 14469 #define G_03103C_OFFSET1(x) (((x) >> 0) & 0xFF) 14470 #define C_03103C_OFFSET1 0xFFFFFF00 14471 #define S_03103C_UNUSED(x) (((unsigned)(x) & 0xFFFFFF) << 8) 14472 #define G_03103C_UNUSED(x) (((x) >> 8) & 0xFFFFFF) 14473 #define C_03103C_UNUSED 0x000000FF 14474 #define R_031040_GDS_ATOM_DST 0x031040 /* >= gfx7 */ 14475 #define R_031044_GDS_ATOM_OP 0x031044 /* >= gfx7 */ 14476 #define S_031044_OP(x) (((unsigned)(x) & 0xFF) << 0) 14477 #define G_031044_OP(x) (((x) >> 0) & 0xFF) 14478 #define C_031044_OP 0xFFFFFF00 14479 #define S_031044_UNUSED(x) (((unsigned)(x) & 0xFFFFFF) << 8) 14480 #define G_031044_UNUSED(x) (((x) >> 8) & 0xFFFFFF) 14481 #define C_031044_UNUSED 0x000000FF 14482 #define R_031048_GDS_ATOM_SRC0 0x031048 /* >= gfx7 */ 14483 #define R_03104C_GDS_ATOM_SRC0_U 0x03104C /* >= gfx7 */ 14484 #define R_031050_GDS_ATOM_SRC1 0x031050 /* >= gfx7 */ 14485 #define R_031054_GDS_ATOM_SRC1_U 0x031054 /* >= gfx7 */ 14486 #define R_031058_GDS_ATOM_READ0 0x031058 /* >= gfx7 */ 14487 #define R_03105C_GDS_ATOM_READ0_U 0x03105C /* >= gfx7 */ 14488 #define R_031060_GDS_ATOM_READ1 0x031060 /* >= gfx7 */ 14489 #define R_031064_GDS_ATOM_READ1_U 0x031064 /* >= gfx7 */ 14490 #define R_031068_GDS_GWS_RESOURCE_CNTL 0x031068 /* >= gfx7 */ 14491 #define S_031068_INDEX(x) (((unsigned)(x) & 0x3F) << 0) 14492 #define G_031068_INDEX(x) (((x) >> 0) & 0x3F) 14493 #define C_031068_INDEX 0xFFFFFFC0 14494 #define S_031068_UNUSED(x) (((unsigned)(x) & 0x3FFFFFF) << 6) 14495 #define G_031068_UNUSED(x) (((x) >> 6) & 0x3FFFFFF) 14496 #define C_031068_UNUSED 0x0000003F 14497 #define R_03106C_GDS_GWS_RESOURCE 0x03106C /* >= gfx7 */ 14498 #define S_03106C_FLAG(x) (((unsigned)(x) & 0x1) << 0) 14499 #define G_03106C_FLAG(x) (((x) >> 0) & 0x1) 14500 #define C_03106C_FLAG 0xFFFFFFFE 14501 #define S_03106C_COUNTER(x) (((unsigned)(x) & 0xFFF) << 1) 14502 #define G_03106C_COUNTER(x) (((x) >> 1) & 0xFFF) 14503 #define C_03106C_COUNTER 0xFFFFE001 14504 #define S_03106C_TYPE(x) (((unsigned)(x) & 0x1) << 13) 14505 #define G_03106C_TYPE(x) (((x) >> 13) & 0x1) 14506 #define C_03106C_TYPE 0xFFFFDFFF 14507 #define S_03106C_DED(x) (((unsigned)(x) & 0x1) << 14) 14508 #define G_03106C_DED(x) (((x) >> 14) & 0x1) 14509 #define C_03106C_DED 0xFFFFBFFF 14510 #define S_03106C_RELEASE_ALL(x) (((unsigned)(x) & 0x1) << 15) 14511 #define G_03106C_RELEASE_ALL(x) (((x) >> 15) & 0x1) 14512 #define C_03106C_RELEASE_ALL 0xFFFF7FFF 14513 #define S_03106C_HEAD_QUEUE_GFX7(x) (((unsigned)(x) & 0x7FF) << 16) /* gfx7, gfx8, >= gfx10 */ 14514 #define G_03106C_HEAD_QUEUE_GFX7(x) (((x) >> 16) & 0x7FF) 14515 #define C_03106C_HEAD_QUEUE_GFX7 0xF800FFFF 14516 #define S_03106C_HEAD_QUEUE_GFX81(x) (((unsigned)(x) & 0xFFF) << 16) /* gfx81, gfx9 */ 14517 #define G_03106C_HEAD_QUEUE_GFX81(x) (((x) >> 16) & 0xFFF) 14518 #define C_03106C_HEAD_QUEUE_GFX81 0xF000FFFF 14519 #define S_03106C_HEAD_VALID_GFX7(x) (((unsigned)(x) & 0x1) << 27) /* gfx7, gfx8, >= gfx10 */ 14520 #define G_03106C_HEAD_VALID_GFX7(x) (((x) >> 27) & 0x1) 14521 #define C_03106C_HEAD_VALID_GFX7 0xF7FFFFFF 14522 #define S_03106C_HEAD_FLAG_GFX7(x) (((unsigned)(x) & 0x1) << 28) /* gfx7, gfx8, >= gfx10 */ 14523 #define G_03106C_HEAD_FLAG_GFX7(x) (((x) >> 28) & 0x1) 14524 #define C_03106C_HEAD_FLAG_GFX7 0xEFFFFFFF 14525 #define S_03106C_HEAD_VALID_GFX81(x) (((unsigned)(x) & 0x1) << 28) /* gfx81, gfx9 */ 14526 #define G_03106C_HEAD_VALID_GFX81(x) (((x) >> 28) & 0x1) 14527 #define C_03106C_HEAD_VALID_GFX81 0xEFFFFFFF 14528 #define S_03106C_HALTED_GFX10(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx10 */ 14529 #define G_03106C_HALTED_GFX10(x) (((x) >> 29) & 0x1) 14530 #define C_03106C_HALTED_GFX10 0xDFFFFFFF 14531 #define S_03106C_HEAD_FLAG_GFX81(x) (((unsigned)(x) & 0x1) << 29) /* gfx81, gfx9 */ 14532 #define G_03106C_HEAD_FLAG_GFX81(x) (((x) >> 29) & 0x1) 14533 #define C_03106C_HEAD_FLAG_GFX81 0xDFFFFFFF 14534 #define S_03106C_UNUSED1_GFX7(x) (((unsigned)(x) & 0x7) << 29) /* gfx7, gfx8 */ 14535 #define G_03106C_UNUSED1_GFX7(x) (((x) >> 29) & 0x7) 14536 #define C_03106C_UNUSED1_GFX7 0x1FFFFFFF 14537 #define S_03106C_HALTED_GFX9(x) (((unsigned)(x) & 0x1) << 30) /* gfx9 */ 14538 #define G_03106C_HALTED_GFX9(x) (((x) >> 30) & 0x1) 14539 #define C_03106C_HALTED_GFX9 0xBFFFFFFF 14540 #define S_03106C_HEAD_QUEUE1(x) (((unsigned)(x) & 0x1) << 30) /* >= gfx103 */ 14541 #define G_03106C_HEAD_QUEUE1(x) (((x) >> 30) & 0x1) 14542 #define C_03106C_HEAD_QUEUE1 0xBFFFFFFF 14543 #define S_03106C_UNUSED1_GFX81(x) (((unsigned)(x) & 0x3) << 30) /* gfx81, gfx10 */ 14544 #define G_03106C_UNUSED1_GFX81(x) (((x) >> 30) & 0x3) 14545 #define C_03106C_UNUSED1_GFX81 0x3FFFFFFF 14546 #define S_03106C_UNUSED1_GFX9(x) (((unsigned)(x) & 0x1) << 31) /* gfx9, >= gfx103 */ 14547 #define G_03106C_UNUSED1_GFX9(x) (((x) >> 31) & 0x1) 14548 #define C_03106C_UNUSED1_GFX9 0x7FFFFFFF 14549 #define R_031070_GDS_GWS_RESOURCE_CNT 0x031070 /* >= gfx7 */ 14550 #define S_031070_RESOURCE_CNT(x) (((unsigned)(x) & 0xFFFF) << 0) 14551 #define G_031070_RESOURCE_CNT(x) (((x) >> 0) & 0xFFFF) 14552 #define C_031070_RESOURCE_CNT 0xFFFF0000 14553 #define S_031070_UNUSED(x) (((unsigned)(x) & 0xFFFF) << 16) 14554 #define G_031070_UNUSED(x) (((x) >> 16) & 0xFFFF) 14555 #define C_031070_UNUSED 0x0000FFFF 14556 #define R_031074_GDS_OA_CNTL 0x031074 /* >= gfx7 */ 14557 #define S_031074_INDEX(x) (((unsigned)(x) & 0xF) << 0) 14558 #define G_031074_INDEX(x) (((x) >> 0) & 0xF) 14559 #define C_031074_INDEX 0xFFFFFFF0 14560 #define S_031074_UNUSED(x) (((unsigned)(x) & 0xFFFFFFF) << 4) 14561 #define G_031074_UNUSED(x) (((x) >> 4) & 0xFFFFFFF) 14562 #define C_031074_UNUSED 0x0000000F 14563 #define R_031078_GDS_OA_COUNTER 0x031078 /* >= gfx7 */ 14564 #define R_03107C_GDS_OA_ADDRESS 0x03107C /* >= gfx7 */ 14565 #define S_03107C_DS_ADDRESS(x) (((unsigned)(x) & 0xFFFF) << 0) 14566 #define G_03107C_DS_ADDRESS(x) (((x) >> 0) & 0xFFFF) 14567 #define C_03107C_DS_ADDRESS 0xFFFF0000 14568 #define S_03107C_CRAWLER_GFX8(x) (((unsigned)(x) & 0xF) << 16) /* gfx8, gfx81, gfx9 */ 14569 #define G_03107C_CRAWLER_GFX8(x) (((x) >> 16) & 0xF) 14570 #define C_03107C_CRAWLER_GFX8 0xFFF0FFFF 14571 #define S_03107C_CRAWLER_TYPE_GFX7(x) (((unsigned)(x) & 0xF) << 16) /* gfx7, >= gfx10 */ 14572 #define G_03107C_CRAWLER_TYPE_GFX7(x) (((x) >> 16) & 0xF) 14573 #define C_03107C_CRAWLER_TYPE_GFX7 0xFFF0FFFF 14574 #define S_03107C_CRAWLER_GFX7(x) (((unsigned)(x) & 0xF) << 20) /* gfx7, >= gfx10 */ 14575 #define G_03107C_CRAWLER_GFX7(x) (((x) >> 20) & 0xF) 14576 #define C_03107C_CRAWLER_GFX7 0xFF0FFFFF 14577 #define S_03107C_CRAWLER_TYPE_GFX8(x) (((unsigned)(x) & 0x3) << 20) /* gfx8, gfx81, gfx9 */ 14578 #define G_03107C_CRAWLER_TYPE_GFX8(x) (((x) >> 20) & 0x3) 14579 #define C_03107C_CRAWLER_TYPE_GFX8 0xFFCFFFFF 14580 #define S_03107C_UNUSED_GFX8(x) (((unsigned)(x) & 0xFF) << 22) /* gfx8, gfx81, gfx9 */ 14581 #define G_03107C_UNUSED_GFX8(x) (((x) >> 22) & 0xFF) 14582 #define C_03107C_UNUSED_GFX8 0xC03FFFFF 14583 #define S_03107C_UNUSED_GFX7(x) (((unsigned)(x) & 0x3F) << 24) /* gfx7, >= gfx10 */ 14584 #define G_03107C_UNUSED_GFX7(x) (((x) >> 24) & 0x3F) 14585 #define C_03107C_UNUSED_GFX7 0xC0FFFFFF 14586 #define S_03107C_NO_ALLOC(x) (((unsigned)(x) & 0x1) << 30) 14587 #define G_03107C_NO_ALLOC(x) (((x) >> 30) & 0x1) 14588 #define C_03107C_NO_ALLOC 0xBFFFFFFF 14589 #define S_03107C_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 14590 #define G_03107C_ENABLE(x) (((x) >> 31) & 0x1) 14591 #define C_03107C_ENABLE 0x7FFFFFFF 14592 #define R_031080_GDS_OA_INCDEC 0x031080 /* >= gfx7 */ 14593 #define S_031080_VALUE(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 14594 #define G_031080_VALUE(x) (((x) >> 0) & 0x7FFFFFFF) 14595 #define C_031080_VALUE 0x80000000 14596 #define S_031080_INCDEC(x) (((unsigned)(x) & 0x1) << 31) 14597 #define G_031080_INCDEC(x) (((x) >> 31) & 0x1) 14598 #define C_031080_INCDEC 0x7FFFFFFF 14599 #define R_031084_GDS_OA_RING_SIZE 0x031084 /* >= gfx7 */ 14600 #define R_031100_SPI_CONFIG_CNTL 0x031100 /* gfx9 */ 14601 #define S_031100_GPR_WRITE_PRIORITY(x) (((unsigned)(x) & 0x1FFFFF) << 0) 14602 #define G_031100_GPR_WRITE_PRIORITY(x) (((x) >> 0) & 0x1FFFFF) 14603 #define C_031100_GPR_WRITE_PRIORITY 0xFFE00000 14604 #define S_031100_EXP_PRIORITY_ORDER(x) (((unsigned)(x) & 0x7) << 21) 14605 #define G_031100_EXP_PRIORITY_ORDER(x) (((x) >> 21) & 0x7) 14606 #define C_031100_EXP_PRIORITY_ORDER 0xFF1FFFFF 14607 #define S_031100_ENABLE_SQG_TOP_EVENTS(x) (((unsigned)(x) & 0x1) << 24) 14608 #define G_031100_ENABLE_SQG_TOP_EVENTS(x) (((x) >> 24) & 0x1) 14609 #define C_031100_ENABLE_SQG_TOP_EVENTS 0xFEFFFFFF 14610 #define S_031100_ENABLE_SQG_BOP_EVENTS(x) (((unsigned)(x) & 0x1) << 25) 14611 #define G_031100_ENABLE_SQG_BOP_EVENTS(x) (((x) >> 25) & 0x1) 14612 #define C_031100_ENABLE_SQG_BOP_EVENTS 0xFDFFFFFF 14613 #define S_031100_RSRC_MGMT_RESET(x) (((unsigned)(x) & 0x1) << 26) 14614 #define G_031100_RSRC_MGMT_RESET(x) (((x) >> 26) & 0x1) 14615 #define C_031100_RSRC_MGMT_RESET 0xFBFFFFFF 14616 #define S_031100_TTRACE_STALL_ALL(x) (((unsigned)(x) & 0x1) << 27) 14617 #define G_031100_TTRACE_STALL_ALL(x) (((x) >> 27) & 0x1) 14618 #define C_031100_TTRACE_STALL_ALL 0xF7FFFFFF 14619 #define S_031100_ALLOC_ARB_LRU_ENA(x) (((unsigned)(x) & 0x1) << 28) 14620 #define G_031100_ALLOC_ARB_LRU_ENA(x) (((x) >> 28) & 0x1) 14621 #define C_031100_ALLOC_ARB_LRU_ENA 0xEFFFFFFF 14622 #define S_031100_EXP_ARB_LRU_ENA(x) (((unsigned)(x) & 0x1) << 29) 14623 #define G_031100_EXP_ARB_LRU_ENA(x) (((x) >> 29) & 0x1) 14624 #define C_031100_EXP_ARB_LRU_ENA 0xDFFFFFFF 14625 #define S_031100_PS_PKR_PRIORITY_CNTL(x) (((unsigned)(x) & 0x3) << 30) 14626 #define G_031100_PS_PKR_PRIORITY_CNTL(x) (((x) >> 30) & 0x3) 14627 #define C_031100_PS_PKR_PRIORITY_CNTL 0x3FFFFFFF 14628 #define R_031100_SPI_CONFIG_CNTL_REMAP 0x031100 /* >= gfx10 */ 14629 #define R_031104_SPI_CONFIG_CNTL_1 0x031104 /* gfx9 */ 14630 #define S_031104_VTX_DONE_DELAY(x) (((unsigned)(x) & 0xF) << 0) 14631 #define G_031104_VTX_DONE_DELAY(x) (((x) >> 0) & 0xF) 14632 #define C_031104_VTX_DONE_DELAY 0xFFFFFFF0 14633 #define S_031104_INTERP_ONE_PRIM_PER_ROW(x) (((unsigned)(x) & 0x1) << 4) 14634 #define G_031104_INTERP_ONE_PRIM_PER_ROW(x) (((x) >> 4) & 0x1) 14635 #define C_031104_INTERP_ONE_PRIM_PER_ROW 0xFFFFFFEF 14636 #define S_031104_BATON_RESET_DISABLE(x) (((unsigned)(x) & 0x1) << 5) 14637 #define G_031104_BATON_RESET_DISABLE(x) (((x) >> 5) & 0x1) 14638 #define C_031104_BATON_RESET_DISABLE 0xFFFFFFDF 14639 #define S_031104_PC_LIMIT_ENABLE(x) (((unsigned)(x) & 0x1) << 6) 14640 #define G_031104_PC_LIMIT_ENABLE(x) (((x) >> 6) & 0x1) 14641 #define C_031104_PC_LIMIT_ENABLE 0xFFFFFFBF 14642 #define S_031104_PC_LIMIT_STRICT(x) (((unsigned)(x) & 0x1) << 7) 14643 #define G_031104_PC_LIMIT_STRICT(x) (((x) >> 7) & 0x1) 14644 #define C_031104_PC_LIMIT_STRICT 0xFFFFFF7F 14645 #define S_031104_CRC_SIMD_ID_WADDR_DISABLE(x) (((unsigned)(x) & 0x1) << 8) 14646 #define G_031104_CRC_SIMD_ID_WADDR_DISABLE(x) (((x) >> 8) & 0x1) 14647 #define C_031104_CRC_SIMD_ID_WADDR_DISABLE 0xFFFFFEFF 14648 #define S_031104_LBPW_CU_CHK_MODE(x) (((unsigned)(x) & 0x1) << 9) 14649 #define G_031104_LBPW_CU_CHK_MODE(x) (((x) >> 9) & 0x1) 14650 #define C_031104_LBPW_CU_CHK_MODE 0xFFFFFDFF 14651 #define S_031104_LBPW_CU_CHK_CNT(x) (((unsigned)(x) & 0xF) << 10) 14652 #define G_031104_LBPW_CU_CHK_CNT(x) (((x) >> 10) & 0xF) 14653 #define C_031104_LBPW_CU_CHK_CNT 0xFFFFC3FF 14654 #define S_031104_CSC_PWR_SAVE_DISABLE(x) (((unsigned)(x) & 0x1) << 14) 14655 #define G_031104_CSC_PWR_SAVE_DISABLE(x) (((x) >> 14) & 0x1) 14656 #define C_031104_CSC_PWR_SAVE_DISABLE 0xFFFFBFFF 14657 #define S_031104_CSG_PWR_SAVE_DISABLE(x) (((unsigned)(x) & 0x1) << 15) 14658 #define G_031104_CSG_PWR_SAVE_DISABLE(x) (((x) >> 15) & 0x1) 14659 #define C_031104_CSG_PWR_SAVE_DISABLE 0xFFFF7FFF 14660 #define S_031104_PC_LIMIT_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) 14661 #define G_031104_PC_LIMIT_SIZE(x) (((x) >> 16) & 0xFFFF) 14662 #define C_031104_PC_LIMIT_SIZE 0x0000FFFF 14663 #define R_031104_SPI_CONFIG_CNTL_1_REMAP 0x031104 /* >= gfx10 */ 14664 #define R_031108_SPI_CONFIG_CNTL_2 0x031108 /* gfx9 */ 14665 #define S_031108_CONTEXT_SAVE_WAIT_GDS_REQUEST_CYCLE_OVHD(x) (((unsigned)(x) & 0xF) << 0) 14666 #define G_031108_CONTEXT_SAVE_WAIT_GDS_REQUEST_CYCLE_OVHD(x) (((x) >> 0) & 0xF) 14667 #define C_031108_CONTEXT_SAVE_WAIT_GDS_REQUEST_CYCLE_OVHD 0xFFFFFFF0 14668 #define S_031108_CONTEXT_SAVE_WAIT_GDS_GRANT_CYCLE_OVHD(x) (((unsigned)(x) & 0xF) << 4) 14669 #define G_031108_CONTEXT_SAVE_WAIT_GDS_GRANT_CYCLE_OVHD(x) (((x) >> 4) & 0xF) 14670 #define C_031108_CONTEXT_SAVE_WAIT_GDS_GRANT_CYCLE_OVHD 0xFFFFFF0F 14671 #define R_031108_SPI_CONFIG_CNTL_2_REMAP 0x031108 /* >= gfx10 */ 14672 #define R_03110C_SPI_WAVE_LIMIT_CNTL 0x03110C /* gfx9 */ 14673 #define S_03110C_PS_WAVE_GRAN(x) (((unsigned)(x) & 0x3) << 0) 14674 #define G_03110C_PS_WAVE_GRAN(x) (((x) >> 0) & 0x3) 14675 #define C_03110C_PS_WAVE_GRAN 0xFFFFFFFC 14676 #define S_03110C_VS_WAVE_GRAN(x) (((unsigned)(x) & 0x3) << 2) 14677 #define G_03110C_VS_WAVE_GRAN(x) (((x) >> 2) & 0x3) 14678 #define C_03110C_VS_WAVE_GRAN 0xFFFFFFF3 14679 #define S_03110C_GS_WAVE_GRAN(x) (((unsigned)(x) & 0x3) << 4) 14680 #define G_03110C_GS_WAVE_GRAN(x) (((x) >> 4) & 0x3) 14681 #define C_03110C_GS_WAVE_GRAN 0xFFFFFFCF 14682 #define S_03110C_HS_WAVE_GRAN(x) (((unsigned)(x) & 0x3) << 6) 14683 #define G_03110C_HS_WAVE_GRAN(x) (((x) >> 6) & 0x3) 14684 #define C_03110C_HS_WAVE_GRAN 0xFFFFFF3F 14685 #define R_03110C_SPI_WAVE_LIMIT_CNTL_REMAP 0x03110C /* >= gfx10 */ 14686 #define R_034000_CPG_PERFCOUNTER1_LO 0x034000 /* >= gfx7 */ 14687 #define R_034004_CPG_PERFCOUNTER1_HI 0x034004 /* >= gfx7 */ 14688 #define R_034008_CPG_PERFCOUNTER0_LO 0x034008 /* >= gfx7 */ 14689 #define R_03400C_CPG_PERFCOUNTER0_HI 0x03400C /* >= gfx7 */ 14690 #define R_034010_CPC_PERFCOUNTER1_LO 0x034010 /* >= gfx7 */ 14691 #define R_034014_CPC_PERFCOUNTER1_HI 0x034014 /* >= gfx7 */ 14692 #define R_034018_CPC_PERFCOUNTER0_LO 0x034018 /* >= gfx7 */ 14693 #define R_03401C_CPC_PERFCOUNTER0_HI 0x03401C /* >= gfx7 */ 14694 #define R_034020_CPF_PERFCOUNTER1_LO 0x034020 /* >= gfx7 */ 14695 #define R_034024_CPF_PERFCOUNTER1_HI 0x034024 /* >= gfx7 */ 14696 #define R_034028_CPF_PERFCOUNTER0_LO 0x034028 /* >= gfx7 */ 14697 #define R_03402C_CPF_PERFCOUNTER0_HI 0x03402C /* >= gfx7 */ 14698 #define R_034030_CPF_LATENCY_STATS_DATA 0x034030 /* >= gfx9 */ 14699 #define R_034034_CPG_LATENCY_STATS_DATA 0x034034 /* >= gfx9 */ 14700 #define R_034038_CPC_LATENCY_STATS_DATA 0x034038 /* >= gfx9 */ 14701 #define R_034100_GRBM_PERFCOUNTER0_LO 0x034100 /* >= gfx7 */ 14702 #define R_034104_GRBM_PERFCOUNTER0_HI 0x034104 /* >= gfx7 */ 14703 #define R_03410C_GRBM_PERFCOUNTER1_LO 0x03410C /* >= gfx7 */ 14704 #define R_034110_GRBM_PERFCOUNTER1_HI 0x034110 /* >= gfx7 */ 14705 #define R_034114_GRBM_SE0_PERFCOUNTER_LO 0x034114 /* >= gfx7 */ 14706 #define R_034118_GRBM_SE0_PERFCOUNTER_HI 0x034118 /* >= gfx7 */ 14707 #define R_03411C_GRBM_SE1_PERFCOUNTER_LO 0x03411C /* >= gfx7 */ 14708 #define R_034120_GRBM_SE1_PERFCOUNTER_HI 0x034120 /* >= gfx7 */ 14709 #define R_034124_GRBM_SE2_PERFCOUNTER_LO 0x034124 /* >= gfx7 */ 14710 #define R_034128_GRBM_SE2_PERFCOUNTER_HI 0x034128 /* >= gfx7 */ 14711 #define R_03412C_GRBM_SE3_PERFCOUNTER_LO 0x03412C /* >= gfx7 */ 14712 #define R_034130_GRBM_SE3_PERFCOUNTER_HI 0x034130 /* >= gfx7 */ 14713 #define R_034200_GE_PERFCOUNTER0_LO 0x034200 /* gfx10 */ 14714 #define R_034200_WD_PERFCOUNTER0_LO 0x034200 /* gfx7, gfx8, gfx81, gfx9 */ 14715 #define R_034204_GE_PERFCOUNTER0_HI 0x034204 /* gfx10 */ 14716 #define R_034204_WD_PERFCOUNTER0_HI 0x034204 /* gfx7, gfx8, gfx81, gfx9 */ 14717 #define R_034208_GE_PERFCOUNTER1_LO 0x034208 /* gfx10 */ 14718 #define R_034208_WD_PERFCOUNTER1_LO 0x034208 /* gfx7, gfx8, gfx81, gfx9 */ 14719 #define R_03420C_GE_PERFCOUNTER1_HI 0x03420C /* gfx10 */ 14720 #define R_03420C_WD_PERFCOUNTER1_HI 0x03420C /* gfx7, gfx8, gfx81, gfx9 */ 14721 #define R_034210_GE_PERFCOUNTER2_LO 0x034210 /* gfx10 */ 14722 #define R_034210_WD_PERFCOUNTER2_LO 0x034210 /* gfx7, gfx8, gfx81, gfx9 */ 14723 #define R_034214_GE_PERFCOUNTER2_HI 0x034214 /* gfx10 */ 14724 #define R_034214_WD_PERFCOUNTER2_HI 0x034214 /* gfx7, gfx8, gfx81, gfx9 */ 14725 #define R_034218_GE_PERFCOUNTER3_LO 0x034218 /* gfx10 */ 14726 #define R_034218_WD_PERFCOUNTER3_LO 0x034218 /* gfx7, gfx8, gfx81, gfx9 */ 14727 #define R_03421C_GE_PERFCOUNTER3_HI 0x03421C /* gfx10 */ 14728 #define R_03421C_WD_PERFCOUNTER3_HI 0x03421C /* gfx7, gfx8, gfx81, gfx9 */ 14729 #define R_034220_GE_PERFCOUNTER4_LO 0x034220 /* gfx10 */ 14730 #define R_034220_IA_PERFCOUNTER0_LO 0x034220 /* gfx7, gfx8, gfx81, gfx9 */ 14731 #define R_034224_GE_PERFCOUNTER4_HI 0x034224 /* gfx10 */ 14732 #define R_034224_IA_PERFCOUNTER0_HI 0x034224 /* gfx7, gfx8, gfx81, gfx9 */ 14733 #define R_034228_GE_PERFCOUNTER5_LO 0x034228 /* gfx10 */ 14734 #define R_034228_IA_PERFCOUNTER1_LO 0x034228 /* gfx7, gfx8, gfx81, gfx9 */ 14735 #define R_03422C_GE_PERFCOUNTER5_HI 0x03422C /* gfx10 */ 14736 #define R_03422C_IA_PERFCOUNTER1_HI 0x03422C /* gfx7, gfx8, gfx81, gfx9 */ 14737 #define R_034230_GE_PERFCOUNTER6_LO 0x034230 /* gfx10 */ 14738 #define R_034230_IA_PERFCOUNTER2_LO 0x034230 /* gfx7, gfx8, gfx81, gfx9 */ 14739 #define R_034234_GE_PERFCOUNTER6_HI 0x034234 /* gfx10 */ 14740 #define R_034234_IA_PERFCOUNTER2_HI 0x034234 /* gfx7, gfx8, gfx81, gfx9 */ 14741 #define R_034238_GE_PERFCOUNTER7_LO 0x034238 /* gfx10 */ 14742 #define R_034238_IA_PERFCOUNTER3_LO 0x034238 /* gfx7, gfx8, gfx81, gfx9 */ 14743 #define R_03423C_GE_PERFCOUNTER7_HI 0x03423C /* gfx10 */ 14744 #define R_03423C_IA_PERFCOUNTER3_HI 0x03423C /* gfx7, gfx8, gfx81, gfx9 */ 14745 #define R_034240_GE_PERFCOUNTER8_LO 0x034240 /* gfx10 */ 14746 #define R_034240_VGT_PERFCOUNTER0_LO 0x034240 /* gfx7, gfx8, gfx81, gfx9 */ 14747 #define R_034244_GE_PERFCOUNTER8_HI 0x034244 /* gfx10 */ 14748 #define R_034244_VGT_PERFCOUNTER0_HI 0x034244 /* gfx7, gfx8, gfx81, gfx9 */ 14749 #define R_034248_GE_PERFCOUNTER9_LO 0x034248 /* gfx10 */ 14750 #define R_034248_VGT_PERFCOUNTER1_LO 0x034248 /* gfx7, gfx8, gfx81, gfx9 */ 14751 #define R_03424C_GE_PERFCOUNTER9_HI 0x03424C /* gfx10 */ 14752 #define R_03424C_VGT_PERFCOUNTER1_HI 0x03424C /* gfx7, gfx8, gfx81, gfx9 */ 14753 #define R_034250_GE_PERFCOUNTER10_LO 0x034250 /* gfx10 */ 14754 #define R_034250_VGT_PERFCOUNTER2_LO 0x034250 /* gfx7, gfx8, gfx81, gfx9 */ 14755 #define R_034254_GE_PERFCOUNTER10_HI 0x034254 /* gfx10 */ 14756 #define R_034254_VGT_PERFCOUNTER2_HI 0x034254 /* gfx7, gfx8, gfx81, gfx9 */ 14757 #define R_034258_GE_PERFCOUNTER11_LO 0x034258 /* gfx10 */ 14758 #define R_034258_VGT_PERFCOUNTER3_LO 0x034258 /* gfx7, gfx8, gfx81, gfx9 */ 14759 #define R_03425C_GE_PERFCOUNTER11_HI 0x03425C /* gfx10 */ 14760 #define R_03425C_VGT_PERFCOUNTER3_HI 0x03425C /* gfx7, gfx8, gfx81, gfx9 */ 14761 #define R_034290_GE1_PERFCOUNTER0_LO 0x034290 /* >= gfx103 */ 14762 #define R_034294_GE1_PERFCOUNTER0_HI 0x034294 /* >= gfx103 */ 14763 #define R_034298_GE1_PERFCOUNTER1_LO 0x034298 /* >= gfx103 */ 14764 #define R_03429C_GE1_PERFCOUNTER1_HI 0x03429C /* >= gfx103 */ 14765 #define R_0342A0_GE1_PERFCOUNTER2_LO 0x0342A0 /* >= gfx103 */ 14766 #define R_0342A4_GE1_PERFCOUNTER2_HI 0x0342A4 /* >= gfx103 */ 14767 #define R_0342A8_GE1_PERFCOUNTER3_LO 0x0342A8 /* >= gfx103 */ 14768 #define R_0342AC_GE1_PERFCOUNTER3_HI 0x0342AC /* >= gfx103 */ 14769 #define R_0342B0_GE2_DIST_PERFCOUNTER0_LO 0x0342B0 /* >= gfx103 */ 14770 #define R_0342B4_GE2_DIST_PERFCOUNTER0_HI 0x0342B4 /* >= gfx103 */ 14771 #define R_0342B8_GE2_DIST_PERFCOUNTER1_LO 0x0342B8 /* >= gfx103 */ 14772 #define R_0342BC_GE2_DIST_PERFCOUNTER1_HI 0x0342BC /* >= gfx103 */ 14773 #define R_0342C0_GE2_DIST_PERFCOUNTER2_LO 0x0342C0 /* >= gfx103 */ 14774 #define R_0342C4_GE2_DIST_PERFCOUNTER2_HI 0x0342C4 /* >= gfx103 */ 14775 #define R_0342C8_GE2_DIST_PERFCOUNTER3_LO 0x0342C8 /* >= gfx103 */ 14776 #define R_0342CC_GE2_DIST_PERFCOUNTER3_HI 0x0342CC /* >= gfx103 */ 14777 #define R_0342D0_GE2_SE_PERFCOUNTER0_LO 0x0342D0 /* >= gfx103 */ 14778 #define R_0342D4_GE2_SE_PERFCOUNTER0_HI 0x0342D4 /* >= gfx103 */ 14779 #define R_0342D8_GE2_SE_PERFCOUNTER1_LO 0x0342D8 /* >= gfx103 */ 14780 #define R_0342DC_GE2_SE_PERFCOUNTER1_HI 0x0342DC /* >= gfx103 */ 14781 #define R_0342E0_GE2_SE_PERFCOUNTER2_LO 0x0342E0 /* >= gfx103 */ 14782 #define R_0342E4_GE2_SE_PERFCOUNTER2_HI 0x0342E4 /* >= gfx103 */ 14783 #define R_0342E8_GE2_SE_PERFCOUNTER3_LO 0x0342E8 /* >= gfx103 */ 14784 #define R_0342EC_GE2_SE_PERFCOUNTER3_HI 0x0342EC /* >= gfx103 */ 14785 #define R_034400_PA_SU_PERFCOUNTER0_LO 0x034400 /* >= gfx7 */ 14786 #define R_034404_PA_SU_PERFCOUNTER0_HI 0x034404 /* >= gfx7 */ 14787 #define S_034404_PERFCOUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 14788 #define G_034404_PERFCOUNTER_HI(x) (((x) >> 0) & 0xFFFF) 14789 #define C_034404_PERFCOUNTER_HI 0xFFFF0000 14790 #define R_034408_PA_SU_PERFCOUNTER1_LO 0x034408 /* >= gfx7 */ 14791 #define R_03440C_PA_SU_PERFCOUNTER1_HI 0x03440C /* >= gfx7 */ 14792 #define R_034410_PA_SU_PERFCOUNTER2_LO 0x034410 /* >= gfx7 */ 14793 #define R_034414_PA_SU_PERFCOUNTER2_HI 0x034414 /* >= gfx7 */ 14794 #define R_034418_PA_SU_PERFCOUNTER3_LO 0x034418 /* >= gfx7 */ 14795 #define R_03441C_PA_SU_PERFCOUNTER3_HI 0x03441C /* >= gfx7 */ 14796 #define R_034500_PA_SC_PERFCOUNTER0_LO 0x034500 /* >= gfx7 */ 14797 #define R_034504_PA_SC_PERFCOUNTER0_HI 0x034504 /* >= gfx7 */ 14798 #define R_034508_PA_SC_PERFCOUNTER1_LO 0x034508 /* >= gfx7 */ 14799 #define R_03450C_PA_SC_PERFCOUNTER1_HI 0x03450C /* >= gfx7 */ 14800 #define R_034510_PA_SC_PERFCOUNTER2_LO 0x034510 /* >= gfx7 */ 14801 #define R_034514_PA_SC_PERFCOUNTER2_HI 0x034514 /* >= gfx7 */ 14802 #define R_034518_PA_SC_PERFCOUNTER3_LO 0x034518 /* >= gfx7 */ 14803 #define R_03451C_PA_SC_PERFCOUNTER3_HI 0x03451C /* >= gfx7 */ 14804 #define R_034520_PA_SC_PERFCOUNTER4_LO 0x034520 /* >= gfx7 */ 14805 #define R_034524_PA_SC_PERFCOUNTER4_HI 0x034524 /* >= gfx7 */ 14806 #define R_034528_PA_SC_PERFCOUNTER5_LO 0x034528 /* >= gfx7 */ 14807 #define R_03452C_PA_SC_PERFCOUNTER5_HI 0x03452C /* >= gfx7 */ 14808 #define R_034530_PA_SC_PERFCOUNTER6_LO 0x034530 /* >= gfx7 */ 14809 #define R_034534_PA_SC_PERFCOUNTER6_HI 0x034534 /* >= gfx7 */ 14810 #define R_034538_PA_SC_PERFCOUNTER7_LO 0x034538 /* >= gfx7 */ 14811 #define R_03453C_PA_SC_PERFCOUNTER7_HI 0x03453C /* >= gfx7 */ 14812 #define R_034600_SPI_PERFCOUNTER0_HI 0x034600 /* >= gfx7 */ 14813 #define R_034604_SPI_PERFCOUNTER0_LO 0x034604 /* >= gfx7 */ 14814 #define R_034608_SPI_PERFCOUNTER1_HI 0x034608 /* >= gfx7 */ 14815 #define R_03460C_SPI_PERFCOUNTER1_LO 0x03460C /* >= gfx7 */ 14816 #define R_034610_SPI_PERFCOUNTER2_HI 0x034610 /* >= gfx7 */ 14817 #define R_034614_SPI_PERFCOUNTER2_LO 0x034614 /* >= gfx7 */ 14818 #define R_034618_SPI_PERFCOUNTER3_HI 0x034618 /* >= gfx7 */ 14819 #define R_03461C_SPI_PERFCOUNTER3_LO 0x03461C /* >= gfx7 */ 14820 #define R_034620_SPI_PERFCOUNTER4_HI 0x034620 /* >= gfx7 */ 14821 #define R_034624_SPI_PERFCOUNTER4_LO 0x034624 /* >= gfx7 */ 14822 #define R_034628_SPI_PERFCOUNTER5_HI 0x034628 /* >= gfx7 */ 14823 #define R_03462C_SPI_PERFCOUNTER5_LO 0x03462C /* >= gfx7 */ 14824 #define R_034700_SQ_PERFCOUNTER0_LO 0x034700 /* >= gfx7 */ 14825 #define R_034704_SQ_PERFCOUNTER0_HI 0x034704 /* >= gfx7 */ 14826 #define R_034708_SQ_PERFCOUNTER1_LO 0x034708 /* >= gfx7 */ 14827 #define R_03470C_SQ_PERFCOUNTER1_HI 0x03470C /* >= gfx7 */ 14828 #define R_034710_SQ_PERFCOUNTER2_LO 0x034710 /* >= gfx7 */ 14829 #define R_034714_SQ_PERFCOUNTER2_HI 0x034714 /* >= gfx7 */ 14830 #define R_034718_SQ_PERFCOUNTER3_LO 0x034718 /* >= gfx7 */ 14831 #define R_03471C_SQ_PERFCOUNTER3_HI 0x03471C /* >= gfx7 */ 14832 #define R_034720_SQ_PERFCOUNTER4_LO 0x034720 /* >= gfx7 */ 14833 #define R_034724_SQ_PERFCOUNTER4_HI 0x034724 /* >= gfx7 */ 14834 #define R_034728_SQ_PERFCOUNTER5_LO 0x034728 /* >= gfx7 */ 14835 #define R_03472C_SQ_PERFCOUNTER5_HI 0x03472C /* >= gfx7 */ 14836 #define R_034730_SQ_PERFCOUNTER6_LO 0x034730 /* >= gfx7 */ 14837 #define R_034734_SQ_PERFCOUNTER6_HI 0x034734 /* >= gfx7 */ 14838 #define R_034738_SQ_PERFCOUNTER7_LO 0x034738 /* >= gfx7 */ 14839 #define R_03473C_SQ_PERFCOUNTER7_HI 0x03473C /* >= gfx7 */ 14840 #define R_034740_SQ_PERFCOUNTER8_LO 0x034740 /* >= gfx7 */ 14841 #define R_034744_SQ_PERFCOUNTER8_HI 0x034744 /* >= gfx7 */ 14842 #define R_034748_SQ_PERFCOUNTER9_LO 0x034748 /* >= gfx7 */ 14843 #define R_03474C_SQ_PERFCOUNTER9_HI 0x03474C /* >= gfx7 */ 14844 #define R_034750_SQ_PERFCOUNTER10_LO 0x034750 /* >= gfx7 */ 14845 #define R_034754_SQ_PERFCOUNTER10_HI 0x034754 /* >= gfx7 */ 14846 #define R_034758_SQ_PERFCOUNTER11_LO 0x034758 /* >= gfx7 */ 14847 #define R_03475C_SQ_PERFCOUNTER11_HI 0x03475C /* >= gfx7 */ 14848 #define R_034760_SQ_PERFCOUNTER12_LO 0x034760 /* >= gfx7 */ 14849 #define R_034764_SQ_PERFCOUNTER12_HI 0x034764 /* >= gfx7 */ 14850 #define R_034768_SQ_PERFCOUNTER13_LO 0x034768 /* >= gfx7 */ 14851 #define R_03476C_SQ_PERFCOUNTER13_HI 0x03476C /* >= gfx7 */ 14852 #define R_034770_SQ_PERFCOUNTER14_LO 0x034770 /* >= gfx7 */ 14853 #define R_034774_SQ_PERFCOUNTER14_HI 0x034774 /* >= gfx7 */ 14854 #define R_034778_SQ_PERFCOUNTER15_LO 0x034778 /* >= gfx7 */ 14855 #define R_03477C_SQ_PERFCOUNTER15_HI 0x03477C /* >= gfx7 */ 14856 #define R_034900_SX_PERFCOUNTER0_LO 0x034900 /* >= gfx7 */ 14857 #define R_034904_SX_PERFCOUNTER0_HI 0x034904 /* >= gfx7 */ 14858 #define R_034908_SX_PERFCOUNTER1_LO 0x034908 /* >= gfx7 */ 14859 #define R_03490C_SX_PERFCOUNTER1_HI 0x03490C /* >= gfx7 */ 14860 #define R_034910_SX_PERFCOUNTER2_LO 0x034910 /* >= gfx7 */ 14861 #define R_034914_SX_PERFCOUNTER2_HI 0x034914 /* >= gfx7 */ 14862 #define R_034918_SX_PERFCOUNTER3_LO 0x034918 /* >= gfx7 */ 14863 #define R_03491C_SX_PERFCOUNTER3_HI 0x03491C /* >= gfx7 */ 14864 #define R_034980_GCEA_PERFCOUNTER2_LO 0x034980 /* >= gfx10 */ 14865 #define R_034984_GCEA_PERFCOUNTER2_HI 0x034984 /* >= gfx10 */ 14866 #define R_034988_GCEA_PERFCOUNTER_LO 0x034988 /* >= gfx103 */ 14867 #define R_03498C_GCEA_PERFCOUNTER_HI 0x03498C /* >= gfx103 */ 14868 #define S_03498C_COUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 14869 #define G_03498C_COUNTER_HI(x) (((x) >> 0) & 0xFFFF) 14870 #define C_03498C_COUNTER_HI 0xFFFF0000 14871 #define S_03498C_COMPARE_VALUE(x) (((unsigned)(x) & 0xFFFF) << 16) 14872 #define G_03498C_COMPARE_VALUE(x) (((x) >> 16) & 0xFFFF) 14873 #define C_03498C_COMPARE_VALUE 0x0000FFFF 14874 #define R_034A00_GDS_PERFCOUNTER0_LO 0x034A00 /* >= gfx7 */ 14875 #define R_034A04_GDS_PERFCOUNTER0_HI 0x034A04 /* >= gfx7 */ 14876 #define R_034A08_GDS_PERFCOUNTER1_LO 0x034A08 /* >= gfx7 */ 14877 #define R_034A0C_GDS_PERFCOUNTER1_HI 0x034A0C /* >= gfx7 */ 14878 #define R_034A10_GDS_PERFCOUNTER2_LO 0x034A10 /* >= gfx7 */ 14879 #define R_034A14_GDS_PERFCOUNTER2_HI 0x034A14 /* >= gfx7 */ 14880 #define R_034A18_GDS_PERFCOUNTER3_LO 0x034A18 /* >= gfx7 */ 14881 #define R_034A1C_GDS_PERFCOUNTER3_HI 0x034A1C /* >= gfx7 */ 14882 #define R_034B00_TA_PERFCOUNTER0_LO 0x034B00 /* >= gfx7 */ 14883 #define R_034B04_TA_PERFCOUNTER0_HI 0x034B04 /* >= gfx7 */ 14884 #define R_034B08_TA_PERFCOUNTER1_LO 0x034B08 /* >= gfx7 */ 14885 #define R_034B0C_TA_PERFCOUNTER1_HI 0x034B0C /* >= gfx7 */ 14886 #define R_034C00_TD_PERFCOUNTER0_LO 0x034C00 /* >= gfx7 */ 14887 #define R_034C04_TD_PERFCOUNTER0_HI 0x034C04 /* >= gfx7 */ 14888 #define R_034C08_TD_PERFCOUNTER1_LO 0x034C08 /* >= gfx7 */ 14889 #define R_034C0C_TD_PERFCOUNTER1_HI 0x034C0C /* >= gfx7 */ 14890 #define R_034D00_TCP_PERFCOUNTER0_LO 0x034D00 /* >= gfx7 */ 14891 #define R_034D04_TCP_PERFCOUNTER0_HI 0x034D04 /* >= gfx7 */ 14892 #define R_034D08_TCP_PERFCOUNTER1_LO 0x034D08 /* >= gfx7 */ 14893 #define R_034D0C_TCP_PERFCOUNTER1_HI 0x034D0C /* >= gfx7 */ 14894 #define R_034D10_TCP_PERFCOUNTER2_LO 0x034D10 /* >= gfx7 */ 14895 #define R_034D14_TCP_PERFCOUNTER2_HI 0x034D14 /* >= gfx7 */ 14896 #define R_034D18_TCP_PERFCOUNTER3_LO 0x034D18 /* >= gfx7 */ 14897 #define R_034D1C_TCP_PERFCOUNTER3_HI 0x034D1C /* >= gfx7 */ 14898 #define R_034E00_GL2C_PERFCOUNTER0_LO 0x034E00 /* >= gfx10 */ 14899 #define R_034E00_TCC_PERFCOUNTER0_LO 0x034E00 /* gfx7, gfx8, gfx81, gfx9 */ 14900 #define R_034E04_GL2C_PERFCOUNTER0_HI 0x034E04 /* >= gfx10 */ 14901 #define R_034E04_TCC_PERFCOUNTER0_HI 0x034E04 /* gfx7, gfx8, gfx81, gfx9 */ 14902 #define R_034E08_GL2C_PERFCOUNTER1_LO 0x034E08 /* >= gfx10 */ 14903 #define R_034E08_TCC_PERFCOUNTER1_LO 0x034E08 /* gfx7, gfx8, gfx81, gfx9 */ 14904 #define R_034E0C_GL2C_PERFCOUNTER1_HI 0x034E0C /* >= gfx10 */ 14905 #define R_034E0C_TCC_PERFCOUNTER1_HI 0x034E0C /* gfx7, gfx8, gfx81, gfx9 */ 14906 #define R_034E10_GL2C_PERFCOUNTER2_LO 0x034E10 /* >= gfx10 */ 14907 #define R_034E10_TCC_PERFCOUNTER2_LO 0x034E10 /* gfx7, gfx8, gfx81, gfx9 */ 14908 #define R_034E14_GL2C_PERFCOUNTER2_HI 0x034E14 /* >= gfx10 */ 14909 #define R_034E14_TCC_PERFCOUNTER2_HI 0x034E14 /* gfx7, gfx8, gfx81, gfx9 */ 14910 #define R_034E18_GL2C_PERFCOUNTER3_LO 0x034E18 /* >= gfx10 */ 14911 #define R_034E18_TCC_PERFCOUNTER3_LO 0x034E18 /* gfx7, gfx8, gfx81, gfx9 */ 14912 #define R_034E1C_GL2C_PERFCOUNTER3_HI 0x034E1C /* >= gfx10 */ 14913 #define R_034E1C_TCC_PERFCOUNTER3_HI 0x034E1C /* gfx7, gfx8, gfx81, gfx9 */ 14914 #define R_034E40_GL2A_PERFCOUNTER0_LO 0x034E40 /* >= gfx10 */ 14915 #define R_034E40_TCA_PERFCOUNTER0_LO 0x034E40 /* gfx7, gfx8, gfx81, gfx9 */ 14916 #define R_034E44_GL2A_PERFCOUNTER0_HI 0x034E44 /* >= gfx10 */ 14917 #define R_034E44_TCA_PERFCOUNTER0_HI 0x034E44 /* gfx7, gfx8, gfx81, gfx9 */ 14918 #define R_034E48_GL2A_PERFCOUNTER1_LO 0x034E48 /* >= gfx10 */ 14919 #define R_034E48_TCA_PERFCOUNTER1_LO 0x034E48 /* gfx7, gfx8, gfx81, gfx9 */ 14920 #define R_034E4C_GL2A_PERFCOUNTER1_HI 0x034E4C /* >= gfx10 */ 14921 #define R_034E4C_TCA_PERFCOUNTER1_HI 0x034E4C /* gfx7, gfx8, gfx81, gfx9 */ 14922 #define R_034E50_GL2A_PERFCOUNTER2_LO 0x034E50 /* >= gfx10 */ 14923 #define R_034E50_TCA_PERFCOUNTER2_LO 0x034E50 /* gfx7, gfx8, gfx81, gfx9 */ 14924 #define R_034E54_GL2A_PERFCOUNTER2_HI 0x034E54 /* >= gfx10 */ 14925 #define R_034E54_TCA_PERFCOUNTER2_HI 0x034E54 /* gfx7, gfx8, gfx81, gfx9 */ 14926 #define R_034E58_GL2A_PERFCOUNTER3_LO 0x034E58 /* >= gfx10 */ 14927 #define R_034E58_TCA_PERFCOUNTER3_LO 0x034E58 /* gfx7, gfx8, gfx81, gfx9 */ 14928 #define R_034E5C_GL2A_PERFCOUNTER3_HI 0x034E5C /* >= gfx10 */ 14929 #define R_034E5C_TCA_PERFCOUNTER3_HI 0x034E5C /* gfx7, gfx8, gfx81, gfx9 */ 14930 #define R_034E80_GL1C_PERFCOUNTER0_LO 0x034E80 /* >= gfx10 */ 14931 #define R_034E80_TCS_PERFCOUNTER0_LO 0x034E80 /* gfx7 */ 14932 #define R_034E84_GL1C_PERFCOUNTER0_HI 0x034E84 /* >= gfx10 */ 14933 #define R_034E84_TCS_PERFCOUNTER0_HI 0x034E84 /* gfx7 */ 14934 #define R_034E88_GL1C_PERFCOUNTER1_LO 0x034E88 /* >= gfx10 */ 14935 #define R_034E88_TCS_PERFCOUNTER1_LO 0x034E88 /* gfx7 */ 14936 #define R_034E8C_GL1C_PERFCOUNTER1_HI 0x034E8C /* >= gfx10 */ 14937 #define R_034E8C_TCS_PERFCOUNTER1_HI 0x034E8C /* gfx7 */ 14938 #define R_034E90_GL1C_PERFCOUNTER2_LO 0x034E90 /* >= gfx10 */ 14939 #define R_034E90_TCS_PERFCOUNTER2_LO 0x034E90 /* gfx7 */ 14940 #define R_034E94_GL1C_PERFCOUNTER2_HI 0x034E94 /* >= gfx10 */ 14941 #define R_034E94_TCS_PERFCOUNTER2_HI 0x034E94 /* gfx7 */ 14942 #define R_034E98_GL1C_PERFCOUNTER3_LO 0x034E98 /* >= gfx10 */ 14943 #define R_034E98_TCS_PERFCOUNTER3_LO 0x034E98 /* gfx7 */ 14944 #define R_034E9C_GL1C_PERFCOUNTER3_HI 0x034E9C /* >= gfx10 */ 14945 #define R_034E9C_TCS_PERFCOUNTER3_HI 0x034E9C /* gfx7 */ 14946 #define R_034F00_CHC_PERFCOUNTER0_LO 0x034F00 /* >= gfx10 */ 14947 #define R_034F04_CHC_PERFCOUNTER0_HI 0x034F04 /* >= gfx10 */ 14948 #define R_034F08_CHC_PERFCOUNTER1_LO 0x034F08 /* >= gfx10 */ 14949 #define R_034F0C_CHC_PERFCOUNTER1_HI 0x034F0C /* >= gfx10 */ 14950 #define R_034F10_CHC_PERFCOUNTER2_LO 0x034F10 /* >= gfx10 */ 14951 #define R_034F14_CHC_PERFCOUNTER2_HI 0x034F14 /* >= gfx10 */ 14952 #define R_034F18_CHC_PERFCOUNTER3_LO 0x034F18 /* >= gfx10 */ 14953 #define R_034F1C_CHC_PERFCOUNTER3_HI 0x034F1C /* >= gfx10 */ 14954 #define R_034F20_CHCG_PERFCOUNTER0_LO 0x034F20 /* >= gfx10 */ 14955 #define R_034F24_CHCG_PERFCOUNTER0_HI 0x034F24 /* >= gfx10 */ 14956 #define R_034F28_CHCG_PERFCOUNTER1_LO 0x034F28 /* >= gfx10 */ 14957 #define R_034F2C_CHCG_PERFCOUNTER1_HI 0x034F2C /* >= gfx10 */ 14958 #define R_034F30_CHCG_PERFCOUNTER2_LO 0x034F30 /* >= gfx10 */ 14959 #define R_034F34_CHCG_PERFCOUNTER2_HI 0x034F34 /* >= gfx10 */ 14960 #define R_034F38_CHCG_PERFCOUNTER3_LO 0x034F38 /* >= gfx10 */ 14961 #define R_034F3C_CHCG_PERFCOUNTER3_HI 0x034F3C /* >= gfx10 */ 14962 #define R_035018_CB_PERFCOUNTER0_LO 0x035018 /* >= gfx7 */ 14963 #define R_03501C_CB_PERFCOUNTER0_HI 0x03501C /* >= gfx7 */ 14964 #define R_035020_CB_PERFCOUNTER1_LO 0x035020 /* >= gfx7 */ 14965 #define R_035024_CB_PERFCOUNTER1_HI 0x035024 /* >= gfx7 */ 14966 #define R_035028_CB_PERFCOUNTER2_LO 0x035028 /* >= gfx7 */ 14967 #define R_03502C_CB_PERFCOUNTER2_HI 0x03502C /* >= gfx7 */ 14968 #define R_035030_CB_PERFCOUNTER3_LO 0x035030 /* >= gfx7 */ 14969 #define R_035034_CB_PERFCOUNTER3_HI 0x035034 /* >= gfx7 */ 14970 #define R_035100_DB_PERFCOUNTER0_LO 0x035100 /* >= gfx7 */ 14971 #define R_035104_DB_PERFCOUNTER0_HI 0x035104 /* >= gfx7 */ 14972 #define R_035108_DB_PERFCOUNTER1_LO 0x035108 /* >= gfx7 */ 14973 #define R_03510C_DB_PERFCOUNTER1_HI 0x03510C /* >= gfx7 */ 14974 #define R_035110_DB_PERFCOUNTER2_LO 0x035110 /* >= gfx7 */ 14975 #define R_035114_DB_PERFCOUNTER2_HI 0x035114 /* >= gfx7 */ 14976 #define R_035118_DB_PERFCOUNTER3_LO 0x035118 /* >= gfx7 */ 14977 #define R_03511C_DB_PERFCOUNTER3_HI 0x03511C /* >= gfx7 */ 14978 #define R_035200_RLC_PERFCOUNTER0_LO 0x035200 /* >= gfx7 */ 14979 #define R_035204_RLC_PERFCOUNTER0_HI 0x035204 /* >= gfx7 */ 14980 #define R_035208_RLC_PERFCOUNTER1_LO 0x035208 /* >= gfx7 */ 14981 #define R_03520C_RLC_PERFCOUNTER1_HI 0x03520C /* >= gfx7 */ 14982 #define R_035300_RMI_PERFCOUNTER0_LO 0x035300 /* >= gfx9 */ 14983 #define R_035304_RMI_PERFCOUNTER0_HI 0x035304 /* >= gfx9 */ 14984 #define R_035308_RMI_PERFCOUNTER1_LO 0x035308 /* >= gfx9 */ 14985 #define R_03530C_RMI_PERFCOUNTER1_HI 0x03530C /* >= gfx9 */ 14986 #define R_035310_RMI_PERFCOUNTER2_LO 0x035310 /* >= gfx9 */ 14987 #define R_035314_RMI_PERFCOUNTER2_HI 0x035314 /* >= gfx9 */ 14988 #define R_035318_RMI_PERFCOUNTER3_LO 0x035318 /* >= gfx9 */ 14989 #define R_03531C_RMI_PERFCOUNTER3_HI 0x03531C /* >= gfx9 */ 14990 #define R_035380_GC_ATC_L2_PERFCOUNTER_LO 0x035380 /* gfx10 */ 14991 #define R_035384_GC_ATC_L2_PERFCOUNTER_HI 0x035384 /* gfx10 */ 14992 #define S_035384_COUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 14993 #define G_035384_COUNTER_HI(x) (((x) >> 0) & 0xFFFF) 14994 #define C_035384_COUNTER_HI 0xFFFF0000 14995 #define S_035384_COMPARE_VALUE(x) (((unsigned)(x) & 0xFFFF) << 16) 14996 #define G_035384_COMPARE_VALUE(x) (((x) >> 16) & 0xFFFF) 14997 #define C_035384_COMPARE_VALUE 0x0000FFFF 14998 #define R_0353A0_GCMC_VM_L2_PERFCOUNTER_LO 0x0353A0 /* >= gfx10 */ 14999 #define R_0353A4_GCMC_VM_L2_PERFCOUNTER_HI 0x0353A4 /* >= gfx10 */ 15000 #define S_0353A4_COUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 15001 #define G_0353A4_COUNTER_HI(x) (((x) >> 0) & 0xFFFF) 15002 #define C_0353A4_COUNTER_HI 0xFFFF0000 15003 #define S_0353A4_COMPARE_VALUE(x) (((unsigned)(x) & 0xFFFF) << 16) 15004 #define G_0353A4_COMPARE_VALUE(x) (((x) >> 16) & 0xFFFF) 15005 #define C_0353A4_COMPARE_VALUE 0x0000FFFF 15006 #define R_0353A8_GCUTCL2_PERFCOUNTER_LO 0x0353A8 /* >= gfx103 */ 15007 #define R_0353AC_GCUTCL2_PERFCOUNTER_HI 0x0353AC /* >= gfx103 */ 15008 #define S_0353AC_COUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 15009 #define G_0353AC_COUNTER_HI(x) (((x) >> 0) & 0xFFFF) 15010 #define C_0353AC_COUNTER_HI 0xFFFF0000 15011 #define S_0353AC_COMPARE_VALUE(x) (((unsigned)(x) & 0xFFFF) << 16) 15012 #define G_0353AC_COMPARE_VALUE(x) (((x) >> 16) & 0xFFFF) 15013 #define C_0353AC_COMPARE_VALUE 0x0000FFFF 15014 #define R_0353E0_GCVML2_PERFCOUNTER2_0_LO 0x0353E0 /* >= gfx10 */ 15015 #define R_0353E4_GCVML2_PERFCOUNTER2_1_LO 0x0353E4 /* >= gfx10 */ 15016 #define R_0353E8_GCVML2_PERFCOUNTER2_0_HI 0x0353E8 /* >= gfx10 */ 15017 #define R_0353EC_GCVML2_PERFCOUNTER2_1_HI 0x0353EC /* >= gfx10 */ 15018 #define R_0353F0_GC_ATC_L2_PERFCOUNTER2_LO 0x0353F0 /* gfx10 */ 15019 #define R_0353F4_GC_ATC_L2_PERFCOUNTER2_HI 0x0353F4 /* gfx10 */ 15020 #define R_035400_ATC_L2_PERFCOUNTER_LO 0x035400 /* gfx9 */ 15021 #define R_035404_ATC_L2_PERFCOUNTER_HI 0x035404 /* gfx9 */ 15022 #define S_035404_COUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 15023 #define G_035404_COUNTER_HI(x) (((x) >> 0) & 0xFFFF) 15024 #define C_035404_COUNTER_HI 0xFFFF0000 15025 #define S_035404_COMPARE_VALUE(x) (((unsigned)(x) & 0xFFFF) << 16) 15026 #define G_035404_COMPARE_VALUE(x) (((x) >> 16) & 0xFFFF) 15027 #define C_035404_COMPARE_VALUE 0x0000FFFF 15028 #define R_035420_MC_VM_L2_PERFCOUNTER_LO 0x035420 /* gfx9 */ 15029 #define R_035424_MC_VM_L2_PERFCOUNTER_HI 0x035424 /* gfx9 */ 15030 #define S_035424_COUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 15031 #define G_035424_COUNTER_HI(x) (((x) >> 0) & 0xFFFF) 15032 #define C_035424_COUNTER_HI 0xFFFF0000 15033 #define S_035424_COMPARE_VALUE(x) (((unsigned)(x) & 0xFFFF) << 16) 15034 #define G_035424_COMPARE_VALUE(x) (((x) >> 16) & 0xFFFF) 15035 #define C_035424_COMPARE_VALUE 0x0000FFFF 15036 #define R_035470_UTCL1_PERFCOUNTER0_LO 0x035470 /* >= gfx10 */ 15037 #define R_035474_UTCL1_PERFCOUNTER0_HI 0x035474 /* >= gfx10 */ 15038 #define R_035478_UTCL1_PERFCOUNTER1_LO 0x035478 /* >= gfx10 */ 15039 #define R_03547C_UTCL1_PERFCOUNTER1_HI 0x03547C /* >= gfx10 */ 15040 #define R_035480_GCR_PERFCOUNTER0_LO 0x035480 /* >= gfx10 */ 15041 #define R_035484_GCR_PERFCOUNTER0_HI 0x035484 /* >= gfx10 */ 15042 #define R_035488_GCR_PERFCOUNTER1_LO 0x035488 /* >= gfx10 */ 15043 #define R_03548C_GCR_PERFCOUNTER1_HI 0x03548C /* >= gfx10 */ 15044 #define R_035600_PA_PH_PERFCOUNTER0_LO 0x035600 /* >= gfx10 */ 15045 #define R_035604_PA_PH_PERFCOUNTER0_HI 0x035604 /* >= gfx10 */ 15046 #define R_035608_PA_PH_PERFCOUNTER1_LO 0x035608 /* >= gfx10 */ 15047 #define R_03560C_PA_PH_PERFCOUNTER1_HI 0x03560C /* >= gfx10 */ 15048 #define R_035610_PA_PH_PERFCOUNTER2_LO 0x035610 /* >= gfx10 */ 15049 #define R_035614_PA_PH_PERFCOUNTER2_HI 0x035614 /* >= gfx10 */ 15050 #define R_035618_PA_PH_PERFCOUNTER3_LO 0x035618 /* >= gfx10 */ 15051 #define R_03561C_PA_PH_PERFCOUNTER3_HI 0x03561C /* >= gfx10 */ 15052 #define R_035620_PA_PH_PERFCOUNTER4_LO 0x035620 /* >= gfx10 */ 15053 #define R_035624_PA_PH_PERFCOUNTER4_HI 0x035624 /* >= gfx10 */ 15054 #define R_035628_PA_PH_PERFCOUNTER5_LO 0x035628 /* >= gfx10 */ 15055 #define R_03562C_PA_PH_PERFCOUNTER5_HI 0x03562C /* >= gfx10 */ 15056 #define R_035630_PA_PH_PERFCOUNTER6_LO 0x035630 /* >= gfx10 */ 15057 #define R_035634_PA_PH_PERFCOUNTER6_HI 0x035634 /* >= gfx10 */ 15058 #define R_035638_PA_PH_PERFCOUNTER7_LO 0x035638 /* >= gfx10 */ 15059 #define R_03563C_PA_PH_PERFCOUNTER7_HI 0x03563C /* >= gfx10 */ 15060 #define R_035700_GL1A_PERFCOUNTER0_LO 0x035700 /* >= gfx10 */ 15061 #define R_035704_GL1A_PERFCOUNTER0_HI 0x035704 /* >= gfx10 */ 15062 #define R_035708_GL1A_PERFCOUNTER1_LO 0x035708 /* >= gfx10 */ 15063 #define R_03570C_GL1A_PERFCOUNTER1_HI 0x03570C /* >= gfx10 */ 15064 #define R_035710_GL1A_PERFCOUNTER2_LO 0x035710 /* >= gfx10 */ 15065 #define R_035714_GL1A_PERFCOUNTER2_HI 0x035714 /* >= gfx10 */ 15066 #define R_035718_GL1A_PERFCOUNTER3_LO 0x035718 /* >= gfx10 */ 15067 #define R_03571C_GL1A_PERFCOUNTER3_HI 0x03571C /* >= gfx10 */ 15068 #define R_035800_CHA_PERFCOUNTER0_LO 0x035800 /* >= gfx10 */ 15069 #define R_035804_CHA_PERFCOUNTER0_HI 0x035804 /* >= gfx10 */ 15070 #define R_035808_CHA_PERFCOUNTER1_LO 0x035808 /* >= gfx10 */ 15071 #define R_03580C_CHA_PERFCOUNTER1_HI 0x03580C /* >= gfx10 */ 15072 #define R_035810_CHA_PERFCOUNTER2_LO 0x035810 /* >= gfx10 */ 15073 #define R_035814_CHA_PERFCOUNTER2_HI 0x035814 /* >= gfx10 */ 15074 #define R_035818_CHA_PERFCOUNTER3_LO 0x035818 /* >= gfx10 */ 15075 #define R_03581C_CHA_PERFCOUNTER3_HI 0x03581C /* >= gfx10 */ 15076 #define R_035900_GUS_PERFCOUNTER2_LO 0x035900 /* >= gfx10 */ 15077 #define R_035904_GUS_PERFCOUNTER2_HI 0x035904 /* >= gfx10 */ 15078 #define R_035908_GUS_PERFCOUNTER_LO 0x035908 /* >= gfx103 */ 15079 #define R_03590C_GUS_PERFCOUNTER_HI 0x03590C /* >= gfx103 */ 15080 #define S_03590C_COUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 15081 #define G_03590C_COUNTER_HI(x) (((x) >> 0) & 0xFFFF) 15082 #define C_03590C_COUNTER_HI 0xFFFF0000 15083 #define S_03590C_COMPARE_VALUE(x) (((unsigned)(x) & 0xFFFF) << 16) 15084 #define G_03590C_COMPARE_VALUE(x) (((x) >> 16) & 0xFFFF) 15085 #define C_03590C_COMPARE_VALUE 0x0000FFFF 15086 #define R_035980_SDMA0_PERFCNT_PERFCOUNTER_LO 0x035980 /* >= gfx103 */ 15087 #define R_035984_SDMA0_PERFCNT_PERFCOUNTER_HI 0x035984 /* >= gfx103 */ 15088 #define S_035984_COUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 15089 #define G_035984_COUNTER_HI(x) (((x) >> 0) & 0xFFFF) 15090 #define C_035984_COUNTER_HI 0xFFFF0000 15091 #define S_035984_COMPARE_VALUE(x) (((unsigned)(x) & 0xFFFF) << 16) 15092 #define G_035984_COMPARE_VALUE(x) (((x) >> 16) & 0xFFFF) 15093 #define C_035984_COMPARE_VALUE 0x0000FFFF 15094 #define R_035988_SDMA0_PERFCOUNTER0_LO 0x035988 /* >= gfx103 */ 15095 #define R_03598C_SDMA0_PERFCOUNTER0_HI 0x03598C /* >= gfx103 */ 15096 #define R_035990_SDMA0_PERFCOUNTER1_LO 0x035990 /* >= gfx103 */ 15097 #define R_035994_SDMA0_PERFCOUNTER1_HI 0x035994 /* >= gfx103 */ 15098 #define R_0359B0_SDMA1_PERFCNT_PERFCOUNTER_LO 0x0359B0 /* >= gfx103 */ 15099 #define R_0359B4_SDMA1_PERFCNT_PERFCOUNTER_HI 0x0359B4 /* >= gfx103 */ 15100 #define R_0359B8_SDMA1_PERFCOUNTER0_LO 0x0359B8 /* >= gfx103 */ 15101 #define R_0359BC_SDMA1_PERFCOUNTER0_HI 0x0359BC /* >= gfx103 */ 15102 #define R_0359C0_SDMA1_PERFCOUNTER1_LO 0x0359C0 /* >= gfx103 */ 15103 #define R_0359C4_SDMA1_PERFCOUNTER1_HI 0x0359C4 /* >= gfx103 */ 15104 #define R_0359E0_SDMA2_PERFCNT_PERFCOUNTER_LO 0x0359E0 /* >= gfx103 */ 15105 #define R_0359E4_SDMA2_PERFCNT_PERFCOUNTER_HI 0x0359E4 /* >= gfx103 */ 15106 #define R_0359E8_SDMA2_PERFCOUNTER0_LO 0x0359E8 /* >= gfx103 */ 15107 #define R_0359EC_SDMA2_PERFCOUNTER0_HI 0x0359EC /* >= gfx103 */ 15108 #define R_0359F0_SDMA2_PERFCOUNTER1_LO 0x0359F0 /* >= gfx103 */ 15109 #define R_0359F4_SDMA2_PERFCOUNTER1_HI 0x0359F4 /* >= gfx103 */ 15110 #define R_035A10_SDMA3_PERFCNT_PERFCOUNTER_LO 0x035A10 /* >= gfx103 */ 15111 #define R_035A14_SDMA3_PERFCNT_PERFCOUNTER_HI 0x035A14 /* >= gfx103 */ 15112 #define R_035A18_SDMA3_PERFCOUNTER0_LO 0x035A18 /* >= gfx103 */ 15113 #define R_035A1C_SDMA3_PERFCOUNTER0_HI 0x035A1C /* >= gfx103 */ 15114 #define R_035A20_SDMA3_PERFCOUNTER1_LO 0x035A20 /* >= gfx103 */ 15115 #define R_035A24_SDMA3_PERFCOUNTER1_HI 0x035A24 /* >= gfx103 */ 15116 #define R_036000_CPG_PERFCOUNTER1_SELECT 0x036000 /* >= gfx7 */ 15117 #define S_036000_CNTR_SEL0(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx9 */ 15118 #define G_036000_CNTR_SEL0(x) (((x) >> 0) & 0x3FF) 15119 #define C_036000_CNTR_SEL0 0xFFFFFC00 15120 #define S_036000_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81, >= gfx10 */ 15121 #define G_036000_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15122 #define C_036000_PERF_SEL 0xFFFFFC00 15123 #define S_036000_CNTR_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx9 */ 15124 #define G_036000_CNTR_SEL1(x) (((x) >> 10) & 0x3FF) 15125 #define C_036000_CNTR_SEL1 0xFFF003FF 15126 #define S_036000_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) /* >= gfx10 */ 15127 #define G_036000_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15128 #define C_036000_PERF_SEL1 0xFFF003FF 15129 #define S_036000_SPM_MODE(x) (((unsigned)(x) & 0xF) << 20) /* >= gfx9 */ 15130 #define G_036000_SPM_MODE(x) (((x) >> 20) & 0xF) 15131 #define C_036000_SPM_MODE 0xFF0FFFFF 15132 #define S_036000_CNTR_MODE1(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15133 #define G_036000_CNTR_MODE1(x) (((x) >> 24) & 0xF) 15134 #define C_036000_CNTR_MODE1 0xF0FFFFFF 15135 #define S_036000_CNTR_MODE0(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15136 #define G_036000_CNTR_MODE0(x) (((x) >> 28) & 0xF) 15137 #define C_036000_CNTR_MODE0 0x0FFFFFFF 15138 #define R_036004_CPG_PERFCOUNTER0_SELECT1 0x036004 /* >= gfx7 */ 15139 #define S_036004_CNTR_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx9 */ 15140 #define G_036004_CNTR_SEL2(x) (((x) >> 0) & 0x3FF) 15141 #define C_036004_CNTR_SEL2 0xFFFFFC00 15142 #define S_036004_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81, >= gfx10 */ 15143 #define G_036004_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15144 #define C_036004_PERF_SEL2 0xFFFFFC00 15145 #define S_036004_CNTR_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx9 */ 15146 #define G_036004_CNTR_SEL3(x) (((x) >> 10) & 0x3FF) 15147 #define C_036004_CNTR_SEL3 0xFFF003FF 15148 #define S_036004_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx7, gfx8, gfx81, >= gfx10 */ 15149 #define G_036004_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15150 #define C_036004_PERF_SEL3 0xFFF003FF 15151 #define S_036004_CNTR_MODE3(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15152 #define G_036004_CNTR_MODE3(x) (((x) >> 24) & 0xF) 15153 #define C_036004_CNTR_MODE3 0xF0FFFFFF 15154 #define S_036004_CNTR_MODE2(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15155 #define G_036004_CNTR_MODE2(x) (((x) >> 28) & 0xF) 15156 #define C_036004_CNTR_MODE2 0x0FFFFFFF 15157 #define R_036008_CPG_PERFCOUNTER0_SELECT 0x036008 /* >= gfx7 */ 15158 #define S_036008_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) /* gfx7, gfx8, gfx81 */ 15159 #define G_036008_PERF_SEL(x) (((x) >> 0) & 0x3F) 15160 #define C_036008_PERF_SEL 0xFFFFFFC0 15161 #define S_036008_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) /* gfx7, gfx8, gfx81 */ 15162 #define G_036008_PERF_SEL1(x) (((x) >> 10) & 0x3F) 15163 #define C_036008_PERF_SEL1 0xFFFF03FF 15164 #define S_036008_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) /* gfx7, gfx8, gfx81 */ 15165 #define G_036008_CNTR_MODE(x) (((x) >> 20) & 0xF) 15166 #define C_036008_CNTR_MODE 0xFF0FFFFF 15167 #define R_03600C_CPC_PERFCOUNTER1_SELECT 0x03600C /* >= gfx7 */ 15168 #define S_03600C_CNTR_SEL0(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx9 */ 15169 #define G_03600C_CNTR_SEL0(x) (((x) >> 0) & 0x3FF) 15170 #define C_03600C_CNTR_SEL0 0xFFFFFC00 15171 #define S_03600C_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81, >= gfx10 */ 15172 #define G_03600C_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15173 #define C_03600C_PERF_SEL 0xFFFFFC00 15174 #define S_03600C_CNTR_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx9 */ 15175 #define G_03600C_CNTR_SEL1(x) (((x) >> 10) & 0x3FF) 15176 #define C_03600C_CNTR_SEL1 0xFFF003FF 15177 #define S_03600C_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) /* >= gfx10 */ 15178 #define G_03600C_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15179 #define C_03600C_PERF_SEL1 0xFFF003FF 15180 #define S_03600C_SPM_MODE(x) (((unsigned)(x) & 0xF) << 20) /* >= gfx9 */ 15181 #define G_03600C_SPM_MODE(x) (((x) >> 20) & 0xF) 15182 #define C_03600C_SPM_MODE 0xFF0FFFFF 15183 #define S_03600C_CNTR_MODE1(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15184 #define G_03600C_CNTR_MODE1(x) (((x) >> 24) & 0xF) 15185 #define C_03600C_CNTR_MODE1 0xF0FFFFFF 15186 #define S_03600C_CNTR_MODE0(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15187 #define G_03600C_CNTR_MODE0(x) (((x) >> 28) & 0xF) 15188 #define C_03600C_CNTR_MODE0 0x0FFFFFFF 15189 #define R_036010_CPC_PERFCOUNTER0_SELECT1 0x036010 /* >= gfx7 */ 15190 #define S_036010_CNTR_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx9 */ 15191 #define G_036010_CNTR_SEL2(x) (((x) >> 0) & 0x3FF) 15192 #define C_036010_CNTR_SEL2 0xFFFFFC00 15193 #define S_036010_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81, >= gfx10 */ 15194 #define G_036010_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15195 #define C_036010_PERF_SEL2 0xFFFFFC00 15196 #define S_036010_CNTR_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx9 */ 15197 #define G_036010_CNTR_SEL3(x) (((x) >> 10) & 0x3FF) 15198 #define C_036010_CNTR_SEL3 0xFFF003FF 15199 #define S_036010_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx7, gfx8, gfx81, >= gfx10 */ 15200 #define G_036010_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15201 #define C_036010_PERF_SEL3 0xFFF003FF 15202 #define S_036010_CNTR_MODE3(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15203 #define G_036010_CNTR_MODE3(x) (((x) >> 24) & 0xF) 15204 #define C_036010_CNTR_MODE3 0xF0FFFFFF 15205 #define S_036010_CNTR_MODE2(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15206 #define G_036010_CNTR_MODE2(x) (((x) >> 28) & 0xF) 15207 #define C_036010_CNTR_MODE2 0x0FFFFFFF 15208 #define R_036014_CPF_PERFCOUNTER1_SELECT 0x036014 /* >= gfx7 */ 15209 #define S_036014_CNTR_SEL0(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx9 */ 15210 #define G_036014_CNTR_SEL0(x) (((x) >> 0) & 0x3FF) 15211 #define C_036014_CNTR_SEL0 0xFFFFFC00 15212 #define S_036014_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81, >= gfx10 */ 15213 #define G_036014_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15214 #define C_036014_PERF_SEL 0xFFFFFC00 15215 #define S_036014_CNTR_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx9 */ 15216 #define G_036014_CNTR_SEL1(x) (((x) >> 10) & 0x3FF) 15217 #define C_036014_CNTR_SEL1 0xFFF003FF 15218 #define S_036014_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) /* >= gfx10 */ 15219 #define G_036014_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15220 #define C_036014_PERF_SEL1 0xFFF003FF 15221 #define S_036014_SPM_MODE(x) (((unsigned)(x) & 0xF) << 20) /* >= gfx9 */ 15222 #define G_036014_SPM_MODE(x) (((x) >> 20) & 0xF) 15223 #define C_036014_SPM_MODE 0xFF0FFFFF 15224 #define S_036014_CNTR_MODE1(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15225 #define G_036014_CNTR_MODE1(x) (((x) >> 24) & 0xF) 15226 #define C_036014_CNTR_MODE1 0xF0FFFFFF 15227 #define S_036014_CNTR_MODE0(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15228 #define G_036014_CNTR_MODE0(x) (((x) >> 28) & 0xF) 15229 #define C_036014_CNTR_MODE0 0x0FFFFFFF 15230 #define R_036018_CPF_PERFCOUNTER0_SELECT1 0x036018 /* >= gfx7 */ 15231 #define S_036018_CNTR_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx9 */ 15232 #define G_036018_CNTR_SEL2(x) (((x) >> 0) & 0x3FF) 15233 #define C_036018_CNTR_SEL2 0xFFFFFC00 15234 #define S_036018_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81, >= gfx10 */ 15235 #define G_036018_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15236 #define C_036018_PERF_SEL2 0xFFFFFC00 15237 #define S_036018_CNTR_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx9 */ 15238 #define G_036018_CNTR_SEL3(x) (((x) >> 10) & 0x3FF) 15239 #define C_036018_CNTR_SEL3 0xFFF003FF 15240 #define S_036018_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx7, gfx8, gfx81, >= gfx10 */ 15241 #define G_036018_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15242 #define C_036018_PERF_SEL3 0xFFF003FF 15243 #define S_036018_CNTR_MODE3(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15244 #define G_036018_CNTR_MODE3(x) (((x) >> 24) & 0xF) 15245 #define C_036018_CNTR_MODE3 0xF0FFFFFF 15246 #define S_036018_CNTR_MODE2(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15247 #define G_036018_CNTR_MODE2(x) (((x) >> 28) & 0xF) 15248 #define C_036018_CNTR_MODE2 0x0FFFFFFF 15249 #define R_03601C_CPF_PERFCOUNTER0_SELECT 0x03601C /* >= gfx7 */ 15250 #define S_03601C_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) /* gfx7, gfx8, gfx81 */ 15251 #define G_03601C_PERF_SEL(x) (((x) >> 0) & 0x3F) 15252 #define C_03601C_PERF_SEL 0xFFFFFFC0 15253 #define S_03601C_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) /* gfx7, gfx8, gfx81 */ 15254 #define G_03601C_PERF_SEL1(x) (((x) >> 10) & 0x3F) 15255 #define C_03601C_PERF_SEL1 0xFFFF03FF 15256 #define S_03601C_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) /* gfx7, gfx8, gfx81 */ 15257 #define G_03601C_CNTR_MODE(x) (((x) >> 20) & 0xF) 15258 #define C_03601C_CNTR_MODE 0xFF0FFFFF 15259 #define R_036020_CP_PERFMON_CNTL 0x036020 /* >= gfx7 */ 15260 #define S_036020_PERFMON_STATE(x) (((unsigned)(x) & 0xF) << 0) 15261 #define G_036020_PERFMON_STATE(x) (((x) >> 0) & 0xF) 15262 #define C_036020_PERFMON_STATE 0xFFFFFFF0 15263 #define V_036020_CP_PERFMON_STATE_DISABLE_AND_RESET 0 15264 #define V_036020_CP_PERFMON_STATE_START_COUNTING 1 15265 #define V_036020_CP_PERFMON_STATE_STOP_COUNTING 2 15266 #define V_036020_CP_PERFMON_STATE_RESERVED_3 3 15267 #define V_036020_CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM 4 15268 #define V_036020_CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM 5 15269 #define S_036020_SPM_PERFMON_STATE(x) (((unsigned)(x) & 0xF) << 4) 15270 #define G_036020_SPM_PERFMON_STATE(x) (((x) >> 4) & 0xF) 15271 #define C_036020_SPM_PERFMON_STATE 0xFFFFFF0F 15272 #define V_036020_STRM_PERFMON_STATE_DISABLE_AND_RESET 0 15273 #define V_036020_STRM_PERFMON_STATE_START_COUNTING 1 15274 #define V_036020_STRM_PERFMON_STATE_STOP_COUNTING 2 15275 #define V_036020_STRM_PERFMON_STATE_RESERVED_3 3 15276 #define V_036020_STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM 4 15277 #define V_036020_STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM 5 15278 #define S_036020_PERFMON_ENABLE_MODE(x) (((unsigned)(x) & 0x3) << 8) 15279 #define G_036020_PERFMON_ENABLE_MODE(x) (((x) >> 8) & 0x3) 15280 #define C_036020_PERFMON_ENABLE_MODE 0xFFFFFCFF 15281 #define V_036020_CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT 0 15282 #define V_036020_CP_PERFMON_ENABLE_MODE_RESERVED_1 1 15283 #define V_036020_CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE 2 15284 #define V_036020_CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE 3 15285 #define S_036020_PERFMON_SAMPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 10) 15286 #define G_036020_PERFMON_SAMPLE_ENABLE(x) (((x) >> 10) & 0x1) 15287 #define C_036020_PERFMON_SAMPLE_ENABLE 0xFFFFFBFF 15288 #define R_036024_CPC_PERFCOUNTER0_SELECT 0x036024 /* >= gfx7 */ 15289 #define S_036024_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) /* gfx7, gfx8, gfx81 */ 15290 #define G_036024_PERF_SEL(x) (((x) >> 0) & 0x3F) 15291 #define C_036024_PERF_SEL 0xFFFFFFC0 15292 #define S_036024_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) /* gfx7, gfx8, gfx81 */ 15293 #define G_036024_PERF_SEL1(x) (((x) >> 10) & 0x3F) 15294 #define C_036024_PERF_SEL1 0xFFFF03FF 15295 #define S_036024_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) /* gfx7, gfx8, gfx81 */ 15296 #define G_036024_CNTR_MODE(x) (((x) >> 20) & 0xF) 15297 #define C_036024_CNTR_MODE 0xFF0FFFFF 15298 #define R_036028_CPF_TC_PERF_COUNTER_WINDOW_SELECT 0x036028 /* >= gfx9 */ 15299 #define S_036028_INDEX(x) (((unsigned)(x) & 0x7) << 0) 15300 #define G_036028_INDEX(x) (((x) >> 0) & 0x7) 15301 #define C_036028_INDEX 0xFFFFFFF8 15302 #define S_036028_ALWAYS(x) (((unsigned)(x) & 0x1) << 30) 15303 #define G_036028_ALWAYS(x) (((x) >> 30) & 0x1) 15304 #define C_036028_ALWAYS 0xBFFFFFFF 15305 #define S_036028_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 15306 #define G_036028_ENABLE(x) (((x) >> 31) & 0x1) 15307 #define C_036028_ENABLE 0x7FFFFFFF 15308 #define R_03602C_CPG_TC_PERF_COUNTER_WINDOW_SELECT 0x03602C /* >= gfx9 */ 15309 #define S_03602C_INDEX(x) (((unsigned)(x) & 0x1F) << 0) 15310 #define G_03602C_INDEX(x) (((x) >> 0) & 0x1F) 15311 #define C_03602C_INDEX 0xFFFFFFE0 15312 #define S_03602C_ALWAYS(x) (((unsigned)(x) & 0x1) << 30) 15313 #define G_03602C_ALWAYS(x) (((x) >> 30) & 0x1) 15314 #define C_03602C_ALWAYS 0xBFFFFFFF 15315 #define S_03602C_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 15316 #define G_03602C_ENABLE(x) (((x) >> 31) & 0x1) 15317 #define C_03602C_ENABLE 0x7FFFFFFF 15318 #define R_036030_CPF_LATENCY_STATS_SELECT 0x036030 /* >= gfx9 */ 15319 #define S_036030_INDEX(x) (((unsigned)(x) & 0xF) << 0) 15320 #define G_036030_INDEX(x) (((x) >> 0) & 0xF) 15321 #define C_036030_INDEX 0xFFFFFFF0 15322 #define S_036030_CLEAR(x) (((unsigned)(x) & 0x1) << 30) 15323 #define G_036030_CLEAR(x) (((x) >> 30) & 0x1) 15324 #define C_036030_CLEAR 0xBFFFFFFF 15325 #define S_036030_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 15326 #define G_036030_ENABLE(x) (((x) >> 31) & 0x1) 15327 #define C_036030_ENABLE 0x7FFFFFFF 15328 #define R_036034_CPG_LATENCY_STATS_SELECT 0x036034 /* >= gfx9 */ 15329 #define S_036034_INDEX(x) (((unsigned)(x) & 0x1F) << 0) 15330 #define G_036034_INDEX(x) (((x) >> 0) & 0x1F) 15331 #define C_036034_INDEX 0xFFFFFFE0 15332 #define S_036034_CLEAR(x) (((unsigned)(x) & 0x1) << 30) 15333 #define G_036034_CLEAR(x) (((x) >> 30) & 0x1) 15334 #define C_036034_CLEAR 0xBFFFFFFF 15335 #define S_036034_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 15336 #define G_036034_ENABLE(x) (((x) >> 31) & 0x1) 15337 #define C_036034_ENABLE 0x7FFFFFFF 15338 #define R_036038_CPC_LATENCY_STATS_SELECT 0x036038 /* >= gfx9 */ 15339 #define S_036038_INDEX(x) (((unsigned)(x) & 0xF) << 0) 15340 #define G_036038_INDEX(x) (((x) >> 0) & 0xF) 15341 #define C_036038_INDEX 0xFFFFFFF0 15342 #define S_036038_CLEAR(x) (((unsigned)(x) & 0x1) << 30) 15343 #define G_036038_CLEAR(x) (((x) >> 30) & 0x1) 15344 #define C_036038_CLEAR 0xBFFFFFFF 15345 #define S_036038_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 15346 #define G_036038_ENABLE(x) (((x) >> 31) & 0x1) 15347 #define C_036038_ENABLE 0x7FFFFFFF 15348 #define R_036040_CP_DRAW_OBJECT 0x036040 /* >= gfx7 */ 15349 #define R_036044_CP_DRAW_OBJECT_COUNTER 0x036044 /* >= gfx7 */ 15350 #define S_036044_COUNT(x) (((unsigned)(x) & 0xFFFF) << 0) 15351 #define G_036044_COUNT(x) (((x) >> 0) & 0xFFFF) 15352 #define C_036044_COUNT 0xFFFF0000 15353 #define R_036048_CP_DRAW_WINDOW_MASK_HI 0x036048 /* >= gfx7 */ 15354 #define R_03604C_CP_DRAW_WINDOW_HI 0x03604C /* >= gfx7 */ 15355 #define R_036050_CP_DRAW_WINDOW_LO 0x036050 /* >= gfx7 */ 15356 #define S_036050_MIN(x) (((unsigned)(x) & 0xFFFF) << 0) 15357 #define G_036050_MIN(x) (((x) >> 0) & 0xFFFF) 15358 #define C_036050_MIN 0xFFFF0000 15359 #define S_036050_MAX(x) (((unsigned)(x) & 0xFFFF) << 16) 15360 #define G_036050_MAX(x) (((x) >> 16) & 0xFFFF) 15361 #define C_036050_MAX 0x0000FFFF 15362 #define R_036054_CP_DRAW_WINDOW_CNTL 0x036054 /* >= gfx7 */ 15363 #define S_036054_DISABLE_DRAW_WINDOW_LO_MAX(x) (((unsigned)(x) & 0x1) << 0) 15364 #define G_036054_DISABLE_DRAW_WINDOW_LO_MAX(x) (((x) >> 0) & 0x1) 15365 #define C_036054_DISABLE_DRAW_WINDOW_LO_MAX 0xFFFFFFFE 15366 #define S_036054_DISABLE_DRAW_WINDOW_LO_MIN(x) (((unsigned)(x) & 0x1) << 1) 15367 #define G_036054_DISABLE_DRAW_WINDOW_LO_MIN(x) (((x) >> 1) & 0x1) 15368 #define C_036054_DISABLE_DRAW_WINDOW_LO_MIN 0xFFFFFFFD 15369 #define S_036054_DISABLE_DRAW_WINDOW_HI(x) (((unsigned)(x) & 0x1) << 2) 15370 #define G_036054_DISABLE_DRAW_WINDOW_HI(x) (((x) >> 2) & 0x1) 15371 #define C_036054_DISABLE_DRAW_WINDOW_HI 0xFFFFFFFB 15372 #define S_036054_MODE(x) (((unsigned)(x) & 0x1) << 8) 15373 #define G_036054_MODE(x) (((x) >> 8) & 0x1) 15374 #define C_036054_MODE 0xFFFFFEFF 15375 #define R_036100_GRBM_PERFCOUNTER0_SELECT 0x036100 /* >= gfx7 */ 15376 #define S_036100_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 15377 #define G_036100_PERF_SEL(x) (((x) >> 0) & 0x3F) 15378 #define C_036100_PERF_SEL 0xFFFFFFC0 15379 #define S_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 15380 #define G_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 15381 #define C_036100_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 15382 #define S_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 15383 #define G_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 15384 #define C_036100_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 15385 #define S_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) /* gfx7, gfx8, gfx81, gfx9 */ 15386 #define G_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 15387 #define C_036100_VGT_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 15388 #define S_036100_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 15389 #define G_036100_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 15390 #define C_036100_TA_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 15391 #define S_036100_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 14) 15392 #define G_036100_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 14) & 0x1) 15393 #define C_036100_SX_BUSY_USER_DEFINED_MASK 0xFFFFBFFF 15394 #define S_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 15395 #define G_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 15396 #define C_036100_SPI_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 15397 #define S_036100_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 15398 #define G_036100_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 15399 #define C_036100_SC_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 15400 #define S_036100_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 15401 #define G_036100_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 15402 #define C_036100_PA_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 15403 #define S_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 15404 #define G_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 15405 #define C_036100_GRBM_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 15406 #define S_036100_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 15407 #define G_036100_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 15408 #define C_036100_DB_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 15409 #define S_036100_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 15410 #define G_036100_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 15411 #define C_036100_CB_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 15412 #define S_036100_CP_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 22) 15413 #define G_036100_CP_BUSY_USER_DEFINED_MASK(x) (((x) >> 22) & 0x1) 15414 #define C_036100_CP_BUSY_USER_DEFINED_MASK 0xFFBFFFFF 15415 #define S_036100_IA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 23) /* gfx7, gfx8, gfx81, gfx9 */ 15416 #define G_036100_IA_BUSY_USER_DEFINED_MASK(x) (((x) >> 23) & 0x1) 15417 #define C_036100_IA_BUSY_USER_DEFINED_MASK 0xFF7FFFFF 15418 #define S_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 24) 15419 #define G_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((x) >> 24) & 0x1) 15420 #define C_036100_GDS_BUSY_USER_DEFINED_MASK 0xFEFFFFFF 15421 #define S_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 25) 15422 #define G_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 25) & 0x1) 15423 #define C_036100_BCI_BUSY_USER_DEFINED_MASK 0xFDFFFFFF 15424 #define S_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 26) 15425 #define G_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((x) >> 26) & 0x1) 15426 #define C_036100_RLC_BUSY_USER_DEFINED_MASK 0xFBFFFFFF 15427 #define S_036100_TCP_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 27) /* >= gfx10 */ 15428 #define G_036100_TCP_BUSY_USER_DEFINED_MASK(x) (((x) >> 27) & 0x1) 15429 #define C_036100_TCP_BUSY_USER_DEFINED_MASK 0xF7FFFFFF 15430 #define S_036100_TC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 27) /* gfx7, gfx8, gfx81, gfx9 */ 15431 #define G_036100_TC_BUSY_USER_DEFINED_MASK(x) (((x) >> 27) & 0x1) 15432 #define C_036100_TC_BUSY_USER_DEFINED_MASK 0xF7FFFFFF 15433 #define S_036100_GE_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 28) /* >= gfx10 */ 15434 #define G_036100_GE_BUSY_USER_DEFINED_MASK(x) (((x) >> 28) & 0x1) 15435 #define C_036100_GE_BUSY_USER_DEFINED_MASK 0xEFFFFFFF 15436 #define S_036100_WD_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 28) /* gfx7, gfx8, gfx81, gfx9 */ 15437 #define G_036100_WD_BUSY_USER_DEFINED_MASK(x) (((x) >> 28) & 0x1) 15438 #define C_036100_WD_BUSY_USER_DEFINED_MASK 0xEFFFFFFF 15439 #define S_036100_UTCL2_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 29) /* >= gfx9 */ 15440 #define G_036100_UTCL2_BUSY_USER_DEFINED_MASK(x) (((x) >> 29) & 0x1) 15441 #define C_036100_UTCL2_BUSY_USER_DEFINED_MASK 0xDFFFFFFF 15442 #define S_036100_EA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 30) /* >= gfx9 */ 15443 #define G_036100_EA_BUSY_USER_DEFINED_MASK(x) (((x) >> 30) & 0x1) 15444 #define C_036100_EA_BUSY_USER_DEFINED_MASK 0xBFFFFFFF 15445 #define S_036100_RMI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 31) /* >= gfx9 */ 15446 #define G_036100_RMI_BUSY_USER_DEFINED_MASK(x) (((x) >> 31) & 0x1) 15447 #define C_036100_RMI_BUSY_USER_DEFINED_MASK 0x7FFFFFFF 15448 #define R_036104_GRBM_PERFCOUNTER1_SELECT 0x036104 /* >= gfx7 */ 15449 #define R_036108_GRBM_SE0_PERFCOUNTER_SELECT 0x036108 /* >= gfx7 */ 15450 #define S_036108_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 15451 #define G_036108_PERF_SEL(x) (((x) >> 0) & 0x3F) 15452 #define C_036108_PERF_SEL 0xFFFFFFC0 15453 #define S_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 15454 #define G_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 15455 #define C_036108_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 15456 #define S_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 15457 #define G_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 15458 #define C_036108_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 15459 #define S_036108_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 15460 #define G_036108_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 15461 #define C_036108_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 15462 #define S_036108_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 15463 #define G_036108_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 15464 #define C_036108_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 15465 #define S_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 15466 #define G_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 15467 #define C_036108_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 15468 #define S_036108_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 15469 #define G_036108_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 15470 #define C_036108_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 15471 #define S_036108_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 15472 #define G_036108_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 15473 #define C_036108_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 15474 #define S_036108_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 15475 #define G_036108_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 15476 #define C_036108_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 15477 #define S_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) /* gfx7, gfx8, gfx81, gfx9 */ 15478 #define G_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 15479 #define C_036108_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 15480 #define S_036108_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 15481 #define G_036108_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 15482 #define C_036108_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 15483 #define S_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 15484 #define G_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 15485 #define C_036108_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 15486 #define S_036108_RMI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 22) /* >= gfx9 */ 15487 #define G_036108_RMI_BUSY_USER_DEFINED_MASK(x) (((x) >> 22) & 0x1) 15488 #define C_036108_RMI_BUSY_USER_DEFINED_MASK 0xFFBFFFFF 15489 #define S_036108_UTCL1_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 23) /* >= gfx10 */ 15490 #define G_036108_UTCL1_BUSY_USER_DEFINED_MASK(x) (((x) >> 23) & 0x1) 15491 #define C_036108_UTCL1_BUSY_USER_DEFINED_MASK 0xFF7FFFFF 15492 #define S_036108_TCP_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 24) /* >= gfx10 */ 15493 #define G_036108_TCP_BUSY_USER_DEFINED_MASK(x) (((x) >> 24) & 0x1) 15494 #define C_036108_TCP_BUSY_USER_DEFINED_MASK 0xFEFFFFFF 15495 #define S_036108_GL1CC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 25) /* >= gfx10 */ 15496 #define G_036108_GL1CC_BUSY_USER_DEFINED_MASK(x) (((x) >> 25) & 0x1) 15497 #define C_036108_GL1CC_BUSY_USER_DEFINED_MASK 0xFDFFFFFF 15498 #define R_03610C_GRBM_SE1_PERFCOUNTER_SELECT 0x03610C /* >= gfx7 */ 15499 #define R_036110_GRBM_SE2_PERFCOUNTER_SELECT 0x036110 /* >= gfx7 */ 15500 #define R_036114_GRBM_SE3_PERFCOUNTER_SELECT 0x036114 /* >= gfx7 */ 15501 #define R_036134_GRBM_PERFCOUNTER0_SELECT_HI 0x036134 /* >= gfx10 */ 15502 #define S_036134_UTCL1_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 1) 15503 #define G_036134_UTCL1_BUSY_USER_DEFINED_MASK(x) (((x) >> 1) & 0x1) 15504 #define C_036134_UTCL1_BUSY_USER_DEFINED_MASK 0xFFFFFFFD 15505 #define S_036134_GL2CC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 2) 15506 #define G_036134_GL2CC_BUSY_USER_DEFINED_MASK(x) (((x) >> 2) & 0x1) 15507 #define C_036134_GL2CC_BUSY_USER_DEFINED_MASK 0xFFFFFFFB 15508 #define S_036134_SDMA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 3) 15509 #define G_036134_SDMA_BUSY_USER_DEFINED_MASK(x) (((x) >> 3) & 0x1) 15510 #define C_036134_SDMA_BUSY_USER_DEFINED_MASK 0xFFFFFFF7 15511 #define S_036134_CH_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 4) 15512 #define G_036134_CH_BUSY_USER_DEFINED_MASK(x) (((x) >> 4) & 0x1) 15513 #define C_036134_CH_BUSY_USER_DEFINED_MASK 0xFFFFFFEF 15514 #define S_036134_PH_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 5) 15515 #define G_036134_PH_BUSY_USER_DEFINED_MASK(x) (((x) >> 5) & 0x1) 15516 #define C_036134_PH_BUSY_USER_DEFINED_MASK 0xFFFFFFDF 15517 #define S_036134_PMM_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 6) 15518 #define G_036134_PMM_BUSY_USER_DEFINED_MASK(x) (((x) >> 6) & 0x1) 15519 #define C_036134_PMM_BUSY_USER_DEFINED_MASK 0xFFFFFFBF 15520 #define S_036134_GUS_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 7) 15521 #define G_036134_GUS_BUSY_USER_DEFINED_MASK(x) (((x) >> 7) & 0x1) 15522 #define C_036134_GUS_BUSY_USER_DEFINED_MASK 0xFFFFFF7F 15523 #define S_036134_GL1CC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 8) 15524 #define G_036134_GL1CC_BUSY_USER_DEFINED_MASK(x) (((x) >> 8) & 0x1) 15525 #define C_036134_GL1CC_BUSY_USER_DEFINED_MASK 0xFFFFFEFF 15526 #define R_036138_GRBM_PERFCOUNTER1_SELECT_HI 0x036138 /* >= gfx10 */ 15527 #define R_036200_GE_PERFCOUNTER0_SELECT 0x036200 /* gfx10 */ 15528 #define S_036200_PERF_SEL0(x) (((unsigned)(x) & 0x3FF) << 0) 15529 #define G_036200_PERF_SEL0(x) (((x) >> 0) & 0x3FF) 15530 #define C_036200_PERF_SEL0 0xFFFFFC00 15531 #define S_036200_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 15532 #define G_036200_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15533 #define C_036200_PERF_SEL1 0xFFF003FF 15534 #define S_036200_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 15535 #define G_036200_CNTR_MODE(x) (((x) >> 20) & 0xF) 15536 #define C_036200_CNTR_MODE 0xFF0FFFFF 15537 #define S_036200_PERF_MODE0(x) (((unsigned)(x) & 0xF) << 24) 15538 #define G_036200_PERF_MODE0(x) (((x) >> 24) & 0xF) 15539 #define C_036200_PERF_MODE0 0xF0FFFFFF 15540 #define S_036200_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 28) 15541 #define G_036200_PERF_MODE1(x) (((x) >> 28) & 0xF) 15542 #define C_036200_PERF_MODE1 0x0FFFFFFF 15543 #define R_036200_WD_PERFCOUNTER0_SELECT 0x036200 /* gfx7, gfx8, gfx81, gfx9 */ 15544 #define S_036200_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 15545 #define G_036200_PERF_SEL(x) (((x) >> 0) & 0xFF) 15546 #define C_036200_PERF_SEL 0xFFFFFF00 15547 #define S_036200_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 15548 #define G_036200_PERF_MODE(x) (((x) >> 28) & 0xF) 15549 #define C_036200_PERF_MODE 0x0FFFFFFF 15550 #define R_036204_GE_PERFCOUNTER0_SELECT1 0x036204 /* gfx10 */ 15551 #define S_036204_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 15552 #define G_036204_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15553 #define C_036204_PERF_SEL2 0xFFFFFC00 15554 #define S_036204_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 15555 #define G_036204_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15556 #define C_036204_PERF_SEL3 0xFFF003FF 15557 #define S_036204_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) 15558 #define G_036204_PERF_MODE2(x) (((x) >> 24) & 0xF) 15559 #define C_036204_PERF_MODE2 0xF0FFFFFF 15560 #define S_036204_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) 15561 #define G_036204_PERF_MODE3(x) (((x) >> 28) & 0xF) 15562 #define C_036204_PERF_MODE3 0x0FFFFFFF 15563 #define R_036204_WD_PERFCOUNTER1_SELECT 0x036204 /* gfx7, gfx8, gfx81, gfx9 */ 15564 #define R_036208_GE_PERFCOUNTER1_SELECT 0x036208 /* gfx10 */ 15565 #define R_036208_WD_PERFCOUNTER2_SELECT 0x036208 /* gfx7, gfx8, gfx81, gfx9 */ 15566 #define R_03620C_GE_PERFCOUNTER1_SELECT1 0x03620C /* gfx10 */ 15567 #define R_03620C_WD_PERFCOUNTER3_SELECT 0x03620C /* gfx7, gfx8, gfx81, gfx9 */ 15568 #define R_036210_GE_PERFCOUNTER2_SELECT 0x036210 /* gfx10 */ 15569 #define R_036210_IA_PERFCOUNTER0_SELECT 0x036210 /* gfx7, gfx8, gfx81, gfx9 */ 15570 #define S_036210_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 15571 #define G_036210_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15572 #define C_036210_PERF_SEL 0xFFFFFC00 15573 #define S_036210_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 15574 #define G_036210_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15575 #define C_036210_PERF_SEL1 0xFFF003FF 15576 #define S_036210_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 15577 #define G_036210_CNTR_MODE(x) (((x) >> 20) & 0xF) 15578 #define C_036210_CNTR_MODE 0xFF0FFFFF 15579 #define S_036210_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 15580 #define G_036210_PERF_MODE1(x) (((x) >> 24) & 0xF) 15581 #define C_036210_PERF_MODE1 0xF0FFFFFF 15582 #define S_036210_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 15583 #define G_036210_PERF_MODE(x) (((x) >> 28) & 0xF) 15584 #define C_036210_PERF_MODE 0x0FFFFFFF 15585 #define R_036214_GE_PERFCOUNTER2_SELECT1 0x036214 /* gfx10 */ 15586 #define R_036214_IA_PERFCOUNTER1_SELECT 0x036214 /* gfx7, gfx8, gfx81, gfx9 */ 15587 #define S_036214_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 15588 #define G_036214_PERF_SEL(x) (((x) >> 0) & 0xFF) 15589 #define C_036214_PERF_SEL 0xFFFFFF00 15590 #define S_036214_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 15591 #define G_036214_PERF_MODE(x) (((x) >> 28) & 0xF) 15592 #define C_036214_PERF_MODE 0x0FFFFFFF 15593 #define R_036218_GE_PERFCOUNTER3_SELECT 0x036218 /* gfx10 */ 15594 #define R_036218_IA_PERFCOUNTER2_SELECT 0x036218 /* gfx7, gfx8, gfx81, gfx9 */ 15595 #define R_03621C_GE_PERFCOUNTER3_SELECT1 0x03621C /* gfx10 */ 15596 #define R_03621C_IA_PERFCOUNTER3_SELECT 0x03621C /* gfx7, gfx8, gfx81, gfx9 */ 15597 #define R_036220_GE_PERFCOUNTER4_SELECT 0x036220 /* gfx10 */ 15598 #define S_036220_PERF_SEL0(x) (((unsigned)(x) & 0x3FF) << 0) 15599 #define G_036220_PERF_SEL0(x) (((x) >> 0) & 0x3FF) 15600 #define C_036220_PERF_SEL0 0xFFFFFC00 15601 #define S_036220_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 15602 #define G_036220_PERF_MODE(x) (((x) >> 28) & 0xF) 15603 #define C_036220_PERF_MODE 0x0FFFFFFF 15604 #define R_036220_IA_PERFCOUNTER0_SELECT1 0x036220 /* gfx7, gfx8, gfx81, gfx9 */ 15605 #define S_036220_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 15606 #define G_036220_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15607 #define C_036220_PERF_SEL2 0xFFFFFC00 15608 #define S_036220_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 15609 #define G_036220_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15610 #define C_036220_PERF_SEL3 0xFFF003FF 15611 #define S_036220_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 15612 #define G_036220_PERF_MODE3(x) (((x) >> 24) & 0xF) 15613 #define C_036220_PERF_MODE3 0xF0FFFFFF 15614 #define S_036220_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 15615 #define G_036220_PERF_MODE2(x) (((x) >> 28) & 0xF) 15616 #define C_036220_PERF_MODE2 0x0FFFFFFF 15617 #define R_036228_GE_PERFCOUNTER5_SELECT 0x036228 /* gfx10 */ 15618 #define R_036230_GE_PERFCOUNTER6_SELECT 0x036230 /* gfx10 */ 15619 #define R_036230_VGT_PERFCOUNTER0_SELECT 0x036230 /* gfx7, gfx8, gfx81, gfx9 */ 15620 #define S_036230_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 15621 #define G_036230_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15622 #define C_036230_PERF_SEL 0xFFFFFC00 15623 #define S_036230_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 15624 #define G_036230_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15625 #define C_036230_PERF_SEL1 0xFFF003FF 15626 #define S_036230_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 15627 #define G_036230_CNTR_MODE(x) (((x) >> 20) & 0xF) 15628 #define C_036230_CNTR_MODE 0xFF0FFFFF 15629 #define S_036230_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 15630 #define G_036230_PERF_MODE1(x) (((x) >> 24) & 0xF) 15631 #define C_036230_PERF_MODE1 0xF0FFFFFF 15632 #define S_036230_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 15633 #define G_036230_PERF_MODE(x) (((x) >> 28) & 0xF) 15634 #define C_036230_PERF_MODE 0x0FFFFFFF 15635 #define R_036234_VGT_PERFCOUNTER1_SELECT 0x036234 /* gfx7, gfx8, gfx81, gfx9 */ 15636 #define R_036238_GE_PERFCOUNTER7_SELECT 0x036238 /* gfx10 */ 15637 #define R_036238_VGT_PERFCOUNTER2_SELECT 0x036238 /* gfx7, gfx8, gfx81, gfx9 */ 15638 #define S_036238_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 15639 #define G_036238_PERF_SEL(x) (((x) >> 0) & 0xFF) 15640 #define C_036238_PERF_SEL 0xFFFFFF00 15641 #define S_036238_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 15642 #define G_036238_PERF_MODE(x) (((x) >> 28) & 0xF) 15643 #define C_036238_PERF_MODE 0x0FFFFFFF 15644 #define R_03623C_VGT_PERFCOUNTER3_SELECT 0x03623C /* gfx7, gfx8, gfx81, gfx9 */ 15645 #define R_036240_GE_PERFCOUNTER8_SELECT 0x036240 /* gfx10 */ 15646 #define R_036240_VGT_PERFCOUNTER0_SELECT1 0x036240 /* gfx7, gfx8, gfx81, gfx9 */ 15647 #define S_036240_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 15648 #define G_036240_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15649 #define C_036240_PERF_SEL2 0xFFFFFC00 15650 #define S_036240_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 15651 #define G_036240_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15652 #define C_036240_PERF_SEL3 0xFFF003FF 15653 #define S_036240_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 15654 #define G_036240_PERF_MODE3(x) (((x) >> 24) & 0xF) 15655 #define C_036240_PERF_MODE3 0xF0FFFFFF 15656 #define S_036240_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 15657 #define G_036240_PERF_MODE2(x) (((x) >> 28) & 0xF) 15658 #define C_036240_PERF_MODE2 0x0FFFFFFF 15659 #define R_036244_VGT_PERFCOUNTER1_SELECT1 0x036244 /* gfx7, gfx8, gfx81, gfx9 */ 15660 #define R_036248_GE_PERFCOUNTER9_SELECT 0x036248 /* gfx10 */ 15661 #define R_036250_GE_PERFCOUNTER10_SELECT 0x036250 /* gfx10 */ 15662 #define R_036250_VGT_PERFCOUNTER_SEID_MASK 0x036250 /* gfx7, gfx8, gfx81, gfx9 */ 15663 #define S_036250_PERF_SEID_IGNORE_MASK(x) (((unsigned)(x) & 0xFF) << 0) 15664 #define G_036250_PERF_SEID_IGNORE_MASK(x) (((x) >> 0) & 0xFF) 15665 #define C_036250_PERF_SEID_IGNORE_MASK 0xFFFFFF00 15666 #define R_036258_GE_PERFCOUNTER11_SELECT 0x036258 /* gfx10 */ 15667 #define R_036290_GE1_PERFCOUNTER0_SELECT 0x036290 /* >= gfx103 */ 15668 #define S_036290_PERF_SEL0(x) (((unsigned)(x) & 0x3FF) << 0) 15669 #define G_036290_PERF_SEL0(x) (((x) >> 0) & 0x3FF) 15670 #define C_036290_PERF_SEL0 0xFFFFFC00 15671 #define S_036290_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 15672 #define G_036290_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15673 #define C_036290_PERF_SEL1 0xFFF003FF 15674 #define S_036290_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 15675 #define G_036290_CNTR_MODE(x) (((x) >> 20) & 0xF) 15676 #define C_036290_CNTR_MODE 0xFF0FFFFF 15677 #define S_036290_PERF_MODE0(x) (((unsigned)(x) & 0xF) << 24) 15678 #define G_036290_PERF_MODE0(x) (((x) >> 24) & 0xF) 15679 #define C_036290_PERF_MODE0 0xF0FFFFFF 15680 #define S_036290_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 28) 15681 #define G_036290_PERF_MODE1(x) (((x) >> 28) & 0xF) 15682 #define C_036290_PERF_MODE1 0x0FFFFFFF 15683 #define R_036294_GE1_PERFCOUNTER0_SELECT1 0x036294 /* >= gfx103 */ 15684 #define S_036294_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 15685 #define G_036294_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15686 #define C_036294_PERF_SEL2 0xFFFFFC00 15687 #define S_036294_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 15688 #define G_036294_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15689 #define C_036294_PERF_SEL3 0xFFF003FF 15690 #define S_036294_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) 15691 #define G_036294_PERF_MODE2(x) (((x) >> 24) & 0xF) 15692 #define C_036294_PERF_MODE2 0xF0FFFFFF 15693 #define S_036294_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) 15694 #define G_036294_PERF_MODE3(x) (((x) >> 28) & 0xF) 15695 #define C_036294_PERF_MODE3 0x0FFFFFFF 15696 #define R_036298_GE1_PERFCOUNTER1_SELECT 0x036298 /* >= gfx103 */ 15697 #define R_03629C_GE1_PERFCOUNTER1_SELECT1 0x03629C /* >= gfx103 */ 15698 #define R_0362A0_GE1_PERFCOUNTER2_SELECT 0x0362A0 /* >= gfx103 */ 15699 #define R_0362A4_GE1_PERFCOUNTER2_SELECT1 0x0362A4 /* >= gfx103 */ 15700 #define R_0362A8_GE1_PERFCOUNTER3_SELECT 0x0362A8 /* >= gfx103 */ 15701 #define R_0362AC_GE1_PERFCOUNTER3_SELECT1 0x0362AC /* >= gfx103 */ 15702 #define R_0362B0_GE2_DIST_PERFCOUNTER0_SELECT 0x0362B0 /* >= gfx103 */ 15703 #define S_0362B0_PERF_SEL0(x) (((unsigned)(x) & 0x3FF) << 0) 15704 #define G_0362B0_PERF_SEL0(x) (((x) >> 0) & 0x3FF) 15705 #define C_0362B0_PERF_SEL0 0xFFFFFC00 15706 #define S_0362B0_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 15707 #define G_0362B0_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15708 #define C_0362B0_PERF_SEL1 0xFFF003FF 15709 #define S_0362B0_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 15710 #define G_0362B0_CNTR_MODE(x) (((x) >> 20) & 0xF) 15711 #define C_0362B0_CNTR_MODE 0xFF0FFFFF 15712 #define S_0362B0_PERF_MODE0(x) (((unsigned)(x) & 0xF) << 24) 15713 #define G_0362B0_PERF_MODE0(x) (((x) >> 24) & 0xF) 15714 #define C_0362B0_PERF_MODE0 0xF0FFFFFF 15715 #define S_0362B0_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 28) 15716 #define G_0362B0_PERF_MODE1(x) (((x) >> 28) & 0xF) 15717 #define C_0362B0_PERF_MODE1 0x0FFFFFFF 15718 #define R_0362B4_GE2_DIST_PERFCOUNTER0_SELECT1 0x0362B4 /* >= gfx103 */ 15719 #define S_0362B4_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 15720 #define G_0362B4_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15721 #define C_0362B4_PERF_SEL2 0xFFFFFC00 15722 #define S_0362B4_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 15723 #define G_0362B4_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15724 #define C_0362B4_PERF_SEL3 0xFFF003FF 15725 #define S_0362B4_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) 15726 #define G_0362B4_PERF_MODE2(x) (((x) >> 24) & 0xF) 15727 #define C_0362B4_PERF_MODE2 0xF0FFFFFF 15728 #define S_0362B4_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) 15729 #define G_0362B4_PERF_MODE3(x) (((x) >> 28) & 0xF) 15730 #define C_0362B4_PERF_MODE3 0x0FFFFFFF 15731 #define R_0362B8_GE2_DIST_PERFCOUNTER1_SELECT 0x0362B8 /* >= gfx103 */ 15732 #define R_0362BC_GE2_DIST_PERFCOUNTER1_SELECT1 0x0362BC /* >= gfx103 */ 15733 #define R_0362C0_GE2_DIST_PERFCOUNTER2_SELECT 0x0362C0 /* >= gfx103 */ 15734 #define R_0362C4_GE2_DIST_PERFCOUNTER2_SELECT1 0x0362C4 /* >= gfx103 */ 15735 #define R_0362C8_GE2_DIST_PERFCOUNTER3_SELECT 0x0362C8 /* >= gfx103 */ 15736 #define R_0362CC_GE2_DIST_PERFCOUNTER3_SELECT1 0x0362CC /* >= gfx103 */ 15737 #define R_0362D0_GE2_SE_PERFCOUNTER0_SELECT 0x0362D0 /* >= gfx103 */ 15738 #define S_0362D0_PERF_SEL0(x) (((unsigned)(x) & 0x3FF) << 0) 15739 #define G_0362D0_PERF_SEL0(x) (((x) >> 0) & 0x3FF) 15740 #define C_0362D0_PERF_SEL0 0xFFFFFC00 15741 #define S_0362D0_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 15742 #define G_0362D0_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15743 #define C_0362D0_PERF_SEL1 0xFFF003FF 15744 #define S_0362D0_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 15745 #define G_0362D0_CNTR_MODE(x) (((x) >> 20) & 0xF) 15746 #define C_0362D0_CNTR_MODE 0xFF0FFFFF 15747 #define S_0362D0_PERF_MODE0(x) (((unsigned)(x) & 0xF) << 24) 15748 #define G_0362D0_PERF_MODE0(x) (((x) >> 24) & 0xF) 15749 #define C_0362D0_PERF_MODE0 0xF0FFFFFF 15750 #define S_0362D0_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 28) 15751 #define G_0362D0_PERF_MODE1(x) (((x) >> 28) & 0xF) 15752 #define C_0362D0_PERF_MODE1 0x0FFFFFFF 15753 #define R_0362D4_GE2_SE_PERFCOUNTER0_SELECT1 0x0362D4 /* >= gfx103 */ 15754 #define S_0362D4_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 15755 #define G_0362D4_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15756 #define C_0362D4_PERF_SEL2 0xFFFFFC00 15757 #define S_0362D4_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 15758 #define G_0362D4_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15759 #define C_0362D4_PERF_SEL3 0xFFF003FF 15760 #define S_0362D4_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) 15761 #define G_0362D4_PERF_MODE2(x) (((x) >> 24) & 0xF) 15762 #define C_0362D4_PERF_MODE2 0xF0FFFFFF 15763 #define S_0362D4_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) 15764 #define G_0362D4_PERF_MODE3(x) (((x) >> 28) & 0xF) 15765 #define C_0362D4_PERF_MODE3 0x0FFFFFFF 15766 #define R_0362D8_GE2_SE_PERFCOUNTER1_SELECT 0x0362D8 /* >= gfx103 */ 15767 #define R_0362DC_GE2_SE_PERFCOUNTER1_SELECT1 0x0362DC /* >= gfx103 */ 15768 #define R_0362E0_GE2_SE_PERFCOUNTER2_SELECT 0x0362E0 /* >= gfx103 */ 15769 #define R_0362E4_GE2_SE_PERFCOUNTER2_SELECT1 0x0362E4 /* >= gfx103 */ 15770 #define R_0362E8_GE2_SE_PERFCOUNTER3_SELECT 0x0362E8 /* >= gfx103 */ 15771 #define R_0362EC_GE2_SE_PERFCOUNTER3_SELECT1 0x0362EC /* >= gfx103 */ 15772 #define R_036400_PA_SU_PERFCOUNTER0_SELECT 0x036400 /* >= gfx7 */ 15773 #define S_036400_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 15774 #define G_036400_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15775 #define C_036400_PERF_SEL 0xFFFFFC00 15776 #define S_036400_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 15777 #define G_036400_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15778 #define C_036400_PERF_SEL1 0xFFF003FF 15779 #define S_036400_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 15780 #define G_036400_CNTR_MODE(x) (((x) >> 20) & 0xF) 15781 #define C_036400_CNTR_MODE 0xFF0FFFFF 15782 #define S_036400_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15783 #define G_036400_PERF_MODE1(x) (((x) >> 24) & 0xF) 15784 #define C_036400_PERF_MODE1 0xF0FFFFFF 15785 #define S_036400_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15786 #define G_036400_PERF_MODE(x) (((x) >> 28) & 0xF) 15787 #define C_036400_PERF_MODE 0x0FFFFFFF 15788 #define R_036404_PA_SU_PERFCOUNTER0_SELECT1 0x036404 /* >= gfx7 */ 15789 #define S_036404_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 15790 #define G_036404_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15791 #define C_036404_PERF_SEL2 0xFFFFFC00 15792 #define S_036404_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 15793 #define G_036404_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15794 #define C_036404_PERF_SEL3 0xFFF003FF 15795 #define S_036404_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15796 #define G_036404_PERF_MODE3(x) (((x) >> 24) & 0xF) 15797 #define C_036404_PERF_MODE3 0xF0FFFFFF 15798 #define S_036404_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15799 #define G_036404_PERF_MODE2(x) (((x) >> 28) & 0xF) 15800 #define C_036404_PERF_MODE2 0x0FFFFFFF 15801 #define R_036408_PA_SU_PERFCOUNTER1_SELECT 0x036408 /* >= gfx7 */ 15802 #define R_03640C_PA_SU_PERFCOUNTER1_SELECT1 0x03640C /* >= gfx7 */ 15803 #define R_036410_PA_SU_PERFCOUNTER2_SELECT 0x036410 /* >= gfx7 */ 15804 #define S_036410_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81, gfx9 */ 15805 #define G_036410_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15806 #define C_036410_PERF_SEL 0xFFFFFC00 15807 #define S_036410_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) /* gfx7, gfx8, gfx81, gfx9 */ 15808 #define G_036410_CNTR_MODE(x) (((x) >> 20) & 0xF) 15809 #define C_036410_CNTR_MODE 0xFF0FFFFF 15810 #define S_036410_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* gfx9 */ 15811 #define G_036410_PERF_MODE(x) (((x) >> 28) & 0xF) 15812 #define C_036410_PERF_MODE 0x0FFFFFFF 15813 #define R_036414_PA_SU_PERFCOUNTER2_SELECT1 0x036414 /* >= gfx10 */ 15814 #define R_036414_PA_SU_PERFCOUNTER3_SELECT 0x036414 /* gfx7, gfx8, gfx81, gfx9 */ 15815 #define R_036418_PA_SU_PERFCOUNTER3_SELECT 0x036418 /* >= gfx10 */ 15816 #define R_03641C_PA_SU_PERFCOUNTER3_SELECT1 0x03641C /* >= gfx10 */ 15817 #define R_036500_PA_SC_PERFCOUNTER0_SELECT 0x036500 /* >= gfx7 */ 15818 #define S_036500_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 15819 #define G_036500_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15820 #define C_036500_PERF_SEL 0xFFFFFC00 15821 #define S_036500_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 15822 #define G_036500_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15823 #define C_036500_PERF_SEL1 0xFFF003FF 15824 #define S_036500_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 15825 #define G_036500_CNTR_MODE(x) (((x) >> 20) & 0xF) 15826 #define C_036500_CNTR_MODE 0xFF0FFFFF 15827 #define S_036500_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15828 #define G_036500_PERF_MODE1(x) (((x) >> 24) & 0xF) 15829 #define C_036500_PERF_MODE1 0xF0FFFFFF 15830 #define S_036500_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15831 #define G_036500_PERF_MODE(x) (((x) >> 28) & 0xF) 15832 #define C_036500_PERF_MODE 0x0FFFFFFF 15833 #define R_036504_PA_SC_PERFCOUNTER0_SELECT1 0x036504 /* >= gfx7 */ 15834 #define S_036504_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 15835 #define G_036504_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15836 #define C_036504_PERF_SEL2 0xFFFFFC00 15837 #define S_036504_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 15838 #define G_036504_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15839 #define C_036504_PERF_SEL3 0xFFF003FF 15840 #define S_036504_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15841 #define G_036504_PERF_MODE3(x) (((x) >> 24) & 0xF) 15842 #define C_036504_PERF_MODE3 0xF0FFFFFF 15843 #define S_036504_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15844 #define G_036504_PERF_MODE2(x) (((x) >> 28) & 0xF) 15845 #define C_036504_PERF_MODE2 0x0FFFFFFF 15846 #define R_036508_PA_SC_PERFCOUNTER1_SELECT 0x036508 /* >= gfx7 */ 15847 #define S_036508_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 15848 #define G_036508_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15849 #define C_036508_PERF_SEL 0xFFFFFC00 15850 #define R_03650C_PA_SC_PERFCOUNTER2_SELECT 0x03650C /* >= gfx7 */ 15851 #define R_036510_PA_SC_PERFCOUNTER3_SELECT 0x036510 /* >= gfx7 */ 15852 #define R_036514_PA_SC_PERFCOUNTER4_SELECT 0x036514 /* >= gfx7 */ 15853 #define R_036518_PA_SC_PERFCOUNTER5_SELECT 0x036518 /* >= gfx7 */ 15854 #define R_03651C_PA_SC_PERFCOUNTER6_SELECT 0x03651C /* >= gfx7 */ 15855 #define R_036520_PA_SC_PERFCOUNTER7_SELECT 0x036520 /* >= gfx7 */ 15856 #define R_036600_SPI_PERFCOUNTER0_SELECT 0x036600 /* >= gfx7 */ 15857 #define S_036600_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 15858 #define G_036600_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15859 #define C_036600_PERF_SEL 0xFFFFFC00 15860 #define S_036600_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 15861 #define G_036600_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 15862 #define C_036600_PERF_SEL1 0xFFF003FF 15863 #define S_036600_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 15864 #define G_036600_CNTR_MODE(x) (((x) >> 20) & 0xF) 15865 #define C_036600_CNTR_MODE 0xFF0FFFFF 15866 #define S_036600_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15867 #define G_036600_PERF_MODE1(x) (((x) >> 24) & 0xF) 15868 #define C_036600_PERF_MODE1 0xF0FFFFFF 15869 #define S_036600_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15870 #define G_036600_PERF_MODE(x) (((x) >> 28) & 0xF) 15871 #define C_036600_PERF_MODE 0x0FFFFFFF 15872 #define R_036604_SPI_PERFCOUNTER1_SELECT 0x036604 /* >= gfx7 */ 15873 #define R_036608_SPI_PERFCOUNTER2_SELECT 0x036608 /* >= gfx7 */ 15874 #define R_03660C_SPI_PERFCOUNTER3_SELECT 0x03660C /* >= gfx7 */ 15875 #define R_036610_SPI_PERFCOUNTER0_SELECT1 0x036610 /* >= gfx7 */ 15876 #define S_036610_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 15877 #define G_036610_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 15878 #define C_036610_PERF_SEL2 0xFFFFFC00 15879 #define S_036610_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 15880 #define G_036610_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 15881 #define C_036610_PERF_SEL3 0xFFF003FF 15882 #define S_036610_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 15883 #define G_036610_PERF_MODE3(x) (((x) >> 24) & 0xF) 15884 #define C_036610_PERF_MODE3 0xF0FFFFFF 15885 #define S_036610_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 15886 #define G_036610_PERF_MODE2(x) (((x) >> 28) & 0xF) 15887 #define C_036610_PERF_MODE2 0x0FFFFFFF 15888 #define R_036614_SPI_PERFCOUNTER1_SELECT1 0x036614 /* >= gfx7 */ 15889 #define R_036618_SPI_PERFCOUNTER2_SELECT1 0x036618 /* >= gfx7 */ 15890 #define R_03661C_SPI_PERFCOUNTER3_SELECT1 0x03661C /* >= gfx7 */ 15891 #define R_036620_SPI_PERFCOUNTER4_SELECT 0x036620 /* >= gfx7 */ 15892 #define S_036620_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 15893 #define G_036620_PERF_SEL(x) (((x) >> 0) & 0x3FF) 15894 #define C_036620_PERF_SEL 0xFFFFFC00 15895 #define R_036624_SPI_PERFCOUNTER5_SELECT 0x036624 /* >= gfx7 */ 15896 #define R_036628_SPI_PERFCOUNTER_BINS 0x036628 /* >= gfx7 */ 15897 #define S_036628_BIN0_MIN(x) (((unsigned)(x) & 0xF) << 0) 15898 #define G_036628_BIN0_MIN(x) (((x) >> 0) & 0xF) 15899 #define C_036628_BIN0_MIN 0xFFFFFFF0 15900 #define S_036628_BIN0_MAX(x) (((unsigned)(x) & 0xF) << 4) 15901 #define G_036628_BIN0_MAX(x) (((x) >> 4) & 0xF) 15902 #define C_036628_BIN0_MAX 0xFFFFFF0F 15903 #define S_036628_BIN1_MIN(x) (((unsigned)(x) & 0xF) << 8) 15904 #define G_036628_BIN1_MIN(x) (((x) >> 8) & 0xF) 15905 #define C_036628_BIN1_MIN 0xFFFFF0FF 15906 #define S_036628_BIN1_MAX(x) (((unsigned)(x) & 0xF) << 12) 15907 #define G_036628_BIN1_MAX(x) (((x) >> 12) & 0xF) 15908 #define C_036628_BIN1_MAX 0xFFFF0FFF 15909 #define S_036628_BIN2_MIN(x) (((unsigned)(x) & 0xF) << 16) 15910 #define G_036628_BIN2_MIN(x) (((x) >> 16) & 0xF) 15911 #define C_036628_BIN2_MIN 0xFFF0FFFF 15912 #define S_036628_BIN2_MAX(x) (((unsigned)(x) & 0xF) << 20) 15913 #define G_036628_BIN2_MAX(x) (((x) >> 20) & 0xF) 15914 #define C_036628_BIN2_MAX 0xFF0FFFFF 15915 #define S_036628_BIN3_MIN(x) (((unsigned)(x) & 0xF) << 24) 15916 #define G_036628_BIN3_MIN(x) (((x) >> 24) & 0xF) 15917 #define C_036628_BIN3_MIN 0xF0FFFFFF 15918 #define S_036628_BIN3_MAX(x) (((unsigned)(x) & 0xF) << 28) 15919 #define G_036628_BIN3_MAX(x) (((x) >> 28) & 0xF) 15920 #define C_036628_BIN3_MAX 0x0FFFFFFF 15921 #define R_036700_SQ_PERFCOUNTER0_SELECT 0x036700 /* >= gfx7 */ 15922 #define S_036700_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 15923 #define G_036700_PERF_SEL(x) (((x) >> 0) & 0x1FF) 15924 #define C_036700_PERF_SEL 0xFFFFFE00 15925 #define S_036700_SQC_BANK_MASK(x) (((unsigned)(x) & 0xF) << 12) /* gfx7, gfx8, gfx81, gfx9, gfx10 */ 15926 #define G_036700_SQC_BANK_MASK(x) (((x) >> 12) & 0xF) 15927 #define C_036700_SQC_BANK_MASK 0xFFFF0FFF 15928 #define S_036700_SQC_CLIENT_MASK(x) (((unsigned)(x) & 0xF) << 16) /* gfx7, gfx8, gfx81, gfx9 */ 15929 #define G_036700_SQC_CLIENT_MASK(x) (((x) >> 16) & 0xF) 15930 #define C_036700_SQC_CLIENT_MASK 0xFFF0FFFF 15931 #define S_036700_SPM_MODE(x) (((unsigned)(x) & 0xF) << 20) 15932 #define G_036700_SPM_MODE(x) (((x) >> 20) & 0xF) 15933 #define C_036700_SPM_MODE 0xFF0FFFFF 15934 #define S_036700_SIMD_MASK(x) (((unsigned)(x) & 0xF) << 24) /* gfx7, gfx8, gfx81, gfx9 */ 15935 #define G_036700_SIMD_MASK(x) (((x) >> 24) & 0xF) 15936 #define C_036700_SIMD_MASK 0xF0FFFFFF 15937 #define S_036700_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 15938 #define G_036700_PERF_MODE(x) (((x) >> 28) & 0xF) 15939 #define C_036700_PERF_MODE 0x0FFFFFFF 15940 #define R_036704_SQ_PERFCOUNTER1_SELECT 0x036704 /* >= gfx7 */ 15941 #define R_036708_SQ_PERFCOUNTER2_SELECT 0x036708 /* >= gfx7 */ 15942 #define R_03670C_SQ_PERFCOUNTER3_SELECT 0x03670C /* >= gfx7 */ 15943 #define R_036710_SQ_PERFCOUNTER4_SELECT 0x036710 /* >= gfx7 */ 15944 #define R_036714_SQ_PERFCOUNTER5_SELECT 0x036714 /* >= gfx7 */ 15945 #define R_036718_SQ_PERFCOUNTER6_SELECT 0x036718 /* >= gfx7 */ 15946 #define R_03671C_SQ_PERFCOUNTER7_SELECT 0x03671C /* >= gfx7 */ 15947 #define R_036720_SQ_PERFCOUNTER8_SELECT 0x036720 /* >= gfx7 */ 15948 #define R_036724_SQ_PERFCOUNTER9_SELECT 0x036724 /* >= gfx7 */ 15949 #define R_036728_SQ_PERFCOUNTER10_SELECT 0x036728 /* >= gfx7 */ 15950 #define R_03672C_SQ_PERFCOUNTER11_SELECT 0x03672C /* >= gfx7 */ 15951 #define R_036730_SQ_PERFCOUNTER12_SELECT 0x036730 /* >= gfx7 */ 15952 #define R_036734_SQ_PERFCOUNTER13_SELECT 0x036734 /* >= gfx7 */ 15953 #define R_036738_SQ_PERFCOUNTER14_SELECT 0x036738 /* >= gfx7 */ 15954 #define R_03673C_SQ_PERFCOUNTER15_SELECT 0x03673C /* >= gfx7 */ 15955 #define R_036780_SQ_PERFCOUNTER_CTRL 0x036780 /* >= gfx7 */ 15956 #define S_036780_PS_EN(x) (((unsigned)(x) & 0x1) << 0) 15957 #define G_036780_PS_EN(x) (((x) >> 0) & 0x1) 15958 #define C_036780_PS_EN 0xFFFFFFFE 15959 #define S_036780_VS_EN(x) (((unsigned)(x) & 0x1) << 1) 15960 #define G_036780_VS_EN(x) (((x) >> 1) & 0x1) 15961 #define C_036780_VS_EN 0xFFFFFFFD 15962 #define V_036780_VS_STAGE_REAL 0 15963 #define V_036780_VS_STAGE_DS 1 15964 #define V_036780_VS_STAGE_COPY_SHADER 2 15965 #define V_036780_RESERVED_VS 3 15966 #define S_036780_GS_EN(x) (((unsigned)(x) & 0x1) << 2) 15967 #define G_036780_GS_EN(x) (((x) >> 2) & 0x1) 15968 #define C_036780_GS_EN 0xFFFFFFFB 15969 #define V_036780_GS_STAGE_OFF 0 15970 #define V_036780_GS_STAGE_ON 1 15971 #define S_036780_ES_EN(x) (((unsigned)(x) & 0x1) << 3) 15972 #define G_036780_ES_EN(x) (((x) >> 3) & 0x1) 15973 #define C_036780_ES_EN 0xFFFFFFF7 15974 #define V_036780_ES_STAGE_OFF 0 15975 #define V_036780_ES_STAGE_DS 1 15976 #define V_036780_ES_STAGE_REAL 2 15977 #define V_036780_RESERVED_ES 3 15978 #define S_036780_HS_EN(x) (((unsigned)(x) & 0x1) << 4) 15979 #define G_036780_HS_EN(x) (((x) >> 4) & 0x1) 15980 #define C_036780_HS_EN 0xFFFFFFEF 15981 #define V_036780_HS_STAGE_OFF 0 15982 #define V_036780_HS_STAGE_ON 1 15983 #define S_036780_LS_EN(x) (((unsigned)(x) & 0x1) << 5) 15984 #define G_036780_LS_EN(x) (((x) >> 5) & 0x1) 15985 #define C_036780_LS_EN 0xFFFFFFDF 15986 #define V_036780_LS_STAGE_OFF 0 15987 #define V_036780_LS_STAGE_ON 1 15988 #define V_036780_CS_STAGE_ON 2 15989 #define V_036780_RESERVED_LS 3 15990 #define S_036780_CS_EN(x) (((unsigned)(x) & 0x1) << 6) 15991 #define G_036780_CS_EN(x) (((x) >> 6) & 0x1) 15992 #define C_036780_CS_EN 0xFFFFFFBF 15993 #define S_036780_CNTR_RATE(x) (((unsigned)(x) & 0x1F) << 8) 15994 #define G_036780_CNTR_RATE(x) (((x) >> 8) & 0x1F) 15995 #define C_036780_CNTR_RATE 0xFFFFE0FF 15996 #define S_036780_DISABLE_FLUSH(x) (((unsigned)(x) & 0x1) << 13) 15997 #define G_036780_DISABLE_FLUSH(x) (((x) >> 13) & 0x1) 15998 #define C_036780_DISABLE_FLUSH 0xFFFFDFFF 15999 #define S_036780_DISABLE_ME0PIPE0_PERF(x) (((unsigned)(x) & 0x1) << 14) /* >= gfx103 */ 16000 #define G_036780_DISABLE_ME0PIPE0_PERF(x) (((x) >> 14) & 0x1) 16001 #define C_036780_DISABLE_ME0PIPE0_PERF 0xFFFFBFFF 16002 #define S_036780_DISABLE_ME0PIPE1_PERF(x) (((unsigned)(x) & 0x1) << 15) /* >= gfx103 */ 16003 #define G_036780_DISABLE_ME0PIPE1_PERF(x) (((x) >> 15) & 0x1) 16004 #define C_036780_DISABLE_ME0PIPE1_PERF 0xFFFF7FFF 16005 #define S_036780_DISABLE_ME1PIPE0_PERF(x) (((unsigned)(x) & 0x1) << 16) /* >= gfx103 */ 16006 #define G_036780_DISABLE_ME1PIPE0_PERF(x) (((x) >> 16) & 0x1) 16007 #define C_036780_DISABLE_ME1PIPE0_PERF 0xFFFEFFFF 16008 #define S_036780_DISABLE_ME1PIPE1_PERF(x) (((unsigned)(x) & 0x1) << 17) /* >= gfx103 */ 16009 #define G_036780_DISABLE_ME1PIPE1_PERF(x) (((x) >> 17) & 0x1) 16010 #define C_036780_DISABLE_ME1PIPE1_PERF 0xFFFDFFFF 16011 #define S_036780_DISABLE_ME1PIPE2_PERF(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx103 */ 16012 #define G_036780_DISABLE_ME1PIPE2_PERF(x) (((x) >> 18) & 0x1) 16013 #define C_036780_DISABLE_ME1PIPE2_PERF 0xFFFBFFFF 16014 #define S_036780_DISABLE_ME1PIPE3_PERF(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx103 */ 16015 #define G_036780_DISABLE_ME1PIPE3_PERF(x) (((x) >> 19) & 0x1) 16016 #define C_036780_DISABLE_ME1PIPE3_PERF 0xFFF7FFFF 16017 #define R_036784_SQ_PERFCOUNTER_MASK 0x036784 /* gfx7, gfx8, gfx81, gfx9 */ 16018 #define S_036784_SH0_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) 16019 #define G_036784_SH0_MASK(x) (((x) >> 0) & 0xFFFF) 16020 #define C_036784_SH0_MASK 0xFFFF0000 16021 #define S_036784_SH1_MASK(x) (((unsigned)(x) & 0xFFFF) << 16) 16022 #define G_036784_SH1_MASK(x) (((x) >> 16) & 0xFFFF) 16023 #define C_036784_SH1_MASK 0x0000FFFF 16024 #define R_036788_SQ_PERFCOUNTER_CTRL2 0x036788 /* >= gfx7 */ 16025 #define S_036788_FORCE_EN(x) (((unsigned)(x) & 0x1) << 0) 16026 #define G_036788_FORCE_EN(x) (((x) >> 0) & 0x1) 16027 #define C_036788_FORCE_EN 0xFFFFFFFE 16028 #define R_036800_GCEA_PERFCOUNTER2_SELECT 0x036800 /* >= gfx10 */ 16029 #define S_036800_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16030 #define G_036800_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16031 #define C_036800_PERF_SEL 0xFFFFFC00 16032 #define S_036800_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 16033 #define G_036800_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16034 #define C_036800_PERF_SEL1 0xFFF003FF 16035 #define S_036800_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16036 #define G_036800_CNTR_MODE(x) (((x) >> 20) & 0xF) 16037 #define C_036800_CNTR_MODE 0xFF0FFFFF 16038 #define S_036800_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16039 #define G_036800_PERF_MODE1(x) (((x) >> 24) & 0xF) 16040 #define C_036800_PERF_MODE1 0xF0FFFFFF 16041 #define S_036800_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16042 #define G_036800_PERF_MODE(x) (((x) >> 28) & 0xF) 16043 #define C_036800_PERF_MODE 0x0FFFFFFF 16044 #define R_036804_GCEA_PERFCOUNTER2_SELECT1 0x036804 /* >= gfx10 */ 16045 #define S_036804_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 16046 #define G_036804_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16047 #define C_036804_PERF_SEL2 0xFFFFFC00 16048 #define S_036804_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 16049 #define G_036804_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16050 #define C_036804_PERF_SEL3 0xFFF003FF 16051 #define S_036804_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 16052 #define G_036804_PERF_MODE3(x) (((x) >> 24) & 0xF) 16053 #define C_036804_PERF_MODE3 0xF0FFFFFF 16054 #define S_036804_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 16055 #define G_036804_PERF_MODE2(x) (((x) >> 28) & 0xF) 16056 #define C_036804_PERF_MODE2 0x0FFFFFFF 16057 #define R_036808_GCEA_PERFCOUNTER2_MODE 0x036808 /* >= gfx10 */ 16058 #define S_036808_COMPARE_MODE0(x) (((unsigned)(x) & 0x3) << 0) 16059 #define G_036808_COMPARE_MODE0(x) (((x) >> 0) & 0x3) 16060 #define C_036808_COMPARE_MODE0 0xFFFFFFFC 16061 #define S_036808_COMPARE_MODE1(x) (((unsigned)(x) & 0x3) << 2) 16062 #define G_036808_COMPARE_MODE1(x) (((x) >> 2) & 0x3) 16063 #define C_036808_COMPARE_MODE1 0xFFFFFFF3 16064 #define S_036808_COMPARE_MODE2(x) (((unsigned)(x) & 0x3) << 4) 16065 #define G_036808_COMPARE_MODE2(x) (((x) >> 4) & 0x3) 16066 #define C_036808_COMPARE_MODE2 0xFFFFFFCF 16067 #define S_036808_COMPARE_MODE3(x) (((unsigned)(x) & 0x3) << 6) 16068 #define G_036808_COMPARE_MODE3(x) (((x) >> 6) & 0x3) 16069 #define C_036808_COMPARE_MODE3 0xFFFFFF3F 16070 #define S_036808_COMPARE_VALUE0(x) (((unsigned)(x) & 0xF) << 8) 16071 #define G_036808_COMPARE_VALUE0(x) (((x) >> 8) & 0xF) 16072 #define C_036808_COMPARE_VALUE0 0xFFFFF0FF 16073 #define S_036808_COMPARE_VALUE1(x) (((unsigned)(x) & 0xF) << 12) 16074 #define G_036808_COMPARE_VALUE1(x) (((x) >> 12) & 0xF) 16075 #define C_036808_COMPARE_VALUE1 0xFFFF0FFF 16076 #define S_036808_COMPARE_VALUE2(x) (((unsigned)(x) & 0xF) << 16) 16077 #define G_036808_COMPARE_VALUE2(x) (((x) >> 16) & 0xF) 16078 #define C_036808_COMPARE_VALUE2 0xFFF0FFFF 16079 #define S_036808_COMPARE_VALUE3(x) (((unsigned)(x) & 0xF) << 20) 16080 #define G_036808_COMPARE_VALUE3(x) (((x) >> 20) & 0xF) 16081 #define C_036808_COMPARE_VALUE3 0xFF0FFFFF 16082 #define R_03680C_GCEA_PERFCOUNTER0_CFG 0x03680C /* >= gfx103 */ 16083 #define S_03680C_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 16084 #define G_03680C_PERF_SEL(x) (((x) >> 0) & 0xFF) 16085 #define C_03680C_PERF_SEL 0xFFFFFF00 16086 #define S_03680C_PERF_SEL_END(x) (((unsigned)(x) & 0xFF) << 8) 16087 #define G_03680C_PERF_SEL_END(x) (((x) >> 8) & 0xFF) 16088 #define C_03680C_PERF_SEL_END 0xFFFF00FF 16089 #define S_03680C_PERF_MODE(x) (((unsigned)(x) & 0xF) << 24) 16090 #define G_03680C_PERF_MODE(x) (((x) >> 24) & 0xF) 16091 #define C_03680C_PERF_MODE 0xF0FFFFFF 16092 #define S_03680C_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 16093 #define G_03680C_ENABLE(x) (((x) >> 28) & 0x1) 16094 #define C_03680C_ENABLE 0xEFFFFFFF 16095 #define S_03680C_CLEAR(x) (((unsigned)(x) & 0x1) << 29) 16096 #define G_03680C_CLEAR(x) (((x) >> 29) & 0x1) 16097 #define C_03680C_CLEAR 0xDFFFFFFF 16098 #define R_036810_GCEA_PERFCOUNTER1_CFG 0x036810 /* >= gfx103 */ 16099 #define R_036814_GCEA_PERFCOUNTER_RSLT_CNTL 0x036814 /* >= gfx103 */ 16100 #define S_036814_PERF_COUNTER_SELECT(x) (((unsigned)(x) & 0xF) << 0) 16101 #define G_036814_PERF_COUNTER_SELECT(x) (((x) >> 0) & 0xF) 16102 #define C_036814_PERF_COUNTER_SELECT 0xFFFFFFF0 16103 #define S_036814_START_TRIGGER(x) (((unsigned)(x) & 0xFF) << 8) 16104 #define G_036814_START_TRIGGER(x) (((x) >> 8) & 0xFF) 16105 #define C_036814_START_TRIGGER 0xFFFF00FF 16106 #define S_036814_STOP_TRIGGER(x) (((unsigned)(x) & 0xFF) << 16) 16107 #define G_036814_STOP_TRIGGER(x) (((x) >> 16) & 0xFF) 16108 #define C_036814_STOP_TRIGGER 0xFF00FFFF 16109 #define S_036814_ENABLE_ANY(x) (((unsigned)(x) & 0x1) << 24) 16110 #define G_036814_ENABLE_ANY(x) (((x) >> 24) & 0x1) 16111 #define C_036814_ENABLE_ANY 0xFEFFFFFF 16112 #define S_036814_CLEAR_ALL(x) (((unsigned)(x) & 0x1) << 25) 16113 #define G_036814_CLEAR_ALL(x) (((x) >> 25) & 0x1) 16114 #define C_036814_CLEAR_ALL 0xFDFFFFFF 16115 #define S_036814_STOP_ALL_ON_SATURATE(x) (((unsigned)(x) & 0x1) << 26) 16116 #define G_036814_STOP_ALL_ON_SATURATE(x) (((x) >> 26) & 0x1) 16117 #define C_036814_STOP_ALL_ON_SATURATE 0xFBFFFFFF 16118 #define R_036900_SX_PERFCOUNTER0_SELECT 0x036900 /* >= gfx7 */ 16119 #define S_036900_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81, gfx10 */ 16120 #define G_036900_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) 16121 #define C_036900_PERFCOUNTER_SELECT 0xFFFFFC00 16122 #define S_036900_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx9, >= gfx103 */ 16123 #define G_036900_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16124 #define C_036900_PERF_SEL 0xFFFFFC00 16125 #define S_036900_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx7, gfx8, gfx81, gfx10 */ 16126 #define G_036900_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) 16127 #define C_036900_PERFCOUNTER_SELECT1 0xFFF003FF 16128 #define S_036900_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx9, >= gfx103 */ 16129 #define G_036900_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16130 #define C_036900_PERF_SEL1 0xFFF003FF 16131 #define S_036900_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16132 #define G_036900_CNTR_MODE(x) (((x) >> 20) & 0xF) 16133 #define C_036900_CNTR_MODE 0xFF0FFFFF 16134 #define S_036900_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) /* gfx9, >= gfx103 */ 16135 #define G_036900_PERF_MODE1(x) (((x) >> 24) & 0xF) 16136 #define C_036900_PERF_MODE1 0xF0FFFFFF 16137 #define S_036900_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* gfx9, >= gfx103 */ 16138 #define G_036900_PERF_MODE(x) (((x) >> 28) & 0xF) 16139 #define C_036900_PERF_MODE 0x0FFFFFFF 16140 #define R_036904_SX_PERFCOUNTER1_SELECT 0x036904 /* >= gfx7 */ 16141 #define R_036908_SX_PERFCOUNTER2_SELECT 0x036908 /* >= gfx7 */ 16142 #define S_036908_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx9, >= gfx103 */ 16143 #define G_036908_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16144 #define C_036908_PERF_SEL 0xFFFFFC00 16145 #define S_036908_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) /* gfx9, >= gfx103 */ 16146 #define G_036908_CNTR_MODE(x) (((x) >> 20) & 0xF) 16147 #define C_036908_CNTR_MODE 0xFF0FFFFF 16148 #define S_036908_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* gfx9, >= gfx103 */ 16149 #define G_036908_PERF_MODE(x) (((x) >> 28) & 0xF) 16150 #define C_036908_PERF_MODE 0x0FFFFFFF 16151 #define R_03690C_SX_PERFCOUNTER3_SELECT 0x03690C /* >= gfx7 */ 16152 #define R_036910_SX_PERFCOUNTER0_SELECT1 0x036910 /* >= gfx7 */ 16153 #define S_036910_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81, gfx10 */ 16154 #define G_036910_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) 16155 #define C_036910_PERFCOUNTER_SELECT2 0xFFFFFC00 16156 #define S_036910_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx9, >= gfx103 */ 16157 #define G_036910_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16158 #define C_036910_PERF_SEL2 0xFFFFFC00 16159 #define S_036910_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx7, gfx8, gfx81, gfx10 */ 16160 #define G_036910_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) 16161 #define C_036910_PERFCOUNTER_SELECT3 0xFFF003FF 16162 #define S_036910_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx9, >= gfx103 */ 16163 #define G_036910_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16164 #define C_036910_PERF_SEL3 0xFFF003FF 16165 #define S_036910_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) /* gfx9, >= gfx103 */ 16166 #define G_036910_PERF_MODE3(x) (((x) >> 24) & 0xF) 16167 #define C_036910_PERF_MODE3 0xF0FFFFFF 16168 #define S_036910_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) /* gfx9, >= gfx103 */ 16169 #define G_036910_PERF_MODE2(x) (((x) >> 28) & 0xF) 16170 #define C_036910_PERF_MODE2 0x0FFFFFFF 16171 #define R_036914_SX_PERFCOUNTER1_SELECT1 0x036914 /* >= gfx7 */ 16172 #define R_036A00_GDS_PERFCOUNTER0_SELECT 0x036A00 /* >= gfx7 */ 16173 #define S_036A00_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81 */ 16174 #define G_036A00_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) 16175 #define C_036A00_PERFCOUNTER_SELECT 0xFFFFFC00 16176 #define S_036A00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* >= gfx9 */ 16177 #define G_036A00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16178 #define C_036A00_PERF_SEL 0xFFFFFC00 16179 #define S_036A00_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx7, gfx8, gfx81 */ 16180 #define G_036A00_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) 16181 #define C_036A00_PERFCOUNTER_SELECT1 0xFFF003FF 16182 #define S_036A00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) /* >= gfx9 */ 16183 #define G_036A00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16184 #define C_036A00_PERF_SEL1 0xFFF003FF 16185 #define S_036A00_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16186 #define G_036A00_CNTR_MODE(x) (((x) >> 20) & 0xF) 16187 #define C_036A00_CNTR_MODE 0xFF0FFFFF 16188 #define S_036A00_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 16189 #define G_036A00_PERF_MODE1(x) (((x) >> 24) & 0xF) 16190 #define C_036A00_PERF_MODE1 0xF0FFFFFF 16191 #define S_036A00_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 16192 #define G_036A00_PERF_MODE(x) (((x) >> 28) & 0xF) 16193 #define C_036A00_PERF_MODE 0x0FFFFFFF 16194 #define R_036A04_GDS_PERFCOUNTER1_SELECT 0x036A04 /* >= gfx7 */ 16195 #define R_036A08_GDS_PERFCOUNTER2_SELECT 0x036A08 /* >= gfx7 */ 16196 #define R_036A0C_GDS_PERFCOUNTER3_SELECT 0x036A0C /* >= gfx7 */ 16197 #define R_036A10_GDS_PERFCOUNTER0_SELECT1 0x036A10 /* >= gfx7 */ 16198 #define S_036A10_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7, gfx8, gfx81 */ 16199 #define G_036A10_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) 16200 #define C_036A10_PERFCOUNTER_SELECT2 0xFFFFFC00 16201 #define S_036A10_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) /* >= gfx9 */ 16202 #define G_036A10_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16203 #define C_036A10_PERF_SEL2 0xFFFFFC00 16204 #define S_036A10_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx7, gfx8, gfx81 */ 16205 #define G_036A10_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) 16206 #define C_036A10_PERFCOUNTER_SELECT3 0xFFF003FF 16207 #define S_036A10_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) /* >= gfx9 */ 16208 #define G_036A10_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16209 #define C_036A10_PERF_SEL3 0xFFF003FF 16210 #define S_036A10_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) /* >= gfx9 */ 16211 #define G_036A10_PERF_MODE3(x) (((x) >> 24) & 0xF) 16212 #define C_036A10_PERF_MODE3 0xF0FFFFFF 16213 #define S_036A10_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 16214 #define G_036A10_PERF_MODE2(x) (((x) >> 28) & 0xF) 16215 #define C_036A10_PERF_MODE2 0x0FFFFFFF 16216 #define R_036A14_GDS_PERFCOUNTER1_SELECT1 0x036A14 /* >= gfx103 */ 16217 #define R_036A18_GDS_PERFCOUNTER2_SELECT1 0x036A18 /* >= gfx103 */ 16218 #define R_036A1C_GDS_PERFCOUNTER3_SELECT1 0x036A1C /* >= gfx103 */ 16219 #define R_036B00_TA_PERFCOUNTER0_SELECT 0x036B00 /* >= gfx7 */ 16220 #define S_036B00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16221 #define G_036B00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16222 #define C_036B00_PERF_SEL 0xFFFFFC00 16223 #define S_036B00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 16224 #define G_036B00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16225 #define C_036B00_PERF_SEL1 0xFFF003FF 16226 #define S_036B00_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16227 #define G_036B00_CNTR_MODE(x) (((x) >> 20) & 0xF) 16228 #define C_036B00_CNTR_MODE 0xFF0FFFFF 16229 #define S_036B00_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16230 #define G_036B00_PERF_MODE1(x) (((x) >> 24) & 0xF) 16231 #define C_036B00_PERF_MODE1 0xF0FFFFFF 16232 #define S_036B00_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16233 #define G_036B00_PERF_MODE(x) (((x) >> 28) & 0xF) 16234 #define C_036B00_PERF_MODE 0x0FFFFFFF 16235 #define R_036B04_TA_PERFCOUNTER0_SELECT1 0x036B04 /* >= gfx7 */ 16236 #define S_036B04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 16237 #define G_036B04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16238 #define C_036B04_PERF_SEL2 0xFFFFFC00 16239 #define S_036B04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 16240 #define G_036B04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16241 #define C_036B04_PERF_SEL3 0xFFF003FF 16242 #define S_036B04_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 16243 #define G_036B04_PERF_MODE3(x) (((x) >> 24) & 0xF) 16244 #define C_036B04_PERF_MODE3 0xF0FFFFFF 16245 #define S_036B04_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 16246 #define G_036B04_PERF_MODE2(x) (((x) >> 28) & 0xF) 16247 #define C_036B04_PERF_MODE2 0x0FFFFFFF 16248 #define R_036B08_TA_PERFCOUNTER1_SELECT 0x036B08 /* >= gfx7 */ 16249 #define S_036B08_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* >= gfx9 */ 16250 #define G_036B08_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16251 #define C_036B08_PERF_SEL 0xFFFFFC00 16252 #define S_036B08_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) /* >= gfx9 */ 16253 #define G_036B08_CNTR_MODE(x) (((x) >> 20) & 0xF) 16254 #define C_036B08_CNTR_MODE 0xFF0FFFFF 16255 #define S_036B08_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 16256 #define G_036B08_PERF_MODE(x) (((x) >> 28) & 0xF) 16257 #define C_036B08_PERF_MODE 0x0FFFFFFF 16258 #define R_036C00_TD_PERFCOUNTER0_SELECT 0x036C00 /* >= gfx7 */ 16259 #define S_036C00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16260 #define G_036C00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16261 #define C_036C00_PERF_SEL 0xFFFFFC00 16262 #define S_036C00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 16263 #define G_036C00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16264 #define C_036C00_PERF_SEL1 0xFFF003FF 16265 #define S_036C00_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16266 #define G_036C00_CNTR_MODE(x) (((x) >> 20) & 0xF) 16267 #define C_036C00_CNTR_MODE 0xFF0FFFFF 16268 #define S_036C00_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16269 #define G_036C00_PERF_MODE1(x) (((x) >> 24) & 0xF) 16270 #define C_036C00_PERF_MODE1 0xF0FFFFFF 16271 #define S_036C00_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16272 #define G_036C00_PERF_MODE(x) (((x) >> 28) & 0xF) 16273 #define C_036C00_PERF_MODE 0x0FFFFFFF 16274 #define R_036C04_TD_PERFCOUNTER0_SELECT1 0x036C04 /* >= gfx7 */ 16275 #define S_036C04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 16276 #define G_036C04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16277 #define C_036C04_PERF_SEL2 0xFFFFFC00 16278 #define S_036C04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 16279 #define G_036C04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16280 #define C_036C04_PERF_SEL3 0xFFF003FF 16281 #define S_036C04_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 16282 #define G_036C04_PERF_MODE3(x) (((x) >> 24) & 0xF) 16283 #define C_036C04_PERF_MODE3 0xF0FFFFFF 16284 #define S_036C04_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 16285 #define G_036C04_PERF_MODE2(x) (((x) >> 28) & 0xF) 16286 #define C_036C04_PERF_MODE2 0x0FFFFFFF 16287 #define R_036C08_TD_PERFCOUNTER1_SELECT 0x036C08 /* >= gfx7 */ 16288 #define S_036C08_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* >= gfx9 */ 16289 #define G_036C08_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16290 #define C_036C08_PERF_SEL 0xFFFFFC00 16291 #define S_036C08_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) /* >= gfx9 */ 16292 #define G_036C08_CNTR_MODE(x) (((x) >> 20) & 0xF) 16293 #define C_036C08_CNTR_MODE 0xFF0FFFFF 16294 #define S_036C08_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* >= gfx9 */ 16295 #define G_036C08_PERF_MODE(x) (((x) >> 28) & 0xF) 16296 #define C_036C08_PERF_MODE 0x0FFFFFFF 16297 #define R_036D00_TCP_PERFCOUNTER0_SELECT 0x036D00 /* >= gfx7 */ 16298 #define S_036D00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16299 #define G_036D00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16300 #define C_036D00_PERF_SEL 0xFFFFFC00 16301 #define S_036D00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 16302 #define G_036D00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16303 #define C_036D00_PERF_SEL1 0xFFF003FF 16304 #define S_036D00_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16305 #define G_036D00_CNTR_MODE(x) (((x) >> 20) & 0xF) 16306 #define C_036D00_CNTR_MODE 0xFF0FFFFF 16307 #define S_036D00_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16308 #define G_036D00_PERF_MODE1(x) (((x) >> 24) & 0xF) 16309 #define C_036D00_PERF_MODE1 0xF0FFFFFF 16310 #define S_036D00_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16311 #define G_036D00_PERF_MODE(x) (((x) >> 28) & 0xF) 16312 #define C_036D00_PERF_MODE 0x0FFFFFFF 16313 #define R_036D04_TCP_PERFCOUNTER0_SELECT1 0x036D04 /* >= gfx7 */ 16314 #define S_036D04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 16315 #define G_036D04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16316 #define C_036D04_PERF_SEL2 0xFFFFFC00 16317 #define S_036D04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 16318 #define G_036D04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16319 #define C_036D04_PERF_SEL3 0xFFF003FF 16320 #define S_036D04_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 16321 #define G_036D04_PERF_MODE3(x) (((x) >> 24) & 0xF) 16322 #define C_036D04_PERF_MODE3 0xF0FFFFFF 16323 #define S_036D04_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 16324 #define G_036D04_PERF_MODE2(x) (((x) >> 28) & 0xF) 16325 #define C_036D04_PERF_MODE2 0x0FFFFFFF 16326 #define R_036D08_TCP_PERFCOUNTER1_SELECT 0x036D08 /* >= gfx7 */ 16327 #define R_036D0C_TCP_PERFCOUNTER1_SELECT1 0x036D0C /* >= gfx7 */ 16328 #define R_036D10_TCP_PERFCOUNTER2_SELECT 0x036D10 /* >= gfx7 */ 16329 #define S_036D10_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16330 #define G_036D10_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16331 #define C_036D10_PERF_SEL 0xFFFFFC00 16332 #define S_036D10_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16333 #define G_036D10_CNTR_MODE(x) (((x) >> 20) & 0xF) 16334 #define C_036D10_CNTR_MODE 0xFF0FFFFF 16335 #define S_036D10_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16336 #define G_036D10_PERF_MODE(x) (((x) >> 28) & 0xF) 16337 #define C_036D10_PERF_MODE 0x0FFFFFFF 16338 #define R_036D14_TCP_PERFCOUNTER3_SELECT 0x036D14 /* >= gfx7 */ 16339 #define R_036E00_GL2C_PERFCOUNTER0_SELECT 0x036E00 /* >= gfx10 */ 16340 #define S_036E00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16341 #define G_036E00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16342 #define C_036E00_PERF_SEL 0xFFFFFC00 16343 #define S_036E00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 16344 #define G_036E00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16345 #define C_036E00_PERF_SEL1 0xFFF003FF 16346 #define S_036E00_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16347 #define G_036E00_CNTR_MODE(x) (((x) >> 20) & 0xF) 16348 #define C_036E00_CNTR_MODE 0xFF0FFFFF 16349 #define S_036E00_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16350 #define G_036E00_PERF_MODE1(x) (((x) >> 24) & 0xF) 16351 #define C_036E00_PERF_MODE1 0xF0FFFFFF 16352 #define S_036E00_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16353 #define G_036E00_PERF_MODE(x) (((x) >> 28) & 0xF) 16354 #define C_036E00_PERF_MODE 0x0FFFFFFF 16355 #define R_036E00_TCC_PERFCOUNTER0_SELECT 0x036E00 /* gfx7, gfx8, gfx81, gfx9 */ 16356 #define R_036E04_GL2C_PERFCOUNTER0_SELECT1 0x036E04 /* >= gfx10 */ 16357 #define S_036E04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 16358 #define G_036E04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16359 #define C_036E04_PERF_SEL2 0xFFFFFC00 16360 #define S_036E04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 16361 #define G_036E04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16362 #define C_036E04_PERF_SEL3 0xFFF003FF 16363 #define S_036E04_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) 16364 #define G_036E04_PERF_MODE2(x) (((x) >> 24) & 0xF) 16365 #define C_036E04_PERF_MODE2 0xF0FFFFFF 16366 #define S_036E04_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) 16367 #define G_036E04_PERF_MODE3(x) (((x) >> 28) & 0xF) 16368 #define C_036E04_PERF_MODE3 0x0FFFFFFF 16369 #define R_036E04_TCC_PERFCOUNTER0_SELECT1 0x036E04 /* gfx7, gfx8, gfx81, gfx9 */ 16370 #define R_036E08_GL2C_PERFCOUNTER1_SELECT 0x036E08 /* >= gfx10 */ 16371 #define R_036E08_TCC_PERFCOUNTER1_SELECT 0x036E08 /* gfx7, gfx8, gfx81, gfx9 */ 16372 #define R_036E0C_GL2C_PERFCOUNTER1_SELECT1 0x036E0C /* >= gfx10 */ 16373 #define R_036E0C_TCC_PERFCOUNTER1_SELECT1 0x036E0C /* gfx7, gfx8, gfx81, gfx9 */ 16374 #define R_036E10_GL2C_PERFCOUNTER2_SELECT 0x036E10 /* >= gfx10 */ 16375 #define S_036E10_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16376 #define G_036E10_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16377 #define C_036E10_PERF_SEL 0xFFFFFC00 16378 #define S_036E10_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16379 #define G_036E10_CNTR_MODE(x) (((x) >> 20) & 0xF) 16380 #define C_036E10_CNTR_MODE 0xFF0FFFFF 16381 #define S_036E10_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16382 #define G_036E10_PERF_MODE(x) (((x) >> 28) & 0xF) 16383 #define C_036E10_PERF_MODE 0x0FFFFFFF 16384 #define R_036E10_TCC_PERFCOUNTER2_SELECT 0x036E10 /* gfx7, gfx8, gfx81, gfx9 */ 16385 #define R_036E14_GL2C_PERFCOUNTER3_SELECT 0x036E14 /* >= gfx10 */ 16386 #define R_036E14_TCC_PERFCOUNTER3_SELECT 0x036E14 /* gfx7, gfx8, gfx81, gfx9 */ 16387 #define R_036E40_GL2A_PERFCOUNTER0_SELECT 0x036E40 /* >= gfx10 */ 16388 #define S_036E40_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16389 #define G_036E40_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16390 #define C_036E40_PERF_SEL 0xFFFFFC00 16391 #define S_036E40_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 16392 #define G_036E40_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16393 #define C_036E40_PERF_SEL1 0xFFF003FF 16394 #define S_036E40_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16395 #define G_036E40_CNTR_MODE(x) (((x) >> 20) & 0xF) 16396 #define C_036E40_CNTR_MODE 0xFF0FFFFF 16397 #define S_036E40_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16398 #define G_036E40_PERF_MODE1(x) (((x) >> 24) & 0xF) 16399 #define C_036E40_PERF_MODE1 0xF0FFFFFF 16400 #define S_036E40_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16401 #define G_036E40_PERF_MODE(x) (((x) >> 28) & 0xF) 16402 #define C_036E40_PERF_MODE 0x0FFFFFFF 16403 #define R_036E40_TCA_PERFCOUNTER0_SELECT 0x036E40 /* gfx7, gfx8, gfx81, gfx9 */ 16404 #define R_036E44_GL2A_PERFCOUNTER0_SELECT1 0x036E44 /* >= gfx10 */ 16405 #define S_036E44_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 16406 #define G_036E44_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16407 #define C_036E44_PERF_SEL2 0xFFFFFC00 16408 #define S_036E44_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 16409 #define G_036E44_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16410 #define C_036E44_PERF_SEL3 0xFFF003FF 16411 #define S_036E44_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) 16412 #define G_036E44_PERF_MODE2(x) (((x) >> 24) & 0xF) 16413 #define C_036E44_PERF_MODE2 0xF0FFFFFF 16414 #define S_036E44_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) 16415 #define G_036E44_PERF_MODE3(x) (((x) >> 28) & 0xF) 16416 #define C_036E44_PERF_MODE3 0x0FFFFFFF 16417 #define R_036E44_TCA_PERFCOUNTER0_SELECT1 0x036E44 /* gfx7, gfx8, gfx81, gfx9 */ 16418 #define R_036E48_GL2A_PERFCOUNTER1_SELECT 0x036E48 /* >= gfx10 */ 16419 #define R_036E48_TCA_PERFCOUNTER1_SELECT 0x036E48 /* gfx7, gfx8, gfx81, gfx9 */ 16420 #define R_036E4C_GL2A_PERFCOUNTER1_SELECT1 0x036E4C /* >= gfx10 */ 16421 #define R_036E4C_TCA_PERFCOUNTER1_SELECT1 0x036E4C /* gfx7, gfx8, gfx81, gfx9 */ 16422 #define R_036E50_GL2A_PERFCOUNTER2_SELECT 0x036E50 /* >= gfx10 */ 16423 #define S_036E50_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16424 #define G_036E50_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16425 #define C_036E50_PERF_SEL 0xFFFFFC00 16426 #define S_036E50_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16427 #define G_036E50_CNTR_MODE(x) (((x) >> 20) & 0xF) 16428 #define C_036E50_CNTR_MODE 0xFF0FFFFF 16429 #define S_036E50_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16430 #define G_036E50_PERF_MODE(x) (((x) >> 28) & 0xF) 16431 #define C_036E50_PERF_MODE 0x0FFFFFFF 16432 #define R_036E50_TCA_PERFCOUNTER2_SELECT 0x036E50 /* gfx7, gfx8, gfx81, gfx9 */ 16433 #define R_036E54_GL2A_PERFCOUNTER3_SELECT 0x036E54 /* >= gfx10 */ 16434 #define R_036E54_TCA_PERFCOUNTER3_SELECT 0x036E54 /* gfx7, gfx8, gfx81, gfx9 */ 16435 #define R_036E80_GL1C_PERFCOUNTER0_SELECT 0x036E80 /* >= gfx10 */ 16436 #define S_036E80_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7 */ 16437 #define G_036E80_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16438 #define C_036E80_PERF_SEL 0xFFFFFC00 16439 #define S_036E80_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx7 */ 16440 #define G_036E80_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16441 #define C_036E80_PERF_SEL1 0xFFF003FF 16442 #define S_036E80_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) /* gfx7 */ 16443 #define G_036E80_CNTR_MODE(x) (((x) >> 20) & 0xF) 16444 #define C_036E80_CNTR_MODE 0xFF0FFFFF 16445 #define S_036E80_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) /* gfx7 */ 16446 #define G_036E80_PERF_MODE1(x) (((x) >> 24) & 0xF) 16447 #define C_036E80_PERF_MODE1 0xF0FFFFFF 16448 #define S_036E80_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* gfx7 */ 16449 #define G_036E80_PERF_MODE(x) (((x) >> 28) & 0xF) 16450 #define C_036E80_PERF_MODE 0x0FFFFFFF 16451 #define R_036E80_TCS_PERFCOUNTER0_SELECT 0x036E80 /* gfx7 */ 16452 #define R_036E84_GL1C_PERFCOUNTER0_SELECT1 0x036E84 /* >= gfx10 */ 16453 #define S_036E84_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7 */ 16454 #define G_036E84_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16455 #define C_036E84_PERF_SEL2 0xFFFFFC00 16456 #define S_036E84_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) /* gfx7 */ 16457 #define G_036E84_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16458 #define C_036E84_PERF_SEL3 0xFFF003FF 16459 #define S_036E84_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) /* gfx7 */ 16460 #define G_036E84_PERF_MODE2(x) (((x) >> 24) & 0xF) 16461 #define C_036E84_PERF_MODE2 0xF0FFFFFF 16462 #define S_036E84_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) /* gfx7 */ 16463 #define G_036E84_PERF_MODE3(x) (((x) >> 28) & 0xF) 16464 #define C_036E84_PERF_MODE3 0x0FFFFFFF 16465 #define R_036E84_TCS_PERFCOUNTER0_SELECT1 0x036E84 /* gfx7 */ 16466 #define R_036E88_GL1C_PERFCOUNTER1_SELECT 0x036E88 /* >= gfx10 */ 16467 #define S_036E88_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) /* gfx7 */ 16468 #define G_036E88_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16469 #define C_036E88_PERF_SEL 0xFFFFFC00 16470 #define S_036E88_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) /* gfx7 */ 16471 #define G_036E88_CNTR_MODE(x) (((x) >> 20) & 0xF) 16472 #define C_036E88_CNTR_MODE 0xFF0FFFFF 16473 #define S_036E88_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) /* gfx7 */ 16474 #define G_036E88_PERF_MODE(x) (((x) >> 28) & 0xF) 16475 #define C_036E88_PERF_MODE 0x0FFFFFFF 16476 #define R_036E88_TCS_PERFCOUNTER1_SELECT 0x036E88 /* gfx7 */ 16477 #define R_036E8C_GL1C_PERFCOUNTER2_SELECT 0x036E8C /* >= gfx10 */ 16478 #define R_036E8C_TCS_PERFCOUNTER2_SELECT 0x036E8C /* gfx7 */ 16479 #define R_036E90_GL1C_PERFCOUNTER3_SELECT 0x036E90 /* >= gfx10 */ 16480 #define R_036E90_TCS_PERFCOUNTER3_SELECT 0x036E90 /* gfx7 */ 16481 #define R_036F00_CHC_PERFCOUNTER0_SELECT 0x036F00 /* >= gfx10 */ 16482 #define S_036F00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16483 #define G_036F00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16484 #define C_036F00_PERF_SEL 0xFFFFFC00 16485 #define S_036F00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 16486 #define G_036F00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16487 #define C_036F00_PERF_SEL1 0xFFF003FF 16488 #define S_036F00_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16489 #define G_036F00_CNTR_MODE(x) (((x) >> 20) & 0xF) 16490 #define C_036F00_CNTR_MODE 0xFF0FFFFF 16491 #define S_036F00_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16492 #define G_036F00_PERF_MODE1(x) (((x) >> 24) & 0xF) 16493 #define C_036F00_PERF_MODE1 0xF0FFFFFF 16494 #define S_036F00_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16495 #define G_036F00_PERF_MODE(x) (((x) >> 28) & 0xF) 16496 #define C_036F00_PERF_MODE 0x0FFFFFFF 16497 #define R_036F04_CHC_PERFCOUNTER0_SELECT1 0x036F04 /* >= gfx10 */ 16498 #define S_036F04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 16499 #define G_036F04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16500 #define C_036F04_PERF_SEL2 0xFFFFFC00 16501 #define S_036F04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 16502 #define G_036F04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16503 #define C_036F04_PERF_SEL3 0xFFF003FF 16504 #define S_036F04_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) 16505 #define G_036F04_PERF_MODE2(x) (((x) >> 24) & 0xF) 16506 #define C_036F04_PERF_MODE2 0xF0FFFFFF 16507 #define S_036F04_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) 16508 #define G_036F04_PERF_MODE3(x) (((x) >> 28) & 0xF) 16509 #define C_036F04_PERF_MODE3 0x0FFFFFFF 16510 #define R_036F08_CHC_PERFCOUNTER1_SELECT 0x036F08 /* >= gfx10 */ 16511 #define S_036F08_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16512 #define G_036F08_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16513 #define C_036F08_PERF_SEL 0xFFFFFC00 16514 #define S_036F08_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16515 #define G_036F08_CNTR_MODE(x) (((x) >> 20) & 0xF) 16516 #define C_036F08_CNTR_MODE 0xFF0FFFFF 16517 #define S_036F08_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16518 #define G_036F08_PERF_MODE(x) (((x) >> 28) & 0xF) 16519 #define C_036F08_PERF_MODE 0x0FFFFFFF 16520 #define R_036F0C_CHC_PERFCOUNTER2_SELECT 0x036F0C /* >= gfx10 */ 16521 #define R_036F10_CHC_PERFCOUNTER3_SELECT 0x036F10 /* >= gfx10 */ 16522 #define R_036F18_CHCG_PERFCOUNTER0_SELECT 0x036F18 /* >= gfx10 */ 16523 #define S_036F18_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16524 #define G_036F18_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16525 #define C_036F18_PERF_SEL 0xFFFFFC00 16526 #define S_036F18_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 16527 #define G_036F18_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16528 #define C_036F18_PERF_SEL1 0xFFF003FF 16529 #define S_036F18_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16530 #define G_036F18_CNTR_MODE(x) (((x) >> 20) & 0xF) 16531 #define C_036F18_CNTR_MODE 0xFF0FFFFF 16532 #define S_036F18_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16533 #define G_036F18_PERF_MODE1(x) (((x) >> 24) & 0xF) 16534 #define C_036F18_PERF_MODE1 0xF0FFFFFF 16535 #define S_036F18_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16536 #define G_036F18_PERF_MODE(x) (((x) >> 28) & 0xF) 16537 #define C_036F18_PERF_MODE 0x0FFFFFFF 16538 #define R_036F1C_CHCG_PERFCOUNTER0_SELECT1 0x036F1C /* >= gfx10 */ 16539 #define S_036F1C_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 16540 #define G_036F1C_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16541 #define C_036F1C_PERF_SEL2 0xFFFFFC00 16542 #define S_036F1C_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 16543 #define G_036F1C_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16544 #define C_036F1C_PERF_SEL3 0xFFF003FF 16545 #define S_036F1C_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) 16546 #define G_036F1C_PERF_MODE2(x) (((x) >> 24) & 0xF) 16547 #define C_036F1C_PERF_MODE2 0xF0FFFFFF 16548 #define S_036F1C_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) 16549 #define G_036F1C_PERF_MODE3(x) (((x) >> 28) & 0xF) 16550 #define C_036F1C_PERF_MODE3 0x0FFFFFFF 16551 #define R_036F20_CHCG_PERFCOUNTER1_SELECT 0x036F20 /* >= gfx10 */ 16552 #define S_036F20_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16553 #define G_036F20_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16554 #define C_036F20_PERF_SEL 0xFFFFFC00 16555 #define S_036F20_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16556 #define G_036F20_CNTR_MODE(x) (((x) >> 20) & 0xF) 16557 #define C_036F20_CNTR_MODE 0xFF0FFFFF 16558 #define S_036F20_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16559 #define G_036F20_PERF_MODE(x) (((x) >> 28) & 0xF) 16560 #define C_036F20_PERF_MODE 0x0FFFFFFF 16561 #define R_036F24_CHCG_PERFCOUNTER2_SELECT 0x036F24 /* >= gfx10 */ 16562 #define R_036F28_CHCG_PERFCOUNTER3_SELECT 0x036F28 /* >= gfx10 */ 16563 #define R_037000_CB_PERFCOUNTER_FILTER 0x037000 /* >= gfx7 */ 16564 #define S_037000_OP_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 16565 #define G_037000_OP_FILTER_ENABLE(x) (((x) >> 0) & 0x1) 16566 #define C_037000_OP_FILTER_ENABLE 0xFFFFFFFE 16567 #define S_037000_OP_FILTER_SEL(x) (((unsigned)(x) & 0x7) << 1) 16568 #define G_037000_OP_FILTER_SEL(x) (((x) >> 1) & 0x7) 16569 #define C_037000_OP_FILTER_SEL 0xFFFFFFF1 16570 #define V_037000_CB_PERF_OP_FILTER_SEL_WRITE_ONLY 0 16571 #define V_037000_CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION 1 16572 #define V_037000_CB_PERF_OP_FILTER_SEL_RESOLVE 2 16573 #define V_037000_CB_PERF_OP_FILTER_SEL_DECOMPRESS 3 16574 #define V_037000_CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS 4 16575 #define V_037000_CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR 5 16576 #define S_037000_FORMAT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 4) 16577 #define G_037000_FORMAT_FILTER_ENABLE(x) (((x) >> 4) & 0x1) 16578 #define C_037000_FORMAT_FILTER_ENABLE 0xFFFFFFEF 16579 #define S_037000_FORMAT_FILTER_SEL(x) (((unsigned)(x) & 0x1F) << 5) 16580 #define G_037000_FORMAT_FILTER_SEL(x) (((x) >> 5) & 0x1F) 16581 #define C_037000_FORMAT_FILTER_SEL 0xFFFFFC1F 16582 #define S_037000_CLEAR_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 10) 16583 #define G_037000_CLEAR_FILTER_ENABLE(x) (((x) >> 10) & 0x1) 16584 #define C_037000_CLEAR_FILTER_ENABLE 0xFFFFFBFF 16585 #define S_037000_CLEAR_FILTER_SEL(x) (((unsigned)(x) & 0x1) << 11) 16586 #define G_037000_CLEAR_FILTER_SEL(x) (((x) >> 11) & 0x1) 16587 #define C_037000_CLEAR_FILTER_SEL 0xFFFFF7FF 16588 #define V_037000_CB_PERF_CLEAR_FILTER_SEL_NONCLEAR 0 16589 #define V_037000_CB_PERF_CLEAR_FILTER_SEL_CLEAR 1 16590 #define S_037000_MRT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 12) 16591 #define G_037000_MRT_FILTER_ENABLE(x) (((x) >> 12) & 0x1) 16592 #define C_037000_MRT_FILTER_ENABLE 0xFFFFEFFF 16593 #define S_037000_MRT_FILTER_SEL(x) (((unsigned)(x) & 0x7) << 13) 16594 #define G_037000_MRT_FILTER_SEL(x) (((x) >> 13) & 0x7) 16595 #define C_037000_MRT_FILTER_SEL 0xFFFF1FFF 16596 #define S_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 17) 16597 #define G_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((x) >> 17) & 0x1) 16598 #define C_037000_NUM_SAMPLES_FILTER_ENABLE 0xFFFDFFFF 16599 #define S_037000_NUM_SAMPLES_FILTER_SEL(x) (((unsigned)(x) & 0x7) << 18) 16600 #define G_037000_NUM_SAMPLES_FILTER_SEL(x) (((x) >> 18) & 0x7) 16601 #define C_037000_NUM_SAMPLES_FILTER_SEL 0xFFE3FFFF 16602 #define S_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 21) 16603 #define G_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((x) >> 21) & 0x1) 16604 #define C_037000_NUM_FRAGMENTS_FILTER_ENABLE 0xFFDFFFFF 16605 #define S_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((unsigned)(x) & 0x3) << 22) 16606 #define G_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((x) >> 22) & 0x3) 16607 #define C_037000_NUM_FRAGMENTS_FILTER_SEL 0xFF3FFFFF 16608 #define R_037004_CB_PERFCOUNTER0_SELECT 0x037004 /* >= gfx7 */ 16609 #define S_037004_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 16610 #define G_037004_PERF_SEL(x) (((x) >> 0) & 0x1FF) 16611 #define C_037004_PERF_SEL 0xFFFFFE00 16612 #define S_037004_PERF_SEL1(x) (((unsigned)(x) & 0x1FF) << 10) 16613 #define G_037004_PERF_SEL1(x) (((x) >> 10) & 0x1FF) 16614 #define C_037004_PERF_SEL1 0xFFF803FF 16615 #define S_037004_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16616 #define G_037004_CNTR_MODE(x) (((x) >> 20) & 0xF) 16617 #define C_037004_CNTR_MODE 0xFF0FFFFF 16618 #define S_037004_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16619 #define G_037004_PERF_MODE1(x) (((x) >> 24) & 0xF) 16620 #define C_037004_PERF_MODE1 0xF0FFFFFF 16621 #define S_037004_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16622 #define G_037004_PERF_MODE(x) (((x) >> 28) & 0xF) 16623 #define C_037004_PERF_MODE 0x0FFFFFFF 16624 #define R_037008_CB_PERFCOUNTER0_SELECT1 0x037008 /* >= gfx7 */ 16625 #define S_037008_PERF_SEL2(x) (((unsigned)(x) & 0x1FF) << 0) 16626 #define G_037008_PERF_SEL2(x) (((x) >> 0) & 0x1FF) 16627 #define C_037008_PERF_SEL2 0xFFFFFE00 16628 #define S_037008_PERF_SEL3(x) (((unsigned)(x) & 0x1FF) << 10) 16629 #define G_037008_PERF_SEL3(x) (((x) >> 10) & 0x1FF) 16630 #define C_037008_PERF_SEL3 0xFFF803FF 16631 #define S_037008_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 16632 #define G_037008_PERF_MODE3(x) (((x) >> 24) & 0xF) 16633 #define C_037008_PERF_MODE3 0xF0FFFFFF 16634 #define S_037008_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 16635 #define G_037008_PERF_MODE2(x) (((x) >> 28) & 0xF) 16636 #define C_037008_PERF_MODE2 0x0FFFFFFF 16637 #define R_03700C_CB_PERFCOUNTER1_SELECT 0x03700C /* >= gfx7 */ 16638 #define S_03700C_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 16639 #define G_03700C_PERF_SEL(x) (((x) >> 0) & 0x1FF) 16640 #define C_03700C_PERF_SEL 0xFFFFFE00 16641 #define S_03700C_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16642 #define G_03700C_PERF_MODE(x) (((x) >> 28) & 0xF) 16643 #define C_03700C_PERF_MODE 0x0FFFFFFF 16644 #define R_037010_CB_PERFCOUNTER2_SELECT 0x037010 /* >= gfx7 */ 16645 #define R_037014_CB_PERFCOUNTER3_SELECT 0x037014 /* >= gfx7 */ 16646 #define R_037100_DB_PERFCOUNTER0_SELECT 0x037100 /* >= gfx7 */ 16647 #define S_037100_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 16648 #define G_037100_PERF_SEL(x) (((x) >> 0) & 0x3FF) 16649 #define C_037100_PERF_SEL 0xFFFFFC00 16650 #define S_037100_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 16651 #define G_037100_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 16652 #define C_037100_PERF_SEL1 0xFFF003FF 16653 #define S_037100_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 16654 #define G_037100_CNTR_MODE(x) (((x) >> 20) & 0xF) 16655 #define C_037100_CNTR_MODE 0xFF0FFFFF 16656 #define S_037100_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 16657 #define G_037100_PERF_MODE1(x) (((x) >> 24) & 0xF) 16658 #define C_037100_PERF_MODE1 0xF0FFFFFF 16659 #define S_037100_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 16660 #define G_037100_PERF_MODE(x) (((x) >> 28) & 0xF) 16661 #define C_037100_PERF_MODE 0x0FFFFFFF 16662 #define R_037104_DB_PERFCOUNTER0_SELECT1 0x037104 /* >= gfx7 */ 16663 #define S_037104_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 16664 #define G_037104_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 16665 #define C_037104_PERF_SEL2 0xFFFFFC00 16666 #define S_037104_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 16667 #define G_037104_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 16668 #define C_037104_PERF_SEL3 0xFFF003FF 16669 #define S_037104_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 16670 #define G_037104_PERF_MODE3(x) (((x) >> 24) & 0xF) 16671 #define C_037104_PERF_MODE3 0xF0FFFFFF 16672 #define S_037104_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 16673 #define G_037104_PERF_MODE2(x) (((x) >> 28) & 0xF) 16674 #define C_037104_PERF_MODE2 0x0FFFFFFF 16675 #define R_037108_DB_PERFCOUNTER1_SELECT 0x037108 /* >= gfx7 */ 16676 #define R_03710C_DB_PERFCOUNTER1_SELECT1 0x03710C /* >= gfx7 */ 16677 #define R_037110_DB_PERFCOUNTER2_SELECT 0x037110 /* >= gfx7 */ 16678 #define R_037118_DB_PERFCOUNTER3_SELECT 0x037118 /* >= gfx7 */ 16679 #define R_037200_RLC_SPM_PERFMON_CNTL 0x037200 /* >= gfx7 */ 16680 #define S_037200_RESERVED1(x) (((unsigned)(x) & 0xFFF) << 0) 16681 #define G_037200_RESERVED1(x) (((x) >> 0) & 0xFFF) 16682 #define C_037200_RESERVED1 0xFFFFF000 16683 #define S_037200_PERFMON_RING_MODE(x) (((unsigned)(x) & 0x3) << 12) 16684 #define G_037200_PERFMON_RING_MODE(x) (((x) >> 12) & 0x3) 16685 #define C_037200_PERFMON_RING_MODE 0xFFFFCFFF 16686 #define S_037200_PERFMON_SAMPLE_INTERVAL(x) (((unsigned)(x) & 0xFFFF) << 16) 16687 #define G_037200_PERFMON_SAMPLE_INTERVAL(x) (((x) >> 16) & 0xFFFF) 16688 #define C_037200_PERFMON_SAMPLE_INTERVAL 0x0000FFFF 16689 #define R_037204_RLC_SPM_PERFMON_RING_BASE_LO 0x037204 /* >= gfx7 */ 16690 #define R_037208_RLC_SPM_PERFMON_RING_BASE_HI 0x037208 /* >= gfx7 */ 16691 #define S_037208_RING_BASE_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 16692 #define G_037208_RING_BASE_HI(x) (((x) >> 0) & 0xFFFF) 16693 #define C_037208_RING_BASE_HI 0xFFFF0000 16694 #define R_03720C_RLC_SPM_PERFMON_RING_SIZE 0x03720C /* >= gfx7 */ 16695 #define R_037210_RLC_SPM_PERFMON_SEGMENT_SIZE 0x037210 /* >= gfx7 */ 16696 #define S_037210_PERFMON_SEGMENT_SIZE(x) (((unsigned)(x) & 0xFF) << 0) 16697 #define G_037210_PERFMON_SEGMENT_SIZE(x) (((x) >> 0) & 0xFF) 16698 #define C_037210_PERFMON_SEGMENT_SIZE 0xFFFFFF00 16699 #define S_037210_RESERVED1(x) (((unsigned)(x) & 0x7) << 8) 16700 #define G_037210_RESERVED1(x) (((x) >> 8) & 0x7) 16701 #define C_037210_RESERVED1 0xFFFFF8FF 16702 #define S_037210_GLOBAL_NUM_LINE(x) (((unsigned)(x) & 0x1F) << 11) 16703 #define G_037210_GLOBAL_NUM_LINE(x) (((x) >> 11) & 0x1F) 16704 #define C_037210_GLOBAL_NUM_LINE 0xFFFF07FF 16705 #define S_037210_SE0_NUM_LINE(x) (((unsigned)(x) & 0x1F) << 16) 16706 #define G_037210_SE0_NUM_LINE(x) (((x) >> 16) & 0x1F) 16707 #define C_037210_SE0_NUM_LINE 0xFFE0FFFF 16708 #define S_037210_SE1_NUM_LINE(x) (((unsigned)(x) & 0x1F) << 21) 16709 #define G_037210_SE1_NUM_LINE(x) (((x) >> 21) & 0x1F) 16710 #define C_037210_SE1_NUM_LINE 0xFC1FFFFF 16711 #define S_037210_SE2_NUM_LINE(x) (((unsigned)(x) & 0x1F) << 26) 16712 #define G_037210_SE2_NUM_LINE(x) (((x) >> 26) & 0x1F) 16713 #define C_037210_SE2_NUM_LINE 0x83FFFFFF 16714 #define R_037214_RLC_SPM_RING_RDPTR 0x037214 /* >= gfx10 */ 16715 #define R_037214_RLC_SPM_SE_MUXSEL_ADDR 0x037214 /* gfx7, gfx8, gfx81, gfx9 */ 16716 #define R_037218_RLC_SPM_SEGMENT_THRESHOLD 0x037218 /* >= gfx10 */ 16717 #define S_037218_NUM_SEGMENT_THRESHOLD(x) (((unsigned)(x) & 0xFF) << 0) 16718 #define G_037218_NUM_SEGMENT_THRESHOLD(x) (((x) >> 0) & 0xFF) 16719 #define C_037218_NUM_SEGMENT_THRESHOLD 0xFFFFFF00 16720 #define R_037218_RLC_SPM_SE_MUXSEL_DATA 0x037218 /* gfx7, gfx8, gfx81, gfx9 */ 16721 #define R_03721C_RLC_SPM_CPG_PERFMON_SAMPLE_DELAY 0x03721C /* gfx7, gfx8, gfx81, gfx9 */ 16722 #define S_03721C_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16723 #define G_03721C_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16724 #define C_03721C_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16725 #define R_03721C_RLC_SPM_SE_MUXSEL_ADDR 0x03721C /* >= gfx10 */ 16726 #define S_03721C_PERFMON_SEL_ADDR(x) (((unsigned)(x) & 0x1FF) << 0) 16727 #define G_03721C_PERFMON_SEL_ADDR(x) (((x) >> 0) & 0x1FF) 16728 #define C_03721C_PERFMON_SEL_ADDR 0xFFFFFE00 16729 #define R_037220_RLC_SPM_CPC_PERFMON_SAMPLE_DELAY 0x037220 /* gfx7, gfx8, gfx81, gfx9 */ 16730 #define S_037220_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16731 #define G_037220_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16732 #define C_037220_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16733 #define R_037220_RLC_SPM_SE_MUXSEL_DATA 0x037220 /* >= gfx10 */ 16734 #define R_037224_RLC_SPM_CPF_PERFMON_SAMPLE_DELAY 0x037224 /* gfx7, gfx8, gfx81, gfx9 */ 16735 #define S_037224_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16736 #define G_037224_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16737 #define C_037224_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16738 #define R_037224_RLC_SPM_GLOBAL_MUXSEL_ADDR 0x037224 /* >= gfx10 */ 16739 #define S_037224_PERFMON_SEL_ADDR(x) (((unsigned)(x) & 0xFF) << 0) 16740 #define G_037224_PERFMON_SEL_ADDR(x) (((x) >> 0) & 0xFF) 16741 #define C_037224_PERFMON_SEL_ADDR 0xFFFFFF00 16742 #define R_037228_RLC_SPM_CB_PERFMON_SAMPLE_DELAY 0x037228 /* gfx7, gfx8, gfx81, gfx9 */ 16743 #define S_037228_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16744 #define G_037228_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16745 #define C_037228_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16746 #define R_037228_RLC_SPM_GLOBAL_MUXSEL_DATA 0x037228 /* >= gfx10 */ 16747 #define R_03722C_RLC_SPM_DB_PERFMON_SAMPLE_DELAY 0x03722C /* gfx7, gfx8, gfx81, gfx9 */ 16748 #define S_03722C_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16749 #define G_03722C_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16750 #define C_03722C_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16751 #define R_03722C_RLC_SPM_DESER_START_SKEW 0x03722C /* >= gfx10 */ 16752 #define S_03722C_DESER_START_SKEW(x) (((unsigned)(x) & 0x7F) << 0) 16753 #define G_03722C_DESER_START_SKEW(x) (((x) >> 0) & 0x7F) 16754 #define C_03722C_DESER_START_SKEW 0xFFFFFF80 16755 #define R_037230_RLC_SPM_GLOBALS_SAMPLE_SKEW 0x037230 /* >= gfx10 */ 16756 #define S_037230_GLOBALS_SAMPLE_SKEW(x) (((unsigned)(x) & 0x7F) << 0) 16757 #define G_037230_GLOBALS_SAMPLE_SKEW(x) (((x) >> 0) & 0x7F) 16758 #define C_037230_GLOBALS_SAMPLE_SKEW 0xFFFFFF80 16759 #define R_037230_RLC_SPM_PA_PERFMON_SAMPLE_DELAY 0x037230 /* gfx7, gfx8, gfx81, gfx9 */ 16760 #define S_037230_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16761 #define G_037230_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16762 #define C_037230_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16763 #define R_037234_RLC_SPM_GDS_PERFMON_SAMPLE_DELAY 0x037234 /* gfx7, gfx8, gfx81, gfx9 */ 16764 #define S_037234_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16765 #define G_037234_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16766 #define C_037234_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16767 #define R_037234_RLC_SPM_GLOBALS_MUXSEL_SKEW 0x037234 /* >= gfx10 */ 16768 #define S_037234_GLOBALS_MUXSEL_SKEW(x) (((unsigned)(x) & 0x7F) << 0) 16769 #define G_037234_GLOBALS_MUXSEL_SKEW(x) (((x) >> 0) & 0x7F) 16770 #define C_037234_GLOBALS_MUXSEL_SKEW 0xFFFFFF80 16771 #define R_037238_RLC_SPM_IA_PERFMON_SAMPLE_DELAY 0x037238 /* gfx7, gfx8, gfx81, gfx9 */ 16772 #define S_037238_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16773 #define G_037238_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16774 #define C_037238_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16775 #define R_037238_RLC_SPM_SE_SAMPLE_SKEW 0x037238 /* >= gfx10 */ 16776 #define S_037238_SE_SAMPLE_SKEW(x) (((unsigned)(x) & 0x7F) << 0) 16777 #define G_037238_SE_SAMPLE_SKEW(x) (((x) >> 0) & 0x7F) 16778 #define C_037238_SE_SAMPLE_SKEW 0xFFFFFF80 16779 #define R_03723C_RLC_SPM_SE_MUXSEL_SKEW 0x03723C /* >= gfx10 */ 16780 #define S_03723C_SE_MUXSEL_SKEW(x) (((unsigned)(x) & 0x7F) << 0) 16781 #define G_03723C_SE_MUXSEL_SKEW(x) (((x) >> 0) & 0x7F) 16782 #define C_03723C_SE_MUXSEL_SKEW 0xFFFFFF80 16783 #define R_037240_RLC_SPM_GLB_SAMPLEDELAY_IND_ADDR 0x037240 /* >= gfx10 */ 16784 #define R_037240_RLC_SPM_SC_PERFMON_SAMPLE_DELAY 0x037240 /* gfx7, gfx8, gfx81, gfx9 */ 16785 #define S_037240_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16786 #define G_037240_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16787 #define C_037240_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16788 #define R_037244_RLC_SPM_GLB_SAMPLEDELAY_IND_DATA 0x037244 /* >= gfx10 */ 16789 #define S_037244_data(x) (((unsigned)(x) & 0x7F) << 0) 16790 #define G_037244_data(x) (((x) >> 0) & 0x7F) 16791 #define C_037244_data 0xFFFFFF80 16792 #define R_037244_RLC_SPM_TCC_PERFMON_SAMPLE_DELAY 0x037244 /* gfx7, gfx8, gfx81, gfx9 */ 16793 #define S_037244_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16794 #define G_037244_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16795 #define C_037244_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16796 #define R_037248_RLC_SPM_SE_SAMPLEDELAY_IND_ADDR 0x037248 /* >= gfx10 */ 16797 #define R_037248_RLC_SPM_TCA_PERFMON_SAMPLE_DELAY 0x037248 /* gfx7, gfx8, gfx81, gfx9 */ 16798 #define S_037248_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16799 #define G_037248_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16800 #define C_037248_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16801 #define R_03724C_RLC_SPM_SE_SAMPLEDELAY_IND_DATA 0x03724C /* >= gfx10 */ 16802 #define S_03724C_data(x) (((unsigned)(x) & 0x7F) << 0) 16803 #define G_03724C_data(x) (((x) >> 0) & 0x7F) 16804 #define C_03724C_data 0xFFFFFF80 16805 #define R_03724C_RLC_SPM_TCP_PERFMON_SAMPLE_DELAY 0x03724C /* gfx7, gfx8, gfx81, gfx9 */ 16806 #define S_03724C_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16807 #define G_03724C_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16808 #define C_03724C_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16809 #define R_037250_RLC_SPM_RING_WRPTR 0x037250 /* >= gfx10 */ 16810 #define S_037250_PERFMON_RING_WRPTR(x) (((unsigned)(x) & 0x7FFFFFF) << 5) 16811 #define G_037250_PERFMON_RING_WRPTR(x) (((x) >> 5) & 0x7FFFFFF) 16812 #define C_037250_PERFMON_RING_WRPTR 0x0000001F 16813 #define R_037250_RLC_SPM_TA_PERFMON_SAMPLE_DELAY 0x037250 /* gfx7, gfx8, gfx81, gfx9 */ 16814 #define S_037250_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16815 #define G_037250_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16816 #define C_037250_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16817 #define R_037254_RLC_SPM_ACCUM_DATARAM_ADDR 0x037254 /* >= gfx10 */ 16818 #define S_037254_addr(x) (((unsigned)(x) & 0x7F) << 0) 16819 #define G_037254_addr(x) (((x) >> 0) & 0x7F) 16820 #define C_037254_addr 0xFFFFFF80 16821 #define R_037254_RLC_SPM_TD_PERFMON_SAMPLE_DELAY 0x037254 /* gfx7, gfx8, gfx81, gfx9 */ 16822 #define S_037254_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16823 #define G_037254_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16824 #define C_037254_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16825 #define R_037258_RLC_SPM_ACCUM_DATARAM_DATA 0x037258 /* >= gfx10 */ 16826 #define R_037258_RLC_SPM_VGT_PERFMON_SAMPLE_DELAY 0x037258 /* gfx7, gfx8, gfx81, gfx9 */ 16827 #define S_037258_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16828 #define G_037258_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16829 #define C_037258_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16830 #define R_03725C_RLC_SPM_ACCUM_CTRLRAM_ADDR 0x03725C /* >= gfx10 */ 16831 #define S_03725C_addr_GFX10(x) (((unsigned)(x) & 0x1FF) << 0) /* gfx10 */ 16832 #define G_03725C_addr_GFX10(x) (((x) >> 0) & 0x1FF) 16833 #define C_03725C_addr_GFX10 0xFFFFFE00 16834 #define S_03725C_addr_GFX103(x) (((unsigned)(x) & 0x7FF) << 0) /* >= gfx103 */ 16835 #define G_03725C_addr_GFX103(x) (((x) >> 0) & 0x7FF) 16836 #define C_03725C_addr_GFX103 0xFFFFF800 16837 #define R_03725C_RLC_SPM_SPI_PERFMON_SAMPLE_DELAY 0x03725C /* gfx7, gfx8, gfx81, gfx9 */ 16838 #define S_03725C_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16839 #define G_03725C_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16840 #define C_03725C_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16841 #define R_037260_RLC_SPM_ACCUM_CTRLRAM_DATA 0x037260 /* >= gfx10 */ 16842 #define S_037260_data(x) (((unsigned)(x) & 0xFF) << 0) 16843 #define G_037260_data(x) (((x) >> 0) & 0xFF) 16844 #define C_037260_data 0xFFFFFF00 16845 #define R_037260_RLC_SPM_SQG_PERFMON_SAMPLE_DELAY 0x037260 /* gfx7, gfx8, gfx81, gfx9 */ 16846 #define S_037260_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16847 #define G_037260_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16848 #define C_037260_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16849 #define R_037264_RLC_SPM_ACCUM_STATUS 0x037264 /* >= gfx10 */ 16850 #define S_037264_NumbSamplesCompleted(x) (((unsigned)(x) & 0xFF) << 0) 16851 #define G_037264_NumbSamplesCompleted(x) (((x) >> 0) & 0xFF) 16852 #define C_037264_NumbSamplesCompleted 0xFFFFFF00 16853 #define S_037264_AccumDone(x) (((unsigned)(x) & 0x1) << 8) 16854 #define G_037264_AccumDone(x) (((x) >> 8) & 0x1) 16855 #define C_037264_AccumDone 0xFFFFFEFF 16856 #define S_037264_SpmDone(x) (((unsigned)(x) & 0x1) << 9) 16857 #define G_037264_SpmDone(x) (((x) >> 9) & 0x1) 16858 #define C_037264_SpmDone 0xFFFFFDFF 16859 #define S_037264_AccumOverflow(x) (((unsigned)(x) & 0x1) << 10) 16860 #define G_037264_AccumOverflow(x) (((x) >> 10) & 0x1) 16861 #define C_037264_AccumOverflow 0xFFFFFBFF 16862 #define S_037264_AccumArmed(x) (((unsigned)(x) & 0x1) << 11) 16863 #define G_037264_AccumArmed(x) (((x) >> 11) & 0x1) 16864 #define C_037264_AccumArmed 0xFFFFF7FF 16865 #define S_037264_SequenceInProgress(x) (((unsigned)(x) & 0x1) << 12) 16866 #define G_037264_SequenceInProgress(x) (((x) >> 12) & 0x1) 16867 #define C_037264_SequenceInProgress 0xFFFFEFFF 16868 #define S_037264_FinalSequenceInProgress(x) (((unsigned)(x) & 0x1) << 13) 16869 #define G_037264_FinalSequenceInProgress(x) (((x) >> 13) & 0x1) 16870 #define C_037264_FinalSequenceInProgress 0xFFFFDFFF 16871 #define S_037264_AllFifosEmpty(x) (((unsigned)(x) & 0x1) << 14) 16872 #define G_037264_AllFifosEmpty(x) (((x) >> 14) & 0x1) 16873 #define C_037264_AllFifosEmpty 0xFFFFBFFF 16874 #define S_037264_FSMIsIdle(x) (((unsigned)(x) & 0x1) << 15) 16875 #define G_037264_FSMIsIdle(x) (((x) >> 15) & 0x1) 16876 #define C_037264_FSMIsIdle 0xFFFF7FFF 16877 #define S_037264_SwaAccumDone(x) (((unsigned)(x) & 0x1) << 16) /* >= gfx103 */ 16878 #define G_037264_SwaAccumDone(x) (((x) >> 16) & 0x1) 16879 #define C_037264_SwaAccumDone 0xFFFEFFFF 16880 #define S_037264_SwaSpmDone(x) (((unsigned)(x) & 0x1) << 17) /* >= gfx103 */ 16881 #define G_037264_SwaSpmDone(x) (((x) >> 17) & 0x1) 16882 #define C_037264_SwaSpmDone 0xFFFDFFFF 16883 #define S_037264_SwaAccumOverflow(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx103 */ 16884 #define G_037264_SwaAccumOverflow(x) (((x) >> 18) & 0x1) 16885 #define C_037264_SwaAccumOverflow 0xFFFBFFFF 16886 #define S_037264_SwaAccumArmed(x) (((unsigned)(x) & 0x1) << 19) /* >= gfx103 */ 16887 #define G_037264_SwaAccumArmed(x) (((x) >> 19) & 0x1) 16888 #define C_037264_SwaAccumArmed 0xFFF7FFFF 16889 #define S_037264_AllSegsDone(x) (((unsigned)(x) & 0x1) << 20) /* >= gfx103 */ 16890 #define G_037264_AllSegsDone(x) (((x) >> 20) & 0x1) 16891 #define C_037264_AllSegsDone 0xFFEFFFFF 16892 #define S_037264_RearmSwaPending(x) (((unsigned)(x) & 0x1) << 21) /* >= gfx103 */ 16893 #define G_037264_RearmSwaPending(x) (((x) >> 21) & 0x1) 16894 #define C_037264_RearmSwaPending 0xFFDFFFFF 16895 #define S_037264_RearmSppPending(x) (((unsigned)(x) & 0x1) << 22) /* >= gfx103 */ 16896 #define G_037264_RearmSppPending(x) (((x) >> 22) & 0x1) 16897 #define C_037264_RearmSppPending 0xFFBFFFFF 16898 #define R_037264_RLC_SPM_TCS_PERFMON_SAMPLE_DELAY 0x037264 /* gfx7 */ 16899 #define S_037264_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16900 #define G_037264_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16901 #define C_037264_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16902 #define R_037268_RLC_SPM_ACCUM_CTRL 0x037268 /* >= gfx10 */ 16903 #define S_037268_StrobeResetPerfMonitors(x) (((unsigned)(x) & 0x1) << 0) 16904 #define G_037268_StrobeResetPerfMonitors(x) (((x) >> 0) & 0x1) 16905 #define C_037268_StrobeResetPerfMonitors 0xFFFFFFFE 16906 #define S_037268_StrobeStartAccumulation(x) (((unsigned)(x) & 0x1) << 1) 16907 #define G_037268_StrobeStartAccumulation(x) (((x) >> 1) & 0x1) 16908 #define C_037268_StrobeStartAccumulation 0xFFFFFFFD 16909 #define S_037268_StrobeRearmAccum(x) (((unsigned)(x) & 0x1) << 2) 16910 #define G_037268_StrobeRearmAccum(x) (((x) >> 2) & 0x1) 16911 #define C_037268_StrobeRearmAccum 0xFFFFFFFB 16912 #define S_037268_StrobeResetSpmBlock(x) (((unsigned)(x) & 0x1) << 3) /* >= gfx103 */ 16913 #define G_037268_StrobeResetSpmBlock(x) (((x) >> 3) & 0x1) 16914 #define C_037268_StrobeResetSpmBlock 0xFFFFFFF7 16915 #define S_037268_StrobeSpmDoneInt(x) (((unsigned)(x) & 0x1) << 3) /* gfx10 */ 16916 #define G_037268_StrobeSpmDoneInt(x) (((x) >> 3) & 0x1) 16917 #define C_037268_StrobeSpmDoneInt 0xFFFFFFF7 16918 #define S_037268_StrobeAccumDoneInt(x) (((unsigned)(x) & 0x1) << 4) /* gfx10 */ 16919 #define G_037268_StrobeAccumDoneInt(x) (((x) >> 4) & 0x1) 16920 #define C_037268_StrobeAccumDoneInt 0xFFFFFFEF 16921 #define S_037268_StrobeStartSpm_GFX103(x) (((unsigned)(x) & 0xF) << 4) /* >= gfx103 */ 16922 #define G_037268_StrobeStartSpm_GFX103(x) (((x) >> 4) & 0xF) 16923 #define C_037268_StrobeStartSpm_GFX103 0xFFFFFF0F 16924 #define S_037268_StrobeResetAccum(x) (((unsigned)(x) & 0x1) << 5) /* gfx10 */ 16925 #define G_037268_StrobeResetAccum(x) (((x) >> 5) & 0x1) 16926 #define C_037268_StrobeResetAccum 0xFFFFFFDF 16927 #define S_037268_StrobeStartSpm_GFX10(x) (((unsigned)(x) & 0xF) << 6) /* gfx10 */ 16928 #define G_037268_StrobeStartSpm_GFX10(x) (((x) >> 6) & 0xF) 16929 #define C_037268_StrobeStartSpm_GFX10 0xFFFFFC3F 16930 #define S_037268_StrobeRearmSwaAccum(x) (((unsigned)(x) & 0x1) << 8) /* >= gfx103 */ 16931 #define G_037268_StrobeRearmSwaAccum(x) (((x) >> 8) & 0x1) 16932 #define C_037268_StrobeRearmSwaAccum 0xFFFFFEFF 16933 #define S_037268_StrobeStartSwa(x) (((unsigned)(x) & 0x1) << 9) /* >= gfx103 */ 16934 #define G_037268_StrobeStartSwa(x) (((x) >> 9) & 0x1) 16935 #define C_037268_StrobeStartSwa 0xFFFFFDFF 16936 #define S_037268_StrobePerfmonSampleWires(x) (((unsigned)(x) & 0x1) << 10) /* >= gfx103 */ 16937 #define G_037268_StrobePerfmonSampleWires(x) (((x) >> 10) & 0x1) 16938 #define C_037268_StrobePerfmonSampleWires 0xFFFFFBFF 16939 #define R_037268_RLC_SPM_SX_PERFMON_SAMPLE_DELAY 0x037268 /* gfx7, gfx8, gfx81, gfx9 */ 16940 #define S_037268_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 16941 #define G_037268_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 16942 #define C_037268_PERFMON_SAMPLE_DELAY 0xFFFFFF00 16943 #define R_03726C_RLC_SPM_ACCUM_MODE 0x03726C /* >= gfx10 */ 16944 #define S_03726C_EnableAccum(x) (((unsigned)(x) & 0x1) << 0) 16945 #define G_03726C_EnableAccum(x) (((x) >> 0) & 0x1) 16946 #define C_03726C_EnableAccum 0xFFFFFFFE 16947 #define S_03726C_AutoAccumEn_GFX10(x) (((unsigned)(x) & 0x1) << 1) /* gfx10 */ 16948 #define G_03726C_AutoAccumEn_GFX10(x) (((x) >> 1) & 0x1) 16949 #define C_03726C_AutoAccumEn_GFX10 0xFFFFFFFD 16950 #define S_03726C_EnableSpmWithAccumMode(x) (((unsigned)(x) & 0x1) << 1) /* >= gfx103 */ 16951 #define G_03726C_EnableSpmWithAccumMode(x) (((x) >> 1) & 0x1) 16952 #define C_03726C_EnableSpmWithAccumMode 0xFFFFFFFD 16953 #define S_03726C_AutoSpmEn_GFX10(x) (((unsigned)(x) & 0x1) << 2) /* gfx10 */ 16954 #define G_03726C_AutoSpmEn_GFX10(x) (((x) >> 2) & 0x1) 16955 #define C_03726C_AutoSpmEn_GFX10 0xFFFFFFFB 16956 #define S_03726C_EnableSPPMode(x) (((unsigned)(x) & 0x1) << 2) /* >= gfx103 */ 16957 #define G_03726C_EnableSPPMode(x) (((x) >> 2) & 0x1) 16958 #define C_03726C_EnableSPPMode 0xFFFFFFFB 16959 #define S_03726C_AutoResetPerfmonDisable_GFX103(x) (((unsigned)(x) & 0x1) << 3) /* >= gfx103 */ 16960 #define G_03726C_AutoResetPerfmonDisable_GFX103(x) (((x) >> 3) & 0x1) 16961 #define C_03726C_AutoResetPerfmonDisable_GFX103 0xFFFFFFF7 16962 #define S_03726C_Globals_LoadOverride_GFX10(x) (((unsigned)(x) & 0x1) << 3) /* gfx10 */ 16963 #define G_03726C_Globals_LoadOverride_GFX10(x) (((x) >> 3) & 0x1) 16964 #define C_03726C_Globals_LoadOverride_GFX10 0xFFFFFFF7 16965 #define S_03726C_SE0_LoadOverride_GFX10(x) (((unsigned)(x) & 0x1) << 4) /* gfx10 */ 16966 #define G_03726C_SE0_LoadOverride_GFX10(x) (((x) >> 4) & 0x1) 16967 #define C_03726C_SE0_LoadOverride_GFX10 0xFFFFFFEF 16968 #define S_03726C_SwaAutoResetPerfmonDisable(x) (((unsigned)(x) & 0x1) << 4) /* >= gfx103 */ 16969 #define G_03726C_SwaAutoResetPerfmonDisable(x) (((x) >> 4) & 0x1) 16970 #define C_03726C_SwaAutoResetPerfmonDisable 0xFFFFFFEF 16971 #define S_03726C_AutoAccumEn_GFX103(x) (((unsigned)(x) & 0x1) << 5) /* >= gfx103 */ 16972 #define G_03726C_AutoAccumEn_GFX103(x) (((x) >> 5) & 0x1) 16973 #define C_03726C_AutoAccumEn_GFX103 0xFFFFFFDF 16974 #define S_03726C_SE1_LoadOverride_GFX10(x) (((unsigned)(x) & 0x1) << 5) /* gfx10 */ 16975 #define G_03726C_SE1_LoadOverride_GFX10(x) (((x) >> 5) & 0x1) 16976 #define C_03726C_SE1_LoadOverride_GFX10 0xFFFFFFDF 16977 #define S_03726C_AutoResetPerfmonDisable_GFX10(x) (((unsigned)(x) & 0x1) << 6) /* gfx10 */ 16978 #define G_03726C_AutoResetPerfmonDisable_GFX10(x) (((x) >> 6) & 0x1) 16979 #define C_03726C_AutoResetPerfmonDisable_GFX10 0xFFFFFFBF 16980 #define S_03726C_SwaAutoAccumEn(x) (((unsigned)(x) & 0x1) << 6) /* >= gfx103 */ 16981 #define G_03726C_SwaAutoAccumEn(x) (((x) >> 6) & 0x1) 16982 #define C_03726C_SwaAutoAccumEn 0xFFFFFFBF 16983 #define S_03726C_AutoSpmEn_GFX103(x) (((unsigned)(x) & 0x1) << 7) /* >= gfx103 */ 16984 #define G_03726C_AutoSpmEn_GFX103(x) (((x) >> 7) & 0x1) 16985 #define C_03726C_AutoSpmEn_GFX103 0xFFFFFF7F 16986 #define S_03726C_SwaAutoSpmEn(x) (((unsigned)(x) & 0x1) << 8) /* >= gfx103 */ 16987 #define G_03726C_SwaAutoSpmEn(x) (((x) >> 8) & 0x1) 16988 #define C_03726C_SwaAutoSpmEn 0xFFFFFEFF 16989 #define S_03726C_Globals_LoadOverride_GFX103(x) (((unsigned)(x) & 0x1) << 9) /* >= gfx103 */ 16990 #define G_03726C_Globals_LoadOverride_GFX103(x) (((x) >> 9) & 0x1) 16991 #define C_03726C_Globals_LoadOverride_GFX103 0xFFFFFDFF 16992 #define S_03726C_Globals_SwaLoadOverride(x) (((unsigned)(x) & 0x1) << 10) /* >= gfx103 */ 16993 #define G_03726C_Globals_SwaLoadOverride(x) (((x) >> 10) & 0x1) 16994 #define C_03726C_Globals_SwaLoadOverride 0xFFFFFBFF 16995 #define S_03726C_SE0_LoadOverride_GFX103(x) (((unsigned)(x) & 0x1) << 11) /* >= gfx103 */ 16996 #define G_03726C_SE0_LoadOverride_GFX103(x) (((x) >> 11) & 0x1) 16997 #define C_03726C_SE0_LoadOverride_GFX103 0xFFFFF7FF 16998 #define S_03726C_SE0_SwaLoadOverride(x) (((unsigned)(x) & 0x1) << 12) /* >= gfx103 */ 16999 #define G_03726C_SE0_SwaLoadOverride(x) (((x) >> 12) & 0x1) 17000 #define C_03726C_SE0_SwaLoadOverride 0xFFFFEFFF 17001 #define S_03726C_SE1_LoadOverride_GFX103(x) (((unsigned)(x) & 0x1) << 13) /* >= gfx103 */ 17002 #define G_03726C_SE1_LoadOverride_GFX103(x) (((x) >> 13) & 0x1) 17003 #define C_03726C_SE1_LoadOverride_GFX103 0xFFFFDFFF 17004 #define S_03726C_SE1_SwaLoadOverride(x) (((unsigned)(x) & 0x1) << 14) /* >= gfx103 */ 17005 #define G_03726C_SE1_SwaLoadOverride(x) (((x) >> 14) & 0x1) 17006 #define C_03726C_SE1_SwaLoadOverride 0xFFFFBFFF 17007 #define S_03726C_SE2_LoadOverride(x) (((unsigned)(x) & 0x1) << 15) /* >= gfx103 */ 17008 #define G_03726C_SE2_LoadOverride(x) (((x) >> 15) & 0x1) 17009 #define C_03726C_SE2_LoadOverride 0xFFFF7FFF 17010 #define S_03726C_SE2_SwaLoadOverride(x) (((unsigned)(x) & 0x1) << 16) /* >= gfx103 */ 17011 #define G_03726C_SE2_SwaLoadOverride(x) (((x) >> 16) & 0x1) 17012 #define C_03726C_SE2_SwaLoadOverride 0xFFFEFFFF 17013 #define S_03726C_SE3_LoadOverride(x) (((unsigned)(x) & 0x1) << 17) /* >= gfx103 */ 17014 #define G_03726C_SE3_LoadOverride(x) (((x) >> 17) & 0x1) 17015 #define C_03726C_SE3_LoadOverride 0xFFFDFFFF 17016 #define S_03726C_SE3_SwaLoadOverride(x) (((unsigned)(x) & 0x1) << 18) /* >= gfx103 */ 17017 #define G_03726C_SE3_SwaLoadOverride(x) (((x) >> 18) & 0x1) 17018 #define C_03726C_SE3_SwaLoadOverride 0xFFFBFFFF 17019 #define R_03726C_RLC_SPM_GLOBAL_MUXSEL_ADDR 0x03726C /* gfx7, gfx8, gfx81, gfx9 */ 17020 #define R_037270_RLC_SPM_ACCUM_THRESHOLD 0x037270 /* >= gfx10 */ 17021 #define S_037270_Threshold(x) (((unsigned)(x) & 0xFFFF) << 0) 17022 #define G_037270_Threshold(x) (((x) >> 0) & 0xFFFF) 17023 #define C_037270_Threshold 0xFFFF0000 17024 #define R_037270_RLC_SPM_GLOBAL_MUXSEL_DATA 0x037270 /* gfx7, gfx8, gfx81, gfx9 */ 17025 #define R_037274_RLC_SPM_ACCUM_SAMPLES_REQUESTED 0x037274 /* >= gfx10 */ 17026 #define S_037274_SamplesRequested(x) (((unsigned)(x) & 0xFF) << 0) 17027 #define G_037274_SamplesRequested(x) (((x) >> 0) & 0xFF) 17028 #define C_037274_SamplesRequested 0xFFFFFF00 17029 #define R_037274_RLC_SPM_RING_RDPTR 0x037274 /* gfx7, gfx8, gfx81, gfx9 */ 17030 #define R_037278_RLC_SPM_ACCUM_DATARAM_WRCOUNT 0x037278 /* >= gfx10 */ 17031 #define S_037278_DataRamWrCount(x) (((unsigned)(x) & 0x7FFFF) << 0) 17032 #define G_037278_DataRamWrCount(x) (((x) >> 0) & 0x7FFFF) 17033 #define C_037278_DataRamWrCount 0xFFF80000 17034 #define R_037278_RLC_SPM_SEGMENT_THRESHOLD 0x037278 /* gfx7, gfx8, gfx81, gfx9 */ 17035 #define R_03727C_RLC_SPM_DBR0_PERFMON_SAMPLE_DELAY 0x03727C /* gfx7, gfx8 */ 17036 #define S_03727C_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 17037 #define G_03727C_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 17038 #define C_03727C_PERFMON_SAMPLE_DELAY 0xFFFFFF00 17039 #define R_03727C_RLC_SPM_PERFMON_SE3TO0_SEGMENT_SIZE 0x03727C /* >= gfx10 */ 17040 #define S_03727C_SE0_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 0) 17041 #define G_03727C_SE0_NUM_LINE(x) (((x) >> 0) & 0xFF) 17042 #define C_03727C_SE0_NUM_LINE 0xFFFFFF00 17043 #define S_03727C_SE1_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 8) 17044 #define G_03727C_SE1_NUM_LINE(x) (((x) >> 8) & 0xFF) 17045 #define C_03727C_SE1_NUM_LINE 0xFFFF00FF 17046 #define S_03727C_SE2_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 16) 17047 #define G_03727C_SE2_NUM_LINE(x) (((x) >> 16) & 0xFF) 17048 #define C_03727C_SE2_NUM_LINE 0xFF00FFFF 17049 #define S_03727C_SE3_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 24) 17050 #define G_03727C_SE3_NUM_LINE(x) (((x) >> 24) & 0xFF) 17051 #define C_03727C_SE3_NUM_LINE 0x00FFFFFF 17052 #define R_037280_RLC_SPM_DBR1_PERFMON_SAMPLE_DELAY 0x037280 /* gfx7, gfx8 */ 17053 #define R_037280_RLC_SPM_PERFMON_GLB_SEGMENT_SIZE 0x037280 /* >= gfx10 */ 17054 #define S_037280_PERFMON_SEGMENT_SIZE(x) (((unsigned)(x) & 0xFF) << 0) 17055 #define G_037280_PERFMON_SEGMENT_SIZE(x) (((x) >> 0) & 0xFF) 17056 #define C_037280_PERFMON_SEGMENT_SIZE 0xFFFFFF00 17057 #define S_037280_GLOBAL_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 8) 17058 #define G_037280_GLOBAL_NUM_LINE(x) (((x) >> 8) & 0xFF) 17059 #define C_037280_GLOBAL_NUM_LINE 0xFFFF00FF 17060 #define R_037284_RLC_SPM_CBR0_PERFMON_SAMPLE_DELAY 0x037284 /* gfx7, gfx8 */ 17061 #define S_037284_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 17062 #define G_037284_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 17063 #define C_037284_PERFMON_SAMPLE_DELAY 0xFFFFFF00 17064 #define R_037284_RLC_SPM_VIRT_CTRL 0x037284 /* >= gfx10 */ 17065 #define S_037284_PauseSpmSamplingRequest(x) (((unsigned)(x) & 0x1) << 0) 17066 #define G_037284_PauseSpmSamplingRequest(x) (((x) >> 0) & 0x1) 17067 #define C_037284_PauseSpmSamplingRequest 0xFFFFFFFE 17068 #define R_037288_RLC_SPM_CBR1_PERFMON_SAMPLE_DELAY 0x037288 /* gfx7, gfx8 */ 17069 #define R_037288_RLC_SPM_PERFMON_SWA_SEGMENT_SIZE 0x037288 /* >= gfx103 */ 17070 #define S_037288_PERFMON_SEGMENT_SIZE(x) (((unsigned)(x) & 0xFF) << 0) 17071 #define G_037288_PERFMON_SEGMENT_SIZE(x) (((x) >> 0) & 0xFF) 17072 #define C_037288_PERFMON_SEGMENT_SIZE 0xFFFFFF00 17073 #define S_037288_RESERVED1(x) (((unsigned)(x) & 0x7) << 8) 17074 #define G_037288_RESERVED1(x) (((x) >> 8) & 0x7) 17075 #define C_037288_RESERVED1 0xFFFFF8FF 17076 #define S_037288_GLOBAL_NUM_LINE(x) (((unsigned)(x) & 0x1F) << 11) 17077 #define G_037288_GLOBAL_NUM_LINE(x) (((x) >> 11) & 0x1F) 17078 #define C_037288_GLOBAL_NUM_LINE 0xFFFF07FF 17079 #define S_037288_SE0_NUM_LINE(x) (((unsigned)(x) & 0x1F) << 16) 17080 #define G_037288_SE0_NUM_LINE(x) (((x) >> 16) & 0x1F) 17081 #define C_037288_SE0_NUM_LINE 0xFFE0FFFF 17082 #define S_037288_SE1_NUM_LINE(x) (((unsigned)(x) & 0x1F) << 21) 17083 #define G_037288_SE1_NUM_LINE(x) (((x) >> 21) & 0x1F) 17084 #define C_037288_SE1_NUM_LINE 0xFC1FFFFF 17085 #define S_037288_SE2_NUM_LINE(x) (((unsigned)(x) & 0x1F) << 26) 17086 #define G_037288_SE2_NUM_LINE(x) (((x) >> 26) & 0x1F) 17087 #define C_037288_SE2_NUM_LINE 0x83FFFFFF 17088 #define R_03728C_RLC_SPM_RMI_PERFMON_SAMPLE_DELAY 0x03728C /* gfx9 */ 17089 #define S_03728C_PERFMON_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 17090 #define G_03728C_PERFMON_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 17091 #define C_03728C_PERFMON_SAMPLE_DELAY 0xFFFFFF00 17092 #define R_03728C_RLC_SPM_VIRT_STATUS 0x03728C /* >= gfx10 */ 17093 #define S_03728C_SpmSamplingPaused(x) (((unsigned)(x) & 0x1) << 0) 17094 #define G_03728C_SpmSamplingPaused(x) (((x) >> 0) & 0x1) 17095 #define C_03728C_SpmSamplingPaused 0xFFFFFFFE 17096 #define R_037290_RLC_SPM_GFXCLOCK_HIGHCOUNT 0x037290 /* >= gfx103 */ 17097 #define R_037290_RLC_SPM_PERFMON_SAMPLE_DELAY_MAX 0x037290 /* gfx9 */ 17098 #define S_037290_PERFMON_MAX_SAMPLE_DELAY(x) (((unsigned)(x) & 0xFF) << 0) 17099 #define G_037290_PERFMON_MAX_SAMPLE_DELAY(x) (((x) >> 0) & 0xFF) 17100 #define C_037290_PERFMON_MAX_SAMPLE_DELAY 0xFFFFFF00 17101 #define R_037294_RLC_SPM_GFXCLOCK_LOWCOUNT 0x037294 /* >= gfx103 */ 17102 #define R_037298_RLC_SPM_PERFMON_SWA_SE3TO0_SEGMENT_SIZE 0x037298 /* >= gfx103 */ 17103 #define S_037298_SE0_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 0) 17104 #define G_037298_SE0_NUM_LINE(x) (((x) >> 0) & 0xFF) 17105 #define C_037298_SE0_NUM_LINE 0xFFFFFF00 17106 #define S_037298_SE1_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 8) 17107 #define G_037298_SE1_NUM_LINE(x) (((x) >> 8) & 0xFF) 17108 #define C_037298_SE1_NUM_LINE 0xFFFF00FF 17109 #define S_037298_SE2_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 16) 17110 #define G_037298_SE2_NUM_LINE(x) (((x) >> 16) & 0xFF) 17111 #define C_037298_SE2_NUM_LINE 0xFF00FFFF 17112 #define S_037298_SE3_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 24) 17113 #define G_037298_SE3_NUM_LINE(x) (((x) >> 24) & 0xFF) 17114 #define C_037298_SE3_NUM_LINE 0x00FFFFFF 17115 #define R_03729C_RLC_SPM_GLOBAL_MUXSEL_ADDR_OFFSET 0x03729C /* >= gfx103 */ 17116 #define S_03729C_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 0) 17117 #define G_03729C_OFFSET(x) (((x) >> 0) & 0xFFFF) 17118 #define C_03729C_OFFSET 0xFFFF0000 17119 #define R_0372A0_RLC_SPM_SE_MUXSEL_ADDR_OFFSET 0x0372A0 /* >= gfx103 */ 17120 #define S_0372A0_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 0) 17121 #define G_0372A0_OFFSET(x) (((x) >> 0) & 0xFFFF) 17122 #define C_0372A0_OFFSET 0xFFFF0000 17123 #define R_0372A4_RLC_SPM_ACCUM_SWA_DATARAM_ADDR 0x0372A4 /* >= gfx103 */ 17124 #define S_0372A4_addr(x) (((unsigned)(x) & 0x7F) << 0) 17125 #define G_0372A4_addr(x) (((x) >> 0) & 0x7F) 17126 #define C_0372A4_addr 0xFFFFFF80 17127 #define R_0372A8_RLC_SPM_ACCUM_SWA_DATARAM_DATA 0x0372A8 /* >= gfx103 */ 17128 #define R_0372AC_RLC_SPM_ACCUM_CTRLRAM_ADDR_OFFSET 0x0372AC /* >= gfx103 */ 17129 #define S_0372AC_global_offset(x) (((unsigned)(x) & 0xFF) << 0) 17130 #define G_0372AC_global_offset(x) (((x) >> 0) & 0xFF) 17131 #define C_0372AC_global_offset 0xFFFFFF00 17132 #define S_0372AC_spmwithaccum_se_offset(x) (((unsigned)(x) & 0xFF) << 8) 17133 #define G_0372AC_spmwithaccum_se_offset(x) (((x) >> 8) & 0xFF) 17134 #define C_0372AC_spmwithaccum_se_offset 0xFFFF00FF 17135 #define S_0372AC_spmwithaccum_global_offset(x) (((unsigned)(x) & 0xFF) << 16) 17136 #define G_0372AC_spmwithaccum_global_offset(x) (((x) >> 16) & 0xFF) 17137 #define C_0372AC_spmwithaccum_global_offset 0xFF00FFFF 17138 #define R_0372B0_RLC_SPM_PERFMON_SWA_GLB_SEGMENT_SIZE 0x0372B0 /* >= gfx103 */ 17139 #define S_0372B0_PERFMON_SEGMENT_SIZE(x) (((unsigned)(x) & 0xFF) << 0) 17140 #define G_0372B0_PERFMON_SEGMENT_SIZE(x) (((x) >> 0) & 0xFF) 17141 #define C_0372B0_PERFMON_SEGMENT_SIZE 0xFFFFFF00 17142 #define S_0372B0_GLOBAL_NUM_LINE(x) (((unsigned)(x) & 0xFF) << 8) 17143 #define G_0372B0_GLOBAL_NUM_LINE(x) (((x) >> 8) & 0xFF) 17144 #define C_0372B0_GLOBAL_NUM_LINE 0xFFFF00FF 17145 #define R_0372B4_RLC_SPM_ACCUM_DATARAM_32BITCNTRS_REGIONS 0x0372B4 /* >= gfx103 */ 17146 #define S_0372B4_spp_addr_region(x) (((unsigned)(x) & 0xFF) << 0) 17147 #define G_0372B4_spp_addr_region(x) (((x) >> 0) & 0xFF) 17148 #define C_0372B4_spp_addr_region 0xFFFFFF00 17149 #define S_0372B4_swa_addr_region(x) (((unsigned)(x) & 0xFF) << 8) 17150 #define G_0372B4_swa_addr_region(x) (((x) >> 8) & 0xFF) 17151 #define C_0372B4_swa_addr_region 0xFFFF00FF 17152 #define R_0372F8_RLC_PERFMON_CLK_CNTL_UCODE 0x0372F8 /* gfx9 */ 17153 #define S_0372F8_PERFMON_CLOCK_STATE(x) (((unsigned)(x) & 0x1) << 0) 17154 #define G_0372F8_PERFMON_CLOCK_STATE(x) (((x) >> 0) & 0x1) 17155 #define C_0372F8_PERFMON_CLOCK_STATE 0xFFFFFFFE 17156 #define R_0372FC_RLC_PERFMON_CLK_CNTL 0x0372FC /* gfx8, gfx81, gfx9 */ 17157 #define S_0372FC_PERFMON_CLOCK_STATE(x) (((unsigned)(x) & 0x1) << 0) 17158 #define G_0372FC_PERFMON_CLOCK_STATE(x) (((x) >> 0) & 0x1) 17159 #define C_0372FC_PERFMON_CLOCK_STATE 0xFFFFFFFE 17160 #define R_037300_RLC_PERFMON_CNTL 0x037300 /* >= gfx7 */ 17161 #define S_037300_PERFMON_STATE(x) (((unsigned)(x) & 0x7) << 0) 17162 #define G_037300_PERFMON_STATE(x) (((x) >> 0) & 0x7) 17163 #define C_037300_PERFMON_STATE 0xFFFFFFF8 17164 #define V_037300_CP_PERFMON_STATE_DISABLE_AND_RESET 0 17165 #define V_037300_CP_PERFMON_STATE_START_COUNTING 1 17166 #define V_037300_CP_PERFMON_STATE_STOP_COUNTING 2 17167 #define V_037300_CP_PERFMON_STATE_RESERVED_3 3 17168 #define V_037300_CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM 4 17169 #define V_037300_CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM 5 17170 #define S_037300_PERFMON_SAMPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 10) 17171 #define G_037300_PERFMON_SAMPLE_ENABLE(x) (((x) >> 10) & 0x1) 17172 #define C_037300_PERFMON_SAMPLE_ENABLE 0xFFFFFBFF 17173 #define R_037304_RLC_PERFCOUNTER0_SELECT 0x037304 /* >= gfx7 */ 17174 #define S_037304_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0xFF) << 0) 17175 #define G_037304_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0xFF) 17176 #define C_037304_PERFCOUNTER_SELECT 0xFFFFFF00 17177 #define R_037308_RLC_PERFCOUNTER1_SELECT 0x037308 /* >= gfx7 */ 17178 #define R_03730C_RLC_GPU_IOV_PERF_CNT_CNTL 0x03730C /* >= gfx9 */ 17179 #define S_03730C_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 17180 #define G_03730C_ENABLE(x) (((x) >> 0) & 0x1) 17181 #define C_03730C_ENABLE 0xFFFFFFFE 17182 #define S_03730C_MODE_SELECT(x) (((unsigned)(x) & 0x1) << 1) 17183 #define G_03730C_MODE_SELECT(x) (((x) >> 1) & 0x1) 17184 #define C_03730C_MODE_SELECT 0xFFFFFFFD 17185 #define S_03730C_RESET(x) (((unsigned)(x) & 0x1) << 2) 17186 #define G_03730C_RESET(x) (((x) >> 2) & 0x1) 17187 #define C_03730C_RESET 0xFFFFFFFB 17188 #define R_037310_RLC_GPU_IOV_PERF_CNT_WR_ADDR 0x037310 /* >= gfx9 */ 17189 #define S_037310_VFID(x) (((unsigned)(x) & 0xF) << 0) 17190 #define G_037310_VFID(x) (((x) >> 0) & 0xF) 17191 #define C_037310_VFID 0xFFFFFFF0 17192 #define S_037310_CNT_ID(x) (((unsigned)(x) & 0x3) << 4) 17193 #define G_037310_CNT_ID(x) (((x) >> 4) & 0x3) 17194 #define C_037310_CNT_ID 0xFFFFFFCF 17195 #define R_037314_RLC_GPU_IOV_PERF_CNT_WR_DATA 0x037314 /* >= gfx9 */ 17196 #define S_037314_DATA(x) (((unsigned)(x) & 0xF) << 0) 17197 #define G_037314_DATA(x) (((x) >> 0) & 0xF) 17198 #define C_037314_DATA 0xFFFFFFF0 17199 #define R_037318_RLC_GPU_IOV_PERF_CNT_RD_ADDR 0x037318 /* >= gfx9 */ 17200 #define S_037318_VFID(x) (((unsigned)(x) & 0xF) << 0) 17201 #define G_037318_VFID(x) (((x) >> 0) & 0xF) 17202 #define C_037318_VFID 0xFFFFFFF0 17203 #define S_037318_CNT_ID(x) (((unsigned)(x) & 0x3) << 4) 17204 #define G_037318_CNT_ID(x) (((x) >> 4) & 0x3) 17205 #define C_037318_CNT_ID 0xFFFFFFCF 17206 #define R_03731C_RLC_GPU_IOV_PERF_CNT_RD_DATA 0x03731C /* >= gfx9 */ 17207 #define S_03731C_DATA(x) (((unsigned)(x) & 0xF) << 0) 17208 #define G_03731C_DATA(x) (((x) >> 0) & 0xF) 17209 #define C_03731C_DATA 0xFFFFFFF0 17210 #define R_037390_RLC_PERFMON_CLK_CNTL 0x037390 /* >= gfx10 */ 17211 #define S_037390_PERFMON_CLOCK_STATE(x) (((unsigned)(x) & 0x1) << 0) 17212 #define G_037390_PERFMON_CLOCK_STATE(x) (((x) >> 0) & 0x1) 17213 #define C_037390_PERFMON_CLOCK_STATE 0xFFFFFFFE 17214 #define R_037394_RLC_PERFMON_CLK_CNTL_UCODE 0x037394 /* gfx10 */ 17215 #define S_037394_PERFMON_CLOCK_STATE(x) (((unsigned)(x) & 0x1) << 0) 17216 #define G_037394_PERFMON_CLOCK_STATE(x) (((x) >> 0) & 0x1) 17217 #define C_037394_PERFMON_CLOCK_STATE 0xFFFFFFFE 17218 #define R_037400_RMI_PERFCOUNTER0_SELECT 0x037400 /* >= gfx9 */ 17219 #define S_037400_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 17220 #define G_037400_PERF_SEL(x) (((x) >> 0) & 0x1FF) 17221 #define C_037400_PERF_SEL 0xFFFFFE00 17222 #define S_037400_PERF_SEL1(x) (((unsigned)(x) & 0x1FF) << 10) 17223 #define G_037400_PERF_SEL1(x) (((x) >> 10) & 0x1FF) 17224 #define C_037400_PERF_SEL1 0xFFF803FF 17225 #define S_037400_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 17226 #define G_037400_CNTR_MODE(x) (((x) >> 20) & 0xF) 17227 #define C_037400_CNTR_MODE 0xFF0FFFFF 17228 #define S_037400_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 17229 #define G_037400_PERF_MODE1(x) (((x) >> 24) & 0xF) 17230 #define C_037400_PERF_MODE1 0xF0FFFFFF 17231 #define S_037400_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 17232 #define G_037400_PERF_MODE(x) (((x) >> 28) & 0xF) 17233 #define C_037400_PERF_MODE 0x0FFFFFFF 17234 #define R_037404_RMI_PERFCOUNTER0_SELECT1 0x037404 /* >= gfx9 */ 17235 #define S_037404_PERF_SEL2(x) (((unsigned)(x) & 0x1FF) << 0) 17236 #define G_037404_PERF_SEL2(x) (((x) >> 0) & 0x1FF) 17237 #define C_037404_PERF_SEL2 0xFFFFFE00 17238 #define S_037404_PERF_SEL3(x) (((unsigned)(x) & 0x1FF) << 10) 17239 #define G_037404_PERF_SEL3(x) (((x) >> 10) & 0x1FF) 17240 #define C_037404_PERF_SEL3 0xFFF803FF 17241 #define S_037404_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 17242 #define G_037404_PERF_MODE3(x) (((x) >> 24) & 0xF) 17243 #define C_037404_PERF_MODE3 0xF0FFFFFF 17244 #define S_037404_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 17245 #define G_037404_PERF_MODE2(x) (((x) >> 28) & 0xF) 17246 #define C_037404_PERF_MODE2 0x0FFFFFFF 17247 #define R_037408_RMI_PERFCOUNTER1_SELECT 0x037408 /* >= gfx9 */ 17248 #define S_037408_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 17249 #define G_037408_PERF_SEL(x) (((x) >> 0) & 0x1FF) 17250 #define C_037408_PERF_SEL 0xFFFFFE00 17251 #define S_037408_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 17252 #define G_037408_PERF_MODE(x) (((x) >> 28) & 0xF) 17253 #define C_037408_PERF_MODE 0x0FFFFFFF 17254 #define R_03740C_RMI_PERFCOUNTER2_SELECT 0x03740C /* >= gfx9 */ 17255 #define R_037410_RMI_PERFCOUNTER2_SELECT1 0x037410 /* >= gfx9 */ 17256 #define R_037414_RMI_PERFCOUNTER3_SELECT 0x037414 /* >= gfx9 */ 17257 #define R_037418_RMI_PERF_COUNTER_CNTL 0x037418 /* >= gfx9 */ 17258 #define S_037418_TRANS_BASED_PERF_EN_SEL(x) (((unsigned)(x) & 0x3) << 0) 17259 #define G_037418_TRANS_BASED_PERF_EN_SEL(x) (((x) >> 0) & 0x3) 17260 #define C_037418_TRANS_BASED_PERF_EN_SEL 0xFFFFFFFC 17261 #define S_037418_EVENT_BASED_PERF_EN_SEL(x) (((unsigned)(x) & 0x3) << 2) 17262 #define G_037418_EVENT_BASED_PERF_EN_SEL(x) (((x) >> 2) & 0x3) 17263 #define C_037418_EVENT_BASED_PERF_EN_SEL 0xFFFFFFF3 17264 #define S_037418_TC_PERF_EN_SEL(x) (((unsigned)(x) & 0x3) << 4) 17265 #define G_037418_TC_PERF_EN_SEL(x) (((x) >> 4) & 0x3) 17266 #define C_037418_TC_PERF_EN_SEL 0xFFFFFFCF 17267 #define S_037418_PERF_EVENT_WINDOW_MASK0(x) (((unsigned)(x) & 0x3) << 6) 17268 #define G_037418_PERF_EVENT_WINDOW_MASK0(x) (((x) >> 6) & 0x3) 17269 #define C_037418_PERF_EVENT_WINDOW_MASK0 0xFFFFFF3F 17270 #define S_037418_PERF_EVENT_WINDOW_MASK1(x) (((unsigned)(x) & 0x3) << 8) 17271 #define G_037418_PERF_EVENT_WINDOW_MASK1(x) (((x) >> 8) & 0x3) 17272 #define C_037418_PERF_EVENT_WINDOW_MASK1 0xFFFFFCFF 17273 #define S_037418_PERF_COUNTER_CID(x) (((unsigned)(x) & 0xF) << 10) 17274 #define G_037418_PERF_COUNTER_CID(x) (((x) >> 10) & 0xF) 17275 #define C_037418_PERF_COUNTER_CID 0xFFFFC3FF 17276 #define S_037418_PERF_COUNTER_VMID(x) (((unsigned)(x) & 0x1F) << 14) 17277 #define G_037418_PERF_COUNTER_VMID(x) (((x) >> 14) & 0x1F) 17278 #define C_037418_PERF_COUNTER_VMID 0xFFF83FFF 17279 #define S_037418_PERF_COUNTER_BURST_LENGTH_THRESHOLD(x) (((unsigned)(x) & 0x3F) << 19) 17280 #define G_037418_PERF_COUNTER_BURST_LENGTH_THRESHOLD(x) (((x) >> 19) & 0x3F) 17281 #define C_037418_PERF_COUNTER_BURST_LENGTH_THRESHOLD 0xFE07FFFF 17282 #define S_037418_PERF_SOFT_RESET(x) (((unsigned)(x) & 0x1) << 25) 17283 #define G_037418_PERF_SOFT_RESET(x) (((x) >> 25) & 0x1) 17284 #define C_037418_PERF_SOFT_RESET 0xFDFFFFFF 17285 #define S_037418_PERF_CNTR_SPM_SEL(x) (((unsigned)(x) & 0x1) << 26) 17286 #define G_037418_PERF_CNTR_SPM_SEL(x) (((x) >> 26) & 0x1) 17287 #define C_037418_PERF_CNTR_SPM_SEL 0xFBFFFFFF 17288 #define R_037480_GC_ATC_L2_PERFCOUNTER0_CFG 0x037480 /* gfx10 */ 17289 #define S_037480_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 17290 #define G_037480_PERF_SEL(x) (((x) >> 0) & 0xFF) 17291 #define C_037480_PERF_SEL 0xFFFFFF00 17292 #define S_037480_PERF_SEL_END(x) (((unsigned)(x) & 0xFF) << 8) 17293 #define G_037480_PERF_SEL_END(x) (((x) >> 8) & 0xFF) 17294 #define C_037480_PERF_SEL_END 0xFFFF00FF 17295 #define S_037480_PERF_MODE(x) (((unsigned)(x) & 0xF) << 24) 17296 #define G_037480_PERF_MODE(x) (((x) >> 24) & 0xF) 17297 #define C_037480_PERF_MODE 0xF0FFFFFF 17298 #define S_037480_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 17299 #define G_037480_ENABLE(x) (((x) >> 28) & 0x1) 17300 #define C_037480_ENABLE 0xEFFFFFFF 17301 #define S_037480_CLEAR(x) (((unsigned)(x) & 0x1) << 29) 17302 #define G_037480_CLEAR(x) (((x) >> 29) & 0x1) 17303 #define C_037480_CLEAR 0xDFFFFFFF 17304 #define R_037484_GC_ATC_L2_PERFCOUNTER1_CFG 0x037484 /* gfx10 */ 17305 #define R_037488_GC_ATC_L2_PERFCOUNTER_RSLT_CNTL 0x037488 /* gfx10 */ 17306 #define S_037488_PERF_COUNTER_SELECT(x) (((unsigned)(x) & 0xF) << 0) 17307 #define G_037488_PERF_COUNTER_SELECT(x) (((x) >> 0) & 0xF) 17308 #define C_037488_PERF_COUNTER_SELECT 0xFFFFFFF0 17309 #define S_037488_START_TRIGGER(x) (((unsigned)(x) & 0xFF) << 8) 17310 #define G_037488_START_TRIGGER(x) (((x) >> 8) & 0xFF) 17311 #define C_037488_START_TRIGGER 0xFFFF00FF 17312 #define S_037488_STOP_TRIGGER(x) (((unsigned)(x) & 0xFF) << 16) 17313 #define G_037488_STOP_TRIGGER(x) (((x) >> 16) & 0xFF) 17314 #define C_037488_STOP_TRIGGER 0xFF00FFFF 17315 #define S_037488_ENABLE_ANY(x) (((unsigned)(x) & 0x1) << 24) 17316 #define G_037488_ENABLE_ANY(x) (((x) >> 24) & 0x1) 17317 #define C_037488_ENABLE_ANY 0xFEFFFFFF 17318 #define S_037488_CLEAR_ALL(x) (((unsigned)(x) & 0x1) << 25) 17319 #define G_037488_CLEAR_ALL(x) (((x) >> 25) & 0x1) 17320 #define C_037488_CLEAR_ALL 0xFDFFFFFF 17321 #define S_037488_STOP_ALL_ON_SATURATE(x) (((unsigned)(x) & 0x1) << 26) 17322 #define G_037488_STOP_ALL_ON_SATURATE(x) (((x) >> 26) & 0x1) 17323 #define C_037488_STOP_ALL_ON_SATURATE 0xFBFFFFFF 17324 #define R_0374B0_GCMC_VM_L2_PERFCOUNTER0_CFG 0x0374B0 /* >= gfx10 */ 17325 #define S_0374B0_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 17326 #define G_0374B0_PERF_SEL(x) (((x) >> 0) & 0xFF) 17327 #define C_0374B0_PERF_SEL 0xFFFFFF00 17328 #define S_0374B0_PERF_SEL_END(x) (((unsigned)(x) & 0xFF) << 8) 17329 #define G_0374B0_PERF_SEL_END(x) (((x) >> 8) & 0xFF) 17330 #define C_0374B0_PERF_SEL_END 0xFFFF00FF 17331 #define S_0374B0_PERF_MODE(x) (((unsigned)(x) & 0xF) << 24) 17332 #define G_0374B0_PERF_MODE(x) (((x) >> 24) & 0xF) 17333 #define C_0374B0_PERF_MODE 0xF0FFFFFF 17334 #define S_0374B0_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 17335 #define G_0374B0_ENABLE(x) (((x) >> 28) & 0x1) 17336 #define C_0374B0_ENABLE 0xEFFFFFFF 17337 #define S_0374B0_CLEAR(x) (((unsigned)(x) & 0x1) << 29) 17338 #define G_0374B0_CLEAR(x) (((x) >> 29) & 0x1) 17339 #define C_0374B0_CLEAR 0xDFFFFFFF 17340 #define R_0374B4_GCMC_VM_L2_PERFCOUNTER1_CFG 0x0374B4 /* >= gfx10 */ 17341 #define R_0374B8_GCMC_VM_L2_PERFCOUNTER2_CFG 0x0374B8 /* >= gfx10 */ 17342 #define R_0374BC_GCMC_VM_L2_PERFCOUNTER3_CFG 0x0374BC /* >= gfx10 */ 17343 #define R_0374C0_GCMC_VM_L2_PERFCOUNTER4_CFG 0x0374C0 /* >= gfx10 */ 17344 #define R_0374C4_GCMC_VM_L2_PERFCOUNTER5_CFG 0x0374C4 /* >= gfx10 */ 17345 #define R_0374C8_GCMC_VM_L2_PERFCOUNTER6_CFG 0x0374C8 /* >= gfx10 */ 17346 #define R_0374CC_GCMC_VM_L2_PERFCOUNTER7_CFG 0x0374CC /* >= gfx10 */ 17347 #define R_0374D0_GCMC_VM_L2_PERFCOUNTER_RSLT_CNTL 0x0374D0 /* >= gfx10 */ 17348 #define S_0374D0_PERF_COUNTER_SELECT(x) (((unsigned)(x) & 0xF) << 0) 17349 #define G_0374D0_PERF_COUNTER_SELECT(x) (((x) >> 0) & 0xF) 17350 #define C_0374D0_PERF_COUNTER_SELECT 0xFFFFFFF0 17351 #define S_0374D0_START_TRIGGER(x) (((unsigned)(x) & 0xFF) << 8) 17352 #define G_0374D0_START_TRIGGER(x) (((x) >> 8) & 0xFF) 17353 #define C_0374D0_START_TRIGGER 0xFFFF00FF 17354 #define S_0374D0_STOP_TRIGGER(x) (((unsigned)(x) & 0xFF) << 16) 17355 #define G_0374D0_STOP_TRIGGER(x) (((x) >> 16) & 0xFF) 17356 #define C_0374D0_STOP_TRIGGER 0xFF00FFFF 17357 #define S_0374D0_ENABLE_ANY(x) (((unsigned)(x) & 0x1) << 24) 17358 #define G_0374D0_ENABLE_ANY(x) (((x) >> 24) & 0x1) 17359 #define C_0374D0_ENABLE_ANY 0xFEFFFFFF 17360 #define S_0374D0_CLEAR_ALL(x) (((unsigned)(x) & 0x1) << 25) 17361 #define G_0374D0_CLEAR_ALL(x) (((x) >> 25) & 0x1) 17362 #define C_0374D0_CLEAR_ALL 0xFDFFFFFF 17363 #define S_0374D0_STOP_ALL_ON_SATURATE(x) (((unsigned)(x) & 0x1) << 26) 17364 #define G_0374D0_STOP_ALL_ON_SATURATE(x) (((x) >> 26) & 0x1) 17365 #define C_0374D0_STOP_ALL_ON_SATURATE 0xFBFFFFFF 17366 #define R_0374D4_GCUTCL2_PERFCOUNTER0_CFG 0x0374D4 /* >= gfx103 */ 17367 #define S_0374D4_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 17368 #define G_0374D4_PERF_SEL(x) (((x) >> 0) & 0xFF) 17369 #define C_0374D4_PERF_SEL 0xFFFFFF00 17370 #define S_0374D4_PERF_SEL_END(x) (((unsigned)(x) & 0xFF) << 8) 17371 #define G_0374D4_PERF_SEL_END(x) (((x) >> 8) & 0xFF) 17372 #define C_0374D4_PERF_SEL_END 0xFFFF00FF 17373 #define S_0374D4_PERF_MODE(x) (((unsigned)(x) & 0xF) << 24) 17374 #define G_0374D4_PERF_MODE(x) (((x) >> 24) & 0xF) 17375 #define C_0374D4_PERF_MODE 0xF0FFFFFF 17376 #define S_0374D4_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 17377 #define G_0374D4_ENABLE(x) (((x) >> 28) & 0x1) 17378 #define C_0374D4_ENABLE 0xEFFFFFFF 17379 #define S_0374D4_CLEAR(x) (((unsigned)(x) & 0x1) << 29) 17380 #define G_0374D4_CLEAR(x) (((x) >> 29) & 0x1) 17381 #define C_0374D4_CLEAR 0xDFFFFFFF 17382 #define R_0374D8_GCUTCL2_PERFCOUNTER1_CFG 0x0374D8 /* >= gfx103 */ 17383 #define R_0374DC_GCUTCL2_PERFCOUNTER2_CFG 0x0374DC /* >= gfx103 */ 17384 #define R_0374E0_GCUTCL2_PERFCOUNTER3_CFG 0x0374E0 /* >= gfx103 */ 17385 #define R_0374E4_GCUTCL2_PERFCOUNTER_RSLT_CNTL 0x0374E4 /* >= gfx103 */ 17386 #define S_0374E4_PERF_COUNTER_SELECT(x) (((unsigned)(x) & 0xF) << 0) 17387 #define G_0374E4_PERF_COUNTER_SELECT(x) (((x) >> 0) & 0xF) 17388 #define C_0374E4_PERF_COUNTER_SELECT 0xFFFFFFF0 17389 #define S_0374E4_START_TRIGGER(x) (((unsigned)(x) & 0xFF) << 8) 17390 #define G_0374E4_START_TRIGGER(x) (((x) >> 8) & 0xFF) 17391 #define C_0374E4_START_TRIGGER 0xFFFF00FF 17392 #define S_0374E4_STOP_TRIGGER(x) (((unsigned)(x) & 0xFF) << 16) 17393 #define G_0374E4_STOP_TRIGGER(x) (((x) >> 16) & 0xFF) 17394 #define C_0374E4_STOP_TRIGGER 0xFF00FFFF 17395 #define S_0374E4_ENABLE_ANY(x) (((unsigned)(x) & 0x1) << 24) 17396 #define G_0374E4_ENABLE_ANY(x) (((x) >> 24) & 0x1) 17397 #define C_0374E4_ENABLE_ANY 0xFEFFFFFF 17398 #define S_0374E4_CLEAR_ALL(x) (((unsigned)(x) & 0x1) << 25) 17399 #define G_0374E4_CLEAR_ALL(x) (((x) >> 25) & 0x1) 17400 #define C_0374E4_CLEAR_ALL 0xFDFFFFFF 17401 #define S_0374E4_STOP_ALL_ON_SATURATE(x) (((unsigned)(x) & 0x1) << 26) 17402 #define G_0374E4_STOP_ALL_ON_SATURATE(x) (((x) >> 26) & 0x1) 17403 #define C_0374E4_STOP_ALL_ON_SATURATE 0xFBFFFFFF 17404 #define R_0374F0_GCVML2_PERFCOUNTER2_0_SELECT 0x0374F0 /* >= gfx10 */ 17405 #define S_0374F0_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 17406 #define G_0374F0_PERF_SEL(x) (((x) >> 0) & 0x3FF) 17407 #define C_0374F0_PERF_SEL 0xFFFFFC00 17408 #define S_0374F0_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 17409 #define G_0374F0_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 17410 #define C_0374F0_PERF_SEL1 0xFFF003FF 17411 #define S_0374F0_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 17412 #define G_0374F0_CNTR_MODE(x) (((x) >> 20) & 0xF) 17413 #define C_0374F0_CNTR_MODE 0xFF0FFFFF 17414 #define S_0374F0_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 17415 #define G_0374F0_PERF_MODE1(x) (((x) >> 24) & 0xF) 17416 #define C_0374F0_PERF_MODE1 0xF0FFFFFF 17417 #define S_0374F0_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 17418 #define G_0374F0_PERF_MODE(x) (((x) >> 28) & 0xF) 17419 #define C_0374F0_PERF_MODE 0x0FFFFFFF 17420 #define R_0374F4_GCVML2_PERFCOUNTER2_1_SELECT 0x0374F4 /* >= gfx10 */ 17421 #define R_0374F8_GCVML2_PERFCOUNTER2_0_SELECT1 0x0374F8 /* >= gfx10 */ 17422 #define S_0374F8_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 17423 #define G_0374F8_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 17424 #define C_0374F8_PERF_SEL2 0xFFFFFC00 17425 #define S_0374F8_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 17426 #define G_0374F8_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 17427 #define C_0374F8_PERF_SEL3 0xFFF003FF 17428 #define S_0374F8_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 17429 #define G_0374F8_PERF_MODE3(x) (((x) >> 24) & 0xF) 17430 #define C_0374F8_PERF_MODE3 0xF0FFFFFF 17431 #define S_0374F8_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 17432 #define G_0374F8_PERF_MODE2(x) (((x) >> 28) & 0xF) 17433 #define C_0374F8_PERF_MODE2 0x0FFFFFFF 17434 #define R_0374FC_GCVML2_PERFCOUNTER2_1_SELECT1 0x0374FC /* >= gfx10 */ 17435 #define R_037500_ATC_L2_PERFCOUNTER0_CFG 0x037500 /* gfx9 */ 17436 #define S_037500_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 17437 #define G_037500_PERF_SEL(x) (((x) >> 0) & 0xFF) 17438 #define C_037500_PERF_SEL 0xFFFFFF00 17439 #define S_037500_PERF_SEL_END(x) (((unsigned)(x) & 0xFF) << 8) 17440 #define G_037500_PERF_SEL_END(x) (((x) >> 8) & 0xFF) 17441 #define C_037500_PERF_SEL_END 0xFFFF00FF 17442 #define S_037500_PERF_MODE(x) (((unsigned)(x) & 0xF) << 24) 17443 #define G_037500_PERF_MODE(x) (((x) >> 24) & 0xF) 17444 #define C_037500_PERF_MODE 0xF0FFFFFF 17445 #define S_037500_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 17446 #define G_037500_ENABLE(x) (((x) >> 28) & 0x1) 17447 #define C_037500_ENABLE 0xEFFFFFFF 17448 #define S_037500_CLEAR(x) (((unsigned)(x) & 0x1) << 29) 17449 #define G_037500_CLEAR(x) (((x) >> 29) & 0x1) 17450 #define C_037500_CLEAR 0xDFFFFFFF 17451 #define R_037500_GCVML2_PERFCOUNTER2_0_MODE 0x037500 /* >= gfx10 */ 17452 #define S_037500_COMPARE_MODE0(x) (((unsigned)(x) & 0x3) << 0) 17453 #define G_037500_COMPARE_MODE0(x) (((x) >> 0) & 0x3) 17454 #define C_037500_COMPARE_MODE0 0xFFFFFFFC 17455 #define S_037500_COMPARE_MODE1(x) (((unsigned)(x) & 0x3) << 2) 17456 #define G_037500_COMPARE_MODE1(x) (((x) >> 2) & 0x3) 17457 #define C_037500_COMPARE_MODE1 0xFFFFFFF3 17458 #define S_037500_COMPARE_MODE2(x) (((unsigned)(x) & 0x3) << 4) 17459 #define G_037500_COMPARE_MODE2(x) (((x) >> 4) & 0x3) 17460 #define C_037500_COMPARE_MODE2 0xFFFFFFCF 17461 #define S_037500_COMPARE_MODE3(x) (((unsigned)(x) & 0x3) << 6) 17462 #define G_037500_COMPARE_MODE3(x) (((x) >> 6) & 0x3) 17463 #define C_037500_COMPARE_MODE3 0xFFFFFF3F 17464 #define S_037500_COMPARE_VALUE0(x) (((unsigned)(x) & 0xF) << 8) 17465 #define G_037500_COMPARE_VALUE0(x) (((x) >> 8) & 0xF) 17466 #define C_037500_COMPARE_VALUE0 0xFFFFF0FF 17467 #define S_037500_COMPARE_VALUE1(x) (((unsigned)(x) & 0xF) << 12) 17468 #define G_037500_COMPARE_VALUE1(x) (((x) >> 12) & 0xF) 17469 #define C_037500_COMPARE_VALUE1 0xFFFF0FFF 17470 #define S_037500_COMPARE_VALUE2(x) (((unsigned)(x) & 0xF) << 16) 17471 #define G_037500_COMPARE_VALUE2(x) (((x) >> 16) & 0xF) 17472 #define C_037500_COMPARE_VALUE2 0xFFF0FFFF 17473 #define S_037500_COMPARE_VALUE3(x) (((unsigned)(x) & 0xF) << 20) 17474 #define G_037500_COMPARE_VALUE3(x) (((x) >> 20) & 0xF) 17475 #define C_037500_COMPARE_VALUE3 0xFF0FFFFF 17476 #define R_037504_ATC_L2_PERFCOUNTER1_CFG 0x037504 /* gfx9 */ 17477 #define R_037504_GCVML2_PERFCOUNTER2_1_MODE 0x037504 /* >= gfx10 */ 17478 #define R_037508_ATC_L2_PERFCOUNTER_RSLT_CNTL 0x037508 /* gfx9 */ 17479 #define S_037508_PERF_COUNTER_SELECT(x) (((unsigned)(x) & 0xF) << 0) 17480 #define G_037508_PERF_COUNTER_SELECT(x) (((x) >> 0) & 0xF) 17481 #define C_037508_PERF_COUNTER_SELECT 0xFFFFFFF0 17482 #define S_037508_START_TRIGGER(x) (((unsigned)(x) & 0xFF) << 8) 17483 #define G_037508_START_TRIGGER(x) (((x) >> 8) & 0xFF) 17484 #define C_037508_START_TRIGGER 0xFFFF00FF 17485 #define S_037508_STOP_TRIGGER(x) (((unsigned)(x) & 0xFF) << 16) 17486 #define G_037508_STOP_TRIGGER(x) (((x) >> 16) & 0xFF) 17487 #define C_037508_STOP_TRIGGER 0xFF00FFFF 17488 #define S_037508_ENABLE_ANY(x) (((unsigned)(x) & 0x1) << 24) 17489 #define G_037508_ENABLE_ANY(x) (((x) >> 24) & 0x1) 17490 #define C_037508_ENABLE_ANY 0xFEFFFFFF 17491 #define S_037508_CLEAR_ALL(x) (((unsigned)(x) & 0x1) << 25) 17492 #define G_037508_CLEAR_ALL(x) (((x) >> 25) & 0x1) 17493 #define C_037508_CLEAR_ALL 0xFDFFFFFF 17494 #define S_037508_STOP_ALL_ON_SATURATE(x) (((unsigned)(x) & 0x1) << 26) 17495 #define G_037508_STOP_ALL_ON_SATURATE(x) (((x) >> 26) & 0x1) 17496 #define C_037508_STOP_ALL_ON_SATURATE 0xFBFFFFFF 17497 #define R_037530_GC_ATC_L2_PERFCOUNTER2_SELECT 0x037530 /* gfx10 */ 17498 #define S_037530_PERF_SEL_GFX10(x) (((unsigned)(x) & 0x3FF) << 0) 17499 #define G_037530_PERF_SEL_GFX10(x) (((x) >> 0) & 0x3FF) 17500 #define C_037530_PERF_SEL_GFX10 0xFFFFFC00 17501 #define S_037530_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 17502 #define G_037530_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 17503 #define C_037530_PERF_SEL1 0xFFF003FF 17504 #define S_037530_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 17505 #define G_037530_CNTR_MODE(x) (((x) >> 20) & 0xF) 17506 #define C_037530_CNTR_MODE 0xFF0FFFFF 17507 #define S_037530_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 17508 #define G_037530_PERF_MODE1(x) (((x) >> 24) & 0xF) 17509 #define C_037530_PERF_MODE1 0xF0FFFFFF 17510 #define S_037530_PERF_MODE_GFX10(x) (((unsigned)(x) & 0xF) << 28) 17511 #define G_037530_PERF_MODE_GFX10(x) (((x) >> 28) & 0xF) 17512 #define C_037530_PERF_MODE_GFX10 0x0FFFFFFF 17513 #define R_037530_MC_VM_L2_PERFCOUNTER0_CFG 0x037530 /* gfx9 */ 17514 #define S_037530_PERF_SEL_GFX9(x) (((unsigned)(x) & 0xFF) << 0) 17515 #define G_037530_PERF_SEL_GFX9(x) (((x) >> 0) & 0xFF) 17516 #define C_037530_PERF_SEL_GFX9 0xFFFFFF00 17517 #define S_037530_PERF_SEL_END(x) (((unsigned)(x) & 0xFF) << 8) 17518 #define G_037530_PERF_SEL_END(x) (((x) >> 8) & 0xFF) 17519 #define C_037530_PERF_SEL_END 0xFFFF00FF 17520 #define S_037530_PERF_MODE_GFX9(x) (((unsigned)(x) & 0xF) << 24) 17521 #define G_037530_PERF_MODE_GFX9(x) (((x) >> 24) & 0xF) 17522 #define C_037530_PERF_MODE_GFX9 0xF0FFFFFF 17523 #define S_037530_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 17524 #define G_037530_ENABLE(x) (((x) >> 28) & 0x1) 17525 #define C_037530_ENABLE 0xEFFFFFFF 17526 #define S_037530_CLEAR(x) (((unsigned)(x) & 0x1) << 29) 17527 #define G_037530_CLEAR(x) (((x) >> 29) & 0x1) 17528 #define C_037530_CLEAR 0xDFFFFFFF 17529 #define R_037534_GC_ATC_L2_PERFCOUNTER2_SELECT1 0x037534 /* gfx10 */ 17530 #define S_037534_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 17531 #define G_037534_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 17532 #define C_037534_PERF_SEL2 0xFFFFFC00 17533 #define S_037534_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 17534 #define G_037534_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 17535 #define C_037534_PERF_SEL3 0xFFF003FF 17536 #define S_037534_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 17537 #define G_037534_PERF_MODE3(x) (((x) >> 24) & 0xF) 17538 #define C_037534_PERF_MODE3 0xF0FFFFFF 17539 #define S_037534_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 17540 #define G_037534_PERF_MODE2(x) (((x) >> 28) & 0xF) 17541 #define C_037534_PERF_MODE2 0x0FFFFFFF 17542 #define R_037534_MC_VM_L2_PERFCOUNTER1_CFG 0x037534 /* gfx9 */ 17543 #define R_037538_GC_ATC_L2_PERFCOUNTER2_MODE 0x037538 /* gfx10 */ 17544 #define S_037538_COMPARE_MODE0(x) (((unsigned)(x) & 0x3) << 0) 17545 #define G_037538_COMPARE_MODE0(x) (((x) >> 0) & 0x3) 17546 #define C_037538_COMPARE_MODE0 0xFFFFFFFC 17547 #define S_037538_COMPARE_MODE1(x) (((unsigned)(x) & 0x3) << 2) 17548 #define G_037538_COMPARE_MODE1(x) (((x) >> 2) & 0x3) 17549 #define C_037538_COMPARE_MODE1 0xFFFFFFF3 17550 #define S_037538_COMPARE_MODE2(x) (((unsigned)(x) & 0x3) << 4) 17551 #define G_037538_COMPARE_MODE2(x) (((x) >> 4) & 0x3) 17552 #define C_037538_COMPARE_MODE2 0xFFFFFFCF 17553 #define S_037538_COMPARE_MODE3(x) (((unsigned)(x) & 0x3) << 6) 17554 #define G_037538_COMPARE_MODE3(x) (((x) >> 6) & 0x3) 17555 #define C_037538_COMPARE_MODE3 0xFFFFFF3F 17556 #define S_037538_COMPARE_VALUE0(x) (((unsigned)(x) & 0xF) << 8) 17557 #define G_037538_COMPARE_VALUE0(x) (((x) >> 8) & 0xF) 17558 #define C_037538_COMPARE_VALUE0 0xFFFFF0FF 17559 #define S_037538_COMPARE_VALUE1(x) (((unsigned)(x) & 0xF) << 12) 17560 #define G_037538_COMPARE_VALUE1(x) (((x) >> 12) & 0xF) 17561 #define C_037538_COMPARE_VALUE1 0xFFFF0FFF 17562 #define S_037538_COMPARE_VALUE2(x) (((unsigned)(x) & 0xF) << 16) 17563 #define G_037538_COMPARE_VALUE2(x) (((x) >> 16) & 0xF) 17564 #define C_037538_COMPARE_VALUE2 0xFFF0FFFF 17565 #define S_037538_COMPARE_VALUE3(x) (((unsigned)(x) & 0xF) << 20) 17566 #define G_037538_COMPARE_VALUE3(x) (((x) >> 20) & 0xF) 17567 #define C_037538_COMPARE_VALUE3 0xFF0FFFFF 17568 #define R_037538_MC_VM_L2_PERFCOUNTER2_CFG 0x037538 /* gfx9 */ 17569 #define R_03753C_MC_VM_L2_PERFCOUNTER3_CFG 0x03753C /* gfx9 */ 17570 #define R_037540_MC_VM_L2_PERFCOUNTER4_CFG 0x037540 /* gfx9 */ 17571 #define R_037544_MC_VM_L2_PERFCOUNTER5_CFG 0x037544 /* gfx9 */ 17572 #define R_037548_MC_VM_L2_PERFCOUNTER6_CFG 0x037548 /* gfx9 */ 17573 #define R_03754C_MC_VM_L2_PERFCOUNTER7_CFG 0x03754C /* gfx9 */ 17574 #define R_037550_MC_VM_L2_PERFCOUNTER_RSLT_CNTL 0x037550 /* gfx9 */ 17575 #define S_037550_PERF_COUNTER_SELECT(x) (((unsigned)(x) & 0xF) << 0) 17576 #define G_037550_PERF_COUNTER_SELECT(x) (((x) >> 0) & 0xF) 17577 #define C_037550_PERF_COUNTER_SELECT 0xFFFFFFF0 17578 #define S_037550_START_TRIGGER(x) (((unsigned)(x) & 0xFF) << 8) 17579 #define G_037550_START_TRIGGER(x) (((x) >> 8) & 0xFF) 17580 #define C_037550_START_TRIGGER 0xFFFF00FF 17581 #define S_037550_STOP_TRIGGER(x) (((unsigned)(x) & 0xFF) << 16) 17582 #define G_037550_STOP_TRIGGER(x) (((x) >> 16) & 0xFF) 17583 #define C_037550_STOP_TRIGGER 0xFF00FFFF 17584 #define S_037550_ENABLE_ANY(x) (((unsigned)(x) & 0x1) << 24) 17585 #define G_037550_ENABLE_ANY(x) (((x) >> 24) & 0x1) 17586 #define C_037550_ENABLE_ANY 0xFEFFFFFF 17587 #define S_037550_CLEAR_ALL(x) (((unsigned)(x) & 0x1) << 25) 17588 #define G_037550_CLEAR_ALL(x) (((x) >> 25) & 0x1) 17589 #define C_037550_CLEAR_ALL 0xFDFFFFFF 17590 #define S_037550_STOP_ALL_ON_SATURATE(x) (((unsigned)(x) & 0x1) << 26) 17591 #define G_037550_STOP_ALL_ON_SATURATE(x) (((x) >> 26) & 0x1) 17592 #define C_037550_STOP_ALL_ON_SATURATE 0xFBFFFFFF 17593 #define R_037580_GCR_PERFCOUNTER0_SELECT 0x037580 /* >= gfx10 */ 17594 #define S_037580_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 17595 #define G_037580_PERF_SEL(x) (((x) >> 0) & 0x1FF) 17596 #define C_037580_PERF_SEL 0xFFFFFE00 17597 #define S_037580_PERF_SEL1(x) (((unsigned)(x) & 0x1FF) << 10) 17598 #define G_037580_PERF_SEL1(x) (((x) >> 10) & 0x1FF) 17599 #define C_037580_PERF_SEL1 0xFFF803FF 17600 #define S_037580_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 17601 #define G_037580_CNTR_MODE(x) (((x) >> 20) & 0xF) 17602 #define C_037580_CNTR_MODE 0xFF0FFFFF 17603 #define S_037580_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 17604 #define G_037580_PERF_MODE1(x) (((x) >> 24) & 0xF) 17605 #define C_037580_PERF_MODE1 0xF0FFFFFF 17606 #define S_037580_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 17607 #define G_037580_PERF_MODE(x) (((x) >> 28) & 0xF) 17608 #define C_037580_PERF_MODE 0x0FFFFFFF 17609 #define R_037584_GCR_PERFCOUNTER0_SELECT1 0x037584 /* >= gfx10 */ 17610 #define S_037584_PERF_SEL2(x) (((unsigned)(x) & 0x1FF) << 0) 17611 #define G_037584_PERF_SEL2(x) (((x) >> 0) & 0x1FF) 17612 #define C_037584_PERF_SEL2 0xFFFFFE00 17613 #define S_037584_PERF_SEL3(x) (((unsigned)(x) & 0x1FF) << 10) 17614 #define G_037584_PERF_SEL3(x) (((x) >> 10) & 0x1FF) 17615 #define C_037584_PERF_SEL3 0xFFF803FF 17616 #define S_037584_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 17617 #define G_037584_PERF_MODE3(x) (((x) >> 24) & 0xF) 17618 #define C_037584_PERF_MODE3 0xF0FFFFFF 17619 #define S_037584_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 17620 #define G_037584_PERF_MODE2(x) (((x) >> 28) & 0xF) 17621 #define C_037584_PERF_MODE2 0x0FFFFFFF 17622 #define R_037588_GCR_PERFCOUNTER1_SELECT 0x037588 /* >= gfx10 */ 17623 #define S_037588_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 17624 #define G_037588_PERF_SEL(x) (((x) >> 0) & 0x1FF) 17625 #define C_037588_PERF_SEL 0xFFFFFE00 17626 #define S_037588_PERF_MODE(x) (((unsigned)(x) & 0xF) << 24) 17627 #define G_037588_PERF_MODE(x) (((x) >> 24) & 0xF) 17628 #define C_037588_PERF_MODE 0xF0FFFFFF 17629 #define S_037588_CNTL_MODE(x) (((unsigned)(x) & 0xF) << 28) 17630 #define G_037588_CNTL_MODE(x) (((x) >> 28) & 0xF) 17631 #define C_037588_CNTL_MODE 0x0FFFFFFF 17632 #define R_03758C_UTCL1_PERFCOUNTER0_SELECT 0x03758C /* >= gfx10 */ 17633 #define S_03758C_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 17634 #define G_03758C_PERF_SEL(x) (((x) >> 0) & 0x3FF) 17635 #define C_03758C_PERF_SEL 0xFFFFFC00 17636 #define S_03758C_COUNTER_MODE(x) (((unsigned)(x) & 0xF) << 28) 17637 #define G_03758C_COUNTER_MODE(x) (((x) >> 28) & 0xF) 17638 #define C_03758C_COUNTER_MODE 0x0FFFFFFF 17639 #define R_037590_UTCL1_PERFCOUNTER1_SELECT 0x037590 /* >= gfx10 */ 17640 #define R_037600_PA_PH_PERFCOUNTER0_SELECT 0x037600 /* >= gfx10 */ 17641 #define S_037600_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 17642 #define G_037600_PERF_SEL(x) (((x) >> 0) & 0x3FF) 17643 #define C_037600_PERF_SEL 0xFFFFFC00 17644 #define S_037600_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 17645 #define G_037600_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 17646 #define C_037600_PERF_SEL1 0xFFF003FF 17647 #define S_037600_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 17648 #define G_037600_CNTR_MODE(x) (((x) >> 20) & 0xF) 17649 #define C_037600_CNTR_MODE 0xFF0FFFFF 17650 #define S_037600_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 17651 #define G_037600_PERF_MODE1(x) (((x) >> 24) & 0xF) 17652 #define C_037600_PERF_MODE1 0xF0FFFFFF 17653 #define S_037600_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 17654 #define G_037600_PERF_MODE(x) (((x) >> 28) & 0xF) 17655 #define C_037600_PERF_MODE 0x0FFFFFFF 17656 #define R_037604_PA_PH_PERFCOUNTER0_SELECT1 0x037604 /* >= gfx10 */ 17657 #define S_037604_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 17658 #define G_037604_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 17659 #define C_037604_PERF_SEL2 0xFFFFFC00 17660 #define S_037604_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 17661 #define G_037604_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 17662 #define C_037604_PERF_SEL3 0xFFF003FF 17663 #define S_037604_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 17664 #define G_037604_PERF_MODE3(x) (((x) >> 24) & 0xF) 17665 #define C_037604_PERF_MODE3 0xF0FFFFFF 17666 #define S_037604_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 17667 #define G_037604_PERF_MODE2(x) (((x) >> 28) & 0xF) 17668 #define C_037604_PERF_MODE2 0x0FFFFFFF 17669 #define R_037608_PA_PH_PERFCOUNTER1_SELECT 0x037608 /* >= gfx10 */ 17670 #define R_03760C_PA_PH_PERFCOUNTER2_SELECT 0x03760C /* >= gfx10 */ 17671 #define R_037610_PA_PH_PERFCOUNTER3_SELECT 0x037610 /* >= gfx10 */ 17672 #define R_037614_PA_PH_PERFCOUNTER4_SELECT 0x037614 /* >= gfx10 */ 17673 #define S_037614_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 17674 #define G_037614_PERF_SEL(x) (((x) >> 0) & 0x3FF) 17675 #define C_037614_PERF_SEL 0xFFFFFC00 17676 #define R_037618_PA_PH_PERFCOUNTER5_SELECT 0x037618 /* >= gfx10 */ 17677 #define R_03761C_PA_PH_PERFCOUNTER6_SELECT 0x03761C /* >= gfx10 */ 17678 #define R_037620_PA_PH_PERFCOUNTER7_SELECT 0x037620 /* >= gfx10 */ 17679 #define R_037640_PA_PH_PERFCOUNTER1_SELECT1 0x037640 /* >= gfx10 */ 17680 #define R_037644_PA_PH_PERFCOUNTER2_SELECT1 0x037644 /* >= gfx10 */ 17681 #define R_037648_PA_PH_PERFCOUNTER3_SELECT1 0x037648 /* >= gfx10 */ 17682 #define R_037700_GL1A_PERFCOUNTER0_SELECT 0x037700 /* >= gfx10 */ 17683 #define R_037704_GL1A_PERFCOUNTER0_SELECT1 0x037704 /* >= gfx10 */ 17684 #define R_037708_GL1A_PERFCOUNTER1_SELECT 0x037708 /* >= gfx10 */ 17685 #define R_03770C_GL1A_PERFCOUNTER2_SELECT 0x03770C /* >= gfx10 */ 17686 #define R_037710_GL1A_PERFCOUNTER3_SELECT 0x037710 /* >= gfx10 */ 17687 #define R_037780_CHA_PERFCOUNTER0_SELECT 0x037780 /* >= gfx10 */ 17688 #define S_037780_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 17689 #define G_037780_PERF_SEL(x) (((x) >> 0) & 0x3FF) 17690 #define C_037780_PERF_SEL 0xFFFFFC00 17691 #define S_037780_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 17692 #define G_037780_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 17693 #define C_037780_PERF_SEL1 0xFFF003FF 17694 #define S_037780_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 17695 #define G_037780_CNTR_MODE(x) (((x) >> 20) & 0xF) 17696 #define C_037780_CNTR_MODE 0xFF0FFFFF 17697 #define S_037780_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 17698 #define G_037780_PERF_MODE1(x) (((x) >> 24) & 0xF) 17699 #define C_037780_PERF_MODE1 0xF0FFFFFF 17700 #define S_037780_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 17701 #define G_037780_PERF_MODE(x) (((x) >> 28) & 0xF) 17702 #define C_037780_PERF_MODE 0x0FFFFFFF 17703 #define R_037784_CHA_PERFCOUNTER0_SELECT1 0x037784 /* >= gfx10 */ 17704 #define S_037784_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 17705 #define G_037784_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 17706 #define C_037784_PERF_SEL2 0xFFFFFC00 17707 #define S_037784_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 17708 #define G_037784_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 17709 #define C_037784_PERF_SEL3 0xFFF003FF 17710 #define S_037784_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 24) 17711 #define G_037784_PERF_MODE2(x) (((x) >> 24) & 0xF) 17712 #define C_037784_PERF_MODE2 0xF0FFFFFF 17713 #define S_037784_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 28) 17714 #define G_037784_PERF_MODE3(x) (((x) >> 28) & 0xF) 17715 #define C_037784_PERF_MODE3 0x0FFFFFFF 17716 #define R_037788_CHA_PERFCOUNTER1_SELECT 0x037788 /* >= gfx10 */ 17717 #define S_037788_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 17718 #define G_037788_PERF_SEL(x) (((x) >> 0) & 0x3FF) 17719 #define C_037788_PERF_SEL 0xFFFFFC00 17720 #define S_037788_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 17721 #define G_037788_CNTR_MODE(x) (((x) >> 20) & 0xF) 17722 #define C_037788_CNTR_MODE 0xFF0FFFFF 17723 #define S_037788_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 17724 #define G_037788_PERF_MODE(x) (((x) >> 28) & 0xF) 17725 #define C_037788_PERF_MODE 0x0FFFFFFF 17726 #define R_03778C_CHA_PERFCOUNTER2_SELECT 0x03778C /* >= gfx10 */ 17727 #define R_037790_CHA_PERFCOUNTER3_SELECT 0x037790 /* >= gfx10 */ 17728 #define R_037800_GUS_PERFCOUNTER2_SELECT 0x037800 /* >= gfx10 */ 17729 #define S_037800_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 17730 #define G_037800_PERF_SEL(x) (((x) >> 0) & 0x3FF) 17731 #define C_037800_PERF_SEL 0xFFFFFC00 17732 #define S_037800_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 17733 #define G_037800_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 17734 #define C_037800_PERF_SEL1 0xFFF003FF 17735 #define S_037800_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 17736 #define G_037800_CNTR_MODE(x) (((x) >> 20) & 0xF) 17737 #define C_037800_CNTR_MODE 0xFF0FFFFF 17738 #define S_037800_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 17739 #define G_037800_PERF_MODE1(x) (((x) >> 24) & 0xF) 17740 #define C_037800_PERF_MODE1 0xF0FFFFFF 17741 #define S_037800_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 17742 #define G_037800_PERF_MODE(x) (((x) >> 28) & 0xF) 17743 #define C_037800_PERF_MODE 0x0FFFFFFF 17744 #define R_037804_GUS_PERFCOUNTER2_SELECT1 0x037804 /* >= gfx10 */ 17745 #define S_037804_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 17746 #define G_037804_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 17747 #define C_037804_PERF_SEL2 0xFFFFFC00 17748 #define S_037804_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 17749 #define G_037804_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 17750 #define C_037804_PERF_SEL3 0xFFF003FF 17751 #define S_037804_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 17752 #define G_037804_PERF_MODE3(x) (((x) >> 24) & 0xF) 17753 #define C_037804_PERF_MODE3 0xF0FFFFFF 17754 #define S_037804_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 17755 #define G_037804_PERF_MODE2(x) (((x) >> 28) & 0xF) 17756 #define C_037804_PERF_MODE2 0x0FFFFFFF 17757 #define R_037808_GUS_PERFCOUNTER2_MODE 0x037808 /* >= gfx10 */ 17758 #define S_037808_COMPARE_MODE0(x) (((unsigned)(x) & 0x3) << 0) 17759 #define G_037808_COMPARE_MODE0(x) (((x) >> 0) & 0x3) 17760 #define C_037808_COMPARE_MODE0 0xFFFFFFFC 17761 #define S_037808_COMPARE_MODE1(x) (((unsigned)(x) & 0x3) << 2) 17762 #define G_037808_COMPARE_MODE1(x) (((x) >> 2) & 0x3) 17763 #define C_037808_COMPARE_MODE1 0xFFFFFFF3 17764 #define S_037808_COMPARE_MODE2(x) (((unsigned)(x) & 0x3) << 4) 17765 #define G_037808_COMPARE_MODE2(x) (((x) >> 4) & 0x3) 17766 #define C_037808_COMPARE_MODE2 0xFFFFFFCF 17767 #define S_037808_COMPARE_MODE3(x) (((unsigned)(x) & 0x3) << 6) 17768 #define G_037808_COMPARE_MODE3(x) (((x) >> 6) & 0x3) 17769 #define C_037808_COMPARE_MODE3 0xFFFFFF3F 17770 #define S_037808_COMPARE_VALUE0(x) (((unsigned)(x) & 0xF) << 8) 17771 #define G_037808_COMPARE_VALUE0(x) (((x) >> 8) & 0xF) 17772 #define C_037808_COMPARE_VALUE0 0xFFFFF0FF 17773 #define S_037808_COMPARE_VALUE1(x) (((unsigned)(x) & 0xF) << 12) 17774 #define G_037808_COMPARE_VALUE1(x) (((x) >> 12) & 0xF) 17775 #define C_037808_COMPARE_VALUE1 0xFFFF0FFF 17776 #define S_037808_COMPARE_VALUE2(x) (((unsigned)(x) & 0xF) << 16) 17777 #define G_037808_COMPARE_VALUE2(x) (((x) >> 16) & 0xF) 17778 #define C_037808_COMPARE_VALUE2 0xFFF0FFFF 17779 #define S_037808_COMPARE_VALUE3(x) (((unsigned)(x) & 0xF) << 20) 17780 #define G_037808_COMPARE_VALUE3(x) (((x) >> 20) & 0xF) 17781 #define C_037808_COMPARE_VALUE3 0xFF0FFFFF 17782 #define R_03780C_GUS_PERFCOUNTER0_CFG 0x03780C /* >= gfx103 */ 17783 #define S_03780C_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 17784 #define G_03780C_PERF_SEL(x) (((x) >> 0) & 0xFF) 17785 #define C_03780C_PERF_SEL 0xFFFFFF00 17786 #define S_03780C_PERF_SEL_END(x) (((unsigned)(x) & 0xFF) << 8) 17787 #define G_03780C_PERF_SEL_END(x) (((x) >> 8) & 0xFF) 17788 #define C_03780C_PERF_SEL_END 0xFFFF00FF 17789 #define S_03780C_PERF_MODE(x) (((unsigned)(x) & 0xF) << 24) 17790 #define G_03780C_PERF_MODE(x) (((x) >> 24) & 0xF) 17791 #define C_03780C_PERF_MODE 0xF0FFFFFF 17792 #define S_03780C_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 17793 #define G_03780C_ENABLE(x) (((x) >> 28) & 0x1) 17794 #define C_03780C_ENABLE 0xEFFFFFFF 17795 #define S_03780C_CLEAR(x) (((unsigned)(x) & 0x1) << 29) 17796 #define G_03780C_CLEAR(x) (((x) >> 29) & 0x1) 17797 #define C_03780C_CLEAR 0xDFFFFFFF 17798 #define R_037810_GUS_PERFCOUNTER1_CFG 0x037810 /* >= gfx103 */ 17799 #define R_037814_GUS_PERFCOUNTER_RSLT_CNTL 0x037814 /* >= gfx103 */ 17800 #define S_037814_PERF_COUNTER_SELECT(x) (((unsigned)(x) & 0xF) << 0) 17801 #define G_037814_PERF_COUNTER_SELECT(x) (((x) >> 0) & 0xF) 17802 #define C_037814_PERF_COUNTER_SELECT 0xFFFFFFF0 17803 #define S_037814_START_TRIGGER(x) (((unsigned)(x) & 0xFF) << 8) 17804 #define G_037814_START_TRIGGER(x) (((x) >> 8) & 0xFF) 17805 #define C_037814_START_TRIGGER 0xFFFF00FF 17806 #define S_037814_STOP_TRIGGER(x) (((unsigned)(x) & 0xFF) << 16) 17807 #define G_037814_STOP_TRIGGER(x) (((x) >> 16) & 0xFF) 17808 #define C_037814_STOP_TRIGGER 0xFF00FFFF 17809 #define S_037814_ENABLE_ANY(x) (((unsigned)(x) & 0x1) << 24) 17810 #define G_037814_ENABLE_ANY(x) (((x) >> 24) & 0x1) 17811 #define C_037814_ENABLE_ANY 0xFEFFFFFF 17812 #define S_037814_CLEAR_ALL(x) (((unsigned)(x) & 0x1) << 25) 17813 #define G_037814_CLEAR_ALL(x) (((x) >> 25) & 0x1) 17814 #define C_037814_CLEAR_ALL 0xFDFFFFFF 17815 #define S_037814_STOP_ALL_ON_SATURATE(x) (((unsigned)(x) & 0x1) << 26) 17816 #define G_037814_STOP_ALL_ON_SATURATE(x) (((x) >> 26) & 0x1) 17817 #define C_037814_STOP_ALL_ON_SATURATE 0xFBFFFFFF 17818 #define R_037880_SDMA0_PERFCNT_PERFCOUNTER0_CFG 0x037880 /* >= gfx103 */ 17819 #define S_037880_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 17820 #define G_037880_PERF_SEL(x) (((x) >> 0) & 0xFF) 17821 #define C_037880_PERF_SEL 0xFFFFFF00 17822 #define S_037880_PERF_SEL_END(x) (((unsigned)(x) & 0xFF) << 8) 17823 #define G_037880_PERF_SEL_END(x) (((x) >> 8) & 0xFF) 17824 #define C_037880_PERF_SEL_END 0xFFFF00FF 17825 #define S_037880_PERF_MODE(x) (((unsigned)(x) & 0xF) << 24) 17826 #define G_037880_PERF_MODE(x) (((x) >> 24) & 0xF) 17827 #define C_037880_PERF_MODE 0xF0FFFFFF 17828 #define S_037880_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 17829 #define G_037880_ENABLE(x) (((x) >> 28) & 0x1) 17830 #define C_037880_ENABLE 0xEFFFFFFF 17831 #define S_037880_CLEAR(x) (((unsigned)(x) & 0x1) << 29) 17832 #define G_037880_CLEAR(x) (((x) >> 29) & 0x1) 17833 #define C_037880_CLEAR 0xDFFFFFFF 17834 #define R_037884_SDMA0_PERFCNT_PERFCOUNTER1_CFG 0x037884 /* >= gfx103 */ 17835 #define R_037888_SDMA0_PERFCNT_PERFCOUNTER_RSLT_CNTL 0x037888 /* >= gfx103 */ 17836 #define S_037888_PERF_COUNTER_SELECT(x) (((unsigned)(x) & 0xF) << 0) 17837 #define G_037888_PERF_COUNTER_SELECT(x) (((x) >> 0) & 0xF) 17838 #define C_037888_PERF_COUNTER_SELECT 0xFFFFFFF0 17839 #define S_037888_START_TRIGGER(x) (((unsigned)(x) & 0xFF) << 8) 17840 #define G_037888_START_TRIGGER(x) (((x) >> 8) & 0xFF) 17841 #define C_037888_START_TRIGGER 0xFFFF00FF 17842 #define S_037888_STOP_TRIGGER(x) (((unsigned)(x) & 0xFF) << 16) 17843 #define G_037888_STOP_TRIGGER(x) (((x) >> 16) & 0xFF) 17844 #define C_037888_STOP_TRIGGER 0xFF00FFFF 17845 #define S_037888_ENABLE_ANY(x) (((unsigned)(x) & 0x1) << 24) 17846 #define G_037888_ENABLE_ANY(x) (((x) >> 24) & 0x1) 17847 #define C_037888_ENABLE_ANY 0xFEFFFFFF 17848 #define S_037888_CLEAR_ALL(x) (((unsigned)(x) & 0x1) << 25) 17849 #define G_037888_CLEAR_ALL(x) (((x) >> 25) & 0x1) 17850 #define C_037888_CLEAR_ALL 0xFDFFFFFF 17851 #define S_037888_STOP_ALL_ON_SATURATE(x) (((unsigned)(x) & 0x1) << 26) 17852 #define G_037888_STOP_ALL_ON_SATURATE(x) (((x) >> 26) & 0x1) 17853 #define C_037888_STOP_ALL_ON_SATURATE 0xFBFFFFFF 17854 #define R_03788C_SDMA0_PERFCNT_MISC_CNTL 0x03788C /* >= gfx103 */ 17855 #define S_03788C_CMD_OP(x) (((unsigned)(x) & 0xFFFF) << 0) 17856 #define G_03788C_CMD_OP(x) (((x) >> 0) & 0xFFFF) 17857 #define C_03788C_CMD_OP 0xFFFF0000 17858 #define R_037890_SDMA0_PERFCOUNTER0_SELECT 0x037890 /* >= gfx103 */ 17859 #define S_037890_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 17860 #define G_037890_PERF_SEL(x) (((x) >> 0) & 0x3FF) 17861 #define C_037890_PERF_SEL 0xFFFFFC00 17862 #define S_037890_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 17863 #define G_037890_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 17864 #define C_037890_PERF_SEL1 0xFFF003FF 17865 #define S_037890_CNTR_MODE(x) (((unsigned)(x) & 0xF) << 20) 17866 #define G_037890_CNTR_MODE(x) (((x) >> 20) & 0xF) 17867 #define C_037890_CNTR_MODE 0xFF0FFFFF 17868 #define S_037890_PERF_MODE1(x) (((unsigned)(x) & 0xF) << 24) 17869 #define G_037890_PERF_MODE1(x) (((x) >> 24) & 0xF) 17870 #define C_037890_PERF_MODE1 0xF0FFFFFF 17871 #define S_037890_PERF_MODE(x) (((unsigned)(x) & 0xF) << 28) 17872 #define G_037890_PERF_MODE(x) (((x) >> 28) & 0xF) 17873 #define C_037890_PERF_MODE 0x0FFFFFFF 17874 #define R_037894_SDMA0_PERFCOUNTER0_SELECT1 0x037894 /* >= gfx103 */ 17875 #define S_037894_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 17876 #define G_037894_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 17877 #define C_037894_PERF_SEL2 0xFFFFFC00 17878 #define S_037894_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 17879 #define G_037894_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 17880 #define C_037894_PERF_SEL3 0xFFF003FF 17881 #define S_037894_PERF_MODE3(x) (((unsigned)(x) & 0xF) << 24) 17882 #define G_037894_PERF_MODE3(x) (((x) >> 24) & 0xF) 17883 #define C_037894_PERF_MODE3 0xF0FFFFFF 17884 #define S_037894_PERF_MODE2(x) (((unsigned)(x) & 0xF) << 28) 17885 #define G_037894_PERF_MODE2(x) (((x) >> 28) & 0xF) 17886 #define C_037894_PERF_MODE2 0x0FFFFFFF 17887 #define R_037898_SDMA0_PERFCOUNTER1_SELECT 0x037898 /* >= gfx103 */ 17888 #define R_03789C_SDMA0_PERFCOUNTER1_SELECT1 0x03789C /* >= gfx103 */ 17889 #define R_0378B0_SDMA1_PERFCNT_PERFCOUNTER0_CFG 0x0378B0 /* >= gfx103 */ 17890 #define R_0378B4_SDMA1_PERFCNT_PERFCOUNTER1_CFG 0x0378B4 /* >= gfx103 */ 17891 #define R_0378B8_SDMA1_PERFCNT_PERFCOUNTER_RSLT_CNTL 0x0378B8 /* >= gfx103 */ 17892 #define R_0378BC_SDMA1_PERFCNT_MISC_CNTL 0x0378BC /* >= gfx103 */ 17893 #define R_0378C0_SDMA1_PERFCOUNTER0_SELECT 0x0378C0 /* >= gfx103 */ 17894 #define R_0378C4_SDMA1_PERFCOUNTER0_SELECT1 0x0378C4 /* >= gfx103 */ 17895 #define R_0378C8_SDMA1_PERFCOUNTER1_SELECT 0x0378C8 /* >= gfx103 */ 17896 #define R_0378CC_SDMA1_PERFCOUNTER1_SELECT1 0x0378CC /* >= gfx103 */ 17897 #define R_0378E0_SDMA2_PERFCNT_PERFCOUNTER0_CFG 0x0378E0 /* >= gfx103 */ 17898 #define R_0378E4_SDMA2_PERFCNT_PERFCOUNTER1_CFG 0x0378E4 /* >= gfx103 */ 17899 #define R_0378E8_SDMA2_PERFCNT_PERFCOUNTER_RSLT_CNTL 0x0378E8 /* >= gfx103 */ 17900 #define R_0378EC_SDMA2_PERFCNT_MISC_CNTL 0x0378EC /* >= gfx103 */ 17901 #define R_0378F0_SDMA2_PERFCOUNTER0_SELECT 0x0378F0 /* >= gfx103 */ 17902 #define R_0378F4_SDMA2_PERFCOUNTER0_SELECT1 0x0378F4 /* >= gfx103 */ 17903 #define R_0378F8_SDMA2_PERFCOUNTER1_SELECT 0x0378F8 /* >= gfx103 */ 17904 #define R_0378FC_SDMA2_PERFCOUNTER1_SELECT1 0x0378FC /* >= gfx103 */ 17905 #define R_037910_SDMA3_PERFCNT_PERFCOUNTER0_CFG 0x037910 /* >= gfx103 */ 17906 #define R_037914_SDMA3_PERFCNT_PERFCOUNTER1_CFG 0x037914 /* >= gfx103 */ 17907 #define R_037918_SDMA3_PERFCNT_PERFCOUNTER_RSLT_CNTL 0x037918 /* >= gfx103 */ 17908 #define R_03791C_SDMA3_PERFCNT_MISC_CNTL 0x03791C /* >= gfx103 */ 17909 #define R_037920_SDMA3_PERFCOUNTER0_SELECT 0x037920 /* >= gfx103 */ 17910 #define R_037924_SDMA3_PERFCOUNTER0_SELECT1 0x037924 /* >= gfx103 */ 17911 #define R_037928_SDMA3_PERFCOUNTER1_SELECT 0x037928 /* >= gfx103 */ 17912 #define R_03792C_SDMA3_PERFCOUNTER1_SELECT1 0x03792C /* >= gfx103 */ 17913 17914 #endif // AMDGFXREGS_H 17915