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      1 /* $NetBSD: w83l518dreg.h,v 1.1 2009/09/30 20:44:50 jmcneill Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2009 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. The name of the author may not be used to endorse or promote products
     13  *    derived from this software without specific prior written permission.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  */
     27 
     28 #ifndef _SYS_DEV_IC_W83L518DREG_H
     29 #define _SYS_DEV_IC_W83L518DREG_H
     30 
     31 /*
     32  * Global Registers
     33  */
     34 
     35 #define	WB_REG_RESET		0x02
     36 #define	 WB_RESET_SWRST		 0x01	/* software reset */
     37 
     38 #define	WB_REG_DEVNO		0x07
     39 #define	 WB_DEVNO_SC		 0x00	/* Smart Card interface */
     40 #define	 WB_DEVNO_MS		 0x01	/* Memory Stick interface */
     41 #define	 WB_DEVNO_GPIO		 0x02	/* GPIO */
     42 #define	 WB_DEVNO_SD		 0x03	/* SD memory card interface */
     43 
     44 #define	WB_REG_DEVID_HI		0x20
     45 #define	WB_REG_DEVID_LO		0x21
     46 #define	 WB_DEVID_W83L518D	 0x7110
     47 #define	 WB_DEVID_W83L519D	 0x7120
     48 #define	 WB_DEVID_REVISION(id)	 ((id) & 0xf)
     49 
     50 #define	WB_REG_POWER		0x22
     51 #define	 WB_POWER_SC		 0x80	/* Smart Card interface */
     52 #define	 WB_POWER_MS		 0x40	/* Memory Stick interface */
     53 #define	 WB_POWER_SD		 0x20	/* SD memory card interface */
     54 
     55 #define	WB_REG_PME		0x23
     56 #define	 WB_PME_PME_EN		 0x80	/* Global PM event enable */
     57 #define	 WB_PME_MSPME_EN	 0x40	/* MS PM event enable */
     58 #define	 WB_PME_SDPME_EN	 0x20	/* SD PM event enable */
     59 #define	 WB_PME_SCPME_EN	 0x10	/* SC PM event enable */
     60 
     61 #define	WB_REG_PMESTS		0x24	/* PM event status */
     62 #define	 WB_PMESTS_MSPME_STS	 0x40	/* MS PM event status */
     63 #define	 WB_PMESTS_SDPME_STS	 0x20	/* SD PM event status */
     64 #define	 WB_PMESTS_SCPME_STS	 0x10	/* SC PM event status */
     65 
     66 #define	WB_REG_CFG		0x26
     67 #define	 WB_CFG_HEFRAS		 0x40	/* Extended func reg addr select */
     68 #define	 WB_CFG_LOCKREG		 0x20	/* Config register access control */
     69 
     70 #define	WB_REG_MFSEL		0x29	/* Multi-function sel (518 only) */
     71 
     72 /*
     73  * Logical Device Interface
     74  */
     75 
     76 #define WB_REG_DEV_EN		0x30
     77 #define	 WB_DEV_EN_ACTIVE	 0x01	/* Logical device active bit */
     78 
     79 #define	WB_REG_DEV_BASE_HI	0x60
     80 #define	WB_REG_DEV_BASE_LO	0x61
     81 
     82 #define	WB_REG_DEV_IRQ		0x70
     83 #define	 WB_DEV_IRQ_MASK	 0x0f
     84 
     85 #define	WB_REG_DEV_DRQ		0x74
     86 #define	 WB_DEV_DRQ_MASK	 0x0f
     87 
     88 #define	WB_REG_DEV_MISC		0xf0
     89 #define	 WB_DEV_MISC_SCIRQ_SHR	 0x80	/* SC: IRQ sharing control */
     90 #define	 WB_DEV_MISC_SCPSNT_POL	 0x01	/* SC: SC present polarity */
     91 #define	 WB_DEV_MISC_MSIRQ_POLL	 0x10	/* MS: IRQ polarity control (level) */
     92 #define	 WB_DEV_MISC_MSIRQ_POLP	 0x08	/* MS: IRQ polarity control (pulse) */
     93 #define	 WB_DEV_MISC_MSIRQ_SHR	 0x04	/* MS: IRQ sharing control */
     94 #define	 WB_DEV_MISC_MS4OUT_POL	 0x02	/* MS: MS4 output polarity control */
     95 #define	 WB_DEV_MISC_MS4OUT_EN	 0x01	/* MS: MS4 output enable */
     96 #define	 WB_DEV_MISC_SDDATA3_HI	 0x20	/* SD: DATA3 pin will output high */
     97 #define	 WB_DEV_MISC_SDDATA3_OUT 0x10	/* SD: DATA3 pin to output pin */
     98 #define	 WB_DEV_MISC_SDGP11_HI	 0x04	/* SD: GP11 card-detect pin pole */
     99 #define	 WB_DEV_MISC_SDGP11_DET	 0x02	/* SD: GP11 card-detect enable */
    100 #define	 WB_DEV_MISC_SDDATA3_DET 0x01	/* SD: DATA3 card-detect enable */
    101 
    102 #define	WB_REG_DEV_IRQCFG	0xf1
    103 #define	 WB_DEV_IRQCFG_HI_L	 0x08
    104 #define	 WB_DEV_IRQCFG_HI_P	 0x04
    105 #define	 WB_DEV_IRQCFG_MODE	 0x02
    106 #define	 WB_DEV_IRQCFG_DEBOUNCE	 0x01
    107 
    108 /*
    109  * SD Card interface registers
    110  */
    111 
    112 #define WB_SD_COMMAND		0x00
    113 #define	WB_SD_FIFO		0x01
    114 #define	WB_SD_INTCTL		0x02
    115 #define	WB_SD_INTSTS		0x03
    116 #define	 WB_INT_PENDING		 0x80
    117 #define	 WB_INT_CARD		 0x40
    118 #define	 WB_INT_FIFO		 0x20
    119 #define	 WB_INT_CRC		 0x10
    120 #define	 WB_INT_TIMEOUT		 0x08
    121 #define	 WB_INT_PROGEND		 0x04
    122 #define	 WB_INT_BUSYEND		 0x02
    123 #define	 WB_INT_TC		 0x01
    124 #define	 WB_INT_DEFAULT	\
    125 	  (WB_INT_CARD|WB_INT_FIFO|WB_INT_CRC|WB_INT_TIMEOUT)
    126 #define	WB_SD_FIFOSTS		0x04
    127 #define	 WB_FIFO_EMPTY		 0x80
    128 #define	 WB_FIFO_FULL		 0x40
    129 #define	 WB_FIFO_EMPTY_THRES	 0x20
    130 #define	 WB_FIFO_FULL_THRES	 0x10
    131 #define	 WB_FIFO_DEPTH_MASK	 0x0f
    132 #define	WB_SD_INDEX		0x05
    133 #define	 WB_INDEX_CLK		 0x01
    134 #define	  WB_CLK_375K		  0x00
    135 #define	  WB_CLK_12M		  0x01
    136 #define	  WB_CLK_16M		  0x02
    137 #define	  WB_CLK_24M		  0x03
    138 #define	 WB_INDEX_PBSMSB	 0x02
    139 #define	 WB_INDEX_TAAC		 0x03
    140 #define	 WB_INDEX_NSAC		 0x04
    141 #define	 WB_INDEX_PBSLSB	 0x05
    142 #define	 WB_INDEX_SETUP		 0x06
    143 #define	  WB_SETUP_DATA3_HI	  0x08
    144 #define	  WB_SETUP_FIFO_RST	  0x04
    145 #define	  WB_SETUP_SOFT_RST	  0x02
    146 #define	 WB_INDEX_DMA		 0x07
    147 #define	 WB_INDEX_FIFOEN	 0x08
    148 #define	  WB_FIFOEN_EMPTY	  0x20
    149 #define	  WB_FIFOEN_FULL	  0x10
    150 #define	 WB_INDEX_STATUS	 0x10
    151 #define	  WB_STATUS_BLOCK_READ	  0x80
    152 #define	  WB_STATUS_BLOCK_WRITE	  0x40
    153 #define	  WB_STATUS_BUSY	  0x20
    154 #define	  WB_STATUS_CARD_TRAFFIC  0x04
    155 #define	  WB_STATUS_SEND_COMMAND  0x02
    156 #define	  WB_STATUS_RECV_RES	  0x01
    157 #define	 WB_INDEX_RESPLEN	 0x1e
    158 #define	 WB_INDEX_RESP(n)	 (0x1f + (n))
    159 #define	 WB_INDEX_CRCSTS	 0x30
    160 #define	 WB_INDEX_ISR		 0x3f
    161 #define	WB_SD_DATA		0x06
    162 #define	WB_SD_CSR		0x07
    163 #define	 WB_CSR_MS_LED		 0x20
    164 #define	 WB_CSR_POWER_N		 0x10
    165 #define	 WB_CSR_WRITE_PROTECT	 0x04
    166 #define	 WB_CSR_CARD_PRESENT	 0x01
    167 
    168 #endif
    169