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      1 //===-- WebAssemblySubtarget.cpp - WebAssembly Subtarget Information ------===//
      2 //
      3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
      4 // See https://llvm.org/LICENSE.txt for license information.
      5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
      6 //
      7 //===----------------------------------------------------------------------===//
      8 ///
      9 /// \file
     10 /// This file implements the WebAssembly-specific subclass of
     11 /// TargetSubtarget.
     12 ///
     13 //===----------------------------------------------------------------------===//
     14 
     15 #include "WebAssemblySubtarget.h"
     16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
     17 #include "WebAssemblyInstrInfo.h"
     18 #include "llvm/Support/TargetRegistry.h"
     19 using namespace llvm;
     20 
     21 #define DEBUG_TYPE "wasm-subtarget"
     22 
     23 #define GET_SUBTARGETINFO_CTOR
     24 #define GET_SUBTARGETINFO_TARGET_DESC
     25 #include "WebAssemblyGenSubtargetInfo.inc"
     26 
     27 WebAssemblySubtarget &
     28 WebAssemblySubtarget::initializeSubtargetDependencies(StringRef CPU,
     29                                                       StringRef FS) {
     30   // Determine default and user-specified characteristics
     31   LLVM_DEBUG(llvm::dbgs() << "initializeSubtargetDependencies\n");
     32 
     33   if (CPU.empty())
     34     CPU = "generic";
     35 
     36   ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS);
     37   return *this;
     38 }
     39 
     40 WebAssemblySubtarget::WebAssemblySubtarget(const Triple &TT,
     41                                            const std::string &CPU,
     42                                            const std::string &FS,
     43                                            const TargetMachine &TM)
     44     : WebAssemblyGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS),
     45       TargetTriple(TT), FrameLowering(),
     46       InstrInfo(initializeSubtargetDependencies(CPU, FS)), TSInfo(),
     47       TLInfo(TM, *this) {}
     48 
     49 bool WebAssemblySubtarget::enableAtomicExpand() const {
     50   // If atomics are disabled, atomic ops are lowered instead of expanded
     51   return hasAtomics();
     52 }
     53 
     54 bool WebAssemblySubtarget::enableMachineScheduler() const {
     55   // Disable the MachineScheduler for now. Even with ShouldTrackPressure set and
     56   // enableMachineSchedDefaultSched overridden, it appears to have an overall
     57   // negative effect for the kinds of register optimizations we're doing.
     58   return false;
     59 }
     60 
     61 bool WebAssemblySubtarget::useAA() const { return true; }
     62