Home | History | Annotate | Line # | Download | only in amd64
      1 /*	Id: macdefs.h,v 1.35 2015/11/24 17:35:11 ragge Exp 	*/
      2 /*	$NetBSD: macdefs.h,v 1.1.1.5 2016/02/09 20:28:10 plunky Exp $	*/
      3 /*
      4  * Copyright (c) 2008 Michael Shalayeff
      5  * Copyright (c) 2003 Anders Magnusson (ragge (at) ludd.luth.se).
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. The name of the author may not be used to endorse or promote products
     17  *    derived from this software without specific prior written permission
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     24  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     28  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     29  */
     30 
     31 /*
     32  * Machine-dependent defines for both passes.
     33  */
     34 
     35 /*
     36  * Convert (multi-)character constant to integer.
     37  */
     38 #define makecc(val,i)	lastcon = (lastcon<<8)|((val<<24)>>24);
     39 
     40 #define ARGINIT		128	/* # bits above fp where arguments start */
     41 #define AUTOINIT	0	/* # bits below fp where automatics start */
     42 
     43 /*
     44  * Storage space requirements
     45  */
     46 #define SZCHAR		8
     47 #define SZBOOL		8
     48 #define SZSHORT		16
     49 #define SZINT		32
     50 #define SZLONG		64
     51 #define SZPOINT(t)	64
     52 #define SZLONGLONG	64
     53 #define SZFLOAT		32
     54 #define SZDOUBLE	64
     55 #define SZLDOUBLE	128
     56 
     57 /*
     58  * Alignment constraints
     59  */
     60 #define ALCHAR		8
     61 #define ALBOOL		8
     62 #define ALSHORT		16
     63 #define ALINT		32
     64 #define ALLONG		64
     65 #define ALPOINT		64
     66 #define ALLONGLONG	64
     67 #define ALFLOAT		32
     68 #define ALDOUBLE	64
     69 #define ALLDOUBLE	128
     70 /* #undef ALSTRUCT	amd64 struct alignment is member defined */
     71 #define ALSTACK		64
     72 #define ALMAX		128
     73 
     74 /*
     75  * Min/max values.
     76  */
     77 #define	MIN_CHAR	-128
     78 #define	MAX_CHAR	127
     79 #define	MAX_UCHAR	255
     80 #define	MIN_SHORT	-32768
     81 #define	MAX_SHORT	32767
     82 #define	MAX_USHORT	65535
     83 #define	MIN_INT		(-0x7fffffff-1)
     84 #define	MAX_INT		0x7fffffff
     85 #define	MAX_UNSIGNED	0xffffffffU
     86 #define	MIN_LONG	0x8000000000000000LL
     87 #define	MAX_LONG	0x7fffffffffffffffLL
     88 #define	MAX_ULONG	0xffffffffffffffffULL
     89 #define	MIN_LONGLONG	0x8000000000000000LL
     90 #define	MAX_LONGLONG	0x7fffffffffffffffLL
     91 #define	MAX_ULONGLONG	0xffffffffffffffffULL
     92 
     93 /* Default char is signed */
     94 #undef	CHAR_UNSIGNED
     95 #define	BOOL_TYPE	UCHAR	/* what used to store _Bool */
     96 
     97 /*
     98  * Use large-enough types.
     99  */
    100 typedef	long long CONSZ;
    101 typedef	unsigned long long U_CONSZ;
    102 typedef long long OFFSZ;
    103 
    104 #define CONFMT	"%lld"		/* format for printing constants */
    105 #define LABFMT	".L%d"		/* format for printing labels */
    106 #define	STABLBL	".LL%d"		/* format for stab (debugging) labels */
    107 #ifdef LANG_F77
    108 #define BLANKCOMMON "_BLNK_"
    109 #define MSKIREG  (M(TYSHORT)|M(TYLONG))
    110 #define TYIREG TYLONG
    111 #define FSZLENG  FSZLONG
    112 #define	AUTOREG	EBP
    113 #define	ARGREG	EBP
    114 #define ARGOFFSET 8
    115 #endif
    116 
    117 #define BACKAUTO 		/* stack grows negatively for automatics */
    118 #define BACKTEMP 		/* stack grows negatively for temporaries */
    119 
    120 #undef	FIELDOPS		/* no bit-field instructions */
    121 #define	TARGET_ENDIAN TARGET_LE	/* little-endian only */
    122 
    123 #define FINDMOPS	/* i386 has instructions that modifies memory */
    124 
    125 #define	CC_DIV_0	/* division by zero is safe in the compiler */
    126 
    127 #ifdef MACHOABI
    128 #define	HASP2ALIGN
    129 #endif
    130 
    131 /* Definitions mostly used in pass2 */
    132 
    133 #define BYTEOFF(x)	((x)&07)
    134 #define wdal(k)		(BYTEOFF(k)==0)
    135 
    136 #define STOARG(p)
    137 #define STOFARG(p)
    138 #define STOSTARG(p)
    139 #define genfcall(a,b)	gencall(a,b)
    140 
    141 /* How many integer registers are needed? (used for stack allocation) */
    142 #define	szty(t)	(t < LONG || t == FLOAT ? 1 : t == LDOUBLE ? 4 : 2)
    143 
    144 /*
    145  * The amd64 architecture has a much cleaner interface to its registers
    146  * than the x86, even though a part of the register block comes from
    147  * the x86 architecture.  Therefore currently only two non-overlapping
    148  * register classes are used; integer and xmm registers.
    149  *
    150  * All registers are given a sequential number to
    151  * identify it which must match rnames[] in local2.c.
    152  *
    153  * The classes used on amd64 are:
    154  *	A - integer registers
    155  *	B - xmm registers
    156  *	C - x87 registers
    157  */
    158 #define	RAX	000
    159 #define	RDX	001
    160 #define	RCX	002
    161 #define	RBX	003
    162 #define	RSI	004
    163 #define	RDI	005
    164 #define	RBP	006
    165 #define	RSP	007
    166 #define	R08	010
    167 #define	R09	011
    168 #define	R10	012
    169 #define	R11	013
    170 #define	R12	014
    171 #define	R13	015
    172 #define	R14	016
    173 #define	R15	017
    174 
    175 #define	XMM0	020
    176 #define	XMM1	021
    177 #define	XMM2	022
    178 #define	XMM3	023
    179 #define	XMM4	024
    180 #define	XMM5	025
    181 #define	XMM6	026
    182 #define	XMM7	027
    183 #define	XMM8	030
    184 #define	XMM9	031
    185 #define	XMM10	032
    186 #define	XMM11	033
    187 #define	XMM12	034
    188 #define	XMM13	035
    189 #define	XMM14	036
    190 #define	XMM15	037
    191 
    192 #define	MAXREGS	050	/* 40 registers */
    193 
    194 #define	RSTATUS	\
    195 	SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|PERMREG,	\
    196 	SAREG|TEMPREG, SAREG|TEMPREG, 0, 0,	 			\
    197 	SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG,	\
    198 	SAREG|PERMREG, SAREG|PERMREG, SAREG|PERMREG, SAREG|PERMREG, 	\
    199 	SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG,	\
    200 	SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG,	\
    201 	SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG,	\
    202 	SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG,	\
    203 	SCREG, SCREG, SCREG, SCREG,  SCREG, SCREG, SCREG, SCREG,
    204 
    205 
    206 /* no overlapping registers at all */
    207 #define	ROVERLAP \
    208 	{ -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
    209 	{ -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
    210 	{ -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
    211 	{ -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
    212 	{ -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 },
    213 
    214 
    215 /* Return a register class based on the type of the node */
    216 #define PCLASS(p) (p->n_type == FLOAT || p->n_type == DOUBLE ? SBREG : \
    217 		   p->n_type == LDOUBLE ? SCREG : SAREG)
    218 
    219 #define	NUMCLASS 	3	/* highest number of reg classes used */
    220 
    221 int COLORMAP(int c, int *r);
    222 #define	GCLASS(x) (x < 16 ? CLASSA : x < 32 ? CLASSB : CLASSC)
    223 #define DECRA(x,y)	(((x) >> (y*8)) & 255)	/* decode encoded regs */
    224 #define	ENCRD(x)	(x)		/* Encode dest reg in n_reg */
    225 #define ENCRA1(x)	((x) << 8)	/* A1 */
    226 #define ENCRA2(x)	((x) << 16)	/* A2 */
    227 #define ENCRA(x,y)	((x) << (8+y*8))	/* encode regs in int */
    228 
    229 #define	RETREG(x)	(x == FLOAT || x == DOUBLE ? XMM0 : \
    230 			 x == LDOUBLE ? 32 : RAX)
    231 
    232 /* XXX - to die */
    233 #define FPREG	RBP	/* frame pointer */
    234 #define STKREG	RSP	/* stack pointer */
    235 
    236 #define	SHSTR		(MAXSPECIAL+1)	/* short struct */
    237 #define	SFUNCALL	(MAXSPECIAL+2)	/* struct assign after function call */
    238 #define	SPCON		(MAXSPECIAL+3)	/* positive nonnamed constant */
    239 
    240 /*
    241  * Specials that indicate the applicability of machine idioms.
    242  */
    243 #define SMIXOR		(MAXSPECIAL+4)
    244 #define SMILWXOR	(MAXSPECIAL+5)
    245 #define SMIHWXOR	(MAXSPECIAL+6)
    246 #define SCON32		(MAXSPECIAL+7)	/* 32-bit constant */
    247 
    248 /*
    249  * i386-specific symbol table flags.
    250  */
    251 #define SBEENHERE	SLOCAL1
    252 
    253 /*
    254  * Extended assembler macros.
    255  */
    256 int xasmconstregs(char *);
    257 void targarg(char *w, void *arg, int n);
    258 #define	XASM_TARGARG(w, ary)	\
    259 	(w[1] == 'b' || w[1] == 'h' || w[1] == 'w' || w[1] == 'k' || \
    260 	 w[1] == 'q' ? w++, targarg(w, ary, n), 1 : 0)
    261 int numconv(void *ip, void *p, void *q);
    262 #define	XASM_NUMCONV(ip, p, q)	numconv(ip, p, q)
    263 #define	XASMCONSTREGS(x)	xasmconstregs(x)
    264 
    265 #define	HAVE_WEAKREF
    266 #define TARGET_FLT_EVAL_METHOD	0	/* all as their type */
    267 /*
    268  * builtins.
    269  */
    270 #define TARGET_VALIST
    271 #define TARGET_STDARGS
    272 #define TARGET_BUILTINS							\
    273 	{ "__builtin_stdarg_start", amd64_builtin_stdarg_start, 	\
    274 						0, 2, 0, VOID },	\
    275 	{ "__builtin_va_start", amd64_builtin_stdarg_start,		\
    276 						0, 2, 0, VOID },	\
    277 	{ "__builtin_va_arg", amd64_builtin_va_arg, BTNORVAL|BTNOPROTO,	\
    278 							2, 0, 0 },	\
    279 	{ "__builtin_va_end", amd64_builtin_va_end, 0, 1, 0, VOID },	\
    280 	{ "__builtin_va_copy", amd64_builtin_va_copy, 0, 2, 0, VOID },
    281 
    282 #ifdef LANG_CXX
    283 #define P1ND struct node
    284 #else
    285 #define P1ND struct p1node
    286 #endif
    287 struct node;
    288 struct bitable;
    289 P1ND *amd64_builtin_stdarg_start(const struct bitable *, P1ND *a);
    290 P1ND *amd64_builtin_va_arg(const struct bitable *, P1ND *a);
    291 P1ND *amd64_builtin_va_end(const struct bitable *, P1ND *a);
    292 P1ND *amd64_builtin_va_copy(const struct bitable *, P1ND *a);
    293 #undef P1ND
    294 
    295 /* target specific attributes */
    296 #define ATTR_MI_TARGET  ATTR_AMD64_CMPLRET, ATTR_AMD64_XORLBL
    297 #define NATIVE_FLOATING_POINT
    298