1 /* $NetBSD: zsvar.h,v 1.18 2023/01/06 10:28:28 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)zsvar.h 8.1 (Berkeley) 6/11/93 41 */ 42 43 /*- 44 * Copyright (c) 1995 The NetBSD Foundation, Inc. (Atari modifications) 45 * All rights reserved. 46 * 47 * This code is derived from software contributed to The NetBSD Foundation 48 * by Leo Weppelman. 49 * 50 * Redistribution and use in source and binary forms, with or without 51 * modification, are permitted provided that the following conditions 52 * are met: 53 * 1. Redistributions of source code must retain the above copyright 54 * notice, this list of conditions and the following disclaimer. 55 * 2. Redistributions in binary form must reproduce the above copyright 56 * notice, this list of conditions and the following disclaimer in the 57 * documentation and/or other materials provided with the distribution. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69 * POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 /* 73 * Register layout is machine-dependent... 74 */ 75 76 struct zschan { 77 uint8_t zc_xxx0; 78 volatile uint8_t zc_csr; /* ctrl,status, and indirect access */ 79 uint8_t zc_xxx1; 80 volatile uint8_t zc_data; /* data */ 81 }; 82 83 struct zsdevice { 84 struct zschan zs_chan_a; 85 struct zschan zs_chan_b; 86 }; 87 88 /* 89 * Software state, per zs channel. 90 * 91 * The zs chip has insufficient buffering, so we provide a software 92 * buffer using a two-level interrupt scheme. The hardware (high priority) 93 * interrupt simply grabs the `cause' of the interrupt and stuffs it into 94 * a ring buffer. It then schedules a software interrupt; the latter 95 * empties the ring as fast as it can, hoping to avoid overflow. 96 * 97 * Interrupts can happen because of: 98 * - received data; 99 * - transmit pseudo-DMA done; and 100 * - status change. 101 * These are all stored together in the (single) ring. The size of the 102 * ring is a power of two, to make % operations fast. Since we need two 103 * bits to distinguish the interrupt type, and up to 16 for the received 104 * data plus RR1 status, we use 32 bits per ring entry. 105 * 106 * When the value is a character + RR1 status, the character is in the 107 * upper 8 bits of the RR1 status. 108 */ 109 #define ZLRB_RING_SIZE 8192 /* ZS line ring buffer size */ 110 #define ZLRB_RING_MASK 8191 /* mask for same */ 111 112 /* 0 is reserved (means "no interrupt") */ 113 #define ZRING_RINT 1 /* receive data interrupt */ 114 #define ZRING_XINT 2 /* transmit done interrupt */ 115 #define ZRING_SINT 3 /* status change interrupt */ 116 117 #define ZRING_TYPE(x) ((x) & 3) 118 #define ZRING_VALUE(x) ((x) >> 8) 119 #define ZRING_MAKE(t, v) ((t) | (v) << 8) 120 121 struct zs_chanstate { 122 struct zschan *cs_zc; /* points to hardware regs */ 123 int cs_unit; /* unit number */ 124 struct tty *cs_ttyp; /* ### */ 125 126 /* 127 * We must keep a copy of the write registers as they are 128 * mostly write-only and we sometimes need to set and clear 129 * individual bits (e.g., in WR3). Not all of these are 130 * needed but 16 bytes is cheap and this makes the addressing 131 * simpler. Unfortunately, we can only write to some registers 132 * when the chip is not actually transmitting, so whenever 133 * we are expecting a `transmit done' interrupt the preg array 134 * is allowed to `get ahead' of the current values. In a 135 * few places we must change the current value of a register, 136 * rather than (or in addition to) the pending value; for these 137 * cs_creg[] contains the current value. 138 */ 139 uint8_t cs_creg[16]; /* current values */ 140 uint8_t cs_preg[16]; /* pending values */ 141 uint8_t cs_heldchange; /* change pending (creg != preg) */ 142 uint8_t cs_rr0; /* last rr0 processed */ 143 144 /* pure software data, per channel */ 145 char cs_softcar; /* software carrier */ 146 char cs_xxx; /* (spare) */ 147 148 /* 149 * The transmit byte count and address are used for pseudo-DMA 150 * output in the hardware interrupt code. PDMA can be suspended 151 * to get pending changes done; heldtbc is used for this. It can 152 * also be stopped for ^S; this sets TS_TTSTOP in tp->t_state. 153 */ 154 int cs_tbc; /* transmit byte count */ 155 uint8_t *cs_tba; /* transmit buffer address */ 156 int cs_heldtbc; /* held tbc while xmission stopped */ 157 158 /* 159 * Printing an overrun error message often takes long enough to 160 * cause another overrun, so we only print one per second. 161 */ 162 long cs_rotime; /* time of last ring overrun */ 163 long cs_fotime; /* time of last fifo overrun */ 164 165 /* 166 * The ring buffer. 167 */ 168 u_int cs_rbget; /* ring buffer `get' index */ 169 volatile u_int cs_rbput; /* ring buffer `put' index */ 170 int *cs_rbuf; /* type, value pairs */ 171 }; 172 173 /* 174 * Macros to read and write individual registers (except 0) in a channel. 175 */ 176 #define ZS_READ(c, r) ((c)->zc_csr = (r), (c)->zc_csr) 177 #define ZS_WRITE(c, r, v) ((c)->zc_csr = (r), (c)->zc_csr = (v)) 178 179 /* 180 * Split minor into unit, dialin/dialout & flag nibble. 181 */ 182 #define ZS_UNIT(dev) (TTUNIT(dev) >> 4) 183 #define ZS_FLAGS(dev) (TTUNIT(dev) & 0xf) 184 #define ZS_DIALOUT(dev) TTDIALOUT(dev) 185
Indexes created Sun Sep 28 07:09:56 GMT 2025