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      1 /*	$NetBSD: fenv.h,v 1.3 2014/02/12 23:04:43 dsl Exp $	*/
      2 /*-
      3  * Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
      4  * All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  */
     27 
     28 #ifndef _AMD64_FENV_H_
     29 #define _AMD64_FENV_H_
     30 
     31 #ifndef _KERNEL
     32 #include <sys/stdint.h>
     33 #endif
     34 
     35 /* Default x87 control word. */
     36 #define __INITIAL_NPXCW__       0x037f
     37 /* Modern NetBSD uses the default control word.. */
     38 #define __NetBSD_NPXCW__        __INITIAL_NPXCW__
     39 /* NetBSD before 6.99.26 forced IEEE double precision. */
     40 #define __NetBSD_COMPAT_NPXCW__ 0x127f
     41 
     42 /* Default values for the mxcsr. All traps masked. */
     43 #define __INITIAL_MXCSR__       0x1f80
     44 
     45 #ifndef _KERNEL
     46 /*
     47  * Each symbol representing a floating point exception expands to an integer
     48  * constant expression with values, such that bitwise-inclusive ORs of _all
     49  * combinations_ of the constants result in distinct values.
     50  *
     51  * We use such values that allow direct bitwise operations on FPU/SSE registers.
     52  */
     53 #define	FE_INVALID	0x01	/* 000000000001 */
     54 #define	FE_DENORMAL	0x02	/* 000000000010 */
     55 #define	FE_DIVBYZERO	0x04	/* 000000000100 */
     56 #define	FE_OVERFLOW	0x08	/* 000000001000 */
     57 #define	FE_UNDERFLOW	0x10	/* 000000010000 */
     58 #define	FE_INEXACT	0x20	/* 000000100000 */
     59 
     60 /*
     61  * The following symbol is simply the bitwise-inclusive OR of all floating-point
     62  * exception constants defined above
     63  */
     64 #define FE_ALL_EXCEPT   \
     65   (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
     66 
     67 /*
     68  * Each symbol representing the rounding direction, expands to an integer
     69  * constant expression whose value is distinct non-negative value.
     70  *
     71  * We use such values that allow direct bitwise operations on FPU/SSE registers.
     72  */
     73 #define	FE_TONEAREST	0x000	/* 000000000000 */
     74 #define	FE_DOWNWARD	0x400	/* 010000000000 */
     75 #define	FE_UPWARD	0x800	/* 100000000000 */
     76 #define	FE_TOWARDZERO	0xC00	/* 110000000000 */
     77 
     78 /*
     79  * As compared to the x87 control word, the SSE unit's control word
     80  * has the rounding control bits offset by 3 and the exception mask
     81  * bits offset by 7.
     82  */
     83 #define	_X87_ROUNDING_MASK	0xC00		/* 110000000000 */
     84 #define	_SSE_ROUNDING_MASK	(0xC00 << 3)
     85 #define	_SSE_ROUND_SHIFT	3
     86 #define	_SSE_EMASK_SHIFT	7
     87 
     88 /*
     89  * fenv_t represents the entire floating-point environment
     90  */
     91 typedef struct {
     92 	struct {
     93 		uint32_t control;	/* Control word register */
     94 		uint32_t status;	/* Status word register */
     95 		uint32_t tag;		/* Tag word register */
     96 		uint32_t others[4];	/* EIP, Pointer Selector, etc */
     97 	} x87;
     98 
     99 	uint32_t mxcsr;			/* Control and status register */
    100 } fenv_t;
    101 
    102 extern fenv_t		__fe_dfl_env;
    103 #define FE_DFL_ENV      ((const fenv_t *) &__fe_dfl_env)
    104 
    105 /*
    106  * fexcept_t represents the floating-point status flags collectively, including
    107  * any status the implementation associates with the flags.
    108  *
    109  * A floating-point status flag is a system variable whose value is set (but
    110  * never cleared) when a floating-point exception is raised, which occurs as a
    111  * side effect of exceptional floating-point arithmetic to provide auxiliary
    112  * information.
    113  *
    114  * A floating-point control mode is a system variable whose value may be set by
    115  * the user to affect the subsequent behavior of floating-point arithmetic.
    116  */
    117 typedef uint32_t fexcept_t;
    118 #endif
    119 
    120 #endif /* ! _AMD64_FENV_H_ */
    121