Home | History | Annotate | Line # | Download | only in sh3
      1 /*	$NetBSD: mmu.c,v 1.18 2008/04/28 20:23:35 martin Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: mmu.c,v 1.18 2008/04/28 20:23:35 martin Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/systm.h>
     37 
     38 #include <sh3/mmu.h>
     39 #include <sh3/mmu_sh3.h>
     40 #include <sh3/mmu_sh4.h>
     41 
     42 #if defined(SH3) && defined(SH4)
     43 void (*__sh_mmu_start)(void);
     44 void (*__sh_tlb_invalidate_addr)(int, vaddr_t);
     45 void (*__sh_tlb_invalidate_asid)(int);
     46 void (*__sh_tlb_invalidate_all)(void);
     47 void (*__sh_tlb_update)(int, vaddr_t, uint32_t);
     48 #endif /* SH3 && SH4 */
     49 
     50 
     51 void
     52 sh_mmu_init(void)
     53 {
     54 
     55 	/*
     56 	 * Assign function hooks but only if both SH3 and SH4 are defined.
     57 	 * They are called directly otherwise.  See <sh3/mmu.h>.
     58 	 */
     59 #if defined(SH3) && defined(SH4)
     60 	if (CPU_IS_SH3) {
     61 		__sh_mmu_start = sh3_mmu_start;
     62 		__sh_tlb_invalidate_addr = sh3_tlb_invalidate_addr;
     63 		__sh_tlb_invalidate_asid = sh3_tlb_invalidate_asid;
     64 		__sh_tlb_invalidate_all = sh3_tlb_invalidate_all;
     65 		__sh_tlb_update = sh3_tlb_update;
     66 	}
     67 	else if (CPU_IS_SH4) {
     68 		__sh_mmu_start = sh4_mmu_start;
     69 		__sh_tlb_invalidate_addr = sh4_tlb_invalidate_addr;
     70 		__sh_tlb_invalidate_asid = sh4_tlb_invalidate_asid;
     71 		__sh_tlb_invalidate_all = sh4_tlb_invalidate_all;
     72 		__sh_tlb_update = sh4_tlb_update;
     73 	}
     74 #endif /* SH3 && SH4 */
     75 }
     76 
     77 void
     78 sh_mmu_information(void)
     79 {
     80 	uint32_t r;
     81 #ifdef SH3
     82 	if (CPU_IS_SH3) {
     83 		aprint_normal("cpu0: 4-way set-associative 128 TLB entries\n");
     84 		r = _reg_read_4(SH3_MMUCR);
     85 		aprint_normal("cpu0: %s mode, %s virtual storage mode\n",
     86 		    r & SH3_MMUCR_IX ? "ASID+VPN" : "VPN",
     87 		    r & SH3_MMUCR_SV ? "single" : "multiple");
     88 	}
     89 #endif
     90 #ifdef SH4
     91 	if (CPU_IS_SH4) {
     92 		unsigned int urb;
     93 		aprint_normal("cpu0: full-associative"
     94 			      " 4 ITLB, 64 UTLB entries\n");
     95 		r = _reg_read_4(SH4_MMUCR);
     96 		urb = (r & SH4_MMUCR_URB_MASK) >> SH4_MMUCR_URB_SHIFT;
     97 		aprint_normal("cpu0: %s virtual storage mode,"
     98 			      " SQ access: kernel%s,"
     99 			      " wired %d\n",
    100 		    r & SH3_MMUCR_SV ? "single" : "multiple",
    101 		    r & SH4_MMUCR_SQMD ? "" : "/user",
    102 		    urb ? 64 - urb : 0);
    103 	}
    104 #endif
    105 }
    106 
    107 void
    108 sh_tlb_set_asid(int asid)
    109 {
    110 
    111 	_reg_write_4(SH_(PTEH), asid);
    112 }
    113