| /src/sys/arch/arm/include/ |
| lwp_private.h | 47 __asm __volatile("mrs\t%0, tpidr_el0" : "=r"(__tpidr)); local in function:__lwp_getprivate_fast
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| lock.h | 74 __asm __volatile("ldrexb\t%0,[%1]" : "=r"(__rv) : "r"(__alp)); local in function:__arm_load_exclusive
76 __asm __volatile("ldrex\t%0,[%1]" : "=r"(__rv) : "r"(__alp)); local in function:__arm_load_exclusive
87 __asm __volatile("strexb\t%0,%1,[%2]" local in function:__arm_store_exclusive
90 __asm __volatile("strex\t%0,%1,[%2]" local in function:__arm_store_exclusive
139 __asm __volatile("dmb ish" ::: "memory"); local in function:__arm_load_dmb
141 __asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
150 __asm __volatile("dmb ish" ::: "memory"); local in function:__arm_dmb_store
152 __asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
209 __asm __volatile("stlrb\t%w0, [%1]" local in function:__cpu_simple_unlock
212 __asm __volatile("stlr\t%0, [%1] local in function:__cpu_simple_unlock
[all...] |
| locore.h | 201 __asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va)); local in function:read_insn
221 __asm __volatile("ldrht %0, [%1, #0]" : "=&r"(insn) : "r"(va)); local in function:read_thumb_insn
223 __asm __volatile("ldrht %0, [%1], #0" : "=&r"(insn) : "r"(va));
225 __asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va & ~3));
|
| cpufunc.h | 61 #define dsb(opt) __asm __volatile("dsb " __STRING(opt) : : : "memory")
62 #define dmb(opt) __asm __volatile("dmb " __STRING(opt) : : : "memory")
63 #define isb() __asm __volatile("isb" : : : "memory")
64 #define sev() __asm __volatile("sev" : : : "memory")
69 __asm __volatile("mcr p15, 0, %0, c7, c10, 4" :: "r" (0) : "memory")
71 __asm __volatile("mcr p15, 0, %0, c7, c10, 5" :: "r" (0) : "memory")
73 __asm __volatile("mcr p15, 0, %0, c7, c5, 4" :: "r" (0) : "memory")
323 __asm __volatile("mrs\t%0, cpsr\n" : "=r"(ret)); local in function:enable_interrupts
328 __asm __volatile("cpsie\tif"); local in function:enable_interrupts
331 __asm __volatile("cpsie\ti") local in function:enable_interrupts
334 __asm __volatile("cpsie\\tf"); local in function:enable_interrupts
[all...] |
| /src/sys/arch/riscv/include/ |
| cpu_counter.h | 77 __asm __volatile("csrr\t%0, cycle" : "=r"(__count)); local in function:cpu_counter
91 __asm __volatile("csrr\t%0, cycle" : "=r"(__count)); local in function:cpu_counter32
|
| lwp_private.h | 63 __asm __volatile( local in function:__lwp_gettcb_fast
74 __asm __volatile( local in function:__lwp_settcb
|
| mutex.h | 103 __asm __volatile( local in function:riscv_mutex_spinbit_lock_try
113 __asm __volatile( local in function:riscv_mutex_spinbit_lock_unlock
|
| pmap.h | 111 __asm __volatile("fence\trw,rw; fence.i" ::: "memory"); local in function:pmap_procwr
195 __asm __volatile("fence\trw,rw; fence.i" ::: "memory"); local in function:pmap_md_page_syncicache
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| sbi.h | 301 __asm __volatile ( local in function:sbi_call
|
| /src/sys/arch/mips/include/ |
| lwp_private.h | 55 __asm __volatile( local in function:__lwp_gettcb_fast
|
| fenv.h | 79 __asm __volatile("cfc1 %0,$31" : "=r" (__fpsr)); local in function:__rfs
87 __asm __volatile("ctc1 %0,$31" : : "r" (__fpsr)); local in function:__wfs
|
| /src/sys/arch/powerpc/include/ |
| lwp_private.h | 56 __asm __volatile( local in function:__lwp_gettcb_fast
69 __asm __volatile( local in function:__lwp_settcb
|
| /src/lib/libpthread/arch/aarch64/ |
| pthread_md.h | 40 __asm __volatile("mov %0, sp" : "=r" (ret)); local in function:pthread__sp
45 #define pthread__smt_wait() __asm __volatile("wfe") /* wfe */
46 #define pthread__smt_wake() __asm __volatile("sev") /* sev */
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| /src/sys/arch/or1k/include/ |
| lwp_private.h | 61 __asm __volatile( local in function:__lwp_gettcb_fast
72 __asm __volatile( local in function:__lwp_settcb
|
| /src/sys/arch/vax/include/ |
| lock.h | 79 __asm __volatile ("movl %1,%%r1;jsb Slocktry;movl %%r0,%0" local in function:__cpu_simple_lock_try
84 __asm __volatile ("clrl %0;bbssi $0,%1,1f;incl %0;1:" local in function:__cpu_simple_lock_try
107 __asm __volatile ("1:bbssi $0,%0,1b"
119 __asm __volatile ("movl %0,%%r1;jsb Sunlock" local in function:__cpu_simple_unlock
124 __asm __volatile ("bbcci $0,%0,1f;1:"
|
| /src/lib/libpthread/arch/i386/ |
| pthread_md.h | 63 #define pthread__smt_pause() __asm __volatile("rep; nop" ::: "memory")
64 #define pthread__smt_wait() __asm __volatile("rep; nop" ::: "memory")
75 __asm __volatile ("lock; cmpxchgl %2, %1" local in function:_atomic_cas_ptr
88 __asm __volatile ("cmpxchgl %2, %1" local in function:_atomic_cas_ptr_ni
|
| /src/lib/libpthread/arch/x86_64/ |
| pthread_md.h | 66 #define pthread__smt_pause() __asm __volatile("rep; nop" ::: "memory")
67 #define pthread__smt_wait() __asm __volatile("rep; nop" ::: "memory")
78 __asm __volatile ("lock; cmpxchgq %2, %1" local in function:_atomic_cas_ptr
91 __asm __volatile ("cmpxchgq %2, %1" local in function:_atomic_cas_ptr_ni
|
| /src/sys/arch/ia64/include/ |
| lock.h | 121 __asm __volatile("hint @pause" ::: "memory"); local in function:ia64_pause
|
| cpufunc.h | 50 __asm __volatile("break.m %0" :: "i"(IA64_FIXED_BREAK)); local in function:breakpoint
59 #define __MEMIO_ADDR(x) (__volatile void*)(IA64_PHYS_TO_RR6(x))
60 #define __PIO_ADDR(x) (__volatile void*)(ia64_port_base | \
69 __volatile uint8_t *p;
82 __volatile uint16_t *p;
201 __asm __volatile ("rsm psr.i"); local in function:disable_intr
208 __asm __volatile ("ssm psr.i;; srlz.d"); local in function:enable_intr
216 __asm __volatile ("mov %0=psr;;" : "=r"(psr)); local in function:intr_disable
|
| atomic.h | 43 __asm __volatile ( \
90 __asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
99 __asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
108 __asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
116 __asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
124 __asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
132 __asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
396 __asm __volatile ("xchg4 %0 = %3, %2;;" : "=r"(r), "=m"(*p) : local in function:ia64_atomic_swap_32
406 __asm __volatile ("xchg8 %0 = %3, %2;;" : "=r"(r), "=m"(*p) : local in function:ia64_atomic_swap_64
|
| ia64_cpu.h | 190 __asm __volatile("mf"); local in function:ia64_mf
196 __asm __volatile("mf.a"); local in function:ia64_mf_a
205 __asm __volatile("fc %0" :: "r"(va)); local in function:ia64_fc
211 __asm __volatile("fc.i %0" :: "r"(va)); local in function:ia64_fc_i
220 __asm __volatile("sync.i"); local in function:ia64_sync_i
230 __asm __volatile("thash %0=%1" : "=r" (result) : "r" (va)); local in function:ia64_thash
241 __asm __volatile("ttag %0=%1" : "=r" (result) : "r" (va)); local in function:ia64_ttag
252 __asm __volatile("tpa %0=%1" : "=r" (result) : "r" (va)); local in function:ia64_tpa
262 __asm __volatile("ptc.e %0;; srlz.i;;" :: "r"(v)); local in function:ia64_ptc_e
271 __asm __volatile("ptc.g %0,%1;;" :: "r"(va), "r"(log2size)) local in function:ia64_ptc_g
280 __asm __volatile("ptc.ga %0,%1;;" :: "r"(va), "r"(log2size)); local in function:ia64_ptc_ga
289 __asm __volatile("ptc.l %0,%1;; srlz.i;;" :: "r"(va), "r"(log2size)); local in function:ia64_ptc_l
298 __asm __volatile("invala;;"); local in function:ia64_invala
310 __asm __volatile("ld1 %0=[%1];;" : "=r"(v) : "r"(p)); local in function:ia64_ld1
319 __asm __volatile("ld2 %0=[%1];;" : "=r"(v) : "r"(p)); local in function:ia64_ld2
328 __asm __volatile("ld4 %0=[%1];;" : "=r"(v) : "r"(p)); local in function:ia64_ld4
337 __asm __volatile("ld8 %0=[%1];;" : "=r"(v) : "r"(p)); local in function:ia64_ld8
348 __asm __volatile("st1 [%0]=%1;;" :: "r"(p), "r"(v)); local in function:ia64_st1
354 __asm __volatile("st2 [%0]=%1;;" :: "r"(p), "r"(v)); local in function:ia64_st2
360 __asm __volatile("st4 [%0]=%1;;" :: "r"(p), "r"(v)); local in function:ia64_st4
366 __asm __volatile("st8 [%0]=%1;;" :: "r"(p), "r"(v)); local in function:ia64_st8
376 __asm __volatile("mov %0=psr;;" : "=r" (result)); local in function:ia64_get_psr
494 __asm __volatile("mov rr[%0]=%1" local in function:IA64_AR
505 __asm __volatile("mov %0=cpuid[%1]" local in function:ia64_get_cpuid
513 __asm __volatile("ssm psr.dfh;; srlz.d"); local in function:ia64_disable_highfp
519 __asm __volatile("rsm psr.dfh;; srlz.d"); local in function:ia64_enable_highfp
[all...] |
| /src/sys/arch/epoc32/stand/e32boot/ldd/ |
| e32boot.cpp | 179 __asm __volatile(" \ local in function:E32BootChannel::BootNetBSD
195 __asm __volatile(" \ local in function:E32BootChannel::BootNetBSD
|
| /src/sys/arch/powerpc/include/booke/ |
| cpuvar.h | 154 __asm __volatile("wrteei\t%0" :: "n"((msr & PSL_EE) ? 1 : 0)); local in function:wrtee
156 __asm __volatile("wrtee\t%0" :: "r"(msr)); local in function:wrtee
|
| /src/sys/arch/mips/cavium/dev/ |
| octeon_cop2var.h | 962 __asm __volatile (
971 __asm __volatile (__PUSH "dmtc2 %0,0x0201" __POP :: "d"(val))
973 __asm __volatile (__PUSH "dmtc2 %0,0x0214" __POP :: "d"(val))
975 __asm __volatile (__PUSH "dmtc2 %0,0x0215" __POP :: "d"(val))
977 __asm __volatile (__PUSH "dmtc2 %0,0x1217" __POP :: "d"(val))
979 __asm __volatile (__PUSH "dmfc2 %0,0x0203" __POP : "=d"(val))
984 __asm __volatile ( local in function:octeon_cop2_crc_reflect
|
| /src/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/ |
| sanitizer_linux_libcdep.cc | 391 __asm __volatile("mov %%gs:0, %0" : "=r" (segbase)); local in function:__sanitizer::ThreadSelfSegbase
394 __asm __volatile("movq %%fs:0, %0" : "=r" (segbase)); local in function:__sanitizer::ThreadSelfSegbase
|
