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      1 /*	$NetBSD: mcontext.h,v 1.26 2024/11/30 01:04:13 christos Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Klaus Klein.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _POWERPC_MCONTEXT_H_
     33 #define _POWERPC_MCONTEXT_H_
     34 
     35 /*
     36  * Layout of mcontext_t based on the System V Application Binary Interface,
     37  * Edition 4.1, PowerPC Processor ABI Supplement - September 1995, and
     38  * extended for the AltiVec Register File.  Note that due to the increased
     39  * alignment requirements of the latter, the offset of mcontext_t within
     40  * an ucontext_t is different from System V.
     41  */
     42 
     43 #define	_NGREG	39		/* GR0-31, CR, LR, SRR0, SRR1, CTR, XER, MQ */
     44 
     45 typedef	long		__greg_t;
     46 typedef	__greg_t	__gregset_t[_NGREG];
     47 
     48 #define	_REG_R0		0
     49 #define	_REG_R1		1
     50 #define	_REG_R2		2
     51 #define	_REG_R3		3
     52 #define	_REG_R4		4
     53 #define	_REG_R5		5
     54 #define	_REG_R6		6
     55 #define	_REG_R7		7
     56 #define	_REG_R8		8
     57 #define	_REG_R9		9
     58 #define	_REG_R10	10
     59 #define	_REG_R11	11
     60 #define	_REG_R12	12
     61 #define	_REG_R13	13
     62 #define	_REG_R14	14
     63 #define	_REG_R15	15
     64 #define	_REG_R16	16
     65 #define	_REG_R17	17
     66 #define	_REG_R18	18
     67 #define	_REG_R19	19
     68 #define	_REG_R20	20
     69 #define	_REG_R21	21
     70 #define	_REG_R22	22
     71 #define	_REG_R23	23
     72 #define	_REG_R24	24
     73 #define	_REG_R25	25
     74 #define	_REG_R26	26
     75 #define	_REG_R27	27
     76 #define	_REG_R28	28
     77 #define	_REG_R29	29
     78 #define	_REG_R30	30
     79 #define	_REG_R31	31
     80 #define	_REG_CR		32		/* Condition Register */
     81 #define	_REG_LR		33		/* Link Register */
     82 #define	_REG_PC		34		/* PC (copy of SRR0) */
     83 #define	_REG_MSR	35		/* MSR (copy of SRR1) */
     84 #define	_REG_CTR	36		/* Count Register */
     85 #define	_REG_XER	37		/* Integer Exception Register */
     86 #define	_REG_MQ		38		/* MQ Register (POWER only) */
     87 
     88 typedef struct {
     89 #ifdef _KERNEL
     90 	unsigned long long	__fpu_regs[32];	/* FP0-31 */
     91 #else
     92 	double		__fpu_regs[32];	/* FP0-31 */
     93 #endif
     94 	unsigned int	__fpu_fpscr;	/* FP Status and Control Register */
     95 	unsigned int	__fpu_valid;	/* Set together with _UC_FPU */
     96 } __fpregset_t;
     97 
     98 #define	_NVR	32			/* Number of Vector registers */
     99 
    100 typedef struct {
    101 	union __vr {
    102 		unsigned char	__vr8[16];
    103 		unsigned short	__vr16[8];
    104 		unsigned int	__vr32[4];
    105 		unsigned char	__spe8[8];
    106 		unsigned short	__spe16[4];
    107 		unsigned int	__spe32[2];
    108 	} 		__vrs[_NVR] __aligned(16);
    109 	unsigned int	__vscr;		/* VSCR */
    110 	unsigned int	__vrsave;	/* VRSAVE */
    111 } __vrf_t;
    112 
    113 typedef struct {
    114 	__gregset_t	__gregs;	/* General Purpose Register set */
    115 	__fpregset_t	__fpregs;	/* Floating Point Register set */
    116 	__vrf_t		__vrf;		/* Vector Register File */
    117 } mcontext_t;
    118 
    119 #if defined(_LP64)
    120 typedef	int		__greg32_t;
    121 typedef	__greg32_t	__gregset32_t[_NGREG];
    122 
    123 typedef struct {
    124 	__gregset32_t	__gregs;	/* General Purpose Register set */
    125 	__fpregset_t	__fpregs;	/* Floating Point Register set */
    126 	__vrf_t		__vrf;		/* Vector Register File */
    127 } mcontext32_t;
    128 #endif
    129 
    130 /* Machine-dependent uc_flags */
    131 #define	_UC_POWERPC_VEC	_UC_MD_BIT16	/* Vector Register File valid */
    132 #define	_UC_POWERPC_SPE	_UC_MD_BIT17	/* Vector Register File valid */
    133 #define	_UC_TLSBASE	_UC_MD_BIT19	/* thread context valid in R2 */
    134 #define	_UC_SETSTACK	_UC_MD_BIT20
    135 #define	_UC_CLRSTACK	_UC_MD_BIT21
    136 
    137 #define _UC_MACHINE_SP(uc)	((uc)->uc_mcontext.__gregs[_REG_R1])
    138 #define _UC_MACHINE_FP(uc)	((uc)->uc_mcontext.__gregs[_REG_R31])
    139 #define _UC_MACHINE_PC(uc)	((uc)->uc_mcontext.__gregs[_REG_PC])
    140 #define _UC_MACHINE_INTRV(uc)	((uc)->uc_mcontext.__gregs[_REG_R3])
    141 
    142 #define	_UC_MACHINE_SET_PC(uc, pc)	_UC_MACHINE_PC(uc) = (pc)
    143 
    144 #endif	/* !_POWERPC_MCONTEXT_H_ */
    145