1 /* $NetBSD: agp.c,v 1.91 2026/08/17 19:40:52 rkujawa Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ 29 */ 30 31 /* 32 * Copyright (c) 2001 Wasabi Systems, Inc. 33 * All rights reserved. 34 * 35 * Written by Frank van der Linden for Wasabi Systems, Inc. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed for the NetBSD Project by 48 * Wasabi Systems, Inc. 49 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 50 * or promote products derived from this software without specific prior 51 * written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.91 2026/08/17 19:40:52 rkujawa Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/agpio.h> 72 #include <sys/bus.h> 73 #include <sys/conf.h> 74 #include <sys/device.h> 75 #include <sys/fcntl.h> 76 #include <sys/ioctl.h> 77 #include <sys/kernel.h> 78 #include <sys/malloc.h> 79 #include <sys/mutex.h> 80 #include <sys/proc.h> 81 #include <sys/systm.h> 82 83 #include <dev/pci/agpreg.h> 84 #include <dev/pci/agpvar.h> 85 #include <dev/pci/pcidevs.h> 86 #include <dev/pci/pcireg.h> 87 #include <dev/pci/pcivar.h> 88 89 MALLOC_DEFINE(M_AGP, "AGP", "AGP memory"); 90 91 /* Helper functions for implementing chipset mini drivers. */ 92 /* XXXfvdl get rid of this one. */ 93 94 extern struct cfdriver agp_cd; 95 96 static int agp_info_user(struct agp_softc *, agp_info *); 97 static int agp_setup_user(struct agp_softc *, agp_setup *); 98 static int agp_allocate_user(struct agp_softc *, agp_allocate *); 99 static int agp_deallocate_user(struct agp_softc *, int); 100 static int agp_bind_user(struct agp_softc *, agp_bind *); 101 static int agp_unbind_user(struct agp_softc *, agp_unbind *); 102 static int agp_generic_enable_v2(struct agp_softc *, 103 const struct pci_attach_args *, int, u_int32_t); 104 static int agp_generic_enable_v3(struct agp_softc *, 105 const struct pci_attach_args *, int, u_int32_t); 106 static int agpdev_match(const struct pci_attach_args *); 107 static bool agp_resume(device_t, const pmf_qual_t *); 108 109 #include "agp_ali.h" 110 #include "agp_amd.h" 111 #include "agp_amd64.h" 112 #include "agp_i810.h" 113 #include "agp_intel.h" 114 #include "agp_nvidia.h" 115 #include "agp_sis.h" 116 #include "agp_via.h" 117 118 const struct agp_product { 119 uint32_t ap_vendor; 120 uint32_t ap_product; 121 int (*ap_match)(const struct pci_attach_args *); 122 int (*ap_attach)(device_t, device_t, void *); 123 } agp_products[] = { 124 #if NAGP_AMD64 > 0 125 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, 126 agp_amd64_match, agp_amd64_attach }, 127 #endif 128 129 #if NAGP_ALI > 0 130 { PCI_VENDOR_ALI, -1, 131 NULL, agp_ali_attach }, 132 #endif 133 134 #if NAGP_AMD64 > 0 135 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, 136 agp_amd64_match, agp_amd64_attach }, 137 #endif 138 139 #if NAGP_AMD > 0 140 { PCI_VENDOR_AMD, -1, 141 agp_amd_match, agp_amd_attach }, 142 #endif 143 144 #if NAGP_I810 > 0 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, 146 NULL, agp_i810_attach }, 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, 148 NULL, agp_i810_attach }, 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, 150 NULL, agp_i810_attach }, 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, 152 NULL, agp_i810_attach }, 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, 154 NULL, agp_i810_attach }, 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, 156 NULL, agp_i810_attach }, 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, 158 NULL, agp_i810_attach }, 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, 160 NULL, agp_i810_attach }, 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, 162 NULL, agp_i810_attach }, 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, 164 NULL, agp_i810_attach }, 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, 166 NULL, agp_i810_attach }, 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, 168 NULL, agp_i810_attach }, 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, 170 NULL, agp_i810_attach }, 171 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, 172 NULL, agp_i810_attach }, 173 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, 174 NULL, agp_i810_attach }, 175 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, 176 NULL, agp_i810_attach }, 177 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, 178 NULL, agp_i810_attach }, 179 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, 180 NULL, agp_i810_attach }, 181 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, 182 NULL, agp_i810_attach }, 183 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, 184 NULL, agp_i810_attach }, 185 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, 186 NULL, agp_i810_attach }, 187 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, 188 NULL, agp_i810_attach }, 189 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, 190 NULL, agp_i810_attach }, 191 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, 192 NULL, agp_i810_attach }, 193 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, 194 NULL, agp_i810_attach }, 195 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, 196 NULL, agp_i810_attach }, 197 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, 198 NULL, agp_i810_attach }, 199 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, 200 NULL, agp_i810_attach }, 201 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, 202 NULL, agp_i810_attach }, 203 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, 204 NULL, agp_i810_attach }, 205 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, 206 NULL, agp_i810_attach }, 207 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, 208 NULL, agp_i810_attach }, 209 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, 210 NULL, agp_i810_attach }, 211 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, 212 NULL, agp_i810_attach }, 213 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_HB, 214 NULL, agp_i810_attach }, 215 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_HB, 216 NULL, agp_i810_attach }, 217 #endif 218 219 #if NAGP_INTEL > 0 220 { PCI_VENDOR_INTEL, -1, 221 NULL, agp_intel_attach }, 222 #endif 223 224 #if NAGP_AMD64 > 0 225 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, 226 agp_amd64_match, agp_amd64_attach }, 227 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, 228 agp_amd64_match, agp_amd64_attach }, 229 #endif 230 231 #if NAGP_NVIDIA > 0 232 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_PCHB, 233 NULL, agp_nvidia_attach }, 234 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_PCHB, 235 NULL, agp_nvidia_attach }, 236 #endif 237 238 #if NAGP_AMD64 > 0 239 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, 240 agp_amd64_match, agp_amd64_attach }, 241 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, 242 agp_amd64_match, agp_amd64_attach }, 243 #endif 244 245 #if NAGP_SIS > 0 246 { PCI_VENDOR_SIS, -1, 247 NULL, agp_sis_attach }, 248 #endif 249 250 #if NAGP_AMD64 > 0 251 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, 252 agp_amd64_match, agp_amd64_attach }, 253 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, 254 agp_amd64_match, agp_amd64_attach }, 255 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, 256 agp_amd64_match, agp_amd64_attach }, 257 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, 258 agp_amd64_match, agp_amd64_attach }, 259 #endif 260 261 #if NAGP_VIA > 0 262 { PCI_VENDOR_VIATECH, -1, 263 NULL, agp_via_attach }, 264 #endif 265 266 { 0, 0, 267 NULL, NULL }, 268 }; 269 270 static const struct agp_product * 271 agp_lookup(const struct pci_attach_args *pa) 272 { 273 const struct agp_product *ap; 274 275 /* First find the vendor. */ 276 for (ap = agp_products; ap->ap_attach != NULL; ap++) { 277 if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) 278 break; 279 } 280 281 if (ap->ap_attach == NULL) 282 return (NULL); 283 284 /* Now find the product within the vendor's domain. */ 285 for (; ap->ap_attach != NULL; ap++) { 286 if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { 287 /* Ran out of this vendor's section of the table. */ 288 return (NULL); 289 } 290 if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { 291 /* Exact match. */ 292 break; 293 } 294 if (ap->ap_product == (uint32_t) -1) { 295 /* Wildcard match. */ 296 break; 297 } 298 } 299 300 if (ap->ap_attach == NULL) 301 return (NULL); 302 303 /* Now let the product-specific driver filter the match. */ 304 if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) 305 return (NULL); 306 307 return (ap); 308 } 309 310 static int 311 agpmatch(device_t parent, cfdata_t match, void *aux) 312 { 313 struct agpbus_attach_args *apa = aux; 314 struct pci_attach_args *pa = &apa->apa_pci_args; 315 316 if (agp_lookup(pa) == NULL) 317 return (0); 318 319 return (1); 320 } 321 322 static const u_int agp_max[][2] = { 323 {0, 0}, 324 {32, 4}, 325 {64, 28}, 326 {128, 96}, 327 {256, 204}, 328 {512, 440}, 329 {1024, 942}, 330 {2048, 1920}, 331 {4096, 3932} 332 }; 333 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 334 335 static void 336 agpattach(device_t parent, device_t self, void *aux) 337 { 338 struct agpbus_attach_args *apa = aux; 339 struct pci_attach_args *pa = &apa->apa_pci_args; 340 struct agp_softc *sc = device_private(self); 341 const struct agp_product *ap; 342 int ret; 343 u_int memsize, i; 344 345 ap = agp_lookup(pa); 346 KASSERT(ap != NULL); 347 348 aprint_naive(": AGP controller\n"); 349 350 sc->as_dev = self; 351 sc->as_dmat = pa->pa_dmat; 352 sc->as_pc = pa->pa_pc; 353 sc->as_tag = pa->pa_tag; 354 sc->as_id = pa->pa_id; 355 356 /* 357 * Work out an upper bound for agp memory allocation. This 358 * uses a heuristic table from the Linux driver. 359 */ 360 memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ 361 for (i = 0; i < agp_max_size; i++) { 362 if (memsize <= agp_max[i][0]) 363 break; 364 } 365 if (i == agp_max_size) 366 i = agp_max_size - 1; 367 sc->as_maxmem = agp_max[i][1] << 20U; 368 369 /* 370 * The mutex is used to prevent re-entry to 371 * agp_generic_bind_memory() since that function can sleep. 372 */ 373 mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); 374 375 TAILQ_INIT(&sc->as_memory); 376 377 ret = (*ap->ap_attach)(parent, self, pa); 378 if (ret == 0) 379 aprint_normal(": aperture at 0x%lx, size 0x%lx\n", 380 (unsigned long)sc->as_apaddr, 381 (unsigned long)AGP_GET_APERTURE(sc)); 382 else 383 sc->as_chipc = NULL; 384 385 if (!pmf_device_register(self, NULL, agp_resume)) 386 aprint_error_dev(self, "couldn't establish power handler\n"); 387 } 388 389 CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), 390 agpmatch, agpattach, NULL, NULL); 391 392 int 393 agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 394 { 395 /* 396 * Find the aperture. Don't map it (yet), this would 397 * eat KVA. 398 */ 399 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 400 PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, 401 &sc->as_apflags) != 0) 402 return ENXIO; 403 404 sc->as_apt = pa->pa_memt; 405 406 return 0; 407 } 408 409 struct agp_gatt * 410 agp_alloc_gatt(struct agp_softc *sc) 411 { 412 u_int32_t apsize = AGP_GET_APERTURE(sc); 413 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 414 struct agp_gatt *gatt; 415 void *virtual; 416 int dummyseg; 417 418 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_WAITOK); 419 gatt->ag_entries = entries; 420 421 if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), 422 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 423 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 424 free(gatt, M_AGP); 425 return NULL; 426 } 427 gatt->ag_virtual = (uint32_t *)virtual; 428 429 gatt->ag_size = entries * sizeof(u_int32_t); 430 memset(gatt->ag_virtual, 0, gatt->ag_size); 431 agp_flush_cache(); 432 433 return gatt; 434 } 435 436 void 437 agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) 438 { 439 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 440 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 441 free(gatt, M_AGP); 442 } 443 444 445 int 446 agp_generic_detach(struct agp_softc *sc) 447 { 448 mutex_destroy(&sc->as_mtx); 449 agp_flush_cache(); 450 return 0; 451 } 452 453 static int 454 agpdev_match(const struct pci_attach_args *pa) 455 { 456 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY) 457 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, 458 NULL, NULL)) 459 return 1; 460 461 return 0; 462 } 463 464 int 465 agp_generic_enable(struct agp_softc *sc, u_int32_t mode) 466 { 467 struct pci_attach_args pa; 468 pcireg_t tstatus, mstatus; 469 int capoff; 470 471 if (pci_find_device(&pa, agpdev_match) == 0 || 472 pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, 473 &capoff, NULL) == 0) { 474 aprint_error_dev(sc->as_dev, "can't find display\n"); 475 return ENXIO; 476 } 477 478 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 479 sc->as_capoff + PCI_AGP_STATUS); 480 mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, 481 capoff + PCI_AGP_STATUS); 482 483 if (AGP_MODE_GET_MODE_3(mode) && 484 AGP_MODE_GET_MODE_3(tstatus) && 485 AGP_MODE_GET_MODE_3(mstatus)) 486 return agp_generic_enable_v3(sc, &pa, capoff, mode); 487 else 488 return agp_generic_enable_v2(sc, &pa, capoff, mode); 489 } 490 491 static int 492 agp_generic_enable_v2(struct agp_softc *sc, const struct pci_attach_args *pa, 493 int capoff, u_int32_t mode) 494 { 495 pcireg_t tstatus, mstatus; 496 pcireg_t command; 497 int rq, sba, fw, rate; 498 499 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 500 sc->as_capoff + PCI_AGP_STATUS); 501 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 502 capoff + PCI_AGP_STATUS); 503 504 /* Set RQ to the min of mode, tstatus and mstatus */ 505 rq = AGP_MODE_GET_RQ(mode); 506 if (AGP_MODE_GET_RQ(tstatus) < rq) 507 rq = AGP_MODE_GET_RQ(tstatus); 508 if (AGP_MODE_GET_RQ(mstatus) < rq) 509 rq = AGP_MODE_GET_RQ(mstatus); 510 511 /* Set SBA if all three can deal with SBA */ 512 sba = (AGP_MODE_GET_SBA(tstatus) 513 & AGP_MODE_GET_SBA(mstatus) 514 & AGP_MODE_GET_SBA(mode)); 515 516 /* Similar for FW */ 517 fw = (AGP_MODE_GET_FW(tstatus) 518 & AGP_MODE_GET_FW(mstatus) 519 & AGP_MODE_GET_FW(mode)); 520 521 /* Figure out the max rate */ 522 rate = (AGP_MODE_GET_RATE(tstatus) 523 & AGP_MODE_GET_RATE(mstatus) 524 & AGP_MODE_GET_RATE(mode)); 525 if (rate & AGP_MODE_V2_RATE_4x) 526 rate = AGP_MODE_V2_RATE_4x; 527 else if (rate & AGP_MODE_V2_RATE_2x) 528 rate = AGP_MODE_V2_RATE_2x; 529 else 530 rate = AGP_MODE_V2_RATE_1x; 531 532 /* Construct the new mode word and tell the hardware */ 533 command = AGP_MODE_SET_RQ(0, rq); 534 command = AGP_MODE_SET_SBA(command, sba); 535 command = AGP_MODE_SET_FW(command, fw); 536 command = AGP_MODE_SET_RATE(command, rate); 537 command = AGP_MODE_SET_AGP(command, 1); 538 pci_conf_write(sc->as_pc, sc->as_tag, 539 sc->as_capoff + PCI_AGP_COMMAND, command); 540 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 541 command); 542 543 return 0; 544 } 545 546 static int 547 agp_generic_enable_v3(struct agp_softc *sc, const struct pci_attach_args *pa, 548 int capoff, u_int32_t mode) 549 { 550 pcireg_t tstatus, mstatus; 551 pcireg_t command; 552 int rq, sba, fw, rate, arqsz, cal; 553 554 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 555 sc->as_capoff + PCI_AGP_STATUS); 556 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 557 capoff + PCI_AGP_STATUS); 558 559 /* Set RQ to the min of mode, tstatus and mstatus */ 560 rq = AGP_MODE_GET_RQ(mode); 561 if (AGP_MODE_GET_RQ(tstatus) < rq) 562 rq = AGP_MODE_GET_RQ(tstatus); 563 if (AGP_MODE_GET_RQ(mstatus) < rq) 564 rq = AGP_MODE_GET_RQ(mstatus); 565 566 /* 567 * ARQSZ - Set the value to the maximum one. 568 * Don't allow the mode register to override values. 569 */ 570 arqsz = AGP_MODE_GET_ARQSZ(mode); 571 if (AGP_MODE_GET_ARQSZ(tstatus) > arqsz) 572 arqsz = AGP_MODE_GET_ARQSZ(tstatus); 573 if (AGP_MODE_GET_ARQSZ(mstatus) > arqsz) 574 arqsz = AGP_MODE_GET_ARQSZ(mstatus); 575 576 /* Calibration cycle - don't allow override by mode register */ 577 cal = AGP_MODE_GET_CAL(tstatus); 578 if (AGP_MODE_GET_CAL(mstatus) < cal) 579 cal = AGP_MODE_GET_CAL(mstatus); 580 581 /* SBA must be supported for AGP v3. */ 582 sba = 1; 583 584 /* Set FW if all three support it. */ 585 fw = (AGP_MODE_GET_FW(tstatus) 586 & AGP_MODE_GET_FW(mstatus) 587 & AGP_MODE_GET_FW(mode)); 588 589 /* Figure out the max rate */ 590 rate = (AGP_MODE_GET_RATE(tstatus) 591 & AGP_MODE_GET_RATE(mstatus) 592 & AGP_MODE_GET_RATE(mode)); 593 if (rate & AGP_MODE_V3_RATE_8x) 594 rate = AGP_MODE_V3_RATE_8x; 595 else 596 rate = AGP_MODE_V3_RATE_4x; 597 598 /* Construct the new mode word and tell the hardware */ 599 command = AGP_MODE_SET_RQ(0, rq); 600 command = AGP_MODE_SET_ARQSZ(command, arqsz); 601 command = AGP_MODE_SET_CAL(command, cal); 602 command = AGP_MODE_SET_SBA(command, sba); 603 command = AGP_MODE_SET_FW(command, fw); 604 command = AGP_MODE_SET_RATE(command, rate); 605 command = AGP_MODE_SET_AGP(command, 1); 606 pci_conf_write(sc->as_pc, sc->as_tag, 607 sc->as_capoff + PCI_AGP_COMMAND, command); 608 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 609 command); 610 611 return 0; 612 } 613 614 struct agp_memory * 615 agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 616 { 617 struct agp_memory *mem; 618 619 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 620 return 0; 621 622 if (sc->as_allocated + size > sc->as_maxmem) 623 return 0; 624 625 if (type != 0) { 626 printf("agp_generic_alloc_memory: unsupported type %d\n", 627 type); 628 return 0; 629 } 630 631 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 632 if (mem == NULL) 633 return NULL; 634 635 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 636 size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { 637 free(mem, M_AGP); 638 return NULL; 639 } 640 641 mem->am_id = sc->as_nextid++; 642 mem->am_size = size; 643 mem->am_type = 0; 644 mem->am_physical = 0; 645 mem->am_offset = 0; 646 mem->am_is_bound = 0; 647 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 648 sc->as_allocated += size; 649 650 return mem; 651 } 652 653 int 654 agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) 655 { 656 if (mem->am_is_bound) 657 return EBUSY; 658 659 sc->as_allocated -= mem->am_size; 660 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 661 bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); 662 free(mem, M_AGP); 663 return 0; 664 } 665 666 int 667 agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 668 off_t offset) 669 { 670 671 return agp_generic_bind_memory_bounded(sc, mem, offset, 672 0, AGP_GET_APERTURE(sc)); 673 } 674 675 int 676 agp_generic_bind_memory_bounded(struct agp_softc *sc, struct agp_memory *mem, 677 off_t offset, off_t start, off_t end) 678 { 679 off_t i, k; 680 bus_size_t done, j; 681 int error; 682 bus_dma_segment_t *segs, *seg; 683 bus_addr_t pa; 684 int contigpages, nseg; 685 686 mutex_enter(&sc->as_mtx); 687 688 if (mem->am_is_bound) { 689 aprint_error_dev(sc->as_dev, "memory already bound\n"); 690 mutex_exit(&sc->as_mtx); 691 return EINVAL; 692 } 693 694 if (offset < start 695 || (offset & (AGP_PAGE_SIZE - 1)) != 0 696 || offset > end 697 || mem->am_size > (end - offset)) { 698 aprint_error_dev(sc->as_dev, 699 "binding memory at bad offset %#lx\n", 700 (unsigned long) offset); 701 mutex_exit(&sc->as_mtx); 702 return EINVAL; 703 } 704 705 /* 706 * XXXfvdl 707 * The memory here needs to be directly accessible from the 708 * AGP video card, so it should be allocated using bus_dma. 709 * However, it need not be contiguous, since individual pages 710 * are translated using the GATT. 711 * 712 * Using a large chunk of contiguous memory may get in the way 713 * of other subsystems that may need one, so we try to be friendly 714 * and ask for allocation in chunks of a minimum of 8 pages 715 * of contiguous memory on average, falling back to 4, 2 and 1 716 * if really needed. Larger chunks are preferred, since allocating 717 * a bus_dma_segment per page would be overkill. 718 */ 719 720 for (contigpages = 8; contigpages > 0; contigpages >>= 1) { 721 nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; 722 segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); 723 if (segs == NULL) { 724 mutex_exit(&sc->as_mtx); 725 return ENOMEM; 726 } 727 if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, 728 segs, nseg, &mem->am_nseg, 729 contigpages > 1 ? 730 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { 731 free(segs, M_AGP); 732 continue; 733 } 734 if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, 735 mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { 736 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 737 free(segs, M_AGP); 738 continue; 739 } 740 if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, 741 mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { 742 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 743 mem->am_size); 744 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 745 free(segs, M_AGP); 746 continue; 747 } 748 mem->am_dmaseg = segs; 749 break; 750 } 751 752 if (contigpages == 0) { 753 mutex_exit(&sc->as_mtx); 754 return ENOMEM; 755 } 756 757 758 /* 759 * Bind the individual pages and flush the chipset's 760 * TLB. 761 */ 762 done = 0; 763 for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { 764 seg = &mem->am_dmamap->dm_segs[i]; 765 /* 766 * Install entries in the GATT, making sure that if 767 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 768 * aligned to PAGE_SIZE, we don't modify too many GATT 769 * entries. 770 */ 771 for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; 772 j += AGP_PAGE_SIZE) { 773 pa = seg->ds_addr + j; 774 AGP_DPF(("binding offset %#lx to pa %#lx\n", 775 (unsigned long)(offset + done + j), 776 (unsigned long)pa)); 777 error = AGP_BIND_PAGE(sc, offset + done + j, pa); 778 if (error) { 779 /* 780 * Bail out. Reverse all the mappings 781 * and unwire the pages. 782 */ 783 for (k = 0; k < done + j; k += AGP_PAGE_SIZE) 784 AGP_UNBIND_PAGE(sc, offset + k); 785 786 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 787 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 788 mem->am_size); 789 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, 790 mem->am_nseg); 791 free(mem->am_dmaseg, M_AGP); 792 mutex_exit(&sc->as_mtx); 793 return error; 794 } 795 } 796 done += seg->ds_len; 797 } 798 799 /* 800 * Flush the CPU cache since we are providing a new mapping 801 * for these pages. 802 */ 803 agp_flush_cache(); 804 805 /* 806 * Make sure the chipset gets the new mappings. 807 */ 808 AGP_FLUSH_TLB(sc); 809 810 mem->am_offset = offset; 811 mem->am_is_bound = 1; 812 813 mutex_exit(&sc->as_mtx); 814 815 return 0; 816 } 817 818 int 819 agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 820 { 821 int i; 822 823 mutex_enter(&sc->as_mtx); 824 825 if (!mem->am_is_bound) { 826 aprint_error_dev(sc->as_dev, "memory is not bound\n"); 827 mutex_exit(&sc->as_mtx); 828 return EINVAL; 829 } 830 831 832 /* 833 * Unbind the individual pages and flush the chipset's 834 * TLB. Unwire the pages so they can be swapped. 835 */ 836 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 837 AGP_UNBIND_PAGE(sc, mem->am_offset + i); 838 839 agp_flush_cache(); 840 AGP_FLUSH_TLB(sc); 841 842 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 843 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); 844 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); 845 846 free(mem->am_dmaseg, M_AGP); 847 848 mem->am_offset = 0; 849 mem->am_is_bound = 0; 850 851 mutex_exit(&sc->as_mtx); 852 853 return 0; 854 } 855 856 /* Helper functions for implementing user/kernel api */ 857 858 static int 859 agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) 860 { 861 if (sc->as_state != AGP_ACQUIRE_FREE) 862 return EBUSY; 863 sc->as_state = state; 864 865 return 0; 866 } 867 868 static int 869 agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) 870 { 871 872 if (sc->as_state == AGP_ACQUIRE_FREE) 873 return 0; 874 875 if (sc->as_state != state) 876 return EBUSY; 877 878 sc->as_state = AGP_ACQUIRE_FREE; 879 return 0; 880 } 881 882 static struct agp_memory * 883 agp_find_memory(struct agp_softc *sc, int id) 884 { 885 struct agp_memory *mem; 886 887 AGP_DPF(("searching for memory block %d\n", id)); 888 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 889 AGP_DPF(("considering memory block %d\n", mem->am_id)); 890 if (mem->am_id == id) 891 return mem; 892 } 893 return 0; 894 } 895 896 /* Implementation of the userland ioctl api */ 897 898 static int 899 agp_info_user(struct agp_softc *sc, agp_info *info) 900 { 901 memset(info, 0, sizeof *info); 902 info->bridge_id = sc->as_id; 903 if (sc->as_capoff != 0) 904 info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, 905 sc->as_capoff + PCI_AGP_STATUS); 906 else 907 info->agp_mode = 0; /* i810 doesn't have real AGP */ 908 info->aper_base = sc->as_apaddr; 909 info->aper_size = AGP_GET_APERTURE(sc) >> 20; 910 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 911 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 912 913 return 0; 914 } 915 916 static int 917 agp_setup_user(struct agp_softc *sc, agp_setup *setup) 918 { 919 return AGP_ENABLE(sc, setup->agp_mode); 920 } 921 922 static int 923 agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) 924 { 925 struct agp_memory *mem; 926 927 mem = AGP_ALLOC_MEMORY(sc, 928 alloc->type, 929 alloc->pg_count << AGP_PAGE_SHIFT); 930 if (mem) { 931 alloc->key = mem->am_id; 932 alloc->physical = mem->am_physical; 933 return 0; 934 } else { 935 return ENOMEM; 936 } 937 } 938 939 static int 940 agp_deallocate_user(struct agp_softc *sc, int id) 941 { 942 struct agp_memory *mem = agp_find_memory(sc, id); 943 944 if (mem) { 945 AGP_FREE_MEMORY(sc, mem); 946 return 0; 947 } else { 948 return ENOENT; 949 } 950 } 951 952 static int 953 agp_bind_user(struct agp_softc *sc, agp_bind *bind) 954 { 955 struct agp_memory *mem = agp_find_memory(sc, bind->key); 956 957 if (!mem) 958 return ENOENT; 959 960 return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); 961 } 962 963 static int 964 agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) 965 { 966 struct agp_memory *mem = agp_find_memory(sc, unbind->key); 967 968 if (!mem) 969 return ENOENT; 970 971 return AGP_UNBIND_MEMORY(sc, mem); 972 } 973 974 static int 975 agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) 976 { 977 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 978 979 if (sc == NULL) 980 return ENXIO; 981 982 if (sc->as_chipc == NULL) 983 return ENXIO; 984 985 if (!sc->as_isopen) 986 sc->as_isopen = 1; 987 else 988 return EBUSY; 989 990 return 0; 991 } 992 993 static int 994 agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) 995 { 996 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 997 struct agp_memory *mem; 998 999 if (sc == NULL) 1000 return ENODEV; 1001 1002 /* 1003 * Clear the GATT and force release on last close 1004 */ 1005 if (sc->as_state == AGP_ACQUIRE_USER) { 1006 while ((mem = TAILQ_FIRST(&sc->as_memory))) { 1007 if (mem->am_is_bound) { 1008 printf("agpclose: mem %d is bound\n", 1009 mem->am_id); 1010 AGP_UNBIND_MEMORY(sc, mem); 1011 } 1012 /* 1013 * XXX it is not documented, but if the protocol allows 1014 * allocate->acquire->bind, it would be possible that 1015 * memory ranges are allocated by the kernel here, 1016 * which we shouldn't free. We'd have to keep track of 1017 * the memory range's owner. 1018 * The kernel API is unsed yet, so we get away with 1019 * freeing all. 1020 */ 1021 AGP_FREE_MEMORY(sc, mem); 1022 } 1023 agp_release_helper(sc, AGP_ACQUIRE_USER); 1024 } 1025 sc->as_isopen = 0; 1026 1027 return 0; 1028 } 1029 1030 static int 1031 agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) 1032 { 1033 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1034 1035 if (sc == NULL) 1036 return ENODEV; 1037 1038 if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) 1039 return EPERM; 1040 1041 switch (cmd) { 1042 case AGPIOC_INFO: 1043 return agp_info_user(sc, (agp_info *) data); 1044 1045 case AGPIOC_ACQUIRE: 1046 return agp_acquire_helper(sc, AGP_ACQUIRE_USER); 1047 1048 case AGPIOC_RELEASE: 1049 return agp_release_helper(sc, AGP_ACQUIRE_USER); 1050 1051 case AGPIOC_SETUP: 1052 return agp_setup_user(sc, (agp_setup *)data); 1053 1054 #ifdef __x86_64__ 1055 { 1056 /* 1057 * Handle paddr_t change from 32 bit for non PAE kernels 1058 * to 64 bit. 1059 */ 1060 #define AGPIOC_OALLOCATE _IOWR(AGPIOC_BASE, 6, agp_oallocate) 1061 1062 typedef struct _agp_oallocate { 1063 int key; /* tag of allocation */ 1064 size_t pg_count; /* number of pages */ 1065 uint32_t type; /* 0 == normal, other devspec */ 1066 u_long physical; /* device specific (some devices 1067 * need a phys address of the 1068 * actual page behind the gatt 1069 * table) */ 1070 } agp_oallocate; 1071 1072 case AGPIOC_OALLOCATE: { 1073 int ret; 1074 agp_allocate aga; 1075 agp_oallocate *oaga = data; 1076 1077 aga.type = oaga->type; 1078 aga.pg_count = oaga->pg_count; 1079 1080 if ((ret = agp_allocate_user(sc, &aga)) == 0) { 1081 oaga->key = aga.key; 1082 oaga->physical = (u_long)aga.physical; 1083 } 1084 1085 return ret; 1086 } 1087 } 1088 #endif 1089 case AGPIOC_ALLOCATE: 1090 return agp_allocate_user(sc, (agp_allocate *)data); 1091 1092 case AGPIOC_DEALLOCATE: 1093 return agp_deallocate_user(sc, *(int *) data); 1094 1095 case AGPIOC_BIND: 1096 return agp_bind_user(sc, (agp_bind *)data); 1097 1098 case AGPIOC_UNBIND: 1099 return agp_unbind_user(sc, (agp_unbind *)data); 1100 1101 } 1102 1103 return EINVAL; 1104 } 1105 1106 static paddr_t 1107 agpmmap(dev_t dev, off_t offset, int prot) 1108 { 1109 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1110 1111 if (sc == NULL) 1112 return ENODEV; 1113 1114 if (offset > AGP_GET_APERTURE(sc)) 1115 return -1; 1116 1117 return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, 1118 BUS_SPACE_MAP_LINEAR)); 1119 } 1120 1121 const struct cdevsw agp_cdevsw = { 1122 .d_open = agpopen, 1123 .d_close = agpclose, 1124 .d_read = noread, 1125 .d_write = nowrite, 1126 .d_ioctl = agpioctl, 1127 .d_stop = nostop, 1128 .d_tty = notty, 1129 .d_poll = nopoll, 1130 .d_mmap = agpmmap, 1131 .d_kqfilter = nokqfilter, 1132 .d_discard = nodiscard, 1133 .d_flag = D_OTHER 1134 }; 1135 1136 /* Implementation of the kernel api */ 1137 1138 void * 1139 agp_find_device(int unit) 1140 { 1141 return device_lookup_private(&agp_cd, unit); 1142 } 1143 1144 enum agp_acquire_state 1145 agp_state(void *devcookie) 1146 { 1147 struct agp_softc *sc = devcookie; 1148 1149 return sc->as_state; 1150 } 1151 1152 void 1153 agp_get_info(void *devcookie, struct agp_info *info) 1154 { 1155 struct agp_softc *sc = devcookie; 1156 1157 info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, 1158 sc->as_capoff + PCI_AGP_STATUS); 1159 info->ai_aperture_base = sc->as_apaddr; 1160 info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ 1161 info->ai_memory_allowed = sc->as_maxmem; 1162 info->ai_memory_used = sc->as_allocated; 1163 info->ai_devid = sc->as_id; 1164 } 1165 1166 int 1167 agp_acquire(void *dev) 1168 { 1169 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 1170 } 1171 1172 int 1173 agp_release(void *dev) 1174 { 1175 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 1176 } 1177 1178 int 1179 agp_enable(void *dev, u_int32_t mode) 1180 { 1181 struct agp_softc *sc = dev; 1182 1183 return AGP_ENABLE(sc, mode); 1184 } 1185 1186 void * 1187 agp_alloc_memory(void *dev, int type, vsize_t bytes) 1188 { 1189 struct agp_softc *sc = dev; 1190 1191 return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); 1192 } 1193 1194 void 1195 agp_free_memory(void *dev, void *handle) 1196 { 1197 struct agp_softc *sc = dev; 1198 struct agp_memory *mem = handle; 1199 1200 AGP_FREE_MEMORY(sc, mem); 1201 } 1202 1203 int 1204 agp_bind_memory(void *dev, void *handle, off_t offset) 1205 { 1206 struct agp_softc *sc = dev; 1207 struct agp_memory *mem = handle; 1208 1209 return AGP_BIND_MEMORY(sc, mem, offset); 1210 } 1211 1212 int 1213 agp_unbind_memory(void *dev, void *handle) 1214 { 1215 struct agp_softc *sc = dev; 1216 struct agp_memory *mem = handle; 1217 1218 return AGP_UNBIND_MEMORY(sc, mem); 1219 } 1220 1221 void 1222 agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) 1223 { 1224 struct agp_memory *mem = handle; 1225 1226 mi->ami_size = mem->am_size; 1227 mi->ami_physical = mem->am_physical; 1228 mi->ami_offset = mem->am_offset; 1229 mi->ami_is_bound = mem->am_is_bound; 1230 } 1231 1232 int 1233 agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, 1234 bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, 1235 bus_dma_segment_t *seg, int nseg, int *rseg) 1236 1237 { 1238 int error, level = 0; 1239 1240 if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, 1241 seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) 1242 goto out; 1243 level++; 1244 1245 if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, 1246 BUS_DMA_NOWAIT | flags)) != 0) 1247 goto out; 1248 level++; 1249 1250 if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, 1251 BUS_DMA_NOWAIT, mapp)) != 0) 1252 goto out; 1253 level++; 1254 1255 if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, 1256 BUS_DMA_NOWAIT)) != 0) 1257 goto out; 1258 1259 *baddr = (*mapp)->dm_segs[0].ds_addr; 1260 1261 return 0; 1262 out: 1263 switch (level) { 1264 case 3: 1265 bus_dmamap_destroy(tag, *mapp); 1266 /* FALLTHROUGH */ 1267 case 2: 1268 bus_dmamem_unmap(tag, *vaddr, size); 1269 /* FALLTHROUGH */ 1270 case 1: 1271 bus_dmamem_free(tag, seg, *rseg); 1272 break; 1273 default: 1274 break; 1275 } 1276 1277 return error; 1278 } 1279 1280 void 1281 agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, 1282 void *vaddr, bus_dma_segment_t *seg, int nseg) 1283 { 1284 bus_dmamap_unload(tag, map); 1285 bus_dmamap_destroy(tag, map); 1286 bus_dmamem_unmap(tag, vaddr, size); 1287 bus_dmamem_free(tag, seg, nseg); 1288 } 1289 1290 static bool 1291 agp_resume(device_t dv, const pmf_qual_t *qual) 1292 { 1293 agp_flush_cache(); 1294 1295 return true; 1296 } 1297
Indexes created Tue Sep 29 00:26:59 UTC 2026