1 /* $NetBSD: agp.c,v 1.88 2022/05/22 11:27:35 andvar Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ 29 */ 30 31 /* 32 * Copyright (c) 2001 Wasabi Systems, Inc. 33 * All rights reserved. 34 * 35 * Written by Frank van der Linden for Wasabi Systems, Inc. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed for the NetBSD Project by 48 * Wasabi Systems, Inc. 49 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 50 * or promote products derived from this software without specific prior 51 * written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.88 2022/05/22 11:27:35 andvar Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/malloc.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <sys/conf.h> 76 #include <sys/ioctl.h> 77 #include <sys/fcntl.h> 78 #include <sys/agpio.h> 79 #include <sys/proc.h> 80 #include <sys/mutex.h> 81 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/agpvar.h> 85 #include <dev/pci/agpreg.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <sys/bus.h> 89 90 MALLOC_DEFINE(M_AGP, "AGP", "AGP memory"); 91 92 /* Helper functions for implementing chipset mini drivers. */ 93 /* XXXfvdl get rid of this one. */ 94 95 extern struct cfdriver agp_cd; 96 97 static int agp_info_user(struct agp_softc *, agp_info *); 98 static int agp_setup_user(struct agp_softc *, agp_setup *); 99 static int agp_allocate_user(struct agp_softc *, agp_allocate *); 100 static int agp_deallocate_user(struct agp_softc *, int); 101 static int agp_bind_user(struct agp_softc *, agp_bind *); 102 static int agp_unbind_user(struct agp_softc *, agp_unbind *); 103 static int agp_generic_enable_v2(struct agp_softc *, 104 const struct pci_attach_args *, int, u_int32_t); 105 static int agp_generic_enable_v3(struct agp_softc *, 106 const struct pci_attach_args *, int, u_int32_t); 107 static int agpdev_match(const struct pci_attach_args *); 108 static bool agp_resume(device_t, const pmf_qual_t *); 109 110 #include "agp_ali.h" 111 #include "agp_amd.h" 112 #include "agp_i810.h" 113 #include "agp_intel.h" 114 #include "agp_sis.h" 115 #include "agp_via.h" 116 #include "agp_amd64.h" 117 118 const struct agp_product { 119 uint32_t ap_vendor; 120 uint32_t ap_product; 121 int (*ap_match)(const struct pci_attach_args *); 122 int (*ap_attach)(device_t, device_t, void *); 123 } agp_products[] = { 124 #if NAGP_AMD64 > 0 125 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, 126 agp_amd64_match, agp_amd64_attach }, 127 #endif 128 129 #if NAGP_ALI > 0 130 { PCI_VENDOR_ALI, -1, 131 NULL, agp_ali_attach }, 132 #endif 133 134 #if NAGP_AMD64 > 0 135 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, 136 agp_amd64_match, agp_amd64_attach }, 137 #endif 138 139 #if NAGP_AMD > 0 140 { PCI_VENDOR_AMD, -1, 141 agp_amd_match, agp_amd_attach }, 142 #endif 143 144 #if NAGP_I810 > 0 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, 146 NULL, agp_i810_attach }, 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, 148 NULL, agp_i810_attach }, 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, 150 NULL, agp_i810_attach }, 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, 152 NULL, agp_i810_attach }, 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, 154 NULL, agp_i810_attach }, 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, 156 NULL, agp_i810_attach }, 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, 158 NULL, agp_i810_attach }, 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, 160 NULL, agp_i810_attach }, 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, 162 NULL, agp_i810_attach }, 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, 164 NULL, agp_i810_attach }, 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, 166 NULL, agp_i810_attach }, 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, 168 NULL, agp_i810_attach }, 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, 170 NULL, agp_i810_attach }, 171 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, 172 NULL, agp_i810_attach }, 173 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, 174 NULL, agp_i810_attach }, 175 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, 176 NULL, agp_i810_attach }, 177 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, 178 NULL, agp_i810_attach }, 179 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, 180 NULL, agp_i810_attach }, 181 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, 182 NULL, agp_i810_attach }, 183 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, 184 NULL, agp_i810_attach }, 185 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, 186 NULL, agp_i810_attach }, 187 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, 188 NULL, agp_i810_attach }, 189 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, 190 NULL, agp_i810_attach }, 191 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, 192 NULL, agp_i810_attach }, 193 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, 194 NULL, agp_i810_attach }, 195 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, 196 NULL, agp_i810_attach }, 197 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, 198 NULL, agp_i810_attach }, 199 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, 200 NULL, agp_i810_attach }, 201 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, 202 NULL, agp_i810_attach }, 203 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, 204 NULL, agp_i810_attach }, 205 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, 206 NULL, agp_i810_attach }, 207 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, 208 NULL, agp_i810_attach }, 209 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, 210 NULL, agp_i810_attach }, 211 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, 212 NULL, agp_i810_attach }, 213 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_HB, 214 NULL, agp_i810_attach }, 215 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_HB, 216 NULL, agp_i810_attach }, 217 #endif 218 219 #if NAGP_INTEL > 0 220 { PCI_VENDOR_INTEL, -1, 221 NULL, agp_intel_attach }, 222 #endif 223 224 #if NAGP_AMD64 > 0 225 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, 226 agp_amd64_match, agp_amd64_attach }, 227 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, 228 agp_amd64_match, agp_amd64_attach }, 229 #endif 230 231 #if NAGP_AMD64 > 0 232 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, 233 agp_amd64_match, agp_amd64_attach }, 234 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, 235 agp_amd64_match, agp_amd64_attach }, 236 #endif 237 238 #if NAGP_SIS > 0 239 { PCI_VENDOR_SIS, -1, 240 NULL, agp_sis_attach }, 241 #endif 242 243 #if NAGP_AMD64 > 0 244 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, 245 agp_amd64_match, agp_amd64_attach }, 246 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, 247 agp_amd64_match, agp_amd64_attach }, 248 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, 249 agp_amd64_match, agp_amd64_attach }, 250 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, 251 agp_amd64_match, agp_amd64_attach }, 252 #endif 253 254 #if NAGP_VIA > 0 255 { PCI_VENDOR_VIATECH, -1, 256 NULL, agp_via_attach }, 257 #endif 258 259 { 0, 0, 260 NULL, NULL }, 261 }; 262 263 static const struct agp_product * 264 agp_lookup(const struct pci_attach_args *pa) 265 { 266 const struct agp_product *ap; 267 268 /* First find the vendor. */ 269 for (ap = agp_products; ap->ap_attach != NULL; ap++) { 270 if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) 271 break; 272 } 273 274 if (ap->ap_attach == NULL) 275 return (NULL); 276 277 /* Now find the product within the vendor's domain. */ 278 for (; ap->ap_attach != NULL; ap++) { 279 if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { 280 /* Ran out of this vendor's section of the table. */ 281 return (NULL); 282 } 283 if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { 284 /* Exact match. */ 285 break; 286 } 287 if (ap->ap_product == (uint32_t) -1) { 288 /* Wildcard match. */ 289 break; 290 } 291 } 292 293 if (ap->ap_attach == NULL) 294 return (NULL); 295 296 /* Now let the product-specific driver filter the match. */ 297 if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) 298 return (NULL); 299 300 return (ap); 301 } 302 303 static int 304 agpmatch(device_t parent, cfdata_t match, void *aux) 305 { 306 struct agpbus_attach_args *apa = aux; 307 struct pci_attach_args *pa = &apa->apa_pci_args; 308 309 if (agp_lookup(pa) == NULL) 310 return (0); 311 312 return (1); 313 } 314 315 static const u_int agp_max[][2] = { 316 {0, 0}, 317 {32, 4}, 318 {64, 28}, 319 {128, 96}, 320 {256, 204}, 321 {512, 440}, 322 {1024, 942}, 323 {2048, 1920}, 324 {4096, 3932} 325 }; 326 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 327 328 static void 329 agpattach(device_t parent, device_t self, void *aux) 330 { 331 struct agpbus_attach_args *apa = aux; 332 struct pci_attach_args *pa = &apa->apa_pci_args; 333 struct agp_softc *sc = device_private(self); 334 const struct agp_product *ap; 335 int ret; 336 u_int memsize, i; 337 338 ap = agp_lookup(pa); 339 KASSERT(ap != NULL); 340 341 aprint_naive(": AGP controller\n"); 342 343 sc->as_dev = self; 344 sc->as_dmat = pa->pa_dmat; 345 sc->as_pc = pa->pa_pc; 346 sc->as_tag = pa->pa_tag; 347 sc->as_id = pa->pa_id; 348 349 /* 350 * Work out an upper bound for agp memory allocation. This 351 * uses a heuristic table from the Linux driver. 352 */ 353 memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ 354 for (i = 0; i < agp_max_size; i++) { 355 if (memsize <= agp_max[i][0]) 356 break; 357 } 358 if (i == agp_max_size) 359 i = agp_max_size - 1; 360 sc->as_maxmem = agp_max[i][1] << 20U; 361 362 /* 363 * The mutex is used to prevent re-entry to 364 * agp_generic_bind_memory() since that function can sleep. 365 */ 366 mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); 367 368 TAILQ_INIT(&sc->as_memory); 369 370 ret = (*ap->ap_attach)(parent, self, pa); 371 if (ret == 0) 372 aprint_normal(": aperture at 0x%lx, size 0x%lx\n", 373 (unsigned long)sc->as_apaddr, 374 (unsigned long)AGP_GET_APERTURE(sc)); 375 else 376 sc->as_chipc = NULL; 377 378 if (!pmf_device_register(self, NULL, agp_resume)) 379 aprint_error_dev(self, "couldn't establish power handler\n"); 380 } 381 382 CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), 383 agpmatch, agpattach, NULL, NULL); 384 385 int 386 agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 387 { 388 /* 389 * Find the aperture. Don't map it (yet), this would 390 * eat KVA. 391 */ 392 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 393 PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, 394 &sc->as_apflags) != 0) 395 return ENXIO; 396 397 sc->as_apt = pa->pa_memt; 398 399 return 0; 400 } 401 402 struct agp_gatt * 403 agp_alloc_gatt(struct agp_softc *sc) 404 { 405 u_int32_t apsize = AGP_GET_APERTURE(sc); 406 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 407 struct agp_gatt *gatt; 408 void *virtual; 409 int dummyseg; 410 411 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_WAITOK); 412 gatt->ag_entries = entries; 413 414 if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), 415 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 416 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 417 free(gatt, M_AGP); 418 return NULL; 419 } 420 gatt->ag_virtual = (uint32_t *)virtual; 421 422 gatt->ag_size = entries * sizeof(u_int32_t); 423 memset(gatt->ag_virtual, 0, gatt->ag_size); 424 agp_flush_cache(); 425 426 return gatt; 427 } 428 429 void 430 agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) 431 { 432 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 433 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 434 free(gatt, M_AGP); 435 } 436 437 438 int 439 agp_generic_detach(struct agp_softc *sc) 440 { 441 mutex_destroy(&sc->as_mtx); 442 agp_flush_cache(); 443 return 0; 444 } 445 446 static int 447 agpdev_match(const struct pci_attach_args *pa) 448 { 449 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 450 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 451 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, 452 NULL, NULL)) 453 return 1; 454 455 return 0; 456 } 457 458 int 459 agp_generic_enable(struct agp_softc *sc, u_int32_t mode) 460 { 461 struct pci_attach_args pa; 462 pcireg_t tstatus, mstatus; 463 int capoff; 464 465 if (pci_find_device(&pa, agpdev_match) == 0 || 466 pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, 467 &capoff, NULL) == 0) { 468 aprint_error_dev(sc->as_dev, "can't find display\n"); 469 return ENXIO; 470 } 471 472 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 473 sc->as_capoff + PCI_AGP_STATUS); 474 mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, 475 capoff + PCI_AGP_STATUS); 476 477 if (AGP_MODE_GET_MODE_3(mode) && 478 AGP_MODE_GET_MODE_3(tstatus) && 479 AGP_MODE_GET_MODE_3(mstatus)) 480 return agp_generic_enable_v3(sc, &pa, capoff, mode); 481 else 482 return agp_generic_enable_v2(sc, &pa, capoff, mode); 483 } 484 485 static int 486 agp_generic_enable_v2(struct agp_softc *sc, const struct pci_attach_args *pa, 487 int capoff, u_int32_t mode) 488 { 489 pcireg_t tstatus, mstatus; 490 pcireg_t command; 491 int rq, sba, fw, rate; 492 493 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 494 sc->as_capoff + PCI_AGP_STATUS); 495 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 496 capoff + PCI_AGP_STATUS); 497 498 /* Set RQ to the min of mode, tstatus and mstatus */ 499 rq = AGP_MODE_GET_RQ(mode); 500 if (AGP_MODE_GET_RQ(tstatus) < rq) 501 rq = AGP_MODE_GET_RQ(tstatus); 502 if (AGP_MODE_GET_RQ(mstatus) < rq) 503 rq = AGP_MODE_GET_RQ(mstatus); 504 505 /* Set SBA if all three can deal with SBA */ 506 sba = (AGP_MODE_GET_SBA(tstatus) 507 & AGP_MODE_GET_SBA(mstatus) 508 & AGP_MODE_GET_SBA(mode)); 509 510 /* Similar for FW */ 511 fw = (AGP_MODE_GET_FW(tstatus) 512 & AGP_MODE_GET_FW(mstatus) 513 & AGP_MODE_GET_FW(mode)); 514 515 /* Figure out the max rate */ 516 rate = (AGP_MODE_GET_RATE(tstatus) 517 & AGP_MODE_GET_RATE(mstatus) 518 & AGP_MODE_GET_RATE(mode)); 519 if (rate & AGP_MODE_V2_RATE_4x) 520 rate = AGP_MODE_V2_RATE_4x; 521 else if (rate & AGP_MODE_V2_RATE_2x) 522 rate = AGP_MODE_V2_RATE_2x; 523 else 524 rate = AGP_MODE_V2_RATE_1x; 525 526 /* Construct the new mode word and tell the hardware */ 527 command = AGP_MODE_SET_RQ(0, rq); 528 command = AGP_MODE_SET_SBA(command, sba); 529 command = AGP_MODE_SET_FW(command, fw); 530 command = AGP_MODE_SET_RATE(command, rate); 531 command = AGP_MODE_SET_AGP(command, 1); 532 pci_conf_write(sc->as_pc, sc->as_tag, 533 sc->as_capoff + PCI_AGP_COMMAND, command); 534 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 535 command); 536 537 return 0; 538 } 539 540 static int 541 agp_generic_enable_v3(struct agp_softc *sc, const struct pci_attach_args *pa, 542 int capoff, u_int32_t mode) 543 { 544 pcireg_t tstatus, mstatus; 545 pcireg_t command; 546 int rq, sba, fw, rate, arqsz, cal; 547 548 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 549 sc->as_capoff + PCI_AGP_STATUS); 550 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 551 capoff + PCI_AGP_STATUS); 552 553 /* Set RQ to the min of mode, tstatus and mstatus */ 554 rq = AGP_MODE_GET_RQ(mode); 555 if (AGP_MODE_GET_RQ(tstatus) < rq) 556 rq = AGP_MODE_GET_RQ(tstatus); 557 if (AGP_MODE_GET_RQ(mstatus) < rq) 558 rq = AGP_MODE_GET_RQ(mstatus); 559 560 /* 561 * ARQSZ - Set the value to the maximum one. 562 * Don't allow the mode register to override values. 563 */ 564 arqsz = AGP_MODE_GET_ARQSZ(mode); 565 if (AGP_MODE_GET_ARQSZ(tstatus) > arqsz) 566 arqsz = AGP_MODE_GET_ARQSZ(tstatus); 567 if (AGP_MODE_GET_ARQSZ(mstatus) > arqsz) 568 arqsz = AGP_MODE_GET_ARQSZ(mstatus); 569 570 /* Calibration cycle - don't allow override by mode register */ 571 cal = AGP_MODE_GET_CAL(tstatus); 572 if (AGP_MODE_GET_CAL(mstatus) < cal) 573 cal = AGP_MODE_GET_CAL(mstatus); 574 575 /* SBA must be supported for AGP v3. */ 576 sba = 1; 577 578 /* Set FW if all three support it. */ 579 fw = (AGP_MODE_GET_FW(tstatus) 580 & AGP_MODE_GET_FW(mstatus) 581 & AGP_MODE_GET_FW(mode)); 582 583 /* Figure out the max rate */ 584 rate = (AGP_MODE_GET_RATE(tstatus) 585 & AGP_MODE_GET_RATE(mstatus) 586 & AGP_MODE_GET_RATE(mode)); 587 if (rate & AGP_MODE_V3_RATE_8x) 588 rate = AGP_MODE_V3_RATE_8x; 589 else 590 rate = AGP_MODE_V3_RATE_4x; 591 592 /* Construct the new mode word and tell the hardware */ 593 command = AGP_MODE_SET_RQ(0, rq); 594 command = AGP_MODE_SET_ARQSZ(command, arqsz); 595 command = AGP_MODE_SET_CAL(command, cal); 596 command = AGP_MODE_SET_SBA(command, sba); 597 command = AGP_MODE_SET_FW(command, fw); 598 command = AGP_MODE_SET_RATE(command, rate); 599 command = AGP_MODE_SET_AGP(command, 1); 600 pci_conf_write(sc->as_pc, sc->as_tag, 601 sc->as_capoff + PCI_AGP_COMMAND, command); 602 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 603 command); 604 605 return 0; 606 } 607 608 struct agp_memory * 609 agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 610 { 611 struct agp_memory *mem; 612 613 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 614 return 0; 615 616 if (sc->as_allocated + size > sc->as_maxmem) 617 return 0; 618 619 if (type != 0) { 620 printf("agp_generic_alloc_memory: unsupported type %d\n", 621 type); 622 return 0; 623 } 624 625 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 626 if (mem == NULL) 627 return NULL; 628 629 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 630 size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { 631 free(mem, M_AGP); 632 return NULL; 633 } 634 635 mem->am_id = sc->as_nextid++; 636 mem->am_size = size; 637 mem->am_type = 0; 638 mem->am_physical = 0; 639 mem->am_offset = 0; 640 mem->am_is_bound = 0; 641 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 642 sc->as_allocated += size; 643 644 return mem; 645 } 646 647 int 648 agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) 649 { 650 if (mem->am_is_bound) 651 return EBUSY; 652 653 sc->as_allocated -= mem->am_size; 654 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 655 bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); 656 free(mem, M_AGP); 657 return 0; 658 } 659 660 int 661 agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 662 off_t offset) 663 { 664 665 return agp_generic_bind_memory_bounded(sc, mem, offset, 666 0, AGP_GET_APERTURE(sc)); 667 } 668 669 int 670 agp_generic_bind_memory_bounded(struct agp_softc *sc, struct agp_memory *mem, 671 off_t offset, off_t start, off_t end) 672 { 673 off_t i, k; 674 bus_size_t done, j; 675 int error; 676 bus_dma_segment_t *segs, *seg; 677 bus_addr_t pa; 678 int contigpages, nseg; 679 680 mutex_enter(&sc->as_mtx); 681 682 if (mem->am_is_bound) { 683 aprint_error_dev(sc->as_dev, "memory already bound\n"); 684 mutex_exit(&sc->as_mtx); 685 return EINVAL; 686 } 687 688 if (offset < start 689 || (offset & (AGP_PAGE_SIZE - 1)) != 0 690 || offset > end 691 || mem->am_size > (end - offset)) { 692 aprint_error_dev(sc->as_dev, 693 "binding memory at bad offset %#lx\n", 694 (unsigned long) offset); 695 mutex_exit(&sc->as_mtx); 696 return EINVAL; 697 } 698 699 /* 700 * XXXfvdl 701 * The memory here needs to be directly accessible from the 702 * AGP video card, so it should be allocated using bus_dma. 703 * However, it need not be contiguous, since individual pages 704 * are translated using the GATT. 705 * 706 * Using a large chunk of contiguous memory may get in the way 707 * of other subsystems that may need one, so we try to be friendly 708 * and ask for allocation in chunks of a minimum of 8 pages 709 * of contiguous memory on average, falling back to 4, 2 and 1 710 * if really needed. Larger chunks are preferred, since allocating 711 * a bus_dma_segment per page would be overkill. 712 */ 713 714 for (contigpages = 8; contigpages > 0; contigpages >>= 1) { 715 nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; 716 segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); 717 if (segs == NULL) { 718 mutex_exit(&sc->as_mtx); 719 return ENOMEM; 720 } 721 if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, 722 segs, nseg, &mem->am_nseg, 723 contigpages > 1 ? 724 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { 725 free(segs, M_AGP); 726 continue; 727 } 728 if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, 729 mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { 730 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 731 free(segs, M_AGP); 732 continue; 733 } 734 if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, 735 mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { 736 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 737 mem->am_size); 738 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 739 free(segs, M_AGP); 740 continue; 741 } 742 mem->am_dmaseg = segs; 743 break; 744 } 745 746 if (contigpages == 0) { 747 mutex_exit(&sc->as_mtx); 748 return ENOMEM; 749 } 750 751 752 /* 753 * Bind the individual pages and flush the chipset's 754 * TLB. 755 */ 756 done = 0; 757 for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { 758 seg = &mem->am_dmamap->dm_segs[i]; 759 /* 760 * Install entries in the GATT, making sure that if 761 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 762 * aligned to PAGE_SIZE, we don't modify too many GATT 763 * entries. 764 */ 765 for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; 766 j += AGP_PAGE_SIZE) { 767 pa = seg->ds_addr + j; 768 AGP_DPF(("binding offset %#lx to pa %#lx\n", 769 (unsigned long)(offset + done + j), 770 (unsigned long)pa)); 771 error = AGP_BIND_PAGE(sc, offset + done + j, pa); 772 if (error) { 773 /* 774 * Bail out. Reverse all the mappings 775 * and unwire the pages. 776 */ 777 for (k = 0; k < done + j; k += AGP_PAGE_SIZE) 778 AGP_UNBIND_PAGE(sc, offset + k); 779 780 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 781 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 782 mem->am_size); 783 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, 784 mem->am_nseg); 785 free(mem->am_dmaseg, M_AGP); 786 mutex_exit(&sc->as_mtx); 787 return error; 788 } 789 } 790 done += seg->ds_len; 791 } 792 793 /* 794 * Flush the CPU cache since we are providing a new mapping 795 * for these pages. 796 */ 797 agp_flush_cache(); 798 799 /* 800 * Make sure the chipset gets the new mappings. 801 */ 802 AGP_FLUSH_TLB(sc); 803 804 mem->am_offset = offset; 805 mem->am_is_bound = 1; 806 807 mutex_exit(&sc->as_mtx); 808 809 return 0; 810 } 811 812 int 813 agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 814 { 815 int i; 816 817 mutex_enter(&sc->as_mtx); 818 819 if (!mem->am_is_bound) { 820 aprint_error_dev(sc->as_dev, "memory is not bound\n"); 821 mutex_exit(&sc->as_mtx); 822 return EINVAL; 823 } 824 825 826 /* 827 * Unbind the individual pages and flush the chipset's 828 * TLB. Unwire the pages so they can be swapped. 829 */ 830 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 831 AGP_UNBIND_PAGE(sc, mem->am_offset + i); 832 833 agp_flush_cache(); 834 AGP_FLUSH_TLB(sc); 835 836 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 837 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); 838 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); 839 840 free(mem->am_dmaseg, M_AGP); 841 842 mem->am_offset = 0; 843 mem->am_is_bound = 0; 844 845 mutex_exit(&sc->as_mtx); 846 847 return 0; 848 } 849 850 /* Helper functions for implementing user/kernel api */ 851 852 static int 853 agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) 854 { 855 if (sc->as_state != AGP_ACQUIRE_FREE) 856 return EBUSY; 857 sc->as_state = state; 858 859 return 0; 860 } 861 862 static int 863 agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) 864 { 865 866 if (sc->as_state == AGP_ACQUIRE_FREE) 867 return 0; 868 869 if (sc->as_state != state) 870 return EBUSY; 871 872 sc->as_state = AGP_ACQUIRE_FREE; 873 return 0; 874 } 875 876 static struct agp_memory * 877 agp_find_memory(struct agp_softc *sc, int id) 878 { 879 struct agp_memory *mem; 880 881 AGP_DPF(("searching for memory block %d\n", id)); 882 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 883 AGP_DPF(("considering memory block %d\n", mem->am_id)); 884 if (mem->am_id == id) 885 return mem; 886 } 887 return 0; 888 } 889 890 /* Implementation of the userland ioctl api */ 891 892 static int 893 agp_info_user(struct agp_softc *sc, agp_info *info) 894 { 895 memset(info, 0, sizeof *info); 896 info->bridge_id = sc->as_id; 897 if (sc->as_capoff != 0) 898 info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, 899 sc->as_capoff + PCI_AGP_STATUS); 900 else 901 info->agp_mode = 0; /* i810 doesn't have real AGP */ 902 info->aper_base = sc->as_apaddr; 903 info->aper_size = AGP_GET_APERTURE(sc) >> 20; 904 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 905 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 906 907 return 0; 908 } 909 910 static int 911 agp_setup_user(struct agp_softc *sc, agp_setup *setup) 912 { 913 return AGP_ENABLE(sc, setup->agp_mode); 914 } 915 916 static int 917 agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) 918 { 919 struct agp_memory *mem; 920 921 mem = AGP_ALLOC_MEMORY(sc, 922 alloc->type, 923 alloc->pg_count << AGP_PAGE_SHIFT); 924 if (mem) { 925 alloc->key = mem->am_id; 926 alloc->physical = mem->am_physical; 927 return 0; 928 } else { 929 return ENOMEM; 930 } 931 } 932 933 static int 934 agp_deallocate_user(struct agp_softc *sc, int id) 935 { 936 struct agp_memory *mem = agp_find_memory(sc, id); 937 938 if (mem) { 939 AGP_FREE_MEMORY(sc, mem); 940 return 0; 941 } else { 942 return ENOENT; 943 } 944 } 945 946 static int 947 agp_bind_user(struct agp_softc *sc, agp_bind *bind) 948 { 949 struct agp_memory *mem = agp_find_memory(sc, bind->key); 950 951 if (!mem) 952 return ENOENT; 953 954 return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); 955 } 956 957 static int 958 agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) 959 { 960 struct agp_memory *mem = agp_find_memory(sc, unbind->key); 961 962 if (!mem) 963 return ENOENT; 964 965 return AGP_UNBIND_MEMORY(sc, mem); 966 } 967 968 static int 969 agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) 970 { 971 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 972 973 if (sc == NULL) 974 return ENXIO; 975 976 if (sc->as_chipc == NULL) 977 return ENXIO; 978 979 if (!sc->as_isopen) 980 sc->as_isopen = 1; 981 else 982 return EBUSY; 983 984 return 0; 985 } 986 987 static int 988 agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) 989 { 990 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 991 struct agp_memory *mem; 992 993 if (sc == NULL) 994 return ENODEV; 995 996 /* 997 * Clear the GATT and force release on last close 998 */ 999 if (sc->as_state == AGP_ACQUIRE_USER) { 1000 while ((mem = TAILQ_FIRST(&sc->as_memory))) { 1001 if (mem->am_is_bound) { 1002 printf("agpclose: mem %d is bound\n", 1003 mem->am_id); 1004 AGP_UNBIND_MEMORY(sc, mem); 1005 } 1006 /* 1007 * XXX it is not documented, but if the protocol allows 1008 * allocate->acquire->bind, it would be possible that 1009 * memory ranges are allocated by the kernel here, 1010 * which we shouldn't free. We'd have to keep track of 1011 * the memory range's owner. 1012 * The kernel API is unsed yet, so we get away with 1013 * freeing all. 1014 */ 1015 AGP_FREE_MEMORY(sc, mem); 1016 } 1017 agp_release_helper(sc, AGP_ACQUIRE_USER); 1018 } 1019 sc->as_isopen = 0; 1020 1021 return 0; 1022 } 1023 1024 static int 1025 agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) 1026 { 1027 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1028 1029 if (sc == NULL) 1030 return ENODEV; 1031 1032 if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) 1033 return EPERM; 1034 1035 switch (cmd) { 1036 case AGPIOC_INFO: 1037 return agp_info_user(sc, (agp_info *) data); 1038 1039 case AGPIOC_ACQUIRE: 1040 return agp_acquire_helper(sc, AGP_ACQUIRE_USER); 1041 1042 case AGPIOC_RELEASE: 1043 return agp_release_helper(sc, AGP_ACQUIRE_USER); 1044 1045 case AGPIOC_SETUP: 1046 return agp_setup_user(sc, (agp_setup *)data); 1047 1048 #ifdef __x86_64__ 1049 { 1050 /* 1051 * Handle paddr_t change from 32 bit for non PAE kernels 1052 * to 64 bit. 1053 */ 1054 #define AGPIOC_OALLOCATE _IOWR(AGPIOC_BASE, 6, agp_oallocate) 1055 1056 typedef struct _agp_oallocate { 1057 int key; /* tag of allocation */ 1058 size_t pg_count; /* number of pages */ 1059 uint32_t type; /* 0 == normal, other devspec */ 1060 u_long physical; /* device specific (some devices 1061 * need a phys address of the 1062 * actual page behind the gatt 1063 * table) */ 1064 } agp_oallocate; 1065 1066 case AGPIOC_OALLOCATE: { 1067 int ret; 1068 agp_allocate aga; 1069 agp_oallocate *oaga = data; 1070 1071 aga.type = oaga->type; 1072 aga.pg_count = oaga->pg_count; 1073 1074 if ((ret = agp_allocate_user(sc, &aga)) == 0) { 1075 oaga->key = aga.key; 1076 oaga->physical = (u_long)aga.physical; 1077 } 1078 1079 return ret; 1080 } 1081 } 1082 #endif 1083 case AGPIOC_ALLOCATE: 1084 return agp_allocate_user(sc, (agp_allocate *)data); 1085 1086 case AGPIOC_DEALLOCATE: 1087 return agp_deallocate_user(sc, *(int *) data); 1088 1089 case AGPIOC_BIND: 1090 return agp_bind_user(sc, (agp_bind *)data); 1091 1092 case AGPIOC_UNBIND: 1093 return agp_unbind_user(sc, (agp_unbind *)data); 1094 1095 } 1096 1097 return EINVAL; 1098 } 1099 1100 static paddr_t 1101 agpmmap(dev_t dev, off_t offset, int prot) 1102 { 1103 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1104 1105 if (sc == NULL) 1106 return ENODEV; 1107 1108 if (offset > AGP_GET_APERTURE(sc)) 1109 return -1; 1110 1111 return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, 1112 BUS_SPACE_MAP_LINEAR)); 1113 } 1114 1115 const struct cdevsw agp_cdevsw = { 1116 .d_open = agpopen, 1117 .d_close = agpclose, 1118 .d_read = noread, 1119 .d_write = nowrite, 1120 .d_ioctl = agpioctl, 1121 .d_stop = nostop, 1122 .d_tty = notty, 1123 .d_poll = nopoll, 1124 .d_mmap = agpmmap, 1125 .d_kqfilter = nokqfilter, 1126 .d_discard = nodiscard, 1127 .d_flag = D_OTHER 1128 }; 1129 1130 /* Implementation of the kernel api */ 1131 1132 void * 1133 agp_find_device(int unit) 1134 { 1135 return device_lookup_private(&agp_cd, unit); 1136 } 1137 1138 enum agp_acquire_state 1139 agp_state(void *devcookie) 1140 { 1141 struct agp_softc *sc = devcookie; 1142 1143 return sc->as_state; 1144 } 1145 1146 void 1147 agp_get_info(void *devcookie, struct agp_info *info) 1148 { 1149 struct agp_softc *sc = devcookie; 1150 1151 info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, 1152 sc->as_capoff + PCI_AGP_STATUS); 1153 info->ai_aperture_base = sc->as_apaddr; 1154 info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ 1155 info->ai_memory_allowed = sc->as_maxmem; 1156 info->ai_memory_used = sc->as_allocated; 1157 info->ai_devid = sc->as_id; 1158 } 1159 1160 int 1161 agp_acquire(void *dev) 1162 { 1163 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 1164 } 1165 1166 int 1167 agp_release(void *dev) 1168 { 1169 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 1170 } 1171 1172 int 1173 agp_enable(void *dev, u_int32_t mode) 1174 { 1175 struct agp_softc *sc = dev; 1176 1177 return AGP_ENABLE(sc, mode); 1178 } 1179 1180 void * 1181 agp_alloc_memory(void *dev, int type, vsize_t bytes) 1182 { 1183 struct agp_softc *sc = dev; 1184 1185 return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); 1186 } 1187 1188 void 1189 agp_free_memory(void *dev, void *handle) 1190 { 1191 struct agp_softc *sc = dev; 1192 struct agp_memory *mem = handle; 1193 1194 AGP_FREE_MEMORY(sc, mem); 1195 } 1196 1197 int 1198 agp_bind_memory(void *dev, void *handle, off_t offset) 1199 { 1200 struct agp_softc *sc = dev; 1201 struct agp_memory *mem = handle; 1202 1203 return AGP_BIND_MEMORY(sc, mem, offset); 1204 } 1205 1206 int 1207 agp_unbind_memory(void *dev, void *handle) 1208 { 1209 struct agp_softc *sc = dev; 1210 struct agp_memory *mem = handle; 1211 1212 return AGP_UNBIND_MEMORY(sc, mem); 1213 } 1214 1215 void 1216 agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) 1217 { 1218 struct agp_memory *mem = handle; 1219 1220 mi->ami_size = mem->am_size; 1221 mi->ami_physical = mem->am_physical; 1222 mi->ami_offset = mem->am_offset; 1223 mi->ami_is_bound = mem->am_is_bound; 1224 } 1225 1226 int 1227 agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, 1228 bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, 1229 bus_dma_segment_t *seg, int nseg, int *rseg) 1230 1231 { 1232 int error, level = 0; 1233 1234 if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, 1235 seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) 1236 goto out; 1237 level++; 1238 1239 if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, 1240 BUS_DMA_NOWAIT | flags)) != 0) 1241 goto out; 1242 level++; 1243 1244 if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, 1245 BUS_DMA_NOWAIT, mapp)) != 0) 1246 goto out; 1247 level++; 1248 1249 if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, 1250 BUS_DMA_NOWAIT)) != 0) 1251 goto out; 1252 1253 *baddr = (*mapp)->dm_segs[0].ds_addr; 1254 1255 return 0; 1256 out: 1257 switch (level) { 1258 case 3: 1259 bus_dmamap_destroy(tag, *mapp); 1260 /* FALLTHROUGH */ 1261 case 2: 1262 bus_dmamem_unmap(tag, *vaddr, size); 1263 /* FALLTHROUGH */ 1264 case 1: 1265 bus_dmamem_free(tag, seg, *rseg); 1266 break; 1267 default: 1268 break; 1269 } 1270 1271 return error; 1272 } 1273 1274 void 1275 agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, 1276 void *vaddr, bus_dma_segment_t *seg, int nseg) 1277 { 1278 bus_dmamap_unload(tag, map); 1279 bus_dmamap_destroy(tag, map); 1280 bus_dmamem_unmap(tag, vaddr, size); 1281 bus_dmamem_free(tag, seg, nseg); 1282 } 1283 1284 static bool 1285 agp_resume(device_t dv, const pmf_qual_t *qual) 1286 { 1287 agp_flush_cache(); 1288 1289 return true; 1290 } 1291
Indexes created Sat Sep 20 22:09:52 GMT 2025