1 /* $NetBSD: bwx.h,v 1.7 2012/02/06 02:14:13 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _ALPHA_BWX_H_ 34 #define _ALPHA_BWX_H_ 35 36 /* 37 * Alpha Byte/Word Extension instructions. 38 * 39 * These instructions are available on EV56 (21164A) and later processors. 40 * 41 * See "Alpha Architecture Handbook, Version 3", DEC order number EC-QD2KB-TE. 42 */ 43 44 static __inline uint8_t 45 alpha_ldbu(volatile uint8_t *a0) 46 { 47 uint8_t v0; 48 49 __asm volatile("ldbu %0, %1" 50 : "=r" (v0) 51 : "m" (*a0)); 52 53 return (v0); 54 } 55 56 static __inline uint16_t 57 alpha_ldwu(volatile uint16_t *a0) 58 { 59 uint16_t v0; 60 61 __asm volatile("ldwu %0, %1" 62 : "=r" (v0) 63 : "m" (*a0)); 64 65 return (v0); 66 } 67 68 static __inline void 69 alpha_stb(volatile uint8_t *a0, uint8_t a1) 70 { 71 72 __asm volatile("stb %1, %0" 73 : "=m" (*a0) 74 : "r" (a1)); 75 } 76 77 static __inline void 78 alpha_stw(volatile uint16_t *a0, uint16_t a1) 79 { 80 81 __asm volatile("stw %1, %0" 82 : "=m" (*a0) 83 : "r" (a1)); 84 } 85 86 static __inline uint8_t 87 alpha_sextb(uint8_t a0) 88 { 89 uint8_t v0; 90 91 __asm volatile("sextb %1, %0" 92 : "=r" (v0) 93 : "r" (a0)); 94 95 return (v0); 96 } 97 98 static __inline uint16_t 99 alpha_sextw(uint16_t a0) 100 { 101 uint16_t v0; 102 103 __asm volatile("sextw %1, %0" 104 : "=r" (v0) 105 : "r" (a0)); 106 107 return (v0); 108 } 109 110 #endif /* _ALPHA_BWX_H_ */ 111