1 /* $NetBSD: amdgpu_bo_list.c,v 1.9 2021/12/19 12:02:39 riastradh Exp $ */ 2 3 /* 4 * Copyright 2015 Advanced Micro Devices, Inc. 5 * All Rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the 9 * "Software"), to deal in the Software without restriction, including 10 * without limitation the rights to use, copy, modify, merge, publish, 11 * distribute, sub license, and/or sell copies of the Software, and to 12 * permit persons to whom the Software is furnished to do so, subject to 13 * the following conditions: 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * The above copyright notice and this permission notice (including the 24 * next paragraph) shall be included in all copies or substantial portions 25 * of the Software. 26 * 27 */ 28 /* 29 * Authors: 30 * Christian Knig <deathsimple (at) vodafone.de> 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: amdgpu_bo_list.c,v 1.9 2021/12/19 12:02:39 riastradh Exp $"); 35 36 #include <linux/uaccess.h> 37 38 #include "amdgpu.h" 39 #include "amdgpu_trace.h" 40 41 #include <linux/nbsd-namespace.h> 42 43 #define AMDGPU_BO_LIST_MAX_PRIORITY 32u 44 #define AMDGPU_BO_LIST_NUM_BUCKETS (AMDGPU_BO_LIST_MAX_PRIORITY + 1) 45 46 static void amdgpu_bo_list_free_rcu(struct rcu_head *rcu) 47 { 48 struct amdgpu_bo_list *list = container_of(rcu, struct amdgpu_bo_list, 49 rhead); 50 51 kvfree(list); 52 } 53 54 static void amdgpu_bo_list_free(struct kref *ref) 55 { 56 struct amdgpu_bo_list *list = container_of(ref, struct amdgpu_bo_list, 57 refcount); 58 struct amdgpu_bo_list_entry *e; 59 60 amdgpu_bo_list_for_each_entry(e, list) { 61 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo); 62 63 amdgpu_bo_unref(&bo); 64 } 65 66 call_rcu(&list->rhead, amdgpu_bo_list_free_rcu); 67 } 68 69 int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp, 70 struct drm_amdgpu_bo_list_entry *info, 71 unsigned num_entries, struct amdgpu_bo_list **result) 72 { 73 unsigned last_entry = 0, first_userptr = num_entries; 74 struct amdgpu_bo_list_entry *array; 75 struct amdgpu_bo_list *list; 76 uint64_t total_size = 0; 77 size_t size; 78 unsigned i; 79 int r; 80 81 if (num_entries > (SIZE_MAX - sizeof(struct amdgpu_bo_list)) 82 / sizeof(struct amdgpu_bo_list_entry)) 83 return -EINVAL; 84 85 size = sizeof(struct amdgpu_bo_list); 86 size += num_entries * sizeof(struct amdgpu_bo_list_entry); 87 list = kvmalloc(size, GFP_KERNEL); 88 if (!list) 89 return -ENOMEM; 90 91 kref_init(&list->refcount); 92 list->gds_obj = NULL; 93 list->gws_obj = NULL; 94 list->oa_obj = NULL; 95 96 array = amdgpu_bo_list_array_entry(list, 0); 97 memset(array, 0, num_entries * sizeof(struct amdgpu_bo_list_entry)); 98 99 for (i = 0; i < num_entries; ++i) { 100 struct amdgpu_bo_list_entry *entry; 101 struct drm_gem_object *gobj; 102 struct amdgpu_bo *bo; 103 #ifdef __NetBSD__ 104 struct vmspace *usermm; 105 #else 106 struct mm_struct *usermm; 107 #endif 108 109 gobj = drm_gem_object_lookup(filp, info[i].bo_handle); 110 if (!gobj) { 111 r = -ENOENT; 112 goto error_free; 113 } 114 115 bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj)); 116 drm_gem_object_put_unlocked(gobj); 117 118 usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm); 119 if (usermm) { 120 #ifdef __NetBSD__ /* XXX amdgpu userptr */ 121 amdgpu_bo_unref(&bo); 122 r = -EPERM; 123 goto error_free; 124 #else 125 if (usermm != current->mm) { 126 amdgpu_bo_unref(&bo); 127 r = -EPERM; 128 goto error_free; 129 } 130 entry = &array[--first_userptr]; 131 #endif 132 } else { 133 entry = &array[last_entry++]; 134 } 135 136 entry->priority = min(info[i].bo_priority, 137 AMDGPU_BO_LIST_MAX_PRIORITY); 138 entry->tv.bo = &bo->tbo; 139 140 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GDS) 141 list->gds_obj = bo; 142 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GWS) 143 list->gws_obj = bo; 144 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_OA) 145 list->oa_obj = bo; 146 147 total_size += amdgpu_bo_size(bo); 148 trace_amdgpu_bo_list_set(list, bo); 149 } 150 151 list->first_userptr = first_userptr; 152 list->num_entries = num_entries; 153 154 trace_amdgpu_cs_bo_status(list->num_entries, total_size); 155 156 *result = list; 157 return 0; 158 159 error_free: 160 for (i = 0; i < last_entry; ++i) { 161 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo); 162 163 amdgpu_bo_unref(&bo); 164 } 165 for (i = first_userptr; i < num_entries; ++i) { 166 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo); 167 168 amdgpu_bo_unref(&bo); 169 } 170 kvfree(list); 171 return r; 172 173 } 174 175 static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id) 176 { 177 struct amdgpu_bo_list *list; 178 179 mutex_lock(&fpriv->bo_list_lock); 180 list = idr_remove(&fpriv->bo_list_handles, id); 181 mutex_unlock(&fpriv->bo_list_lock); 182 if (list) 183 kref_put(&list->refcount, amdgpu_bo_list_free); 184 } 185 186 int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id, 187 struct amdgpu_bo_list **result) 188 { 189 rcu_read_lock(); 190 *result = idr_find(&fpriv->bo_list_handles, id); 191 192 if (*result && kref_get_unless_zero(&(*result)->refcount)) { 193 rcu_read_unlock(); 194 return 0; 195 } 196 197 rcu_read_unlock(); 198 return -ENOENT; 199 } 200 201 void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list, 202 struct list_head *validated) 203 { 204 /* This is based on the bucket sort with O(n) time complexity. 205 * An item with priority "i" is added to bucket[i]. The lists are then 206 * concatenated in descending order. 207 */ 208 struct list_head bucket[AMDGPU_BO_LIST_NUM_BUCKETS]; 209 struct amdgpu_bo_list_entry *e; 210 unsigned i; 211 212 for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++) 213 INIT_LIST_HEAD(&bucket[i]); 214 215 /* Since buffers which appear sooner in the relocation list are 216 * likely to be used more often than buffers which appear later 217 * in the list, the sort mustn't change the ordering of buffers 218 * with the same priority, i.e. it must be stable. 219 */ 220 amdgpu_bo_list_for_each_entry(e, list) { 221 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo); 222 unsigned priority = e->priority; 223 224 if (!bo->parent) 225 list_add_tail(&e->tv.head, &bucket[priority]); 226 227 e->user_pages = NULL; 228 } 229 230 /* Connect the sorted buckets in the output list. */ 231 for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++) 232 list_splice(&bucket[i], validated); 233 } 234 235 void amdgpu_bo_list_put(struct amdgpu_bo_list *list) 236 { 237 kref_put(&list->refcount, amdgpu_bo_list_free); 238 } 239 240 int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in, 241 struct drm_amdgpu_bo_list_entry **info_param) 242 { 243 const void __user *uptr = u64_to_user_ptr(in->bo_info_ptr); 244 const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry); 245 struct drm_amdgpu_bo_list_entry *info; 246 int r; 247 248 info = kvmalloc_array(in->bo_number, info_size, GFP_KERNEL); 249 if (!info) 250 return -ENOMEM; 251 252 /* copy the handle array from userspace to a kernel buffer */ 253 r = -EFAULT; 254 if (likely(info_size == in->bo_info_size)) { 255 unsigned long bytes = in->bo_number * 256 in->bo_info_size; 257 258 if (copy_from_user(info, uptr, bytes)) 259 goto error_free; 260 261 } else { 262 unsigned long bytes = min(in->bo_info_size, info_size); 263 unsigned i; 264 265 memset(info, 0, in->bo_number * info_size); 266 for (i = 0; i < in->bo_number; ++i) { 267 if (copy_from_user(&info[i], uptr, bytes)) 268 goto error_free; 269 270 uptr += in->bo_info_size; 271 } 272 } 273 274 *info_param = info; 275 return 0; 276 277 error_free: 278 kvfree(info); 279 return r; 280 } 281 282 int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, 283 struct drm_file *filp) 284 { 285 struct amdgpu_device *adev = dev->dev_private; 286 struct amdgpu_fpriv *fpriv = filp->driver_priv; 287 union drm_amdgpu_bo_list *args = data; 288 uint32_t handle = args->in.list_handle; 289 struct drm_amdgpu_bo_list_entry *info = NULL; 290 struct amdgpu_bo_list *list, *old; 291 int r; 292 293 r = amdgpu_bo_create_list_entry_array(&args->in, &info); 294 if (r) 295 return r; 296 297 switch (args->in.operation) { 298 case AMDGPU_BO_LIST_OP_CREATE: 299 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number, 300 &list); 301 if (r) 302 goto error_free; 303 304 idr_preload(GFP_KERNEL); 305 mutex_lock(&fpriv->bo_list_lock); 306 r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL); 307 mutex_unlock(&fpriv->bo_list_lock); 308 idr_preload_end(); 309 if (r < 0) { 310 goto error_put_list; 311 } 312 313 handle = r; 314 break; 315 316 case AMDGPU_BO_LIST_OP_DESTROY: 317 amdgpu_bo_list_destroy(fpriv, handle); 318 handle = 0; 319 break; 320 321 case AMDGPU_BO_LIST_OP_UPDATE: 322 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number, 323 &list); 324 if (r) 325 goto error_free; 326 327 mutex_lock(&fpriv->bo_list_lock); 328 old = idr_replace(&fpriv->bo_list_handles, list, handle); 329 mutex_unlock(&fpriv->bo_list_lock); 330 331 if (IS_ERR(old)) { 332 r = PTR_ERR(old); 333 goto error_put_list; 334 } 335 336 amdgpu_bo_list_put(old); 337 break; 338 339 default: 340 r = -EINVAL; 341 goto error_free; 342 } 343 344 memset(args, 0, sizeof(*args)); 345 args->out.list_handle = handle; 346 kvfree(info); 347 348 return 0; 349 350 error_put_list: 351 amdgpu_bo_list_put(list); 352 353 error_free: 354 kvfree(info); 355 return r; 356 } 357
Indexes created Sun Sep 21 20:09:37 GMT 2025