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      1 /*	$NetBSD: amdgpu_encoders.c,v 1.3 2021/12/18 23:44:58 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2007-8 Advanced Micro Devices, Inc.
      5  * Copyright 2008 Red Hat Inc.
      6  *
      7  * Permission is hereby granted, free of charge, to any person obtaining a
      8  * copy of this software and associated documentation files (the "Software"),
      9  * to deal in the Software without restriction, including without limitation
     10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     11  * and/or sell copies of the Software, and to permit persons to whom the
     12  * Software is furnished to do so, subject to the following conditions:
     13  *
     14  * The above copyright notice and this permission notice shall be included in
     15  * all copies or substantial portions of the Software.
     16  *
     17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     20  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     21  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     22  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     23  * OTHER DEALINGS IN THE SOFTWARE.
     24  *
     25  * Authors: Dave Airlie
     26  *          Alex Deucher
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: amdgpu_encoders.c,v 1.3 2021/12/18 23:44:58 riastradh Exp $");
     31 
     32 #include <drm/drm_crtc_helper.h>
     33 #include <drm/amdgpu_drm.h>
     34 #include "amdgpu.h"
     35 #include "amdgpu_connectors.h"
     36 #include "amdgpu_display.h"
     37 #include "atom.h"
     38 #include "atombios_encoders.h"
     39 
     40 void
     41 amdgpu_link_encoder_connector(struct drm_device *dev)
     42 {
     43 	struct amdgpu_device *adev = dev->dev_private;
     44 	struct drm_connector *connector;
     45 	struct drm_connector_list_iter iter;
     46 	struct amdgpu_connector *amdgpu_connector;
     47 	struct drm_encoder *encoder;
     48 	struct amdgpu_encoder *amdgpu_encoder;
     49 
     50 	drm_connector_list_iter_begin(dev, &iter);
     51 	/* walk the list and link encoders to connectors */
     52 	drm_for_each_connector_iter(connector, &iter) {
     53 		amdgpu_connector = to_amdgpu_connector(connector);
     54 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
     55 			amdgpu_encoder = to_amdgpu_encoder(encoder);
     56 			if (amdgpu_encoder->devices & amdgpu_connector->devices) {
     57 				drm_connector_attach_encoder(connector, encoder);
     58 				if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
     59 					amdgpu_atombios_encoder_init_backlight(amdgpu_encoder, connector);
     60 					adev->mode_info.bl_encoder = amdgpu_encoder;
     61 				}
     62 			}
     63 		}
     64 	}
     65 	drm_connector_list_iter_end(&iter);
     66 }
     67 
     68 void amdgpu_encoder_set_active_device(struct drm_encoder *encoder)
     69 {
     70 	struct drm_device *dev = encoder->dev;
     71 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
     72 	struct drm_connector *connector;
     73 	struct drm_connector_list_iter iter;
     74 
     75 	drm_connector_list_iter_begin(dev, &iter);
     76 	drm_for_each_connector_iter(connector, &iter) {
     77 		if (connector->encoder == encoder) {
     78 			struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
     79 			amdgpu_encoder->active_device = amdgpu_encoder->devices & amdgpu_connector->devices;
     80 			DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
     81 				  amdgpu_encoder->active_device, amdgpu_encoder->devices,
     82 				  amdgpu_connector->devices, encoder->encoder_type);
     83 		}
     84 	}
     85 	drm_connector_list_iter_end(&iter);
     86 }
     87 
     88 struct drm_connector *
     89 amdgpu_get_connector_for_encoder(struct drm_encoder *encoder)
     90 {
     91 	struct drm_device *dev = encoder->dev;
     92 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
     93 	struct drm_connector *connector, *found = NULL;
     94 	struct drm_connector_list_iter iter;
     95 	struct amdgpu_connector *amdgpu_connector;
     96 
     97 	drm_connector_list_iter_begin(dev, &iter);
     98 	drm_for_each_connector_iter(connector, &iter) {
     99 		amdgpu_connector = to_amdgpu_connector(connector);
    100 		if (amdgpu_encoder->active_device & amdgpu_connector->devices) {
    101 			found = connector;
    102 			break;
    103 		}
    104 	}
    105 	drm_connector_list_iter_end(&iter);
    106 	return found;
    107 }
    108 
    109 struct drm_connector *
    110 amdgpu_get_connector_for_encoder_init(struct drm_encoder *encoder)
    111 {
    112 	struct drm_device *dev = encoder->dev;
    113 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
    114 	struct drm_connector *connector, *found = NULL;
    115 	struct drm_connector_list_iter iter;
    116 	struct amdgpu_connector *amdgpu_connector;
    117 
    118 	drm_connector_list_iter_begin(dev, &iter);
    119 	drm_for_each_connector_iter(connector, &iter) {
    120 		amdgpu_connector = to_amdgpu_connector(connector);
    121 		if (amdgpu_encoder->devices & amdgpu_connector->devices) {
    122 			found = connector;
    123 			break;
    124 		}
    125 	}
    126 	drm_connector_list_iter_end(&iter);
    127 	return found;
    128 }
    129 
    130 struct drm_encoder *amdgpu_get_external_encoder(struct drm_encoder *encoder)
    131 {
    132 	struct drm_device *dev = encoder->dev;
    133 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
    134 	struct drm_encoder *other_encoder;
    135 	struct amdgpu_encoder *other_amdgpu_encoder;
    136 
    137 	if (amdgpu_encoder->is_ext_encoder)
    138 		return NULL;
    139 
    140 	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
    141 		if (other_encoder == encoder)
    142 			continue;
    143 		other_amdgpu_encoder = to_amdgpu_encoder(other_encoder);
    144 		if (other_amdgpu_encoder->is_ext_encoder &&
    145 		    (amdgpu_encoder->devices & other_amdgpu_encoder->devices))
    146 			return other_encoder;
    147 	}
    148 	return NULL;
    149 }
    150 
    151 u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
    152 {
    153 	struct drm_encoder *other_encoder = amdgpu_get_external_encoder(encoder);
    154 
    155 	if (other_encoder) {
    156 		struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(other_encoder);
    157 
    158 		switch (amdgpu_encoder->encoder_id) {
    159 		case ENCODER_OBJECT_ID_TRAVIS:
    160 		case ENCODER_OBJECT_ID_NUTMEG:
    161 			return amdgpu_encoder->encoder_id;
    162 		default:
    163 			return ENCODER_OBJECT_ID_NONE;
    164 		}
    165 	}
    166 	return ENCODER_OBJECT_ID_NONE;
    167 }
    168 
    169 void amdgpu_panel_mode_fixup(struct drm_encoder *encoder,
    170 			     struct drm_display_mode *adjusted_mode)
    171 {
    172 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
    173 	struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
    174 	unsigned hblank = native_mode->htotal - native_mode->hdisplay;
    175 	unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
    176 	unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
    177 	unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
    178 	unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
    179 	unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
    180 
    181 	adjusted_mode->clock = native_mode->clock;
    182 	adjusted_mode->flags = native_mode->flags;
    183 
    184 	adjusted_mode->hdisplay = native_mode->hdisplay;
    185 	adjusted_mode->vdisplay = native_mode->vdisplay;
    186 
    187 	adjusted_mode->htotal = native_mode->hdisplay + hblank;
    188 	adjusted_mode->hsync_start = native_mode->hdisplay + hover;
    189 	adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
    190 
    191 	adjusted_mode->vtotal = native_mode->vdisplay + vblank;
    192 	adjusted_mode->vsync_start = native_mode->vdisplay + vover;
    193 	adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
    194 
    195 	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
    196 
    197 	adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
    198 	adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
    199 
    200 	adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
    201 	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
    202 	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
    203 
    204 	adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
    205 	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
    206 	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
    207 
    208 }
    209 
    210 bool amdgpu_dig_monitor_is_duallink(struct drm_encoder *encoder,
    211 				    u32 pixel_clock)
    212 {
    213 	struct drm_connector *connector;
    214 	struct amdgpu_connector *amdgpu_connector;
    215 	struct amdgpu_connector_atom_dig *dig_connector;
    216 
    217 	connector = amdgpu_get_connector_for_encoder(encoder);
    218 	/* if we don't have an active device yet, just use one of
    219 	 * the connectors tied to the encoder.
    220 	 */
    221 	if (!connector)
    222 		connector = amdgpu_get_connector_for_encoder_init(encoder);
    223 	amdgpu_connector = to_amdgpu_connector(connector);
    224 
    225 	switch (connector->connector_type) {
    226 	case DRM_MODE_CONNECTOR_DVII:
    227 	case DRM_MODE_CONNECTOR_HDMIB:
    228 		if (amdgpu_connector->use_digital) {
    229 			/* HDMI 1.3 supports up to 340 Mhz over single link */
    230 			if (drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
    231 				if (pixel_clock > 340000)
    232 					return true;
    233 				else
    234 					return false;
    235 			} else {
    236 				if (pixel_clock > 165000)
    237 					return true;
    238 				else
    239 					return false;
    240 			}
    241 		} else
    242 			return false;
    243 	case DRM_MODE_CONNECTOR_DVID:
    244 	case DRM_MODE_CONNECTOR_HDMIA:
    245 	case DRM_MODE_CONNECTOR_DisplayPort:
    246 		dig_connector = amdgpu_connector->con_priv;
    247 		if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
    248 		    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
    249 			return false;
    250 		else {
    251 			/* HDMI 1.3 supports up to 340 Mhz over single link */
    252 			if (drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
    253 				if (pixel_clock > 340000)
    254 					return true;
    255 				else
    256 					return false;
    257 			} else {
    258 				if (pixel_clock > 165000)
    259 					return true;
    260 				else
    261 					return false;
    262 			}
    263 		}
    264 	default:
    265 		return false;
    266 	}
    267 }
    268