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      1 /*	$NetBSD: cpufunc_asm_armv4.S,v 1.6 2022/10/20 06:58:38 skrll Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2001 ARM Limited
      5  * Copyright (c) 1997,1998 Mark Brinicombe.
      6  * Copyright (c) 1997 Causality Limited
      7  * All rights reserved.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed by Causality Limited.
     20  * 4. The name of Causality Limited may not be used to endorse or promote
     21  *    products derived from this software without specific prior written
     22  *    permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
     25  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     26  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     27  * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
     28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     30  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  *
     36  * ARMv4 assembly functions for CPU / MMU / TLB specific operations
     37  */
     38 
     39 #include "assym.h"
     40 #include <machine/asm.h>
     41 #include <arm/locore.h>
     42 
     43 /*
     44  * TLB functions
     45  */
     46 ENTRY(armv4_tlb_flushID)
     47 	mcr	p15, 0, r0, c8, c7, 0	/* flush I+D tlb */
     48 	mov	pc, lr
     49 END(armv4_tlb_flushID)
     50 
     51 ENTRY(armv4_tlb_flushI)
     52 	mov	r0, #0
     53 	mcr	p15, 0, r0, c8, c5, 0	/* flush I tlb */
     54 	mov	pc, lr
     55 END(armv4_tlb_flushI)
     56 
     57 ENTRY(armv4_tlb_flushD)
     58 	mov	r0, #0
     59 	mcr	p15, 0, r0, c8, c6, 0	/* flush D tlb */
     60 	mov	pc, lr
     61 END(armv4_tlb_flushD)
     62 
     63 ENTRY(armv4_tlb_flushD_SE)
     64 	mcr	p15, 0, r0, c8, c6, 1	/* flush D tlb single entry */
     65 #if PAGE_SIZE == 2 * L2_S_SIZE
     66 	add	r0, r0, #L2_S_SIZE
     67 	mcr	p15, 0, r0, c8, c6, 1	/* flush D tlb single entry */
     68 #endif
     69 	mov	pc, lr
     70 END(armv4_tlb_flushD_SE)
     71 
     72 /*
     73  * Other functions
     74  */
     75 ENTRY(armv4_drain_writebuf)
     76 	mcr	p15, 0, r0, c7, c10, 4	/* drain write buffer */
     77 	mov	pc, lr
     78 END(armv4_drain_writebuf)
     79