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      1 /*	$Id: at91pmc.c,v 1.8 2020/02/24 12:38:57 rin Exp $	*/
      2 /*	$NetBSD: at91pmc.c,v 1.8 2020/02/24 12:38:57 rin Exp $	*/
      3 
      4 /*
      5  * Copyright (c) 2007 Embedtronics Oy
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     19  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     20  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     21  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     22  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     25  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     27  * POSSIBILITY OF SUCH DAMAGE.
     28  */
     29 
     30 #include <sys/cdefs.h>
     31 __KERNEL_RCSID(0, "$NetBSD: at91pmc.c,v 1.8 2020/02/24 12:38:57 rin Exp $");
     32 
     33 #include <sys/types.h>
     34 #include <sys/param.h>
     35 #include <sys/systm.h>
     36 #include <sys/kernel.h>
     37 #include <sys/time.h>
     38 #include <sys/device.h>
     39 
     40 #include <sys/bus.h>
     41 #include <machine/intr.h>
     42 
     43 #include <arm/cpufunc.h>
     44 
     45 #include <arm/at91/at91reg.h>
     46 #include <arm/at91/at91var.h>
     47 #include <arm/at91/at91pmcreg.h>
     48 #include <arm/at91/at91pmcvar.h>
     49 
     50 #define	SLOW_CLOCK	32768LU
     51 
     52 void
     53 at91pmc_get_clocks(struct at91bus_clocks *clocks)
     54 {
     55 	uint64_t		mclk, pllaclk, pllbclk, pclk, mstclk;
     56 	uint32_t		reg;
     57 
     58 	if (!((reg = PMCREG(PMC_MOR)) & PMC_MOR_MOSCEN))
     59 		panic("%s: main oscillator not enabled (MOR=%#X)", __FUNCTION__, reg);
     60 
     61 	if (!((reg = PMCREG(PMC_MCFR)) & PMC_MCFR_MAINRDY))
     62 		panic("%s: main oscillator not ready (MCFR=%#X)", __FUNCTION__, reg);
     63 
     64 	mclk  = ((reg & PMC_MCFR_MAINF) * SLOW_CLOCK) / 16U;
     65 
     66 	// try to guess some nice MHz value
     67 	if (((mclk / 1000) % 1000) >= 990) {
     68 	  mclk += 1000000U - (mclk % 1000000U);
     69 	} else if (((mclk / 1000) % 1000) <= 10) {
     70 	  mclk -= (mclk % 1000000U);
     71 	}
     72 
     73 	PMCREG(PMC_PLLICPR) = PMC_PLLICPR_ICPPLLA | PMC_PLLICPR_ICPPLLB;
     74 
     75 	reg = PMCREG(PMC_PLLAR); pllaclk = 0;
     76 	if (reg & PMC_PLL_DIV) {
     77 		pllaclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1);
     78 		pllaclk /= (reg & PMC_PLL_DIV) >> PMC_PLL_DIV_SHIFT;
     79 	}
     80 
     81 	reg = PMCREG(PMC_PLLBR); pllbclk = 0;
     82 	if (reg & PMC_PLL_DIV) {
     83 		pllbclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1);
     84 		pllbclk /= (reg & PMC_PLL_DIV) >> PMC_PLL_DIV_SHIFT;
     85 		if (reg & PMC_PLLBR_USB_96M) {
     86 			pllbclk /= 2;
     87 		}
     88 	}
     89 
     90 	reg = PMCREG(PMC_MCKR);
     91 	switch ((reg & PMC_MCKR_CSS)) {
     92 	case PMC_MCKR_CSS_SLOW_CLK:
     93 	  pclk = SLOW_CLOCK;
     94 	  break;
     95 	default:
     96 	case PMC_MCKR_CSS_MAIN_CLK:
     97 	  pclk = mclk;
     98 	  break;
     99 	case PMC_MCKR_CSS_PLLA:
    100 	  pclk = pllaclk;
    101 	  break;
    102 	case PMC_MCKR_CSS_PLLB:
    103 	  pclk = pllbclk;
    104 	  break;
    105 	}
    106 	pclk >>= (reg & PMC_MCKR_PRES) >> PMC_MCKR_PRES_SHIFT;
    107 	mstclk = pclk / (((reg & PMC_MCKR_MDIV) >> PMC_MCKR_MDIV_SHIFT) + 1);
    108 
    109 	clocks->slow = SLOW_CLOCK;
    110 	clocks->main = mclk;
    111 	clocks->cpu = pclk;
    112 	clocks->master = mstclk;
    113 	clocks->plla = pllaclk;
    114 	clocks->pllb = pllbclk;
    115 }
    116 
    117 
    118 #define	PID_COUNT	32
    119 static int pid_enable_count[PID_COUNT] = {0};
    120 
    121 void
    122 at91pmc_peripheral_clock(int pid, int enable)
    123 {
    124 	int s;
    125 
    126 	if (pid < 0 || pid >= PID_COUNT)
    127 		panic("%s: pid %d out of range", __FUNCTION__, pid);
    128 
    129 	s = splhigh();
    130 
    131 	if (enable) {
    132 		pid_enable_count[pid]++;
    133 		PMCREG(PMC_PCER) = (1U << pid);
    134 	} else {
    135 		if (--pid_enable_count[pid] < 0)
    136 			panic("%s: pid %d enable count got negative (%d)",
    137 			      __FUNCTION__, pid, pid_enable_count[pid]);
    138 		if (pid_enable_count[pid] == 0)
    139 			PMCREG(PMC_PCDR) = (1U << pid);
    140 	}
    141 
    142 	splx(s);
    143 
    144 	if (enable) {
    145 		int c;
    146 		for (c = 0; c < 10000; c++) {
    147 		  __insn_barrier();
    148 		}
    149 	}
    150 }
    151